70 lines
2.4 KiB
C
70 lines
2.4 KiB
C
/**
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* @file dfu_layout.h
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* @brief Flash memory map and bootsetting record for the CAIIC dual-bank
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* bootloader + OTA design (256KB flash - the boards actually carry
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* the 256KB silicon; reads above 0x0103FFFF alias/fault, see dev
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* log section 37).
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*
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* Layout: Boot / bootsetting / APP_DATA unchanged (16KB/8KB/8KB); the
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* remaining 224KB is split into two 112KB APP banks.
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* Shared by the bootloader (Boot/) and the application (mcm-ddc-ble/).
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*/
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#ifndef __DFU_LAYOUT_H__
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#define __DFU_LAYOUT_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <stdint.h>
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/* Flash base of this chip family */
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#define CAIIC_FLASH_BASE 0x01000000u
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/* Region map (256KB total, ends at 0x01040000) */
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#define CAIIC_BOOT_BASE 0x01000000u
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#define CAIIC_BOOT_SIZE 0x00004000u /* 16KB bootloader */
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#define CAIIC_BOOTSETTING_ADDR 0x01004000u
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#define CAIIC_BOOTSETTING_SIZE 0x00002000u /* 8KB, only one 4KB sector used */
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#define CAIIC_APP_DATA_ADDR 0x01006000u
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#define CAIIC_APP_DATA_SIZE 0x00002000u /* 8KB reserved (user data) */
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#define CAIIC_APP1_BASE 0x01008000u
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#define CAIIC_APP_BANK_SIZE 0x0001C000u /* 112KB per bank */
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#define CAIIC_APP2_BASE 0x01024000u
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#define CAIIC_IMAGE_UPDATE_BASE 0x01040000u /* end of flash; no update region */
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#define CAIIC_IMAGE_UPDATE_SIZE 0x00000000u
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/* Flash erase unit */
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#define CAIIC_FLASH_SECTOR_SIZE 0x1000u /* 4KB */
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/* Bootsetting record */
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#define CAIIC_BOOT_MAGIC 0xCA11C011u
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#define CAIIC_ACTIVE_BANK1 1u
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#define CAIIC_ACTIVE_BANK2 2u
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typedef struct
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{
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uint32_t start_address; /* absolute jump (vector table) address of the image */
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uint32_t size; /* image size in bytes */
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uint32_t crc32; /* IEEE CRC32 of the whole image (verified at OTA time) */
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uint32_t version; /* e.g. 0x010001 = V1.00.01 */
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} caiic_bank_t;
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typedef struct
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{
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uint32_t magic; /* CAIIC_BOOT_MAGIC */
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uint32_t active_bank; /* CAIIC_ACTIVE_BANK1 / 2 */
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caiic_bank_t bank1;
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caiic_bank_t bank2;
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uint32_t crc32; /* CRC32 over all fields above this one */
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} caiic_bootsetting_t;
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/* Vector table remap: PWR->VTOR_REG = CAIIC_VTOR_EN | vector base */
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#define CAIIC_VTOR_EN 0x80000000u
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#ifdef __cplusplus
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}
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#endif
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#endif /* __DFU_LAYOUT_H__ */
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