f729d16ff2
Firmware: - bsp_usart: RX moved from RXDNE byte-queue IRQ to DMA CH2 circular ring (2KB) + IDLE-irq wakeup; bytes keep landing during flash-erase interrupt-off windows (the reason lockstep was needed before) - app_ota: stream mode (ble_protocol.md section 6.7) - 16B BEGIN with flags bit0=STREAM (UART channel only), DATA acked on 4KB sector crossings (original chunk length; two ack-gating bugs fixed during field test), throttled BAD_STATE for go-back-N - FreeRTOS heap 20KB->18KB: the 2KB ring pushed the stack top past the 0x2000C000 SRAM cliff (probed via SWD: accesses above fault on this silicon, usable app SRAM is 32KB) which locked the board at boot; merge_image.py now hard-fails the package when the image initial SP leaves (0x20004000, 0x2000C000] Tools: - ble_ota_update.py: UART stream sender (8KB window, stall watchdog rewind, auto-fallback to lockstep on pre-V1.00.24 firmware, --lockstep to force); case-insensitive option parsing - flash_package.py/bat: stream NSpyocd output live (chunked reads keep the \r progress bar), vendor banner rebranded to CAIIC NSLINK UMP - merge_image.py: initial-SP cliff guard Verified: UART stream OTA both directions, 55.8KB in ~5.9s @9.5kB/s 0 rewinds (lockstep was 39s), PASS after reboot; board boot fixed and verified via SWD. Docs: ble_protocol.md section 6.7, dev log section 47 (+ SRAM cliff post-mortem), AGENTS.md RAM rule rewritten (both cliffs) + V1.00.25
21 lines
589 B
C
21 lines
589 B
C
/**
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* @file app_version.h
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* @brief Firmware version string.
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* Both macros may be overridden per Keil target (-DAPP_FW_VERSION=...):
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* the "APP2" target builds the same sources one version up, linked at
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* the APP2 bank base (see tools/make_dual_package.bat).
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*/
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#ifndef __APP_VERSION_H__
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#define __APP_VERSION_H__
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#ifndef APP_FW_VERSION
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#define APP_FW_VERSION "V1.00.25"
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#endif
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/* Numeric form used by the BLE info query / OTA records: 0x00MMmmpp */
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#ifndef APP_FW_VERSION_NUM
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#define APP_FW_VERSION_NUM 0x00010019u
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#endif
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#endif /* __APP_VERSION_H__ */
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