f729d16ff2
Firmware: - bsp_usart: RX moved from RXDNE byte-queue IRQ to DMA CH2 circular ring (2KB) + IDLE-irq wakeup; bytes keep landing during flash-erase interrupt-off windows (the reason lockstep was needed before) - app_ota: stream mode (ble_protocol.md section 6.7) - 16B BEGIN with flags bit0=STREAM (UART channel only), DATA acked on 4KB sector crossings (original chunk length; two ack-gating bugs fixed during field test), throttled BAD_STATE for go-back-N - FreeRTOS heap 20KB->18KB: the 2KB ring pushed the stack top past the 0x2000C000 SRAM cliff (probed via SWD: accesses above fault on this silicon, usable app SRAM is 32KB) which locked the board at boot; merge_image.py now hard-fails the package when the image initial SP leaves (0x20004000, 0x2000C000] Tools: - ble_ota_update.py: UART stream sender (8KB window, stall watchdog rewind, auto-fallback to lockstep on pre-V1.00.24 firmware, --lockstep to force); case-insensitive option parsing - flash_package.py/bat: stream NSpyocd output live (chunked reads keep the \r progress bar), vendor banner rebranded to CAIIC NSLINK UMP - merge_image.py: initial-SP cliff guard Verified: UART stream OTA both directions, 55.8KB in ~5.9s @9.5kB/s 0 rewinds (lockstep was 39s), PASS after reboot; board boot fixed and verified via SWD. Docs: ble_protocol.md section 6.7, dev log section 47 (+ SRAM cliff post-mortem), AGENTS.md RAM rule rewritten (both cliffs) + V1.00.25
117 lines
5.1 KiB
C
117 lines
5.1 KiB
C
/*
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FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
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All rights reserved
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http://www.FreeRTOS.org
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FreeRTOS is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License (version 2) as published by the
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Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
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*/
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#ifndef FREERTOS_CONFIG_H
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#define FREERTOS_CONFIG_H
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/*-----------------------------------------------------------
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* Application specific definitions.
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*
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* These definitions should be adjusted for your particular hardware and
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* application requirements.
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*----------------------------------------------------------*/
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/* Ensure stdint is only used by the compiler, and not the assembler. */
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#if defined(__ICCARM__) || defined(__CC_ARM) || defined(__GNUC__)
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#include <stdint.h>
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extern uint32_t SystemCoreClock;
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#endif
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#define configUSE_PREEMPTION 1
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#define configUSE_IDLE_HOOK 0
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#define configUSE_TICK_HOOK 0
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#define configCPU_CLOCK_HZ ( SystemCoreClock )
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#define configTICK_RATE_HZ ( ( TickType_t ) 1000 )
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#define configMAX_PRIORITIES ( 7 )
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#define configMINIMAL_STACK_SIZE ( ( uint16_t ) 128 )
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/* Usable app SRAM on this silicon is 32KB (0x20004000..0x2000BFFF; accesses
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* above fault - the top 16KB block is not available to the APP, see dev log
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* §47). The stack top (__initial_sp) must stay below 0x2000C000, so
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* RW+ZI+STACK must fit 32KB; heap sized accordingly (12.6KB free was
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* observed at V1.00.23 with a 20KB heap, so 2KB less is safe). */
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#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 18 * 1024 ) )
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#define configMAX_TASK_NAME_LEN ( 16 )
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#define configUSE_TRACE_FACILITY 1
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#define configUSE_STATS_FORMATTING_FUNCTIONS 1
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#define configUSE_16_BIT_TICKS 0
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#define configIDLE_SHOULD_YIELD 1
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#define configUSE_MUTEXES 1
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#define configQUEUE_REGISTRY_SIZE 8
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#define configCHECK_FOR_STACK_OVERFLOW 0
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#define configUSE_RECURSIVE_MUTEXES 1
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#define configUSE_MALLOC_FAILED_HOOK 0
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#define configUSE_APPLICATION_TASK_TAG 0
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#define configUSE_COUNTING_SEMAPHORES 1
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#define configGENERATE_RUN_TIME_STATS 0
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/* Co-routine definitions. */
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#define configUSE_CO_ROUTINES 0
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#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
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/* Software timer definitions. */
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#define configUSE_TIMERS 0
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#define configTIMER_TASK_PRIORITY ( 2 )
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#define configTIMER_QUEUE_LENGTH 10
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#define configTIMER_TASK_STACK_DEPTH ( configMINIMAL_STACK_SIZE * 2 )
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/* Set the following definitions to 1 to include the API function, or zero
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to exclude the API function. */
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#define INCLUDE_vTaskPrioritySet 1
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#define INCLUDE_uxTaskPriorityGet 1
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#define INCLUDE_vTaskDelete 1
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#define INCLUDE_vTaskCleanUpResources 1
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#define INCLUDE_vTaskSuspend 1
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#define INCLUDE_vTaskDelayUntil 1
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#define INCLUDE_vTaskDelay 1
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#define INCLUDE_xQueueGetMutexHolder 1
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#define INCLUDE_xTaskGetSchedulerState 1
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#define INCLUDE_eTaskGetState 1
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/* Cortex-M specific definitions. */
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#ifdef __NVIC_PRIO_BITS
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/* __NVIC_PRIO_BITS will be specified when CMSIS is being used. */
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#define configPRIO_BITS __NVIC_PRIO_BITS
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#else
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#define configPRIO_BITS 2 /* 4 priority levels */
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#endif
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/* The lowest interrupt priority that can be used in a call to a "set priority"
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function. */
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#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 3
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/* The highest interrupt priority that can be used by any interrupt service
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routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL
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INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
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PRIORITY THAN THIS! (higher priorities are lower numeric values. */
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#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 3
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/* Interrupt priorities used by the kernel port layer itself. These are generic
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to all Cortex-M ports, and do not rely on any particular library functions. */
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#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
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/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
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See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
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#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
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/* Normal assert() semantics without relying on the provision of an assert.h
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header file. */
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#define configASSERT( x ) if( ( x ) == 0 ) { taskDISABLE_INTERRUPTS(); for( ;; ); }
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/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
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standard names. With these defined, the FreeRTOS ARM_CM0 port implements
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SVC_Handler, PendSV_Handler and SysTick_Handler directly (n32wb03x_it.c must
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NOT define them, and main() must NOT call SysTick_Config). */
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#define vPortSVCHandler SVC_Handler
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#define xPortPendSVHandler PendSV_Handler
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#define xPortSysTickHandler SysTick_Handler
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#endif /* FREERTOS_CONFIG_H */
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