584 lines
18 KiB
C
584 lines
18 KiB
C
/**
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* Copyright (c) 2025, NSING Technologies Inc.
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*
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* All rights reserved.
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*
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* This software is the exclusive property of NSING Technologies Inc. (Hereinafter
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* referred to as NSING). This software, and the product of NSING described herein
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* (Hereinafter referred to as the Product) are owned by NSING under the laws and treaties
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* of the People's Republic of China and other applicable jurisdictions worldwide.
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*
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* NSING does not grant any license under its patents, copyrights, trademarks, or other
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* intellectual property rights. Names and brands of third party may be mentioned or referred
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* thereto (if any) for identification purposes only.
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*
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* NSING reserves the right to make changes, corrections, enhancements, modifications, and
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* improvements to this software at any time without notice. Please contact NSING and obtain
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* the latest version of this software before placing orders.
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* Although NSING has attempted to provide accurate and reliable information, NSING assumes
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* no responsibility for the accuracy and reliability of this software.
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*
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* It is the responsibility of the user of this software to properly design, program, and test
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* the functionality and safety of any application made of this information and any resulting product.
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* In no event shall NSING be liable for any direct, indirect, incidental, special,exemplary, or
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* consequential damages arising in any way out of the use of this software or the Product.
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*
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* NSING Products are neither intended nor warranted for usage in systems or equipment, any
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* malfunction or failure of which may cause loss of human life, bodily injury or severe property
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* damage. Such applications are deemed, "Insecure Usage".
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*
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* All Insecure Usage shall be made at user's risk. User shall indemnify NSING and hold NSING
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* harmless from and against all claims, costs, damages, and other liabilities, arising from or related
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* to any customer's Insecure Usage.
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* Any express or implied warranty with regard to this software or the Product, including,but not
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* limited to, the warranties of merchantability, fitness for a particular purpose and non-infringement
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* are disclaimed to the fullest extent permitted by law.
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* Unless otherwise explicitly permitted by NSING, anyone may not duplicate, modify, transcribe
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* or otherwise distribute this software for any purposes, in whole or in part.
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*
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* NSING products and technologies shall not be used for or incorporated into any products or systems
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* whose manufacture, use, or sale is prohibited under any applicable domestic or foreign laws or regulations.
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* User shall comply with any applicable export control laws and regulations promulgated and administered by
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* the governments of any countries asserting jurisdiction over the parties or transactions.
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**/
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/**
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* @file app_usart.c
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* @author NSING Firmware Team
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* @version v1.0.4
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*
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* @copyright Copyright (c) 2025, NSING Technologies Inc. All rights reserved.
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*/
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#include <string.h>
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#include <stdio.h>
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#include "global_func.h"
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#include "app_usart.h"
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#include "app_rdtss.h"
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#include "ns_sleep.h"
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#include "ns_log.h"
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#include "ns_timer.h"
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#include "ke_timer.h"
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#include "app_ble.h"
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#include "rdtss_task.h"
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/** @addtogroup
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* @{
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*/
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/* Private typedef -----------------------------------------------------------*/
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/* Private define ------------------------------------------------------------*/
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/* Private macro -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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uint8_t USART_rx_dma_buf[USART_RX_DMA_SIZE] = {0};
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uint16_t rx_old_pos = 0;
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uint8_t usart_rx_fifo_buf[USART_RX_FIFO_SIZE] = {0};
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uint32_t usart_rx_fifo_in = 0;
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uint32_t usart_rx_fifo_out = 0;
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uint8_t usart_tx_fifo_buf[USART_TX_FIFO_SIZE] = {0};
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uint32_t usart_tx_fifo_in = 0;
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uint32_t usart_tx_fifo_out = 0;
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uint8_t usart_sending = false;
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uint8_t ble_sending = false;
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uint16_t ble_att_mtu = (ATT_DEFAULT_MTU-3);
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/* Private function prototypes -----------------------------------------------*/
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void app_usart_tx_process(void);
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/* Private functions ---------------------------------------------------------*/
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/**
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* @brief Configures the different system clocks.
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*/
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void RCC_Configuration_USART(void)
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{
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/* Enable GPIO clock */
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GPIO_APBxClkCmd(USARTx_GPIO_CLK, ENABLE);
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/* Enable USARTx Clock */
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USART_APBxClkCmd(USARTx_CLK, ENABLE);
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/* DMA clock enable */
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RCC_EnableAHBPeriphClk(RCC_AHB_PERIPH_DMA, ENABLE);
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}
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/**
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* @brief Configures the different GPIO ports.
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*/
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void GPIO_Configuration_USART(void)
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{
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GPIO_InitType GPIO_InitStructure;
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/* Initialize GPIO_InitStructure */
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GPIO_InitStruct(&GPIO_InitStructure);
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/* Configure USARTx Tx as alternate function push-pull */
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GPIO_InitStructure.Pin = USARTx_TxPin;
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GPIO_InitStructure.GPIO_Mode = GPIO_MODE_AF_PP;
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GPIO_InitStructure.GPIO_Alternate = USARTx_Tx_GPIO_AF;
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GPIO_InitPeripheral(USARTx_GPIO, &GPIO_InitStructure);
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/* Configure USARTx Rx as alternate function push-pull */
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GPIO_InitStructure.Pin = USARTx_RxPin;
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GPIO_InitStructure.GPIO_Alternate = USARTx_Rx_GPIO_AF;
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GPIO_InitPeripheral(USARTx_GPIO, &GPIO_InitStructure);
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}
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/**
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* @brief Configures the DMA.
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*/
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void DMA_Configuration(void)
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{
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DMA_InitType DMA_InitStructure;
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/* USARTx_Tx_DMA_Channel (triggered by USARTx Tx event) Config */
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DMA_DeInit(USARTx_Tx_DMA_Channel);
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DMA_RequestRemap(USARTx_Tx_DMA_REMAP, DMA, USARTx_Tx_DMA_Channel, ENABLE);
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DMA_ConfigInt(USARTx_Tx_DMA_Channel,DMA_INT_TXC ,ENABLE);
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/* USARTx RX DMA1 Channel (triggered by USARTx Rx event) Config */
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DMA_DeInit(USARTx_Rx_DMA_Channel);
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DMA_RequestRemap(USARTx_Rx_DMA_REMAP, DMA, USARTx_Rx_DMA_Channel, ENABLE);
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DMA_ConfigInt(USARTx_Rx_DMA_Channel,DMA_INT_TXC|DMA_INT_HTX ,ENABLE);
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DMA_InitStructure.PeriphAddr = USARTx_DAT_Base;
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DMA_InitStructure.MemAddr = (uint32_t)USART_rx_dma_buf;
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DMA_InitStructure.Direction = DMA_DIR_PERIPH_SRC;
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DMA_InitStructure.BufSize = USART_RX_DMA_SIZE;
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DMA_InitStructure.CircularMode = DMA_MODE_CIRCULAR;
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DMA_InitStructure.PeriphInc = DMA_PERIPH_INC_DISABLE;
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DMA_InitStructure.DMA_MemoryInc = DMA_MEM_INC_ENABLE;
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DMA_InitStructure.PeriphDataSize = DMA_PERIPH_DATA_SIZE_BYTE;
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DMA_InitStructure.MemDataSize = DMA_MemoryDataSize_Byte;
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DMA_InitStructure.Priority = DMA_PRIORITY_VERY_HIGH;
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DMA_InitStructure.Mem2Mem = DMA_M2M_DISABLE;
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DMA_Init(USARTx_Rx_DMA_Channel, &DMA_InitStructure);
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}
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/**
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* @brief Configures the nested vectored interrupt controller.
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*/
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void NVIC_Configuration(void)
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{
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NVIC_InitType NVIC_InitStructure;
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NVIC_DisableIRQ(DMA_Channel1_2_3_4_IRQn);
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/* Enable the DMA Interrupt */
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NVIC_InitStructure.NVIC_IRQChannel = DMA_Channel1_2_3_4_IRQn;
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NVIC_InitStructure.NVIC_IRQChannelPriority = 3;
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NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
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NVIC_Init(&NVIC_InitStructure);
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NVIC_DisableIRQ(USARTx_IRQn);
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/* Enable the DMA Interrupt */
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NVIC_InitStructure.NVIC_IRQChannel = USARTx_IRQn;
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NVIC_InitStructure.NVIC_IRQChannelPriority = 3;
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NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
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NVIC_Init(&NVIC_InitStructure);
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}
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/**
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* @brief Configures the USART as 115200 8n1.
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*/
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void app_usart_configuration(void)
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{
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USART_InitType USART_InitStructure;
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/* Configure and enable RCC */
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RCC_Configuration_USART();
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/* Configure GPIO for USART */
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GPIO_Configuration_USART();
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/* Configure the DMA */
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DMA_Configuration();
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NVIC_Configuration();
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/* USARTx and USARTz configuration ------------------------------------------------------*/
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USART_InitStructure.BaudRate = 115200; //921600
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USART_InitStructure.WordLength = USART_WL_8B;
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USART_InitStructure.StopBits = USART_STPB_1;
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USART_InitStructure.Parity = USART_PE_NO;
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USART_InitStructure.HardwareFlowControl = USART_HFCTRL_NONE;
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USART_InitStructure.Mode = USART_MODE_RX | USART_MODE_TX;
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/* Configure USARTx */
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USART_Init(USARTx, &USART_InitStructure);
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/* Enable USARTz Receive and Transmit interrupts */
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USART_ConfigInt(USARTx, USART_INT_IDLEF, ENABLE);
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/* Enable USARTx DMA Rx and TX request */
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USART_EnableDMA(USARTx, USART_DMAREQ_RX | USART_DMAREQ_TX, ENABLE);
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DMA_EnableChannel(USARTx_Rx_DMA_Channel, ENABLE);
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/* Enable the USARTx */
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USART_Enable(USARTx, ENABLE);
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}
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/**
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* @brief enable or disable the usart dma
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*/
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void app_usart_dma_enable(FunctionalState Cmd)
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{
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if(Cmd == ENABLE)
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{
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ns_sleep_lock_acquire();
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rx_old_pos = 0;
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usart_tx_fifo_in = usart_tx_fifo_out = 0; //clean fifo
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usart_rx_fifo_in = usart_rx_fifo_out = 0; //clean fifo
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app_usart_configuration();
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}
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else{
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ns_sleep_lock_release();
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USART_Enable(USARTx, DISABLE);
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DMA_EnableChannel(USARTx_Rx_DMA_Channel, DISABLE);
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DMA_EnableChannel(USARTx_Tx_DMA_Channel, DISABLE);
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/* Deinit IO of USART to save power */
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GPIO_InitType GPIO_InitStructure;
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/* Initialize GPIO_InitStructure */
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GPIO_InitStruct(&GPIO_InitStructure);
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/* Configure USARTx Tx as alternate function push-pull */
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GPIO_InitStructure.Pin = USARTx_TxPin|USARTx_RxPin;
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GPIO_InitStructure.GPIO_Mode = GPIO_MODE_ANALOG;
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GPIO_InitStructure.GPIO_Alternate = GPIO_AF0;
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GPIO_InitPeripheral(USARTx_GPIO, &GPIO_InitStructure);
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}
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}
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/**
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* @brief forward usart rx data too ble notify
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*/
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bool fg_rx_end = false;
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void usart_forward_to_ble_loop(void)
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{
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uint32_t in_temp;
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uint16_t ble_send_len;
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uint16_t temp_len = USART_RX_FIFO_SIZE-usart_rx_fifo_out;
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in_temp = usart_rx_fifo_in;
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if(usart_rx_fifo_out < in_temp)
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{
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ble_send_len = in_temp-usart_rx_fifo_out;
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}
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else if(usart_rx_fifo_out > in_temp){
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ble_send_len = (USART_RX_FIFO_SIZE-usart_rx_fifo_out + usart_rx_fifo_in);
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fg_rx_end = true;
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}
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else if(usart_rx_fifo_out == in_temp){
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// fifo empty, stop send loop
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ble_sending = false;
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return;
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}
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if ((app_env.max_mtu-3)> ble_att_mtu)
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{
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ble_att_mtu = (app_env.max_mtu-3);
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}
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if(ble_send_len > ble_att_mtu)
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{
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ble_send_len = ble_att_mtu;
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}
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ble_sending = true;
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if (fg_rx_end && (ble_send_len > temp_len))
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{
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uint8_t temp_buf[512] = {0};
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memcpy(&temp_buf[0],&usart_rx_fifo_buf[usart_rx_fifo_out],temp_len);
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memcpy(&temp_buf[temp_len],&usart_rx_fifo_buf[0],(ble_send_len-temp_len));
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#if (BLE_RDTSS_SERVER)
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rdtss_send_notify(&temp_buf[0], ble_send_len);
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#endif
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usart_rx_fifo_out = (ble_send_len-temp_len)%USART_RX_FIFO_SIZE;
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}
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else
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{
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#if (BLE_RDTSS_SERVER)
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rdtss_send_notify(&usart_rx_fifo_buf[usart_rx_fifo_out], ble_send_len);
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#endif
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usart_rx_fifo_out = (usart_rx_fifo_out+ble_send_len)%USART_RX_FIFO_SIZE;
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}
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fg_rx_end = false;
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return;
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}
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/**
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* @brief usart rx data enter fifo and active ble send first package if not active yet
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*/
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uint8_t app_usart_rx_data_fifo_enter(const uint8_t *p_data, uint16_t len)
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{
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uint32_t in_len;
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//store data in fifo
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while(len)
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{
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if(usart_rx_fifo_in >= usart_rx_fifo_out )
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{
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in_len = USART_RX_FIFO_SIZE-usart_rx_fifo_in;
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if(in_len > len)
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{
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in_len = len;
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}
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memcpy(&usart_rx_fifo_buf[usart_rx_fifo_in],p_data,in_len);
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len = len-in_len;
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p_data += in_len;
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usart_rx_fifo_in = (usart_rx_fifo_in + in_len)%USART_RX_FIFO_SIZE;
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}
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else if(usart_rx_fifo_in < usart_rx_fifo_out )
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{
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in_len = usart_rx_fifo_out-usart_rx_fifo_in-1;
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if(in_len > len)
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{
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in_len = len;
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}
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memcpy(&usart_rx_fifo_buf[usart_rx_fifo_in],p_data,in_len);
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len = len-in_len;
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usart_rx_fifo_in = (usart_rx_fifo_in + in_len)%USART_RX_FIFO_SIZE;
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//fifo full,drop the rest data
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if(len)
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{
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NS_LOG_WARNING("F:%d,%d,%d\r\n",len,usart_rx_fifo_in,usart_rx_fifo_out);
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}
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break;
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}
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}
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if(!ble_sending)
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{
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ke_timer_set(RDTSS_VAL_NTF_CFM, TASK_APP, 10);
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}
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return len;
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}
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/**
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* @brief usart send data via dma
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*/
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uint8_t usart_tx_dma_send(uint8_t *p_data, uint16_t len)
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{
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DMA_InitType DMA_InitStructure;
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if(usart_sending)
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{
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return false;
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}
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/* USARTx_Tx_DMA_Channel (triggered by USARTx Tx event) Config */
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DMA_InitStructure.PeriphAddr = USARTx_DAT_Base;
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DMA_InitStructure.MemAddr = (uint32_t)p_data;
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DMA_InitStructure.Direction = DMA_DIR_PERIPH_DST;
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DMA_InitStructure.BufSize = len;
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DMA_InitStructure.PeriphInc = DMA_PERIPH_INC_DISABLE;
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DMA_InitStructure.DMA_MemoryInc = DMA_MEM_INC_ENABLE;
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DMA_InitStructure.PeriphDataSize = DMA_PERIPH_DATA_SIZE_BYTE;
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DMA_InitStructure.MemDataSize = DMA_MemoryDataSize_Byte;
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DMA_InitStructure.CircularMode = DMA_MODE_NORMAL;
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DMA_InitStructure.Priority = DMA_PRIORITY_VERY_HIGH;
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DMA_InitStructure.Mem2Mem = DMA_M2M_DISABLE;
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DMA_Init(USARTx_Tx_DMA_Channel, &DMA_InitStructure);
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usart_sending = true;
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DMA_EnableChannel(USARTx_Tx_DMA_Channel, ENABLE);
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return true;
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}
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/**
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* @brief usart send data in blocking mode
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*/
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void usart_tx_data_blocking(uint8_t *p_data, uint16_t len)
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{
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while(len--)
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{
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USART_SendData(USARTx, *p_data);
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p_data++;
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}
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}
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/**
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* @brief usart tx fifo enter and active dma send out
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*/
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uint8_t app_usart_tx_fifo_enter(const uint8_t *p_data, uint16_t len)
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{
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uint32_t in_len, out_temp;
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//store data in fifo
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NS_LOG_DEBUG("%d,%d,%d\r\n",len,usart_tx_fifo_in,usart_tx_fifo_out);
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out_temp = usart_tx_fifo_out;
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while(len)
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{
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if(usart_tx_fifo_in >= out_temp )
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{
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in_len = USART_TX_FIFO_SIZE-usart_tx_fifo_in;
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if(in_len > len)
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{
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in_len = len;
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}
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memcpy(&usart_tx_fifo_buf[usart_tx_fifo_in],p_data,in_len);
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len = len-in_len;
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p_data += in_len;
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usart_tx_fifo_in = (usart_tx_fifo_in + in_len)%USART_TX_FIFO_SIZE;
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}
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else if(usart_tx_fifo_in < out_temp )
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{
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in_len = out_temp-usart_tx_fifo_in-1;
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if(in_len > len)
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{
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in_len = len;
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}
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memcpy(&usart_tx_fifo_buf[usart_tx_fifo_in],p_data,in_len);
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len = len-in_len;
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usart_tx_fifo_in = (usart_tx_fifo_in + in_len)%USART_TX_FIFO_SIZE;
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//fifo full,drop the rest data
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if(len)
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{
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NS_LOG_WARNING("F:%d,%d,%d\r\n",len,usart_tx_fifo_in,out_temp);
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}
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break;
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}
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}
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// ble treaming cut timer, active usart send after it.
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ke_timer_set(APP_CUSTS_TEST_EVT, TASK_APP, 50);
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return len;
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}
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/**
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* @brief usart tx data from fifo
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*/
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void app_usart_tx_process(void)
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{
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uint32_t in_temp,len;
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uint8_t *p_data;
|
|
|
|
in_temp = usart_tx_fifo_in;
|
|
if(usart_tx_fifo_out < in_temp)
|
|
{
|
|
len = in_temp-usart_tx_fifo_out;
|
|
p_data = &usart_tx_fifo_buf[usart_tx_fifo_out];
|
|
if(usart_tx_dma_send(p_data,len) == true)
|
|
{
|
|
usart_tx_fifo_out = in_temp;
|
|
}
|
|
|
|
}
|
|
else if(usart_tx_fifo_out > in_temp)
|
|
{
|
|
len = USART_TX_FIFO_SIZE-usart_tx_fifo_out;
|
|
p_data = &usart_tx_fifo_buf[usart_tx_fifo_out];
|
|
if(usart_tx_dma_send(p_data,len) == true)
|
|
{
|
|
usart_tx_fifo_out = 0;
|
|
}
|
|
|
|
}
|
|
}
|
|
|
|
|
|
/**
|
|
* @brief check the dma buffer which has been received
|
|
*/
|
|
void usart_rx_check_in_irq(void)
|
|
{
|
|
uint16_t rx_pos;
|
|
|
|
rx_pos = USART_RX_DMA_SIZE - DMA_GetCurrDataCounter(USARTx_Rx_DMA_Channel);
|
|
if(rx_pos < rx_old_pos)
|
|
{
|
|
app_usart_rx_data_fifo_enter(&USART_rx_dma_buf[rx_old_pos],(USART_RX_DMA_SIZE - rx_old_pos));
|
|
|
|
if(rx_pos > 0)
|
|
{
|
|
app_usart_rx_data_fifo_enter(&USART_rx_dma_buf[0],rx_pos);
|
|
}
|
|
|
|
rx_old_pos = rx_pos;
|
|
}
|
|
else if(rx_pos > rx_old_pos)
|
|
{
|
|
app_usart_rx_data_fifo_enter(&USART_rx_dma_buf[rx_old_pos],(rx_pos - rx_old_pos));
|
|
rx_old_pos = rx_pos;
|
|
}
|
|
else if(rx_pos != rx_old_pos)
|
|
{
|
|
//error
|
|
rx_old_pos = rx_pos;
|
|
}
|
|
|
|
}
|
|
|
|
|
|
/**
|
|
* @brief dma irq handler
|
|
*/
|
|
void DMA_Channel1_2_3_4_IRQHandler(void)
|
|
{
|
|
//TX
|
|
if(DMA_GetFlagStatus(DMA_FLAG_TC1, DMA))
|
|
{
|
|
//TX Transfer complete interrupt
|
|
usart_sending = false;
|
|
ke_msg_send_basic(APP_CUSTS_TEST_EVT, TASK_APP, TASK_APP);
|
|
|
|
DMA_ClearFlag(DMA_FLAG_TC1, DMA);
|
|
}
|
|
//RX
|
|
if(DMA_GetFlagStatus(DMA_FLAG_TC2, DMA))
|
|
{
|
|
//RX Transfer complete interrupt
|
|
DMA_ClearFlag(DMA_FLAG_TC2, DMA);
|
|
usart_rx_check_in_irq();
|
|
|
|
}
|
|
if(DMA_GetFlagStatus(DMA_FLAG_HT2, DMA))
|
|
{
|
|
//RX Half transfer interrupt
|
|
DMA_ClearFlag(DMA_FLAG_HT2, DMA);
|
|
usart_rx_check_in_irq();
|
|
}
|
|
|
|
}
|
|
|
|
/**
|
|
* @brief usart irq handler
|
|
*/
|
|
void USARTx_IRQHandler(void)
|
|
{
|
|
uint8_t temp;
|
|
//usart idlle interrupt
|
|
if(USART_GetFlagStatus(USARTx,USART_FLAG_IDLEF))
|
|
{
|
|
//read sts and data will clear rx idle interrupt
|
|
temp = USARTx->DAT;
|
|
usart_rx_check_in_irq();
|
|
(void)temp;
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|