8a7cebcf77
- firmware BSP_USART_BAUDRATE 460800 (divider error +0.03%); uartrst/ uartinfo follow the macro - RX DMA ring 2KB -> 3KB: at 460800 2KB only covers 44ms, less than the ~45ms flash-erase interrupt-off window; stack top now 0x2000BDE8 (guard warns <1KB from the 0x2000C000 cliff, by design) - tools: ble_ota_update.py UartTransport and uart_cap.py default baud - Verified: stream OTA 55832B in 2.6s @23kB/s (one lost frame recovered by go-back-N), PASS after reboot; text CLI fine at 460800 - docs: ble_protocol.md, design spec, AGENTS.md, dev log section 48
13 lines
509 B
Plaintext
13 lines
509 B
Plaintext
*** Using Compiler 'V5.06 update 6 (build 750)', folder: 'D:\Keil_v5\ARM\ARMCC\Bin'
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Rebuild target 'caiic_boot'
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assembling startup_n32wb03x.s...
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compiling boot_crc32.c...
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compiling main.c...
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compiling system_n32wb03x.c...
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linking...
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Program Size: Code=1320 RO-data=680 RW-data=0 ZI-data=2104
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FromELF: creating hex file...
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After Build - User command #1: fromelf --bin --output=.\bin\caiic_boot.bin .\Objects\caiic_boot.axf
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".\Objects\caiic_boot.axf" - 0 Error(s), 0 Warning(s).
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Build Time Elapsed: 00:00:01
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