5 Commits

Author SHA1 Message Date
evan.liu
57762e50be tools: self-contained portable production package
- tools/python-embed/: embedded Python 3.12.10 runtime with bleak/pyserial
  preinstalled (git-ignored, fetched from the huaweicloud mirror); bats
  resolve Python in order: python-embed -> .venv-ble -> system
- NSpyocd.exe + DFP pack copied into tools/ (git-ignored);
  flash_package.py prefers the in-tools copies
- make_release.bat/ps1: one-click zip to out/mothercup_tools_<ts>.zip
  (staged in TEMP to avoid self-inclusion; zip excluded from git)
- all bats converted to CRLF (LF-only breaks cmd block parsing and %~dp0)
- verified: zip extracted outside the repo runs ble_ota --uart end-to-end
  (PASS, 27 kB/s) and flash_package via the bundled NSpyocd
- docs: dev log section 49, AGENTS.md tools section + heap 18KB fix
2026-09-05 10:34:59 +08:00
evan.liu
f729d16ff2 V1.00.25: UART OTA stream mode + RX DMA ring + SRAM cliff fix
Firmware:
- bsp_usart: RX moved from RXDNE byte-queue IRQ to DMA CH2 circular ring
  (2KB) + IDLE-irq wakeup; bytes keep landing during flash-erase
  interrupt-off windows (the reason lockstep was needed before)
- app_ota: stream mode (ble_protocol.md section 6.7) - 16B BEGIN with
  flags bit0=STREAM (UART channel only), DATA acked on 4KB sector
  crossings (original chunk length; two ack-gating bugs fixed during
  field test), throttled BAD_STATE for go-back-N
- FreeRTOS heap 20KB->18KB: the 2KB ring pushed the stack top past the
  0x2000C000 SRAM cliff (probed via SWD: accesses above fault on this
  silicon, usable app SRAM is 32KB) which locked the board at boot;
  merge_image.py now hard-fails the package when the image initial SP
  leaves (0x20004000, 0x2000C000]

Tools:
- ble_ota_update.py: UART stream sender (8KB window, stall watchdog
  rewind, auto-fallback to lockstep on pre-V1.00.24 firmware,
  --lockstep to force); case-insensitive option parsing
- flash_package.py/bat: stream NSpyocd output live (chunked reads keep
  the \r progress bar), vendor banner rebranded to CAIIC NSLINK UMP
- merge_image.py: initial-SP cliff guard

Verified: UART stream OTA both directions, 55.8KB in ~5.9s @9.5kB/s
0 rewinds (lockstep was 39s), PASS after reboot; board boot fixed and
verified via SWD.

Docs: ble_protocol.md section 6.7, dev log section 47 (+ SRAM cliff
post-mortem), AGENTS.md RAM rule rewritten (both cliffs) + V1.00.25
2026-09-05 09:48:28 +08:00
evan.liu
266fcec731 mcm-ddc-ble V1.00.18:发布命名整理(生产整包mothercup_ble_prod,OTA单文件发布件mothercup_ble_ota);合并OTA包头扩为52B(新增hdr_len/total_size/payload_crc,原json清单信息全部收进头部,单文件发布);merge_image.py新增--combo-name;ble_ota_update.py/ble_ota.bat PC端BLE OTA升级器(实验性:CUR_BANK选包/扇区擦除避让节流/复位检测,实机调通中);SWD单bank升级流程实测通过(bin\@基址部分烧录+bsset修记录+appsw切入);格式与升级流程写入ble_protocol.md §7供App/UART升级开发;开发日志40~41 2026-09-04 16:01:41 +08:00
evan.liu
a546dc5f46 mcm-ddc-ble V1.00.16~17:实测板载硅片为256KB(0x01040000起CPU读回绕/SWD fault),Flash布局回退256KB(Boot16K/bs8K/APP_DATA8K不变,APP1 0x01008000/112K,APP2 0x01024000/112K);新增appsw命令切换运行bank(记录校验+目标镜像CRC32复算防呆);uvprojx新增APP2 target(链接0x01024000,VTOR基址宏化,版本号可被target覆盖);新增make_dual_package.bat双APP整包脚本(merge_image.py支持--app2/--with-appdata);新增信息项0x07 CUR_BANK识别当前运行bank;OTA双bank配套:出包同时产bank1/bank2两份载荷(清单带target_bank),OTA_END校验镜像向量表Reset地址落在目标bank(新状态6 bank_mismatch);flash_package.bat改用DFP pack的n32wb031keq6_2 target+smart_flash=false;appsw双bank切换与CUR_BANK已实测通过;文档同步(开发日志37~39/ble_protocol.md/AGENTS.md) 2026-09-04 15:22:53 +08:00
evan.liu
5e9de32eee 推送相关文件到服务器 2026-09-02 07:53:48 +08:00