+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31 MASTER_SOFT_RST 0 + * 30 MASTER_TGSOFT_RST 0 + * 29 REG_SOFT_RST 0 + * 28 RADIOCNTL_SOFT_RST 0 + * 27 SWINT_REQ 0 + * 26 RFTEST_ABORT 0 + * 25 ADVERT_ABORT 0 + * 24 SCAN_ABORT 0 + * 20 MD_DSB 0 + * 19 SN_DSB 0 + * 18 NESN_DSB 0 + * 17 CRYPT_DSB 0 + * 16 LRPMAP_DSB 0 + * 15 LRFEC_DSB 0 + * 14 WHIT_DSB 0 + * 13 CRC_DSB 0 + * 12 HOP_REMAP_DSB 0 + * 11 RXCTEERR_RETX_EN 0 + * 10 ANONYMOUS_ADV_FILT_EN 0 + * 09 ADVERTFILT_EN 0 + * 08 RWBLE_EN 0 + * 03:00 RXWINSZDEF 0x0 + *+ */ +#define BLE_RWBLECNTL_ADDR BASEBAND_REG_BASE +0x0 // 0x50800000 +#define BLE_RWBLECNTL_OFFSET 0x00000000 +#define BLE_RWBLECNTL_INDEX 0x00000000 +#define BLE_RWBLECNTL_RESET 0x00000000 + +__INLINE uint32_t ble_rwblecntl_get(void) +{ + return REG_BLE_RD(BLE_RWBLECNTL_ADDR); +} + +__INLINE void ble_rwblecntl_set(uint32_t value) +{ + REG_BLE_WR(BLE_RWBLECNTL_ADDR, value); +} + +// field definitions +#define BLE_MASTER_SOFT_RST_BIT ((uint32_t)0x80000000) +#define BLE_MASTER_SOFT_RST_POS 31 +#define BLE_MASTER_TGSOFT_RST_BIT ((uint32_t)0x40000000) +#define BLE_MASTER_TGSOFT_RST_POS 30 +#define BLE_REG_SOFT_RST_BIT ((uint32_t)0x20000000) +#define BLE_REG_SOFT_RST_POS 29 +#define BLE_RADIOCNTL_SOFT_RST_BIT ((uint32_t)0x10000000) +#define BLE_RADIOCNTL_SOFT_RST_POS 28 +#define BLE_SWINT_REQ_BIT ((uint32_t)0x08000000) +#define BLE_SWINT_REQ_POS 27 +#define BLE_RFTEST_ABORT_BIT ((uint32_t)0x04000000) +#define BLE_RFTEST_ABORT_POS 26 +#define BLE_ADVERT_ABORT_BIT ((uint32_t)0x02000000) +#define BLE_ADVERT_ABORT_POS 25 +#define BLE_SCAN_ABORT_BIT ((uint32_t)0x01000000) +#define BLE_SCAN_ABORT_POS 24 +#define BLE_MD_DSB_BIT ((uint32_t)0x00100000) +#define BLE_MD_DSB_POS 20 +#define BLE_SN_DSB_BIT ((uint32_t)0x00080000) +#define BLE_SN_DSB_POS 19 +#define BLE_NESN_DSB_BIT ((uint32_t)0x00040000) +#define BLE_NESN_DSB_POS 18 +#define BLE_CRYPT_DSB_BIT ((uint32_t)0x00020000) +#define BLE_CRYPT_DSB_POS 17 +#define BLE_LRPMAP_DSB_BIT ((uint32_t)0x00010000) +#define BLE_LRPMAP_DSB_POS 16 +#define BLE_LRFEC_DSB_BIT ((uint32_t)0x00008000) +#define BLE_LRFEC_DSB_POS 15 +#define BLE_WHIT_DSB_BIT ((uint32_t)0x00004000) +#define BLE_WHIT_DSB_POS 14 +#define BLE_CRC_DSB_BIT ((uint32_t)0x00002000) +#define BLE_CRC_DSB_POS 13 +#define BLE_HOP_REMAP_DSB_BIT ((uint32_t)0x00001000) +#define BLE_HOP_REMAP_DSB_POS 12 +#define BLE_RXCTEERR_RETX_EN_BIT ((uint32_t)0x00000800) +#define BLE_RXCTEERR_RETX_EN_POS 11 +#define BLE_ANONYMOUS_ADV_FILT_EN_BIT ((uint32_t)0x00000400) +#define BLE_ANONYMOUS_ADV_FILT_EN_POS 10 +#define BLE_ADVERTFILT_EN_BIT ((uint32_t)0x00000200) +#define BLE_ADVERTFILT_EN_POS 9 +#define BLE_RWBLE_EN_BIT ((uint32_t)0x00000100) +#define BLE_RWBLE_EN_POS 8 +#define BLE_RXWINSZDEF_MASK ((uint32_t)0x0000000F) +#define BLE_RXWINSZDEF_LSB 0 +#define BLE_RXWINSZDEF_WIDTH ((uint32_t)0x00000004) + +#define BLE_MASTER_SOFT_RST_RST 0x0 +#define BLE_MASTER_TGSOFT_RST_RST 0x0 +#define BLE_REG_SOFT_RST_RST 0x0 +#define BLE_RADIOCNTL_SOFT_RST_RST 0x0 +#define BLE_SWINT_REQ_RST 0x0 +#define BLE_RFTEST_ABORT_RST 0x0 +#define BLE_ADVERT_ABORT_RST 0x0 +#define BLE_SCAN_ABORT_RST 0x0 +#define BLE_MD_DSB_RST 0x0 +#define BLE_SN_DSB_RST 0x0 +#define BLE_NESN_DSB_RST 0x0 +#define BLE_CRYPT_DSB_RST 0x0 +#define BLE_LRPMAP_DSB_RST 0x0 +#define BLE_LRFEC_DSB_RST 0x0 +#define BLE_WHIT_DSB_RST 0x0 +#define BLE_CRC_DSB_RST 0x0 +#define BLE_HOP_REMAP_DSB_RST 0x0 +#define BLE_RXCTEERR_RETX_EN_RST 0x0 +#define BLE_ANONYMOUS_ADV_FILT_EN_RST 0x0 +#define BLE_ADVERTFILT_EN_RST 0x0 +#define BLE_RWBLE_EN_RST 0x0 +#define BLE_RXWINSZDEF_RST 0x0 + +__INLINE void ble_rwblecntl_pack(uint8_t mastersoftrst, uint8_t mastertgsoftrst, uint8_t regsoftrst, uint8_t radiocntlsoftrst, uint8_t swintreq, uint8_t rftestabort, uint8_t advertabort, uint8_t scanabort, uint8_t mddsb, uint8_t sndsb, uint8_t nesndsb, uint8_t cryptdsb, uint8_t lrpmapdsb, uint8_t lrfecdsb, uint8_t whitdsb, uint8_t crcdsb, uint8_t hopremapdsb, uint8_t rxcteerrretxen, uint8_t anonymousadvfilten, uint8_t advertfilten, uint8_t rwbleen, uint8_t rxwinszdef) +{ + ASSERT_ERR((((uint32_t)mastersoftrst << 31) & ~((uint32_t)0x80000000)) == 0); + ASSERT_ERR((((uint32_t)mastertgsoftrst << 30) & ~((uint32_t)0x40000000)) == 0); + ASSERT_ERR((((uint32_t)regsoftrst << 29) & ~((uint32_t)0x20000000)) == 0); + ASSERT_ERR((((uint32_t)radiocntlsoftrst << 28) & ~((uint32_t)0x10000000)) == 0); + ASSERT_ERR((((uint32_t)swintreq << 27) & ~((uint32_t)0x08000000)) == 0); + ASSERT_ERR((((uint32_t)rftestabort << 26) & ~((uint32_t)0x04000000)) == 0); + ASSERT_ERR((((uint32_t)advertabort << 25) & ~((uint32_t)0x02000000)) == 0); + ASSERT_ERR((((uint32_t)scanabort << 24) & ~((uint32_t)0x01000000)) == 0); + ASSERT_ERR((((uint32_t)mddsb << 20) & ~((uint32_t)0x00100000)) == 0); + ASSERT_ERR((((uint32_t)sndsb << 19) & ~((uint32_t)0x00080000)) == 0); + ASSERT_ERR((((uint32_t)nesndsb << 18) & ~((uint32_t)0x00040000)) == 0); + ASSERT_ERR((((uint32_t)cryptdsb << 17) & ~((uint32_t)0x00020000)) == 0); + ASSERT_ERR((((uint32_t)lrpmapdsb << 16) & ~((uint32_t)0x00010000)) == 0); + ASSERT_ERR((((uint32_t)lrfecdsb << 15) & ~((uint32_t)0x00008000)) == 0); + ASSERT_ERR((((uint32_t)whitdsb << 14) & ~((uint32_t)0x00004000)) == 0); + ASSERT_ERR((((uint32_t)crcdsb << 13) & ~((uint32_t)0x00002000)) == 0); + ASSERT_ERR((((uint32_t)hopremapdsb << 12) & ~((uint32_t)0x00001000)) == 0); + ASSERT_ERR((((uint32_t)rxcteerrretxen << 11) & ~((uint32_t)0x00000800)) == 0); + ASSERT_ERR((((uint32_t)anonymousadvfilten << 10) & ~((uint32_t)0x00000400)) == 0); + ASSERT_ERR((((uint32_t)advertfilten << 9) & ~((uint32_t)0x00000200)) == 0); + ASSERT_ERR((((uint32_t)rwbleen << 8) & ~((uint32_t)0x00000100)) == 0); + ASSERT_ERR((((uint32_t)rxwinszdef << 0) & ~((uint32_t)0x0000000F)) == 0); + REG_BLE_WR(BLE_RWBLECNTL_ADDR, ((uint32_t)mastersoftrst << 31) | ((uint32_t)mastertgsoftrst << 30) | ((uint32_t)regsoftrst << 29) | ((uint32_t)radiocntlsoftrst << 28) | ((uint32_t)swintreq << 27) | ((uint32_t)rftestabort << 26) | ((uint32_t)advertabort << 25) | ((uint32_t)scanabort << 24) | ((uint32_t)mddsb << 20) | ((uint32_t)sndsb << 19) | ((uint32_t)nesndsb << 18) | ((uint32_t)cryptdsb << 17) | ((uint32_t)lrpmapdsb << 16) | ((uint32_t)lrfecdsb << 15) | ((uint32_t)whitdsb << 14) | ((uint32_t)crcdsb << 13) | ((uint32_t)hopremapdsb << 12) | ((uint32_t)rxcteerrretxen << 11) | ((uint32_t)anonymousadvfilten << 10) | ((uint32_t)advertfilten << 9) | ((uint32_t)rwbleen << 8) | ((uint32_t)rxwinszdef << 0)); +} + +__INLINE void ble_rwblecntl_unpack(uint8_t* mastersoftrst, uint8_t* mastertgsoftrst, uint8_t* regsoftrst, uint8_t* radiocntlsoftrst, uint8_t* swintreq, uint8_t* rftestabort, uint8_t* advertabort, uint8_t* scanabort, uint8_t* mddsb, uint8_t* sndsb, uint8_t* nesndsb, uint8_t* cryptdsb, uint8_t* lrpmapdsb, uint8_t* lrfecdsb, uint8_t* whitdsb, uint8_t* crcdsb, uint8_t* hopremapdsb, uint8_t* rxcteerrretxen, uint8_t* anonymousadvfilten, uint8_t* advertfilten, uint8_t* rwbleen, uint8_t* rxwinszdef) +{ + uint32_t localVal = REG_BLE_RD(BLE_RWBLECNTL_ADDR); + + *mastersoftrst = (localVal & ((uint32_t)0x80000000)) >> 31; + *mastertgsoftrst = (localVal & ((uint32_t)0x40000000)) >> 30; + *regsoftrst = (localVal & ((uint32_t)0x20000000)) >> 29; + *radiocntlsoftrst = (localVal & ((uint32_t)0x10000000)) >> 28; + *swintreq = (localVal & ((uint32_t)0x08000000)) >> 27; + *rftestabort = (localVal & ((uint32_t)0x04000000)) >> 26; + *advertabort = (localVal & ((uint32_t)0x02000000)) >> 25; + *scanabort = (localVal & ((uint32_t)0x01000000)) >> 24; + *mddsb = (localVal & ((uint32_t)0x00100000)) >> 20; + *sndsb = (localVal & ((uint32_t)0x00080000)) >> 19; + *nesndsb = (localVal & ((uint32_t)0x00040000)) >> 18; + *cryptdsb = (localVal & ((uint32_t)0x00020000)) >> 17; + *lrpmapdsb = (localVal & ((uint32_t)0x00010000)) >> 16; + *lrfecdsb = (localVal & ((uint32_t)0x00008000)) >> 15; + *whitdsb = (localVal & ((uint32_t)0x00004000)) >> 14; + *crcdsb = (localVal & ((uint32_t)0x00002000)) >> 13; + *hopremapdsb = (localVal & ((uint32_t)0x00001000)) >> 12; + *rxcteerrretxen = (localVal & ((uint32_t)0x00000800)) >> 11; + *anonymousadvfilten = (localVal & ((uint32_t)0x00000400)) >> 10; + *advertfilten = (localVal & ((uint32_t)0x00000200)) >> 9; + *rwbleen = (localVal & ((uint32_t)0x00000100)) >> 8; + *rxwinszdef = (localVal & ((uint32_t)0x0000000F)) >> 0; +} + +__INLINE uint8_t ble_rwblecntl_master_soft_rst_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RWBLECNTL_ADDR); + return ((localVal & ((uint32_t)0x80000000)) >> 31); +} + +__INLINE void ble_rwblecntl_master_soft_rst_setf(uint8_t mastersoftrst) +{ + ASSERT_ERR((((uint32_t)mastersoftrst << 31) & ~((uint32_t)0x80000000)) == 0); + REG_BLE_WR(BLE_RWBLECNTL_ADDR, (REG_BLE_RD(BLE_RWBLECNTL_ADDR) & ~((uint32_t)0x80000000)) | ((uint32_t)mastersoftrst << 31)); +} + +__INLINE uint8_t ble_rwblecntl_master_tgsoft_rst_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RWBLECNTL_ADDR); + return ((localVal & ((uint32_t)0x40000000)) >> 30); +} + +__INLINE void ble_rwblecntl_master_tgsoft_rst_setf(uint8_t mastertgsoftrst) +{ + ASSERT_ERR((((uint32_t)mastertgsoftrst << 30) & ~((uint32_t)0x40000000)) == 0); + REG_BLE_WR(BLE_RWBLECNTL_ADDR, (REG_BLE_RD(BLE_RWBLECNTL_ADDR) & ~((uint32_t)0x40000000)) | ((uint32_t)mastertgsoftrst << 30)); +} + +__INLINE uint8_t ble_rwblecntl_reg_soft_rst_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RWBLECNTL_ADDR); + return ((localVal & ((uint32_t)0x20000000)) >> 29); +} + +__INLINE void ble_rwblecntl_reg_soft_rst_setf(uint8_t regsoftrst) +{ + ASSERT_ERR((((uint32_t)regsoftrst << 29) & ~((uint32_t)0x20000000)) == 0); + REG_BLE_WR(BLE_RWBLECNTL_ADDR, (REG_BLE_RD(BLE_RWBLECNTL_ADDR) & ~((uint32_t)0x20000000)) | ((uint32_t)regsoftrst << 29)); +} + +__INLINE uint8_t ble_rwblecntl_radiocntl_soft_rst_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RWBLECNTL_ADDR); + return ((localVal & ((uint32_t)0x10000000)) >> 28); +} + +__INLINE void ble_rwblecntl_radiocntl_soft_rst_setf(uint8_t radiocntlsoftrst) +{ + ASSERT_ERR((((uint32_t)radiocntlsoftrst << 28) & ~((uint32_t)0x10000000)) == 0); + REG_BLE_WR(BLE_RWBLECNTL_ADDR, (REG_BLE_RD(BLE_RWBLECNTL_ADDR) & ~((uint32_t)0x10000000)) | ((uint32_t)radiocntlsoftrst << 28)); +} + +__INLINE uint8_t ble_rwblecntl_swint_req_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RWBLECNTL_ADDR); + return ((localVal & ((uint32_t)0x08000000)) >> 27); +} + +__INLINE void ble_rwblecntl_swint_req_setf(uint8_t swintreq) +{ + ASSERT_ERR((((uint32_t)swintreq << 27) & ~((uint32_t)0x08000000)) == 0); + REG_BLE_WR(BLE_RWBLECNTL_ADDR, (REG_BLE_RD(BLE_RWBLECNTL_ADDR) & ~((uint32_t)0x08000000)) | ((uint32_t)swintreq << 27)); +} + +__INLINE uint8_t ble_rwblecntl_rftest_abort_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RWBLECNTL_ADDR); + return ((localVal & ((uint32_t)0x04000000)) >> 26); +} + +__INLINE void ble_rwblecntl_rftest_abort_setf(uint8_t rftestabort) +{ + ASSERT_ERR((((uint32_t)rftestabort << 26) & ~((uint32_t)0x04000000)) == 0); + REG_BLE_WR(BLE_RWBLECNTL_ADDR, (REG_BLE_RD(BLE_RWBLECNTL_ADDR) & ~((uint32_t)0x04000000)) | ((uint32_t)rftestabort << 26)); +} + +__INLINE uint8_t ble_rwblecntl_advert_abort_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RWBLECNTL_ADDR); + return ((localVal & ((uint32_t)0x02000000)) >> 25); +} + +__INLINE void ble_rwblecntl_advert_abort_setf(uint8_t advertabort) +{ + ASSERT_ERR((((uint32_t)advertabort << 25) & ~((uint32_t)0x02000000)) == 0); + REG_BLE_WR(BLE_RWBLECNTL_ADDR, (REG_BLE_RD(BLE_RWBLECNTL_ADDR) & ~((uint32_t)0x02000000)) | ((uint32_t)advertabort << 25)); +} + +__INLINE uint8_t ble_rwblecntl_scan_abort_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RWBLECNTL_ADDR); + return ((localVal & ((uint32_t)0x01000000)) >> 24); +} + +__INLINE void ble_rwblecntl_scan_abort_setf(uint8_t scanabort) +{ + ASSERT_ERR((((uint32_t)scanabort << 24) & ~((uint32_t)0x01000000)) == 0); + REG_BLE_WR(BLE_RWBLECNTL_ADDR, (REG_BLE_RD(BLE_RWBLECNTL_ADDR) & ~((uint32_t)0x01000000)) | ((uint32_t)scanabort << 24)); +} + +__INLINE uint8_t ble_rwblecntl_md_dsb_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RWBLECNTL_ADDR); + return ((localVal & ((uint32_t)0x00100000)) >> 20); +} + +__INLINE void ble_rwblecntl_md_dsb_setf(uint8_t mddsb) +{ + ASSERT_ERR((((uint32_t)mddsb << 20) & ~((uint32_t)0x00100000)) == 0); + REG_BLE_WR(BLE_RWBLECNTL_ADDR, (REG_BLE_RD(BLE_RWBLECNTL_ADDR) & ~((uint32_t)0x00100000)) | ((uint32_t)mddsb << 20)); +} + +__INLINE uint8_t ble_rwblecntl_sn_dsb_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RWBLECNTL_ADDR); + return ((localVal & ((uint32_t)0x00080000)) >> 19); +} + +__INLINE void ble_rwblecntl_sn_dsb_setf(uint8_t sndsb) +{ + ASSERT_ERR((((uint32_t)sndsb << 19) & ~((uint32_t)0x00080000)) == 0); + REG_BLE_WR(BLE_RWBLECNTL_ADDR, (REG_BLE_RD(BLE_RWBLECNTL_ADDR) & ~((uint32_t)0x00080000)) | ((uint32_t)sndsb << 19)); +} + +__INLINE uint8_t ble_rwblecntl_nesn_dsb_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RWBLECNTL_ADDR); + return ((localVal & ((uint32_t)0x00040000)) >> 18); +} + +__INLINE void ble_rwblecntl_nesn_dsb_setf(uint8_t nesndsb) +{ + ASSERT_ERR((((uint32_t)nesndsb << 18) & ~((uint32_t)0x00040000)) == 0); + REG_BLE_WR(BLE_RWBLECNTL_ADDR, (REG_BLE_RD(BLE_RWBLECNTL_ADDR) & ~((uint32_t)0x00040000)) | ((uint32_t)nesndsb << 18)); +} + +__INLINE uint8_t ble_rwblecntl_crypt_dsb_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RWBLECNTL_ADDR); + return ((localVal & ((uint32_t)0x00020000)) >> 17); +} + +__INLINE void ble_rwblecntl_crypt_dsb_setf(uint8_t cryptdsb) +{ + ASSERT_ERR((((uint32_t)cryptdsb << 17) & ~((uint32_t)0x00020000)) == 0); + REG_BLE_WR(BLE_RWBLECNTL_ADDR, (REG_BLE_RD(BLE_RWBLECNTL_ADDR) & ~((uint32_t)0x00020000)) | ((uint32_t)cryptdsb << 17)); +} + +__INLINE uint8_t ble_rwblecntl_lrpmap_dsb_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RWBLECNTL_ADDR); + return ((localVal & ((uint32_t)0x00010000)) >> 16); +} + +__INLINE void ble_rwblecntl_lrpmap_dsb_setf(uint8_t lrpmapdsb) +{ + ASSERT_ERR((((uint32_t)lrpmapdsb << 16) & ~((uint32_t)0x00010000)) == 0); + REG_BLE_WR(BLE_RWBLECNTL_ADDR, (REG_BLE_RD(BLE_RWBLECNTL_ADDR) & ~((uint32_t)0x00010000)) | ((uint32_t)lrpmapdsb << 16)); +} + +__INLINE uint8_t ble_rwblecntl_lrfec_dsb_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RWBLECNTL_ADDR); + return ((localVal & ((uint32_t)0x00008000)) >> 15); +} + +__INLINE void ble_rwblecntl_lrfec_dsb_setf(uint8_t lrfecdsb) +{ + ASSERT_ERR((((uint32_t)lrfecdsb << 15) & ~((uint32_t)0x00008000)) == 0); + REG_BLE_WR(BLE_RWBLECNTL_ADDR, (REG_BLE_RD(BLE_RWBLECNTL_ADDR) & ~((uint32_t)0x00008000)) | ((uint32_t)lrfecdsb << 15)); +} + +__INLINE uint8_t ble_rwblecntl_whit_dsb_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RWBLECNTL_ADDR); + return ((localVal & ((uint32_t)0x00004000)) >> 14); +} + +__INLINE void ble_rwblecntl_whit_dsb_setf(uint8_t whitdsb) +{ + ASSERT_ERR((((uint32_t)whitdsb << 14) & ~((uint32_t)0x00004000)) == 0); + REG_BLE_WR(BLE_RWBLECNTL_ADDR, (REG_BLE_RD(BLE_RWBLECNTL_ADDR) & ~((uint32_t)0x00004000)) | ((uint32_t)whitdsb << 14)); +} + +__INLINE uint8_t ble_rwblecntl_crc_dsb_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RWBLECNTL_ADDR); + return ((localVal & ((uint32_t)0x00002000)) >> 13); +} + +__INLINE void ble_rwblecntl_crc_dsb_setf(uint8_t crcdsb) +{ + ASSERT_ERR((((uint32_t)crcdsb << 13) & ~((uint32_t)0x00002000)) == 0); + REG_BLE_WR(BLE_RWBLECNTL_ADDR, (REG_BLE_RD(BLE_RWBLECNTL_ADDR) & ~((uint32_t)0x00002000)) | ((uint32_t)crcdsb << 13)); +} + +__INLINE uint8_t ble_rwblecntl_hop_remap_dsb_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RWBLECNTL_ADDR); + return ((localVal & ((uint32_t)0x00001000)) >> 12); +} + +__INLINE void ble_rwblecntl_hop_remap_dsb_setf(uint8_t hopremapdsb) +{ + ASSERT_ERR((((uint32_t)hopremapdsb << 12) & ~((uint32_t)0x00001000)) == 0); + REG_BLE_WR(BLE_RWBLECNTL_ADDR, (REG_BLE_RD(BLE_RWBLECNTL_ADDR) & ~((uint32_t)0x00001000)) | ((uint32_t)hopremapdsb << 12)); +} + +__INLINE uint8_t ble_rwblecntl_rxcteerr_retx_en_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RWBLECNTL_ADDR); + return ((localVal & ((uint32_t)0x00000800)) >> 11); +} + +__INLINE void ble_rwblecntl_rxcteerr_retx_en_setf(uint8_t rxcteerrretxen) +{ + ASSERT_ERR((((uint32_t)rxcteerrretxen << 11) & ~((uint32_t)0x00000800)) == 0); + REG_BLE_WR(BLE_RWBLECNTL_ADDR, (REG_BLE_RD(BLE_RWBLECNTL_ADDR) & ~((uint32_t)0x00000800)) | ((uint32_t)rxcteerrretxen << 11)); +} + +__INLINE uint8_t ble_rwblecntl_anonymous_adv_filt_en_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RWBLECNTL_ADDR); + return ((localVal & ((uint32_t)0x00000400)) >> 10); +} + +__INLINE void ble_rwblecntl_anonymous_adv_filt_en_setf(uint8_t anonymousadvfilten) +{ + ASSERT_ERR((((uint32_t)anonymousadvfilten << 10) & ~((uint32_t)0x00000400)) == 0); + REG_BLE_WR(BLE_RWBLECNTL_ADDR, (REG_BLE_RD(BLE_RWBLECNTL_ADDR) & ~((uint32_t)0x00000400)) | ((uint32_t)anonymousadvfilten << 10)); +} + +__INLINE uint8_t ble_rwblecntl_advertfilt_en_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RWBLECNTL_ADDR); + return ((localVal & ((uint32_t)0x00000200)) >> 9); +} + +__INLINE void ble_rwblecntl_advertfilt_en_setf(uint8_t advertfilten) +{ + ASSERT_ERR((((uint32_t)advertfilten << 9) & ~((uint32_t)0x00000200)) == 0); + REG_BLE_WR(BLE_RWBLECNTL_ADDR, (REG_BLE_RD(BLE_RWBLECNTL_ADDR) & ~((uint32_t)0x00000200)) | ((uint32_t)advertfilten << 9)); +} + +__INLINE uint8_t ble_rwblecntl_rwble_en_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RWBLECNTL_ADDR); + return ((localVal & ((uint32_t)0x00000100)) >> 8); +} + +__INLINE void ble_rwblecntl_rwble_en_setf(uint8_t rwbleen) +{ + ASSERT_ERR((((uint32_t)rwbleen << 8) & ~((uint32_t)0x00000100)) == 0); + REG_BLE_WR(BLE_RWBLECNTL_ADDR, (REG_BLE_RD(BLE_RWBLECNTL_ADDR) & ~((uint32_t)0x00000100)) | ((uint32_t)rwbleen << 8)); +} + +__INLINE uint8_t ble_rwblecntl_rxwinszdef_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RWBLECNTL_ADDR); + return ((localVal & ((uint32_t)0x0000000F)) >> 0); +} + +__INLINE void ble_rwblecntl_rxwinszdef_setf(uint8_t rxwinszdef) +{ + ASSERT_ERR((((uint32_t)rxwinszdef << 0) & ~((uint32_t)0x0000000F)) == 0); + REG_BLE_WR(BLE_RWBLECNTL_ADDR, (REG_BLE_RD(BLE_RWBLECNTL_ADDR) & ~((uint32_t)0x0000000F)) | ((uint32_t)rxwinszdef << 0)); +} + +/** + * @brief VERSION register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31:24 TYP 0xA + * 23:16 REL 0x0 + * 15:08 UPG 0xD + * 07:00 BUILD 0x0 + *+ */ +#define BLE_VERSION_ADDR BASEBAND_REG_BASE +0x4 // 0x50800004 +#define BLE_VERSION_OFFSET 0x00000004 +#define BLE_VERSION_INDEX 0x00000001 +#define BLE_VERSION_RESET 0x0A000D00 + +__INLINE uint32_t ble_version_get(void) +{ + return REG_BLE_RD(BLE_VERSION_ADDR); +} + +// field definitions +#define BLE_TYP_MASK ((uint32_t)0xFF000000) +#define BLE_TYP_LSB 24 +#define BLE_TYP_WIDTH ((uint32_t)0x00000008) +#define BLE_REL_MASK ((uint32_t)0x00FF0000) +#define BLE_REL_LSB 16 +#define BLE_REL_WIDTH ((uint32_t)0x00000008) +#define BLE_UPG_MASK ((uint32_t)0x0000FF00) +#define BLE_UPG_LSB 8 +#define BLE_UPG_WIDTH ((uint32_t)0x00000008) +#define BLE_BUILD_MASK ((uint32_t)0x000000FF) +#define BLE_BUILD_LSB 0 +#define BLE_BUILD_WIDTH ((uint32_t)0x00000008) + +#define BLE_TYP_RST 0xA +#define BLE_REL_RST 0x0 +#define BLE_UPG_RST 0xD +#define BLE_BUILD_RST 0x0 + +__INLINE void ble_version_unpack(uint8_t* typ, uint8_t* rel, uint8_t* upg, uint8_t* build) +{ + uint32_t localVal = REG_BLE_RD(BLE_VERSION_ADDR); + + *typ = (localVal & ((uint32_t)0xFF000000)) >> 24; + *rel = (localVal & ((uint32_t)0x00FF0000)) >> 16; + *upg = (localVal & ((uint32_t)0x0000FF00)) >> 8; + *build = (localVal & ((uint32_t)0x000000FF)) >> 0; +} + +__INLINE uint8_t ble_version_typ_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_VERSION_ADDR); + return ((localVal & ((uint32_t)0xFF000000)) >> 24); +} + +__INLINE uint8_t ble_version_rel_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_VERSION_ADDR); + return ((localVal & ((uint32_t)0x00FF0000)) >> 16); +} + +__INLINE uint8_t ble_version_upg_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_VERSION_ADDR); + return ((localVal & ((uint32_t)0x0000FF00)) >> 8); +} + +__INLINE uint8_t ble_version_build_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_VERSION_ADDR); + return ((localVal & ((uint32_t)0x000000FF)) >> 0); +} + +/** + * @brief RWBLECONF register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31 DMMODE 0 + * 28 CORRELATOR 1 + * 27 USERXLR 1 + * 26 USETXLR 1 + * 24 USEISO 1 + * 21 WLANCOEX 1 + * 20:16 RFIF 0x1 + * 15 USEDBG 1 + * 14 DECIPHER 0 + * 13:08 CLK_SEL 0x8 + * 07 INTMODE 1 + * 06 BUS_TYPE 0 + * 04:00 ADDR_WIDTH 0xD + *+ */ +#define BLE_RWBLECONF_ADDR BASEBAND_REG_BASE +0x8 //0x50800008 +#define BLE_RWBLECONF_OFFSET 0x00000008 +#define BLE_RWBLECONF_INDEX 0x00000002 +#define BLE_RWBLECONF_RESET 0x1D21888D + +__INLINE uint32_t ble_rwbleconf_get(void) +{ + return REG_BLE_RD(BLE_RWBLECONF_ADDR); +} + +// field definitions +#define BLE_DMMODE_BIT ((uint32_t)0x80000000) +#define BLE_DMMODE_POS 31 +#define BLE_CORRELATOR_BIT ((uint32_t)0x10000000) +#define BLE_CORRELATOR_POS 28 +#define BLE_USERXLR_BIT ((uint32_t)0x08000000) +#define BLE_USERXLR_POS 27 +#define BLE_USETXLR_BIT ((uint32_t)0x04000000) +#define BLE_USETXLR_POS 26 +#define BLE_USEISO_BIT ((uint32_t)0x01000000) +#define BLE_USEISO_POS 24 +#define BLE_WLANCOEX_BIT ((uint32_t)0x00200000) +#define BLE_WLANCOEX_POS 21 +#define BLE_RFIF_MASK ((uint32_t)0x001F0000) +#define BLE_RFIF_LSB 16 +#define BLE_RFIF_WIDTH ((uint32_t)0x00000005) +#define BLE_USEDBG_BIT ((uint32_t)0x00008000) +#define BLE_USEDBG_POS 15 +#define BLE_DECIPHER_BIT ((uint32_t)0x00004000) +#define BLE_DECIPHER_POS 14 +#define BLE_CLK_SEL_MASK ((uint32_t)0x00003F00) +#define BLE_CLK_SEL_LSB 8 +#define BLE_CLK_SEL_WIDTH ((uint32_t)0x00000006) +#define BLE_INTMODE_BIT ((uint32_t)0x00000080) +#define BLE_INTMODE_POS 7 +#define BLE_BUS_TYPE_BIT ((uint32_t)0x00000040) +#define BLE_BUS_TYPE_POS 6 +#define BLE_ADDR_WIDTH_MASK ((uint32_t)0x0000001F) +#define BLE_ADDR_WIDTH_LSB 0 +#define BLE_ADDR_WIDTH_WIDTH ((uint32_t)0x00000005) + +#define BLE_DMMODE_RST 0x0 +#define BLE_CORRELATOR_RST 0x1 +#define BLE_USERXLR_RST 0x1 +#define BLE_USETXLR_RST 0x1 +#define BLE_USEISO_RST 0x1 +#define BLE_WLANCOEX_RST 0x1 +#define BLE_RFIF_RST 0x1 +#define BLE_USEDBG_RST 0x1 +#define BLE_DECIPHER_RST 0x0 +#define BLE_CLK_SEL_RST 0x8 +#define BLE_INTMODE_RST 0x1 +#define BLE_BUS_TYPE_RST 0x0 +#define BLE_ADDR_WIDTH_RST 0xD + +__INLINE void ble_rwbleconf_unpack(uint8_t* dmmode, uint8_t* correlator, uint8_t* userxlr, uint8_t* usetxlr, uint8_t* useiso, uint8_t* wlancoex, uint8_t* rfif, uint8_t* usedbg, uint8_t* decipher, uint8_t* clksel, uint8_t* intmode, uint8_t* bustype, uint8_t* addrwidth) +{ + uint32_t localVal = REG_BLE_RD(BLE_RWBLECONF_ADDR); + + *dmmode = (localVal & ((uint32_t)0x80000000)) >> 31; + *correlator = (localVal & ((uint32_t)0x10000000)) >> 28; + *userxlr = (localVal & ((uint32_t)0x08000000)) >> 27; + *usetxlr = (localVal & ((uint32_t)0x04000000)) >> 26; + *useiso = (localVal & ((uint32_t)0x01000000)) >> 24; + *wlancoex = (localVal & ((uint32_t)0x00200000)) >> 21; + *rfif = (localVal & ((uint32_t)0x001F0000)) >> 16; + *usedbg = (localVal & ((uint32_t)0x00008000)) >> 15; + *decipher = (localVal & ((uint32_t)0x00004000)) >> 14; + *clksel = (localVal & ((uint32_t)0x00003F00)) >> 8; + *intmode = (localVal & ((uint32_t)0x00000080)) >> 7; + *bustype = (localVal & ((uint32_t)0x00000040)) >> 6; + *addrwidth = (localVal & ((uint32_t)0x0000001F)) >> 0; +} + +__INLINE uint8_t ble_rwbleconf_dmmode_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RWBLECONF_ADDR); + return ((localVal & ((uint32_t)0x80000000)) >> 31); +} + +__INLINE uint8_t ble_rwbleconf_correlator_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RWBLECONF_ADDR); + return ((localVal & ((uint32_t)0x10000000)) >> 28); +} + +__INLINE uint8_t ble_rwbleconf_userxlr_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RWBLECONF_ADDR); + return ((localVal & ((uint32_t)0x08000000)) >> 27); +} + +__INLINE uint8_t ble_rwbleconf_usetxlr_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RWBLECONF_ADDR); + return ((localVal & ((uint32_t)0x04000000)) >> 26); +} + +__INLINE uint8_t ble_rwbleconf_useiso_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RWBLECONF_ADDR); + return ((localVal & ((uint32_t)0x01000000)) >> 24); +} + +__INLINE uint8_t ble_rwbleconf_wlancoex_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RWBLECONF_ADDR); + return ((localVal & ((uint32_t)0x00200000)) >> 21); +} + +__INLINE uint8_t ble_rwbleconf_rfif_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RWBLECONF_ADDR); + return ((localVal & ((uint32_t)0x001F0000)) >> 16); +} + +__INLINE uint8_t ble_rwbleconf_usedbg_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RWBLECONF_ADDR); + return ((localVal & ((uint32_t)0x00008000)) >> 15); +} + +__INLINE uint8_t ble_rwbleconf_decipher_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RWBLECONF_ADDR); + return ((localVal & ((uint32_t)0x00004000)) >> 14); +} + +__INLINE uint8_t ble_rwbleconf_clk_sel_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RWBLECONF_ADDR); + return ((localVal & ((uint32_t)0x00003F00)) >> 8); +} + +__INLINE uint8_t ble_rwbleconf_intmode_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RWBLECONF_ADDR); + return ((localVal & ((uint32_t)0x00000080)) >> 7); +} + +__INLINE uint8_t ble_rwbleconf_bus_type_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RWBLECONF_ADDR); + return ((localVal & ((uint32_t)0x00000040)) >> 6); +} + +__INLINE uint8_t ble_rwbleconf_addr_width_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RWBLECONF_ADDR); + return ((localVal & ((uint32_t)0x0000001F)) >> 0); +} + +/** + * @brief INTCNTL0 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 16 ERRORINTMSK 0 + * 06 ISORXINTMSK 0 + * 05 ISOTXINTMSK 0 + * 04 RXINTMSK 0 + * 03 TXINTMSK 0 + * 02 SKIPEVTINTMSK 0 + * 01 ENDEVTINTMSK 1 + * 00 STARTEVTINTMSK 1 + *+ */ +#define BLE_INTCNTL0_ADDR BASEBAND_REG_BASE +0xC // 0x5080000C +#define BLE_INTCNTL0_OFFSET 0x0000000C +#define BLE_INTCNTL0_INDEX 0x00000003 +#define BLE_INTCNTL0_RESET 0x00000003 + +__INLINE uint32_t ble_intcntl0_get(void) +{ + return REG_BLE_RD(BLE_INTCNTL0_ADDR); +} + +__INLINE void ble_intcntl0_set(uint32_t value) +{ + REG_BLE_WR(BLE_INTCNTL0_ADDR, value); +} + +// field definitions +#define BLE_ERRORINTMSK_BIT ((uint32_t)0x00010000) +#define BLE_ERRORINTMSK_POS 16 +#define BLE_ISORXINTMSK_BIT ((uint32_t)0x00000040) +#define BLE_ISORXINTMSK_POS 6 +#define BLE_ISOTXINTMSK_BIT ((uint32_t)0x00000020) +#define BLE_ISOTXINTMSK_POS 5 +#define BLE_RXINTMSK_BIT ((uint32_t)0x00000010) +#define BLE_RXINTMSK_POS 4 +#define BLE_TXINTMSK_BIT ((uint32_t)0x00000008) +#define BLE_TXINTMSK_POS 3 +#define BLE_SKIPEVTINTMSK_BIT ((uint32_t)0x00000004) +#define BLE_SKIPEVTINTMSK_POS 2 +#define BLE_ENDEVTINTMSK_BIT ((uint32_t)0x00000002) +#define BLE_ENDEVTINTMSK_POS 1 +#define BLE_STARTEVTINTMSK_BIT ((uint32_t)0x00000001) +#define BLE_STARTEVTINTMSK_POS 0 + +#define BLE_ERRORINTMSK_RST 0x0 +#define BLE_ISORXINTMSK_RST 0x0 +#define BLE_ISOTXINTMSK_RST 0x0 +#define BLE_RXINTMSK_RST 0x0 +#define BLE_TXINTMSK_RST 0x0 +#define BLE_SKIPEVTINTMSK_RST 0x0 +#define BLE_ENDEVTINTMSK_RST 0x1 +#define BLE_STARTEVTINTMSK_RST 0x1 + +__INLINE void ble_intcntl0_pack(uint8_t errorintmsk, uint8_t isorxintmsk, uint8_t isotxintmsk, uint8_t rxintmsk, uint8_t txintmsk, uint8_t skipevtintmsk, uint8_t endevtintmsk, uint8_t startevtintmsk) +{ + ASSERT_ERR((((uint32_t)errorintmsk << 16) & ~((uint32_t)0x00010000)) == 0); + ASSERT_ERR((((uint32_t)isorxintmsk << 6) & ~((uint32_t)0x00000040)) == 0); + ASSERT_ERR((((uint32_t)isotxintmsk << 5) & ~((uint32_t)0x00000020)) == 0); + ASSERT_ERR((((uint32_t)rxintmsk << 4) & ~((uint32_t)0x00000010)) == 0); + ASSERT_ERR((((uint32_t)txintmsk << 3) & ~((uint32_t)0x00000008)) == 0); + ASSERT_ERR((((uint32_t)skipevtintmsk << 2) & ~((uint32_t)0x00000004)) == 0); + ASSERT_ERR((((uint32_t)endevtintmsk << 1) & ~((uint32_t)0x00000002)) == 0); + ASSERT_ERR((((uint32_t)startevtintmsk << 0) & ~((uint32_t)0x00000001)) == 0); + REG_BLE_WR(BLE_INTCNTL0_ADDR, ((uint32_t)errorintmsk << 16) | ((uint32_t)isorxintmsk << 6) | ((uint32_t)isotxintmsk << 5) | ((uint32_t)rxintmsk << 4) | ((uint32_t)txintmsk << 3) | ((uint32_t)skipevtintmsk << 2) | ((uint32_t)endevtintmsk << 1) | ((uint32_t)startevtintmsk << 0)); +} + +__INLINE void ble_intcntl0_unpack(uint8_t* errorintmsk, uint8_t* isorxintmsk, uint8_t* isotxintmsk, uint8_t* rxintmsk, uint8_t* txintmsk, uint8_t* skipevtintmsk, uint8_t* endevtintmsk, uint8_t* startevtintmsk) +{ + uint32_t localVal = REG_BLE_RD(BLE_INTCNTL0_ADDR); + + *errorintmsk = (localVal & ((uint32_t)0x00010000)) >> 16; + *isorxintmsk = (localVal & ((uint32_t)0x00000040)) >> 6; + *isotxintmsk = (localVal & ((uint32_t)0x00000020)) >> 5; + *rxintmsk = (localVal & ((uint32_t)0x00000010)) >> 4; + *txintmsk = (localVal & ((uint32_t)0x00000008)) >> 3; + *skipevtintmsk = (localVal & ((uint32_t)0x00000004)) >> 2; + *endevtintmsk = (localVal & ((uint32_t)0x00000002)) >> 1; + *startevtintmsk = (localVal & ((uint32_t)0x00000001)) >> 0; +} + +__INLINE uint8_t ble_intcntl0_errorintmsk_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_INTCNTL0_ADDR); + return ((localVal & ((uint32_t)0x00010000)) >> 16); +} + +__INLINE void ble_intcntl0_errorintmsk_setf(uint8_t errorintmsk) +{ + ASSERT_ERR((((uint32_t)errorintmsk << 16) & ~((uint32_t)0x00010000)) == 0); + REG_BLE_WR(BLE_INTCNTL0_ADDR, (REG_BLE_RD(BLE_INTCNTL0_ADDR) & ~((uint32_t)0x00010000)) | ((uint32_t)errorintmsk << 16)); +} + +__INLINE uint8_t ble_intcntl0_isorxintmsk_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_INTCNTL0_ADDR); + return ((localVal & ((uint32_t)0x00000040)) >> 6); +} + +__INLINE void ble_intcntl0_isorxintmsk_setf(uint8_t isorxintmsk) +{ + ASSERT_ERR((((uint32_t)isorxintmsk << 6) & ~((uint32_t)0x00000040)) == 0); + REG_BLE_WR(BLE_INTCNTL0_ADDR, (REG_BLE_RD(BLE_INTCNTL0_ADDR) & ~((uint32_t)0x00000040)) | ((uint32_t)isorxintmsk << 6)); +} + +__INLINE uint8_t ble_intcntl0_isotxintmsk_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_INTCNTL0_ADDR); + return ((localVal & ((uint32_t)0x00000020)) >> 5); +} + +__INLINE void ble_intcntl0_isotxintmsk_setf(uint8_t isotxintmsk) +{ + ASSERT_ERR((((uint32_t)isotxintmsk << 5) & ~((uint32_t)0x00000020)) == 0); + REG_BLE_WR(BLE_INTCNTL0_ADDR, (REG_BLE_RD(BLE_INTCNTL0_ADDR) & ~((uint32_t)0x00000020)) | ((uint32_t)isotxintmsk << 5)); +} + +__INLINE uint8_t ble_intcntl0_rxintmsk_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_INTCNTL0_ADDR); + return ((localVal & ((uint32_t)0x00000010)) >> 4); +} + +__INLINE void ble_intcntl0_rxintmsk_setf(uint8_t rxintmsk) +{ + ASSERT_ERR((((uint32_t)rxintmsk << 4) & ~((uint32_t)0x00000010)) == 0); + REG_BLE_WR(BLE_INTCNTL0_ADDR, (REG_BLE_RD(BLE_INTCNTL0_ADDR) & ~((uint32_t)0x00000010)) | ((uint32_t)rxintmsk << 4)); +} + +__INLINE uint8_t ble_intcntl0_txintmsk_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_INTCNTL0_ADDR); + return ((localVal & ((uint32_t)0x00000008)) >> 3); +} + +__INLINE void ble_intcntl0_txintmsk_setf(uint8_t txintmsk) +{ + ASSERT_ERR((((uint32_t)txintmsk << 3) & ~((uint32_t)0x00000008)) == 0); + REG_BLE_WR(BLE_INTCNTL0_ADDR, (REG_BLE_RD(BLE_INTCNTL0_ADDR) & ~((uint32_t)0x00000008)) | ((uint32_t)txintmsk << 3)); +} + +__INLINE uint8_t ble_intcntl0_skipevtintmsk_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_INTCNTL0_ADDR); + return ((localVal & ((uint32_t)0x00000004)) >> 2); +} + +__INLINE void ble_intcntl0_skipevtintmsk_setf(uint8_t skipevtintmsk) +{ + ASSERT_ERR((((uint32_t)skipevtintmsk << 2) & ~((uint32_t)0x00000004)) == 0); + REG_BLE_WR(BLE_INTCNTL0_ADDR, (REG_BLE_RD(BLE_INTCNTL0_ADDR) & ~((uint32_t)0x00000004)) | ((uint32_t)skipevtintmsk << 2)); +} + +__INLINE uint8_t ble_intcntl0_endevtintmsk_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_INTCNTL0_ADDR); + return ((localVal & ((uint32_t)0x00000002)) >> 1); +} + +__INLINE void ble_intcntl0_endevtintmsk_setf(uint8_t endevtintmsk) +{ + ASSERT_ERR((((uint32_t)endevtintmsk << 1) & ~((uint32_t)0x00000002)) == 0); + REG_BLE_WR(BLE_INTCNTL0_ADDR, (REG_BLE_RD(BLE_INTCNTL0_ADDR) & ~((uint32_t)0x00000002)) | ((uint32_t)endevtintmsk << 1)); +} + +__INLINE uint8_t ble_intcntl0_startevtintmsk_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_INTCNTL0_ADDR); + return ((localVal & ((uint32_t)0x00000001)) >> 0); +} + +__INLINE void ble_intcntl0_startevtintmsk_setf(uint8_t startevtintmsk) +{ + ASSERT_ERR((((uint32_t)startevtintmsk << 0) & ~((uint32_t)0x00000001)) == 0); + REG_BLE_WR(BLE_INTCNTL0_ADDR, (REG_BLE_RD(BLE_INTCNTL0_ADDR) & ~((uint32_t)0x00000001)) | ((uint32_t)startevtintmsk << 0)); +} + +/** + * @brief INTSTAT0 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 16 ERRORINTSTAT 0 + *+ */ +#define BLE_INTSTAT0_ADDR BASEBAND_REG_BASE +0x10 // 0x50800010 +#define BLE_INTSTAT0_OFFSET 0x00000010 +#define BLE_INTSTAT0_INDEX 0x00000004 +#define BLE_INTSTAT0_RESET 0x00000000 + +__INLINE uint32_t ble_intstat0_get(void) +{ + return REG_BLE_RD(BLE_INTSTAT0_ADDR); +} + +// field definitions +#define BLE_ERRORINTSTAT_BIT ((uint32_t)0x00010000) +#define BLE_ERRORINTSTAT_POS 16 + +#define BLE_ERRORINTSTAT_RST 0x0 + +__INLINE uint8_t ble_intstat0_errorintstat_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_INTSTAT0_ADDR); + ASSERT_ERR((localVal & ~((uint32_t)0x00010000)) == 0); + return (localVal >> 16); +} + +/** + * @brief INTACK0 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 16 ERRORINTACK 0 + *+ */ +#define BLE_INTACK0_ADDR BASEBAND_REG_BASE +0x14 //0x50800014 +#define BLE_INTACK0_OFFSET 0x00000014 +#define BLE_INTACK0_INDEX 0x00000005 +#define BLE_INTACK0_RESET 0x00000000 + +__INLINE uint32_t ble_intack0_get(void) +{ + return REG_BLE_RD(BLE_INTACK0_ADDR); +} + +__INLINE void ble_intack0_clear(uint32_t value) +{ + REG_BLE_WR(BLE_INTACK0_ADDR, value); +} + +// field definitions +#define BLE_ERRORINTACK_BIT ((uint32_t)0x00010000) +#define BLE_ERRORINTACK_POS 16 + +#define BLE_ERRORINTACK_RST 0x0 + +__INLINE uint8_t ble_intack0_errorintack_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_INTACK0_ADDR); + ASSERT_ERR((localVal & ~((uint32_t)0x00010000)) == 0); + return (localVal >> 16); +} + +__INLINE void ble_intack0_errorintack_clearf(uint8_t errorintack) +{ + ASSERT_ERR((((uint32_t)errorintack << 16) & ~((uint32_t)0x00010000)) == 0); + REG_BLE_WR(BLE_INTACK0_ADDR, (uint32_t)errorintack << 16); +} + +/** + * @brief INTCNTL1 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 30:28 CLKNINTSRMSK 0x0 + * 27:24 CLKNINTSRVAL 0x0 + * 15 FIFOINTMSK 1 + * 06 TIMESTAMPTGT2INTMSK 0 + * 05 TIMESTAMPTGT1INTMSK 0 + * 04 FINETGTINTMSK 0 + * 03 SWINTMSK 0 + * 02 CRYPTINTMSK 0 + * 01 SLPINTMSK 1 + * 00 CLKNINTMSK 1 + *+ */ +#define BLE_INTCNTL1_ADDR BASEBAND_REG_BASE +0x18 //0x50800018 +#define BLE_INTCNTL1_OFFSET 0x00000018 +#define BLE_INTCNTL1_INDEX 0x00000006 +#define BLE_INTCNTL1_RESET 0x00008003 + +__INLINE uint32_t ble_intcntl1_get(void) +{ + return REG_BLE_RD(BLE_INTCNTL1_ADDR); +} + +__INLINE void ble_intcntl1_set(uint32_t value) +{ + REG_BLE_WR(BLE_INTCNTL1_ADDR, value); +} + +// field definitions +#define BLE_CLKNINTSRMSK_MASK ((uint32_t)0x70000000) +#define BLE_CLKNINTSRMSK_LSB 28 +#define BLE_CLKNINTSRMSK_WIDTH ((uint32_t)0x00000003) +#define BLE_CLKNINTSRVAL_MASK ((uint32_t)0x0F000000) +#define BLE_CLKNINTSRVAL_LSB 24 +#define BLE_CLKNINTSRVAL_WIDTH ((uint32_t)0x00000004) +#define BLE_FIFOINTMSK_BIT ((uint32_t)0x00008000) +#define BLE_FIFOINTMSK_POS 15 +#define BLE_TIMESTAMPTGT2INTMSK_BIT ((uint32_t)0x00000040) +#define BLE_TIMESTAMPTGT2INTMSK_POS 6 +#define BLE_TIMESTAMPTGT1INTMSK_BIT ((uint32_t)0x00000020) +#define BLE_TIMESTAMPTGT1INTMSK_POS 5 +#define BLE_FINETGTINTMSK_BIT ((uint32_t)0x00000010) +#define BLE_FINETGTINTMSK_POS 4 +#define BLE_SWINTMSK_BIT ((uint32_t)0x00000008) +#define BLE_SWINTMSK_POS 3 +#define BLE_CRYPTINTMSK_BIT ((uint32_t)0x00000004) +#define BLE_CRYPTINTMSK_POS 2 +#define BLE_SLPINTMSK_BIT ((uint32_t)0x00000002) +#define BLE_SLPINTMSK_POS 1 +#define BLE_CLKNINTMSK_BIT ((uint32_t)0x00000001) +#define BLE_CLKNINTMSK_POS 0 + +#define BLE_CLKNINTSRMSK_RST 0x0 +#define BLE_CLKNINTSRVAL_RST 0x0 +#define BLE_FIFOINTMSK_RST 0x1 +#define BLE_TIMESTAMPTGT2INTMSK_RST 0x0 +#define BLE_TIMESTAMPTGT1INTMSK_RST 0x0 +#define BLE_FINETGTINTMSK_RST 0x0 +#define BLE_SWINTMSK_RST 0x0 +#define BLE_CRYPTINTMSK_RST 0x0 +#define BLE_SLPINTMSK_RST 0x1 +#define BLE_CLKNINTMSK_RST 0x1 + +__INLINE void ble_intcntl1_pack(uint8_t clknintsrmsk, uint8_t clknintsrval, uint8_t fifointmsk, uint8_t timestamptgt2intmsk, uint8_t timestamptgt1intmsk, uint8_t finetgtintmsk, uint8_t swintmsk, uint8_t cryptintmsk, uint8_t slpintmsk, uint8_t clknintmsk) +{ + ASSERT_ERR((((uint32_t)clknintsrmsk << 28) & ~((uint32_t)0x70000000)) == 0); + ASSERT_ERR((((uint32_t)clknintsrval << 24) & ~((uint32_t)0x0F000000)) == 0); + ASSERT_ERR((((uint32_t)fifointmsk << 15) & ~((uint32_t)0x00008000)) == 0); + ASSERT_ERR((((uint32_t)timestamptgt2intmsk << 6) & ~((uint32_t)0x00000040)) == 0); + ASSERT_ERR((((uint32_t)timestamptgt1intmsk << 5) & ~((uint32_t)0x00000020)) == 0); + ASSERT_ERR((((uint32_t)finetgtintmsk << 4) & ~((uint32_t)0x00000010)) == 0); + ASSERT_ERR((((uint32_t)swintmsk << 3) & ~((uint32_t)0x00000008)) == 0); + ASSERT_ERR((((uint32_t)cryptintmsk << 2) & ~((uint32_t)0x00000004)) == 0); + ASSERT_ERR((((uint32_t)slpintmsk << 1) & ~((uint32_t)0x00000002)) == 0); + ASSERT_ERR((((uint32_t)clknintmsk << 0) & ~((uint32_t)0x00000001)) == 0); + REG_BLE_WR(BLE_INTCNTL1_ADDR, ((uint32_t)clknintsrmsk << 28) | ((uint32_t)clknintsrval << 24) | ((uint32_t)fifointmsk << 15) | ((uint32_t)timestamptgt2intmsk << 6) | ((uint32_t)timestamptgt1intmsk << 5) | ((uint32_t)finetgtintmsk << 4) | ((uint32_t)swintmsk << 3) | ((uint32_t)cryptintmsk << 2) | ((uint32_t)slpintmsk << 1) | ((uint32_t)clknintmsk << 0)); +} + +__INLINE void ble_intcntl1_unpack(uint8_t* clknintsrmsk, uint8_t* clknintsrval, uint8_t* fifointmsk, uint8_t* timestamptgt2intmsk, uint8_t* timestamptgt1intmsk, uint8_t* finetgtintmsk, uint8_t* swintmsk, uint8_t* cryptintmsk, uint8_t* slpintmsk, uint8_t* clknintmsk) +{ + uint32_t localVal = REG_BLE_RD(BLE_INTCNTL1_ADDR); + + *clknintsrmsk = (localVal & ((uint32_t)0x70000000)) >> 28; + *clknintsrval = (localVal & ((uint32_t)0x0F000000)) >> 24; + *fifointmsk = (localVal & ((uint32_t)0x00008000)) >> 15; + *timestamptgt2intmsk = (localVal & ((uint32_t)0x00000040)) >> 6; + *timestamptgt1intmsk = (localVal & ((uint32_t)0x00000020)) >> 5; + *finetgtintmsk = (localVal & ((uint32_t)0x00000010)) >> 4; + *swintmsk = (localVal & ((uint32_t)0x00000008)) >> 3; + *cryptintmsk = (localVal & ((uint32_t)0x00000004)) >> 2; + *slpintmsk = (localVal & ((uint32_t)0x00000002)) >> 1; + *clknintmsk = (localVal & ((uint32_t)0x00000001)) >> 0; +} + +__INLINE uint8_t ble_intcntl1_clknintsrmsk_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_INTCNTL1_ADDR); + return ((localVal & ((uint32_t)0x70000000)) >> 28); +} + +__INLINE void ble_intcntl1_clknintsrmsk_setf(uint8_t clknintsrmsk) +{ + ASSERT_ERR((((uint32_t)clknintsrmsk << 28) & ~((uint32_t)0x70000000)) == 0); + REG_BLE_WR(BLE_INTCNTL1_ADDR, (REG_BLE_RD(BLE_INTCNTL1_ADDR) & ~((uint32_t)0x70000000)) | ((uint32_t)clknintsrmsk << 28)); +} + +__INLINE uint8_t ble_intcntl1_clknintsrval_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_INTCNTL1_ADDR); + return ((localVal & ((uint32_t)0x0F000000)) >> 24); +} + +__INLINE void ble_intcntl1_clknintsrval_setf(uint8_t clknintsrval) +{ + ASSERT_ERR((((uint32_t)clknintsrval << 24) & ~((uint32_t)0x0F000000)) == 0); + REG_BLE_WR(BLE_INTCNTL1_ADDR, (REG_BLE_RD(BLE_INTCNTL1_ADDR) & ~((uint32_t)0x0F000000)) | ((uint32_t)clknintsrval << 24)); +} + +__INLINE uint8_t ble_intcntl1_fifointmsk_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_INTCNTL1_ADDR); + return ((localVal & ((uint32_t)0x00008000)) >> 15); +} + +__INLINE void ble_intcntl1_fifointmsk_setf(uint8_t fifointmsk) +{ + ASSERT_ERR((((uint32_t)fifointmsk << 15) & ~((uint32_t)0x00008000)) == 0); + REG_BLE_WR(BLE_INTCNTL1_ADDR, (REG_BLE_RD(BLE_INTCNTL1_ADDR) & ~((uint32_t)0x00008000)) | ((uint32_t)fifointmsk << 15)); +} + +__INLINE uint8_t ble_intcntl1_timestamptgt2intmsk_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_INTCNTL1_ADDR); + return ((localVal & ((uint32_t)0x00000040)) >> 6); +} + +__INLINE void ble_intcntl1_timestamptgt2intmsk_setf(uint8_t timestamptgt2intmsk) +{ + ASSERT_ERR((((uint32_t)timestamptgt2intmsk << 6) & ~((uint32_t)0x00000040)) == 0); + REG_BLE_WR(BLE_INTCNTL1_ADDR, (REG_BLE_RD(BLE_INTCNTL1_ADDR) & ~((uint32_t)0x00000040)) | ((uint32_t)timestamptgt2intmsk << 6)); +} + +__INLINE uint8_t ble_intcntl1_timestamptgt1intmsk_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_INTCNTL1_ADDR); + return ((localVal & ((uint32_t)0x00000020)) >> 5); +} + +__INLINE void ble_intcntl1_timestamptgt1intmsk_setf(uint8_t timestamptgt1intmsk) +{ + ASSERT_ERR((((uint32_t)timestamptgt1intmsk << 5) & ~((uint32_t)0x00000020)) == 0); + REG_BLE_WR(BLE_INTCNTL1_ADDR, (REG_BLE_RD(BLE_INTCNTL1_ADDR) & ~((uint32_t)0x00000020)) | ((uint32_t)timestamptgt1intmsk << 5)); +} + +__INLINE uint8_t ble_intcntl1_finetgtintmsk_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_INTCNTL1_ADDR); + return ((localVal & ((uint32_t)0x00000010)) >> 4); +} + +__INLINE void ble_intcntl1_finetgtintmsk_setf(uint8_t finetgtintmsk) +{ + ASSERT_ERR((((uint32_t)finetgtintmsk << 4) & ~((uint32_t)0x00000010)) == 0); + REG_BLE_WR(BLE_INTCNTL1_ADDR, (REG_BLE_RD(BLE_INTCNTL1_ADDR) & ~((uint32_t)0x00000010)) | ((uint32_t)finetgtintmsk << 4)); +} + +__INLINE uint8_t ble_intcntl1_swintmsk_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_INTCNTL1_ADDR); + return ((localVal & ((uint32_t)0x00000008)) >> 3); +} + +__INLINE void ble_intcntl1_swintmsk_setf(uint8_t swintmsk) +{ + ASSERT_ERR((((uint32_t)swintmsk << 3) & ~((uint32_t)0x00000008)) == 0); + REG_BLE_WR(BLE_INTCNTL1_ADDR, (REG_BLE_RD(BLE_INTCNTL1_ADDR) & ~((uint32_t)0x00000008)) | ((uint32_t)swintmsk << 3)); +} + +__INLINE uint8_t ble_intcntl1_cryptintmsk_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_INTCNTL1_ADDR); + return ((localVal & ((uint32_t)0x00000004)) >> 2); +} + +__INLINE void ble_intcntl1_cryptintmsk_setf(uint8_t cryptintmsk) +{ + ASSERT_ERR((((uint32_t)cryptintmsk << 2) & ~((uint32_t)0x00000004)) == 0); + REG_BLE_WR(BLE_INTCNTL1_ADDR, (REG_BLE_RD(BLE_INTCNTL1_ADDR) & ~((uint32_t)0x00000004)) | ((uint32_t)cryptintmsk << 2)); +} + +__INLINE uint8_t ble_intcntl1_slpintmsk_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_INTCNTL1_ADDR); + return ((localVal & ((uint32_t)0x00000002)) >> 1); +} + +__INLINE void ble_intcntl1_slpintmsk_setf(uint8_t slpintmsk) +{ + ASSERT_ERR((((uint32_t)slpintmsk << 1) & ~((uint32_t)0x00000002)) == 0); + REG_BLE_WR(BLE_INTCNTL1_ADDR, (REG_BLE_RD(BLE_INTCNTL1_ADDR) & ~((uint32_t)0x00000002)) | ((uint32_t)slpintmsk << 1)); +} + +__INLINE uint8_t ble_intcntl1_clknintmsk_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_INTCNTL1_ADDR); + return ((localVal & ((uint32_t)0x00000001)) >> 0); +} + +__INLINE void ble_intcntl1_clknintmsk_setf(uint8_t clknintmsk) +{ + ASSERT_ERR((((uint32_t)clknintmsk << 0) & ~((uint32_t)0x00000001)) == 0); + REG_BLE_WR(BLE_INTCNTL1_ADDR, (REG_BLE_RD(BLE_INTCNTL1_ADDR) & ~((uint32_t)0x00000001)) | ((uint32_t)clknintmsk << 0)); +} + +/** + * @brief INTSTAT1 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15 FIFOINTSTAT 0 + * 06 TIMESTAMPTGT2INTSTAT 0 + * 05 TIMESTAMPTGT1INTSTAT 0 + * 04 FINETGTINTSTAT 0 + * 03 SWINTSTAT 0 + * 02 CRYPTINTSTAT 0 + * 01 SLPINTSTAT 0 + * 00 CLKNINTSTAT 0 + *+ */ +#define BLE_INTSTAT1_ADDR BASEBAND_REG_BASE +0x1C //0x5080001C +#define BLE_INTSTAT1_OFFSET 0x0000001C +#define BLE_INTSTAT1_INDEX 0x00000007 +#define BLE_INTSTAT1_RESET 0x00000000 + +__INLINE uint32_t ble_intstat1_get(void) +{ + return REG_BLE_RD(BLE_INTSTAT1_ADDR); +} + +// field definitions +#define BLE_FIFOINTSTAT_BIT ((uint32_t)0x00008000) +#define BLE_FIFOINTSTAT_POS 15 +#define BLE_TIMESTAMPTGT2INTSTAT_BIT ((uint32_t)0x00000040) +#define BLE_TIMESTAMPTGT2INTSTAT_POS 6 +#define BLE_TIMESTAMPTGT1INTSTAT_BIT ((uint32_t)0x00000020) +#define BLE_TIMESTAMPTGT1INTSTAT_POS 5 +#define BLE_FINETGTINTSTAT_BIT ((uint32_t)0x00000010) +#define BLE_FINETGTINTSTAT_POS 4 +#define BLE_SWINTSTAT_BIT ((uint32_t)0x00000008) +#define BLE_SWINTSTAT_POS 3 +#define BLE_CRYPTINTSTAT_BIT ((uint32_t)0x00000004) +#define BLE_CRYPTINTSTAT_POS 2 +#define BLE_SLPINTSTAT_BIT ((uint32_t)0x00000002) +#define BLE_SLPINTSTAT_POS 1 +#define BLE_CLKNINTSTAT_BIT ((uint32_t)0x00000001) +#define BLE_CLKNINTSTAT_POS 0 + +#define BLE_FIFOINTSTAT_RST 0x0 +#define BLE_TIMESTAMPTGT2INTSTAT_RST 0x0 +#define BLE_TIMESTAMPTGT1INTSTAT_RST 0x0 +#define BLE_FINETGTINTSTAT_RST 0x0 +#define BLE_SWINTSTAT_RST 0x0 +#define BLE_CRYPTINTSTAT_RST 0x0 +#define BLE_SLPINTSTAT_RST 0x0 +#define BLE_CLKNINTSTAT_RST 0x0 + +__INLINE void ble_intstat1_unpack(uint8_t* fifointstat, uint8_t* timestamptgt2intstat, uint8_t* timestamptgt1intstat, uint8_t* finetgtintstat, uint8_t* swintstat, uint8_t* cryptintstat, uint8_t* slpintstat, uint8_t* clknintstat) +{ + uint32_t localVal = REG_BLE_RD(BLE_INTSTAT1_ADDR); + + *fifointstat = (localVal & ((uint32_t)0x00008000)) >> 15; + *timestamptgt2intstat = (localVal & ((uint32_t)0x00000040)) >> 6; + *timestamptgt1intstat = (localVal & ((uint32_t)0x00000020)) >> 5; + *finetgtintstat = (localVal & ((uint32_t)0x00000010)) >> 4; + *swintstat = (localVal & ((uint32_t)0x00000008)) >> 3; + *cryptintstat = (localVal & ((uint32_t)0x00000004)) >> 2; + *slpintstat = (localVal & ((uint32_t)0x00000002)) >> 1; + *clknintstat = (localVal & ((uint32_t)0x00000001)) >> 0; +} + +__INLINE uint8_t ble_intstat1_fifointstat_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_INTSTAT1_ADDR); + return ((localVal & ((uint32_t)0x00008000)) >> 15); +} + +__INLINE uint8_t ble_intstat1_timestamptgt2intstat_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_INTSTAT1_ADDR); + return ((localVal & ((uint32_t)0x00000040)) >> 6); +} + +__INLINE uint8_t ble_intstat1_timestamptgt1intstat_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_INTSTAT1_ADDR); + return ((localVal & ((uint32_t)0x00000020)) >> 5); +} + +__INLINE uint8_t ble_intstat1_finetgtintstat_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_INTSTAT1_ADDR); + return ((localVal & ((uint32_t)0x00000010)) >> 4); +} + +__INLINE uint8_t ble_intstat1_swintstat_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_INTSTAT1_ADDR); + return ((localVal & ((uint32_t)0x00000008)) >> 3); +} + +__INLINE uint8_t ble_intstat1_cryptintstat_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_INTSTAT1_ADDR); + return ((localVal & ((uint32_t)0x00000004)) >> 2); +} + +__INLINE uint8_t ble_intstat1_slpintstat_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_INTSTAT1_ADDR); + return ((localVal & ((uint32_t)0x00000002)) >> 1); +} + +__INLINE uint8_t ble_intstat1_clknintstat_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_INTSTAT1_ADDR); + return ((localVal & ((uint32_t)0x00000001)) >> 0); +} + +/** + * @brief INTACK1 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15 FIFOINTACK 0 + * 06 TIMESTAMPTGT2INTACK 0 + * 05 TIMESTAMPTGT1INTACK 0 + * 04 FINETGTINTACK 0 + * 03 SWINTACK 0 + * 02 CRYPTINTACK 0 + * 01 SLPINTACK 0 + * 00 CLKNINTACK 0 + *+ */ +#define BLE_INTACK1_ADDR BASEBAND_REG_BASE +0x20 //0x50800020 +#define BLE_INTACK1_OFFSET 0x00000020 +#define BLE_INTACK1_INDEX 0x00000008 +#define BLE_INTACK1_RESET 0x00000000 + +__INLINE uint32_t ble_intack1_get(void) +{ + return REG_BLE_RD(BLE_INTACK1_ADDR); +} + +__INLINE void ble_intack1_clear(uint32_t value) +{ + REG_BLE_WR(BLE_INTACK1_ADDR, value); +} + +// field definitions +#define BLE_FIFOINTACK_BIT ((uint32_t)0x00008000) +#define BLE_FIFOINTACK_POS 15 +#define BLE_TIMESTAMPTGT2INTACK_BIT ((uint32_t)0x00000040) +#define BLE_TIMESTAMPTGT2INTACK_POS 6 +#define BLE_TIMESTAMPTGT1INTACK_BIT ((uint32_t)0x00000020) +#define BLE_TIMESTAMPTGT1INTACK_POS 5 +#define BLE_FINETGTINTACK_BIT ((uint32_t)0x00000010) +#define BLE_FINETGTINTACK_POS 4 +#define BLE_SWINTACK_BIT ((uint32_t)0x00000008) +#define BLE_SWINTACK_POS 3 +#define BLE_CRYPTINTACK_BIT ((uint32_t)0x00000004) +#define BLE_CRYPTINTACK_POS 2 +#define BLE_SLPINTACK_BIT ((uint32_t)0x00000002) +#define BLE_SLPINTACK_POS 1 +#define BLE_CLKNINTACK_BIT ((uint32_t)0x00000001) +#define BLE_CLKNINTACK_POS 0 + +#define BLE_FIFOINTACK_RST 0x0 +#define BLE_TIMESTAMPTGT2INTACK_RST 0x0 +#define BLE_TIMESTAMPTGT1INTACK_RST 0x0 +#define BLE_FINETGTINTACK_RST 0x0 +#define BLE_SWINTACK_RST 0x0 +#define BLE_CRYPTINTACK_RST 0x0 +#define BLE_SLPINTACK_RST 0x0 +#define BLE_CLKNINTACK_RST 0x0 + +__INLINE void ble_intack1_pack(uint8_t fifointack, uint8_t timestamptgt2intack, uint8_t timestamptgt1intack, uint8_t finetgtintack, uint8_t swintack, uint8_t cryptintack, uint8_t slpintack, uint8_t clknintack) +{ + ASSERT_ERR((((uint32_t)fifointack << 15) & ~((uint32_t)0x00008000)) == 0); + ASSERT_ERR((((uint32_t)timestamptgt2intack << 6) & ~((uint32_t)0x00000040)) == 0); + ASSERT_ERR((((uint32_t)timestamptgt1intack << 5) & ~((uint32_t)0x00000020)) == 0); + ASSERT_ERR((((uint32_t)finetgtintack << 4) & ~((uint32_t)0x00000010)) == 0); + ASSERT_ERR((((uint32_t)swintack << 3) & ~((uint32_t)0x00000008)) == 0); + ASSERT_ERR((((uint32_t)cryptintack << 2) & ~((uint32_t)0x00000004)) == 0); + ASSERT_ERR((((uint32_t)slpintack << 1) & ~((uint32_t)0x00000002)) == 0); + ASSERT_ERR((((uint32_t)clknintack << 0) & ~((uint32_t)0x00000001)) == 0); + REG_BLE_WR(BLE_INTACK1_ADDR, ((uint32_t)fifointack << 15) | ((uint32_t)timestamptgt2intack << 6) | ((uint32_t)timestamptgt1intack << 5) | ((uint32_t)finetgtintack << 4) | ((uint32_t)swintack << 3) | ((uint32_t)cryptintack << 2) | ((uint32_t)slpintack << 1) | ((uint32_t)clknintack << 0)); +} + +__INLINE void ble_intack1_unpack(uint8_t* fifointack, uint8_t* timestamptgt2intack, uint8_t* timestamptgt1intack, uint8_t* finetgtintack, uint8_t* swintack, uint8_t* cryptintack, uint8_t* slpintack, uint8_t* clknintack) +{ + uint32_t localVal = REG_BLE_RD(BLE_INTACK1_ADDR); + + *fifointack = (localVal & ((uint32_t)0x00008000)) >> 15; + *timestamptgt2intack = (localVal & ((uint32_t)0x00000040)) >> 6; + *timestamptgt1intack = (localVal & ((uint32_t)0x00000020)) >> 5; + *finetgtintack = (localVal & ((uint32_t)0x00000010)) >> 4; + *swintack = (localVal & ((uint32_t)0x00000008)) >> 3; + *cryptintack = (localVal & ((uint32_t)0x00000004)) >> 2; + *slpintack = (localVal & ((uint32_t)0x00000002)) >> 1; + *clknintack = (localVal & ((uint32_t)0x00000001)) >> 0; +} + +__INLINE uint8_t ble_intack1_fifointack_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_INTACK1_ADDR); + return ((localVal & ((uint32_t)0x00008000)) >> 15); +} + +__INLINE void ble_intack1_fifointack_clearf(uint8_t fifointack) +{ + ASSERT_ERR((((uint32_t)fifointack << 15) & ~((uint32_t)0x00008000)) == 0); + REG_BLE_WR(BLE_INTACK1_ADDR, (uint32_t)fifointack << 15); +} + +__INLINE uint8_t ble_intack1_timestamptgt2intack_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_INTACK1_ADDR); + return ((localVal & ((uint32_t)0x00000040)) >> 6); +} + +__INLINE void ble_intack1_timestamptgt2intack_clearf(uint8_t timestamptgt2intack) +{ + ASSERT_ERR((((uint32_t)timestamptgt2intack << 6) & ~((uint32_t)0x00000040)) == 0); + REG_BLE_WR(BLE_INTACK1_ADDR, (uint32_t)timestamptgt2intack << 6); +} + +__INLINE uint8_t ble_intack1_timestamptgt1intack_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_INTACK1_ADDR); + return ((localVal & ((uint32_t)0x00000020)) >> 5); +} + +__INLINE void ble_intack1_timestamptgt1intack_clearf(uint8_t timestamptgt1intack) +{ + ASSERT_ERR((((uint32_t)timestamptgt1intack << 5) & ~((uint32_t)0x00000020)) == 0); + REG_BLE_WR(BLE_INTACK1_ADDR, (uint32_t)timestamptgt1intack << 5); +} + +__INLINE uint8_t ble_intack1_finetgtintack_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_INTACK1_ADDR); + return ((localVal & ((uint32_t)0x00000010)) >> 4); +} + +__INLINE void ble_intack1_finetgtintack_clearf(uint8_t finetgtintack) +{ + ASSERT_ERR((((uint32_t)finetgtintack << 4) & ~((uint32_t)0x00000010)) == 0); + REG_BLE_WR(BLE_INTACK1_ADDR, (uint32_t)finetgtintack << 4); +} + +__INLINE uint8_t ble_intack1_swintack_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_INTACK1_ADDR); + return ((localVal & ((uint32_t)0x00000008)) >> 3); +} + +__INLINE void ble_intack1_swintack_clearf(uint8_t swintack) +{ + ASSERT_ERR((((uint32_t)swintack << 3) & ~((uint32_t)0x00000008)) == 0); + REG_BLE_WR(BLE_INTACK1_ADDR, (uint32_t)swintack << 3); +} + +__INLINE uint8_t ble_intack1_cryptintack_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_INTACK1_ADDR); + return ((localVal & ((uint32_t)0x00000004)) >> 2); +} + +__INLINE void ble_intack1_cryptintack_clearf(uint8_t cryptintack) +{ + ASSERT_ERR((((uint32_t)cryptintack << 2) & ~((uint32_t)0x00000004)) == 0); + REG_BLE_WR(BLE_INTACK1_ADDR, (uint32_t)cryptintack << 2); +} + +__INLINE uint8_t ble_intack1_slpintack_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_INTACK1_ADDR); + return ((localVal & ((uint32_t)0x00000002)) >> 1); +} + +__INLINE void ble_intack1_slpintack_clearf(uint8_t slpintack) +{ + ASSERT_ERR((((uint32_t)slpintack << 1) & ~((uint32_t)0x00000002)) == 0); + REG_BLE_WR(BLE_INTACK1_ADDR, (uint32_t)slpintack << 1); +} + +__INLINE uint8_t ble_intack1_clknintack_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_INTACK1_ADDR); + return ((localVal & ((uint32_t)0x00000001)) >> 0); +} + +__INLINE void ble_intack1_clknintack_clearf(uint8_t clknintack) +{ + ASSERT_ERR((((uint32_t)clknintack << 0) & ~((uint32_t)0x00000001)) == 0); + REG_BLE_WR(BLE_INTACK1_ADDR, (uint32_t)clknintack << 0); +} + +/** + * @brief ACTFIFOSTAT register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31:28 SKIP_ET_IDX 0x0 + * 27:24 CURRENT_ET_IDX 0x0 + * 15 ACTFLAG 0 + * 06 ISORXINTSTAT 0 + * 05 ISOTXINTSTAT 0 + * 04 RXINTSTAT 0 + * 03 TXINTSTAT 0 + * 02 SKIPACTINTSTAT 0 + * 01 ENDACTINTSTAT 0 + * 00 STARTACTINTSTAT 0 + *+ */ +#define BLE_ACTFIFOSTAT_ADDR BASEBAND_REG_BASE +0x24 //0x50800024 +#define BLE_ACTFIFOSTAT_OFFSET 0x00000024 +#define BLE_ACTFIFOSTAT_INDEX 0x00000009 +#define BLE_ACTFIFOSTAT_RESET 0x00000000 + +__INLINE uint32_t ble_actfifostat_get(void) +{ + return REG_BLE_RD(BLE_ACTFIFOSTAT_ADDR); +} + +// field definitions +#define BLE_SKIP_ET_IDX_MASK ((uint32_t)0xF0000000) +#define BLE_SKIP_ET_IDX_LSB 28 +#define BLE_SKIP_ET_IDX_WIDTH ((uint32_t)0x00000004) +#define BLE_CURRENT_ET_IDX_MASK ((uint32_t)0x0F000000) +#define BLE_CURRENT_ET_IDX_LSB 24 +#define BLE_CURRENT_ET_IDX_WIDTH ((uint32_t)0x00000004) +#define BLE_ACTFLAG_BIT ((uint32_t)0x00008000) +#define BLE_ACTFLAG_POS 15 +#define BLE_ISORXINTSTAT_BIT ((uint32_t)0x00000040) +#define BLE_ISORXINTSTAT_POS 6 +#define BLE_ISOTXINTSTAT_BIT ((uint32_t)0x00000020) +#define BLE_ISOTXINTSTAT_POS 5 +#define BLE_RXINTSTAT_BIT ((uint32_t)0x00000010) +#define BLE_RXINTSTAT_POS 4 +#define BLE_TXINTSTAT_BIT ((uint32_t)0x00000008) +#define BLE_TXINTSTAT_POS 3 +#define BLE_SKIPACTINTSTAT_BIT ((uint32_t)0x00000004) +#define BLE_SKIPACTINTSTAT_POS 2 +#define BLE_ENDACTINTSTAT_BIT ((uint32_t)0x00000002) +#define BLE_ENDACTINTSTAT_POS 1 +#define BLE_STARTACTINTSTAT_BIT ((uint32_t)0x00000001) +#define BLE_STARTACTINTSTAT_POS 0 + +#define BLE_SKIP_ET_IDX_RST 0x0 +#define BLE_CURRENT_ET_IDX_RST 0x0 +#define BLE_ACTFLAG_RST 0x0 +#define BLE_ISORXINTSTAT_RST 0x0 +#define BLE_ISOTXINTSTAT_RST 0x0 +#define BLE_RXINTSTAT_RST 0x0 +#define BLE_TXINTSTAT_RST 0x0 +#define BLE_SKIPACTINTSTAT_RST 0x0 +#define BLE_ENDACTINTSTAT_RST 0x0 +#define BLE_STARTACTINTSTAT_RST 0x0 + +__INLINE void ble_actfifostat_unpack(uint8_t* skipetidx, uint8_t* currentetidx, uint8_t* actflag, uint8_t* isorxintstat, uint8_t* isotxintstat, uint8_t* rxintstat, uint8_t* txintstat, uint8_t* skipactintstat, uint8_t* endactintstat, uint8_t* startactintstat) +{ + uint32_t localVal = REG_BLE_RD(BLE_ACTFIFOSTAT_ADDR); + + *skipetidx = (localVal & ((uint32_t)0xF0000000)) >> 28; + *currentetidx = (localVal & ((uint32_t)0x0F000000)) >> 24; + *actflag = (localVal & ((uint32_t)0x00008000)) >> 15; + *isorxintstat = (localVal & ((uint32_t)0x00000040)) >> 6; + *isotxintstat = (localVal & ((uint32_t)0x00000020)) >> 5; + *rxintstat = (localVal & ((uint32_t)0x00000010)) >> 4; + *txintstat = (localVal & ((uint32_t)0x00000008)) >> 3; + *skipactintstat = (localVal & ((uint32_t)0x00000004)) >> 2; + *endactintstat = (localVal & ((uint32_t)0x00000002)) >> 1; + *startactintstat = (localVal & ((uint32_t)0x00000001)) >> 0; +} + +__INLINE uint8_t ble_actfifostat_skip_et_idx_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_ACTFIFOSTAT_ADDR); + return ((localVal & ((uint32_t)0xF0000000)) >> 28); +} + +__INLINE uint8_t ble_actfifostat_current_et_idx_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_ACTFIFOSTAT_ADDR); + return ((localVal & ((uint32_t)0x0F000000)) >> 24); +} + +__INLINE uint8_t ble_actfifostat_actflag_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_ACTFIFOSTAT_ADDR); + return ((localVal & ((uint32_t)0x00008000)) >> 15); +} + +__INLINE uint8_t ble_actfifostat_isorxintstat_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_ACTFIFOSTAT_ADDR); + return ((localVal & ((uint32_t)0x00000040)) >> 6); +} + +__INLINE uint8_t ble_actfifostat_isotxintstat_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_ACTFIFOSTAT_ADDR); + return ((localVal & ((uint32_t)0x00000020)) >> 5); +} + +__INLINE uint8_t ble_actfifostat_rxintstat_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_ACTFIFOSTAT_ADDR); + return ((localVal & ((uint32_t)0x00000010)) >> 4); +} + +__INLINE uint8_t ble_actfifostat_txintstat_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_ACTFIFOSTAT_ADDR); + return ((localVal & ((uint32_t)0x00000008)) >> 3); +} + +__INLINE uint8_t ble_actfifostat_skipactintstat_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_ACTFIFOSTAT_ADDR); + return ((localVal & ((uint32_t)0x00000004)) >> 2); +} + +__INLINE uint8_t ble_actfifostat_endactintstat_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_ACTFIFOSTAT_ADDR); + return ((localVal & ((uint32_t)0x00000002)) >> 1); +} + +__INLINE uint8_t ble_actfifostat_startactintstat_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_ACTFIFOSTAT_ADDR); + return ((localVal & ((uint32_t)0x00000001)) >> 0); +} + +/** + * @brief CURRENTRXDESCPTR register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 13:00 CURRENTRXDESCPTR 0x0 + *+ */ +#define BLE_CURRENTRXDESCPTR_ADDR BASEBAND_REG_BASE +0x28 //0x50800028 +#define BLE_CURRENTRXDESCPTR_OFFSET 0x00000028 +#define BLE_CURRENTRXDESCPTR_INDEX 0x0000000A +#define BLE_CURRENTRXDESCPTR_RESET 0x00000000 + +__INLINE uint32_t ble_currentrxdescptr_get(void) +{ + return REG_BLE_RD(BLE_CURRENTRXDESCPTR_ADDR); +} + +__INLINE void ble_currentrxdescptr_set(uint32_t value) +{ + REG_BLE_WR(BLE_CURRENTRXDESCPTR_ADDR, value); +} + +// field definitions +#define BLE_CURRENTRXDESCPTR_MASK ((uint32_t)0x00003FFF) +#define BLE_CURRENTRXDESCPTR_LSB 0 +#define BLE_CURRENTRXDESCPTR_WIDTH ((uint32_t)0x0000000E) + +#define BLE_CURRENTRXDESCPTR_RST 0x0 + +__INLINE uint16_t ble_currentrxdescptr_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_CURRENTRXDESCPTR_ADDR); + ASSERT_ERR((localVal & ~((uint32_t)0x00003FFF)) == 0); + return (localVal >> 0); +} + +__INLINE void ble_currentrxdescptr_setf(uint16_t currentrxdescptr) +{ + ASSERT_ERR((((uint32_t)currentrxdescptr << 0) & ~((uint32_t)0x00003FFF)) == 0); + REG_BLE_WR(BLE_CURRENTRXDESCPTR_ADDR, (uint32_t)currentrxdescptr << 0); +} + +/** + * @brief ETPTR register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 13:00 ETPTR 0x0 + *+ */ +#define BLE_ETPTR_ADDR BASEBAND_REG_BASE +0x2C //0x5080002C +#define BLE_ETPTR_OFFSET 0x0000002C +#define BLE_ETPTR_INDEX 0x0000000B +#define BLE_ETPTR_RESET 0x00000000 + +__INLINE uint32_t ble_etptr_get(void) +{ + return REG_BLE_RD(BLE_ETPTR_ADDR); +} + +__INLINE void ble_etptr_set(uint32_t value) +{ + REG_BLE_WR(BLE_ETPTR_ADDR, value); +} + +// field definitions +#define BLE_ETPTR_MASK ((uint32_t)0x00003FFF) +#define BLE_ETPTR_LSB 0 +#define BLE_ETPTR_WIDTH ((uint32_t)0x0000000E) + +#define BLE_ETPTR_RST 0x0 + +__INLINE uint16_t ble_etptr_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_ETPTR_ADDR); + ASSERT_ERR((localVal & ~((uint32_t)0x00003FFF)) == 0); + return (localVal >> 0); +} + +__INLINE void ble_etptr_setf(uint16_t etptr) +{ + ASSERT_ERR((((uint32_t)etptr << 0) & ~((uint32_t)0x00003FFF)) == 0); + REG_BLE_WR(BLE_ETPTR_ADDR, (uint32_t)etptr << 0); +} + +/** + * @brief DEEPSLCNTL register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31 EXTWKUPDSB 0 + * 15 DEEP_SLEEP_STAT 0 + * 03 DEEP_SLEEP_CORR_EN 0 + * 02 DEEP_SLEEP_ON 0 + * 01 RADIO_SLEEP_EN 0 + * 00 OSC_SLEEP_EN 0 + *+ */ +#define BLE_DEEPSLCNTL_ADDR BASEBAND_REG_BASE +0x30 //0x50800030 +#define BLE_DEEPSLCNTL_OFFSET 0x00000030 +#define BLE_DEEPSLCNTL_INDEX 0x0000000C +#define BLE_DEEPSLCNTL_RESET 0x00000000 + +__INLINE uint32_t ble_deepslcntl_get(void) +{ + return REG_BLE_RD(BLE_DEEPSLCNTL_ADDR); +} + +__INLINE void ble_deepslcntl_set(uint32_t value) +{ + REG_BLE_WR(BLE_DEEPSLCNTL_ADDR, value); +} + +// field definitions +#define BLE_EXTWKUPDSB_BIT ((uint32_t)0x80000000) +#define BLE_EXTWKUPDSB_POS 31 +#define BLE_DEEP_SLEEP_STAT_BIT ((uint32_t)0x00008000) +#define BLE_DEEP_SLEEP_STAT_POS 15 +#define BLE_DEEP_SLEEP_CORR_EN_BIT ((uint32_t)0x00000008) +#define BLE_DEEP_SLEEP_CORR_EN_POS 3 +#define BLE_DEEP_SLEEP_ON_BIT ((uint32_t)0x00000004) +#define BLE_DEEP_SLEEP_ON_POS 2 +#define BLE_RADIO_SLEEP_EN_BIT ((uint32_t)0x00000002) +#define BLE_RADIO_SLEEP_EN_POS 1 +#define BLE_OSC_SLEEP_EN_BIT ((uint32_t)0x00000001) +#define BLE_OSC_SLEEP_EN_POS 0 + +#define BLE_EXTWKUPDSB_RST 0x0 +#define BLE_DEEP_SLEEP_STAT_RST 0x0 +#define BLE_DEEP_SLEEP_CORR_EN_RST 0x0 +#define BLE_DEEP_SLEEP_ON_RST 0x0 +#define BLE_RADIO_SLEEP_EN_RST 0x0 +#define BLE_OSC_SLEEP_EN_RST 0x0 + +__INLINE void ble_deepslcntl_pack(uint8_t extwkupdsb, uint8_t deepsleepcorren, uint8_t deepsleepon, uint8_t radiosleepen, uint8_t oscsleepen) +{ + ASSERT_ERR((((uint32_t)extwkupdsb << 31) & ~((uint32_t)0x80000000)) == 0); + ASSERT_ERR((((uint32_t)deepsleepcorren << 3) & ~((uint32_t)0x00000008)) == 0); + ASSERT_ERR((((uint32_t)deepsleepon << 2) & ~((uint32_t)0x00000004)) == 0); + ASSERT_ERR((((uint32_t)radiosleepen << 1) & ~((uint32_t)0x00000002)) == 0); + ASSERT_ERR((((uint32_t)oscsleepen << 0) & ~((uint32_t)0x00000001)) == 0); + REG_BLE_WR(BLE_DEEPSLCNTL_ADDR, ((uint32_t)extwkupdsb << 31) | ((uint32_t)deepsleepcorren << 3) | ((uint32_t)deepsleepon << 2) | ((uint32_t)radiosleepen << 1) | ((uint32_t)oscsleepen << 0)); +} + +__INLINE void ble_deepslcntl_unpack(uint8_t* extwkupdsb, uint8_t* deepsleepstat, uint8_t* deepsleepcorren, uint8_t* deepsleepon, uint8_t* radiosleepen, uint8_t* oscsleepen) +{ + uint32_t localVal = REG_BLE_RD(BLE_DEEPSLCNTL_ADDR); + + *extwkupdsb = (localVal & ((uint32_t)0x80000000)) >> 31; + *deepsleepstat = (localVal & ((uint32_t)0x00008000)) >> 15; + *deepsleepcorren = (localVal & ((uint32_t)0x00000008)) >> 3; + *deepsleepon = (localVal & ((uint32_t)0x00000004)) >> 2; + *radiosleepen = (localVal & ((uint32_t)0x00000002)) >> 1; + *oscsleepen = (localVal & ((uint32_t)0x00000001)) >> 0; +} + +__INLINE uint8_t ble_deepslcntl_extwkupdsb_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_DEEPSLCNTL_ADDR); + return ((localVal & ((uint32_t)0x80000000)) >> 31); +} + +__INLINE void ble_deepslcntl_extwkupdsb_setf(uint8_t extwkupdsb) +{ + ASSERT_ERR((((uint32_t)extwkupdsb << 31) & ~((uint32_t)0x80000000)) == 0); + REG_BLE_WR(BLE_DEEPSLCNTL_ADDR, (REG_BLE_RD(BLE_DEEPSLCNTL_ADDR) & ~((uint32_t)0x80000000)) | ((uint32_t)extwkupdsb << 31)); +} + +__INLINE uint8_t ble_deepslcntl_deep_sleep_stat_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_DEEPSLCNTL_ADDR); + return ((localVal & ((uint32_t)0x00008000)) >> 15); +} + +__INLINE uint8_t ble_deepslcntl_deep_sleep_corr_en_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_DEEPSLCNTL_ADDR); + return ((localVal & ((uint32_t)0x00000008)) >> 3); +} + +__INLINE void ble_deepslcntl_deep_sleep_corr_en_setf(uint8_t deepsleepcorren) +{ + ASSERT_ERR((((uint32_t)deepsleepcorren << 3) & ~((uint32_t)0x00000008)) == 0); + REG_BLE_WR(BLE_DEEPSLCNTL_ADDR, (REG_BLE_RD(BLE_DEEPSLCNTL_ADDR) & ~((uint32_t)0x00000008)) | ((uint32_t)deepsleepcorren << 3)); +} + +__INLINE uint8_t ble_deepslcntl_deep_sleep_on_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_DEEPSLCNTL_ADDR); + return ((localVal & ((uint32_t)0x00000004)) >> 2); +} + +__INLINE void ble_deepslcntl_deep_sleep_on_setf(uint8_t deepsleepon) +{ + ASSERT_ERR((((uint32_t)deepsleepon << 2) & ~((uint32_t)0x00000004)) == 0); + REG_BLE_WR(BLE_DEEPSLCNTL_ADDR, (REG_BLE_RD(BLE_DEEPSLCNTL_ADDR) & ~((uint32_t)0x00000004)) | ((uint32_t)deepsleepon << 2)); +} + +__INLINE uint8_t ble_deepslcntl_radio_sleep_en_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_DEEPSLCNTL_ADDR); + return ((localVal & ((uint32_t)0x00000002)) >> 1); +} + +__INLINE void ble_deepslcntl_radio_sleep_en_setf(uint8_t radiosleepen) +{ + ASSERT_ERR((((uint32_t)radiosleepen << 1) & ~((uint32_t)0x00000002)) == 0); + REG_BLE_WR(BLE_DEEPSLCNTL_ADDR, (REG_BLE_RD(BLE_DEEPSLCNTL_ADDR) & ~((uint32_t)0x00000002)) | ((uint32_t)radiosleepen << 1)); +} + +__INLINE uint8_t ble_deepslcntl_osc_sleep_en_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_DEEPSLCNTL_ADDR); + return ((localVal & ((uint32_t)0x00000001)) >> 0); +} + +__INLINE void ble_deepslcntl_osc_sleep_en_setf(uint8_t oscsleepen) +{ + ASSERT_ERR((((uint32_t)oscsleepen << 0) & ~((uint32_t)0x00000001)) == 0); + REG_BLE_WR(BLE_DEEPSLCNTL_ADDR, (REG_BLE_RD(BLE_DEEPSLCNTL_ADDR) & ~((uint32_t)0x00000001)) | ((uint32_t)oscsleepen << 0)); +} + +/** + * @brief DEEPSLWKUP register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31:00 DEEPSLTIME 0x0 + *+ */ +#define BLE_DEEPSLWKUP_ADDR BASEBAND_REG_BASE +0x34 //0x50800034 +#define BLE_DEEPSLWKUP_OFFSET 0x00000034 +#define BLE_DEEPSLWKUP_INDEX 0x0000000D +#define BLE_DEEPSLWKUP_RESET 0x00000000 + +__INLINE uint32_t ble_deepslwkup_get(void) +{ + return REG_BLE_RD(BLE_DEEPSLWKUP_ADDR); +} + +__INLINE void ble_deepslwkup_set(uint32_t value) +{ + REG_BLE_WR(BLE_DEEPSLWKUP_ADDR, value); +} + +// field definitions +#define BLE_DEEPSLTIME_MASK ((uint32_t)0xFFFFFFFF) +#define BLE_DEEPSLTIME_LSB 0 +#define BLE_DEEPSLTIME_WIDTH ((uint32_t)0x00000020) + +#define BLE_DEEPSLTIME_RST 0x0 + +__INLINE uint32_t ble_deepslwkup_deepsltime_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_DEEPSLWKUP_ADDR); + ASSERT_ERR((localVal & ~((uint32_t)0xFFFFFFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void ble_deepslwkup_deepsltime_setf(uint32_t deepsltime) +{ + ASSERT_ERR((((uint32_t)deepsltime << 0) & ~((uint32_t)0xFFFFFFFF)) == 0); + REG_BLE_WR(BLE_DEEPSLWKUP_ADDR, (uint32_t)deepsltime << 0); +} + +/** + * @brief DEEPSLSTAT register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31:00 DEEPSLDUR 0x0 + *+ */ +#define BLE_DEEPSLSTAT_ADDR BASEBAND_REG_BASE +0x38 //0x50800038 +#define BLE_DEEPSLSTAT_OFFSET 0x00000038 +#define BLE_DEEPSLSTAT_INDEX 0x0000000E +#define BLE_DEEPSLSTAT_RESET 0x00000000 + +__INLINE uint32_t ble_deepslstat_get(void) +{ + return REG_BLE_RD(BLE_DEEPSLSTAT_ADDR); +} + +// field definitions +#define BLE_DEEPSLDUR_MASK ((uint32_t)0xFFFFFFFF) +#define BLE_DEEPSLDUR_LSB 0 +#define BLE_DEEPSLDUR_WIDTH ((uint32_t)0x00000020) + +#define BLE_DEEPSLDUR_RST 0x0 + +__INLINE uint32_t ble_deepslstat_deepsldur_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_DEEPSLSTAT_ADDR); + ASSERT_ERR((localVal & ~((uint32_t)0xFFFFFFFF)) == 0); + return (localVal >> 0); +} + +/** + * @brief ENBPRESET register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31:21 TWEXT 0x0 + * 20:10 TWOSC 0x0 + * 09:00 TWRM 0x0 + *+ */ +#define BLE_ENBPRESET_ADDR BASEBAND_REG_BASE +0x3C //0x5080003C +#define BLE_ENBPRESET_OFFSET 0x0000003C +#define BLE_ENBPRESET_INDEX 0x0000000F +#define BLE_ENBPRESET_RESET 0x00000000 + +__INLINE uint32_t ble_enbpreset_get(void) +{ + return REG_BLE_RD(BLE_ENBPRESET_ADDR); +} + +__INLINE void ble_enbpreset_set(uint32_t value) +{ + REG_BLE_WR(BLE_ENBPRESET_ADDR, value); +} + +// field definitions +#define BLE_TWEXT_MASK ((uint32_t)0xFFE00000) +#define BLE_TWEXT_LSB 21 +#define BLE_TWEXT_WIDTH ((uint32_t)0x0000000B) +#define BLE_TWOSC_MASK ((uint32_t)0x001FFC00) +#define BLE_TWOSC_LSB 10 +#define BLE_TWOSC_WIDTH ((uint32_t)0x0000000B) +#define BLE_TWRM_MASK ((uint32_t)0x000003FF) +#define BLE_TWRM_LSB 0 +#define BLE_TWRM_WIDTH ((uint32_t)0x0000000A) + +#define BLE_TWEXT_RST 0x0 +#define BLE_TWOSC_RST 0x0 +#define BLE_TWRM_RST 0x0 + +__INLINE void ble_enbpreset_pack(uint16_t twext, uint16_t twosc, uint16_t twrm) +{ + ASSERT_ERR((((uint32_t)twext << 21) & ~((uint32_t)0xFFE00000)) == 0); + ASSERT_ERR((((uint32_t)twosc << 10) & ~((uint32_t)0x001FFC00)) == 0); + ASSERT_ERR((((uint32_t)twrm << 0) & ~((uint32_t)0x000003FF)) == 0); + REG_BLE_WR(BLE_ENBPRESET_ADDR, ((uint32_t)twext << 21) | ((uint32_t)twosc << 10) | ((uint32_t)twrm << 0)); +} + +__INLINE void ble_enbpreset_unpack(uint16_t* twext, uint16_t* twosc, uint16_t* twrm) +{ + uint32_t localVal = REG_BLE_RD(BLE_ENBPRESET_ADDR); + + *twext = (localVal & ((uint32_t)0xFFE00000)) >> 21; + *twosc = (localVal & ((uint32_t)0x001FFC00)) >> 10; + *twrm = (localVal & ((uint32_t)0x000003FF)) >> 0; +} + +__INLINE uint16_t ble_enbpreset_twext_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_ENBPRESET_ADDR); + return ((localVal & ((uint32_t)0xFFE00000)) >> 21); +} + +__INLINE void ble_enbpreset_twext_setf(uint16_t twext) +{ + ASSERT_ERR((((uint32_t)twext << 21) & ~((uint32_t)0xFFE00000)) == 0); + REG_BLE_WR(BLE_ENBPRESET_ADDR, (REG_BLE_RD(BLE_ENBPRESET_ADDR) & ~((uint32_t)0xFFE00000)) | ((uint32_t)twext << 21)); +} + +__INLINE uint16_t ble_enbpreset_twosc_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_ENBPRESET_ADDR); + return ((localVal & ((uint32_t)0x001FFC00)) >> 10); +} + +__INLINE void ble_enbpreset_twosc_setf(uint16_t twosc) +{ + ASSERT_ERR((((uint32_t)twosc << 10) & ~((uint32_t)0x001FFC00)) == 0); + REG_BLE_WR(BLE_ENBPRESET_ADDR, (REG_BLE_RD(BLE_ENBPRESET_ADDR) & ~((uint32_t)0x001FFC00)) | ((uint32_t)twosc << 10)); +} + +__INLINE uint16_t ble_enbpreset_twrm_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_ENBPRESET_ADDR); + return ((localVal & ((uint32_t)0x000003FF)) >> 0); +} + +__INLINE void ble_enbpreset_twrm_setf(uint16_t twrm) +{ + ASSERT_ERR((((uint32_t)twrm << 0) & ~((uint32_t)0x000003FF)) == 0); + REG_BLE_WR(BLE_ENBPRESET_ADDR, (REG_BLE_RD(BLE_ENBPRESET_ADDR) & ~((uint32_t)0x000003FF)) | ((uint32_t)twrm << 0)); +} + +/** + * @brief FINECNTCORR register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 09:00 FINECNTCORR 0x0 + *+ */ +#define BLE_FINECNTCORR_ADDR BASEBAND_REG_BASE +0x40 //0x50800040 +#define BLE_FINECNTCORR_OFFSET 0x00000040 +#define BLE_FINECNTCORR_INDEX 0x00000010 +#define BLE_FINECNTCORR_RESET 0x00000000 + +__INLINE uint32_t ble_finecntcorr_get(void) +{ + return REG_BLE_RD(BLE_FINECNTCORR_ADDR); +} + +__INLINE void ble_finecntcorr_set(uint32_t value) +{ + REG_BLE_WR(BLE_FINECNTCORR_ADDR, value); +} + +// field definitions +#define BLE_FINECNTCORR_MASK ((uint32_t)0x000003FF) +#define BLE_FINECNTCORR_LSB 0 +#define BLE_FINECNTCORR_WIDTH ((uint32_t)0x0000000A) + +#define BLE_FINECNTCORR_RST 0x0 + +__INLINE uint16_t ble_finecntcorr_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_FINECNTCORR_ADDR); + ASSERT_ERR((localVal & ~((uint32_t)0x000003FF)) == 0); + return (localVal >> 0); +} + +__INLINE void ble_finecntcorr_setf(uint16_t finecntcorr) +{ + ASSERT_ERR((((uint32_t)finecntcorr << 0) & ~((uint32_t)0x000003FF)) == 0); + REG_BLE_WR(BLE_FINECNTCORR_ADDR, (uint32_t)finecntcorr << 0); +} + +/** + * @brief CLKNCNTCORR register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31 ABS_DELTA 0 + * 27:00 CLKNCNTCORR 0x0 + *+ */ +#define BLE_CLKNCNTCORR_ADDR BASEBAND_REG_BASE +0x44 // 0x50800044 +#define BLE_CLKNCNTCORR_OFFSET 0x00000044 +#define BLE_CLKNCNTCORR_INDEX 0x00000011 +#define BLE_CLKNCNTCORR_RESET 0x00000000 + +__INLINE uint32_t ble_clkncntcorr_get(void) +{ + return REG_BLE_RD(BLE_CLKNCNTCORR_ADDR); +} + +__INLINE void ble_clkncntcorr_set(uint32_t value) +{ + REG_BLE_WR(BLE_CLKNCNTCORR_ADDR, value); +} + +// field definitions +#define BLE_ABS_DELTA_BIT ((uint32_t)0x80000000) +#define BLE_ABS_DELTA_POS 31 +#define BLE_CLKNCNTCORR_MASK ((uint32_t)0x0FFFFFFF) +#define BLE_CLKNCNTCORR_LSB 0 +#define BLE_CLKNCNTCORR_WIDTH ((uint32_t)0x0000001C) + +#define BLE_ABS_DELTA_RST 0x0 +#define BLE_CLKNCNTCORR_RST 0x0 + +__INLINE void ble_clkncntcorr_pack(uint8_t absdelta, uint32_t clkncntcorr) +{ + ASSERT_ERR((((uint32_t)absdelta << 31) & ~((uint32_t)0x80000000)) == 0); + ASSERT_ERR((((uint32_t)clkncntcorr << 0) & ~((uint32_t)0x0FFFFFFF)) == 0); + REG_BLE_WR(BLE_CLKNCNTCORR_ADDR, ((uint32_t)absdelta << 31) | ((uint32_t)clkncntcorr << 0)); +} + +__INLINE void ble_clkncntcorr_unpack(uint8_t* absdelta, uint32_t* clkncntcorr) +{ + uint32_t localVal = REG_BLE_RD(BLE_CLKNCNTCORR_ADDR); + + *absdelta = (localVal & ((uint32_t)0x80000000)) >> 31; + *clkncntcorr = (localVal & ((uint32_t)0x0FFFFFFF)) >> 0; +} + +__INLINE uint8_t ble_clkncntcorr_abs_delta_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_CLKNCNTCORR_ADDR); + return ((localVal & ((uint32_t)0x80000000)) >> 31); +} + +__INLINE void ble_clkncntcorr_abs_delta_setf(uint8_t absdelta) +{ + ASSERT_ERR((((uint32_t)absdelta << 31) & ~((uint32_t)0x80000000)) == 0); + REG_BLE_WR(BLE_CLKNCNTCORR_ADDR, (REG_BLE_RD(BLE_CLKNCNTCORR_ADDR) & ~((uint32_t)0x80000000)) | ((uint32_t)absdelta << 31)); +} + +__INLINE uint32_t ble_clkncntcorr_clkncntcorr_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_CLKNCNTCORR_ADDR); + return ((localVal & ((uint32_t)0x0FFFFFFF)) >> 0); +} + +__INLINE void ble_clkncntcorr_clkncntcorr_setf(uint32_t clkncntcorr) +{ + ASSERT_ERR((((uint32_t)clkncntcorr << 0) & ~((uint32_t)0x0FFFFFFF)) == 0); + REG_BLE_WR(BLE_CLKNCNTCORR_ADDR, (REG_BLE_RD(BLE_CLKNCNTCORR_ADDR) & ~((uint32_t)0x0FFFFFFF)) | ((uint32_t)clkncntcorr << 0)); +} + +/** + * @brief DIAGCNTL register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31 DIAG3_EN 0 + * 30:24 DIAG3 0x0 + * 23 DIAG2_EN 0 + * 22:16 DIAG2 0x0 + * 15 DIAG1_EN 0 + * 14:08 DIAG1 0x0 + * 07 DIAG0_EN 0 + * 06:00 DIAG0 0x0 + *+ */ +#define BLE_DIAGCNTL_ADDR BASEBAND_REG_BASE +0x50 //0x50800050 +#define BLE_DIAGCNTL_OFFSET 0x00000050 +#define BLE_DIAGCNTL_INDEX 0x00000014 +#define BLE_DIAGCNTL_RESET 0x00000000 + +__INLINE uint32_t ble_diagcntl_get(void) +{ + return REG_BLE_RD(BLE_DIAGCNTL_ADDR); +} + +__INLINE void ble_diagcntl_set(uint32_t value) +{ + REG_BLE_WR(BLE_DIAGCNTL_ADDR, value); +} + +// field definitions +#define BLE_DIAG3_EN_BIT ((uint32_t)0x80000000) +#define BLE_DIAG3_EN_POS 31 +#define BLE_DIAG3_MASK ((uint32_t)0x7F000000) +#define BLE_DIAG3_LSB 24 +#define BLE_DIAG3_WIDTH ((uint32_t)0x00000007) +#define BLE_DIAG2_EN_BIT ((uint32_t)0x00800000) +#define BLE_DIAG2_EN_POS 23 +#define BLE_DIAG2_MASK ((uint32_t)0x007F0000) +#define BLE_DIAG2_LSB 16 +#define BLE_DIAG2_WIDTH ((uint32_t)0x00000007) +#define BLE_DIAG1_EN_BIT ((uint32_t)0x00008000) +#define BLE_DIAG1_EN_POS 15 +#define BLE_DIAG1_MASK ((uint32_t)0x00007F00) +#define BLE_DIAG1_LSB 8 +#define BLE_DIAG1_WIDTH ((uint32_t)0x00000007) +#define BLE_DIAG0_EN_BIT ((uint32_t)0x00000080) +#define BLE_DIAG0_EN_POS 7 +#define BLE_DIAG0_MASK ((uint32_t)0x0000007F) +#define BLE_DIAG0_LSB 0 +#define BLE_DIAG0_WIDTH ((uint32_t)0x00000007) + +#define BLE_DIAG3_EN_RST 0x0 +#define BLE_DIAG3_RST 0x0 +#define BLE_DIAG2_EN_RST 0x0 +#define BLE_DIAG2_RST 0x0 +#define BLE_DIAG1_EN_RST 0x0 +#define BLE_DIAG1_RST 0x0 +#define BLE_DIAG0_EN_RST 0x0 +#define BLE_DIAG0_RST 0x0 + +__INLINE void ble_diagcntl_pack(uint8_t diag3en, uint8_t diag3, uint8_t diag2en, uint8_t diag2, uint8_t diag1en, uint8_t diag1, uint8_t diag0en, uint8_t diag0) +{ + ASSERT_ERR((((uint32_t)diag3en << 31) & ~((uint32_t)0x80000000)) == 0); + ASSERT_ERR((((uint32_t)diag3 << 24) & ~((uint32_t)0x7F000000)) == 0); + ASSERT_ERR((((uint32_t)diag2en << 23) & ~((uint32_t)0x00800000)) == 0); + ASSERT_ERR((((uint32_t)diag2 << 16) & ~((uint32_t)0x007F0000)) == 0); + ASSERT_ERR((((uint32_t)diag1en << 15) & ~((uint32_t)0x00008000)) == 0); + ASSERT_ERR((((uint32_t)diag1 << 8) & ~((uint32_t)0x00007F00)) == 0); + ASSERT_ERR((((uint32_t)diag0en << 7) & ~((uint32_t)0x00000080)) == 0); + ASSERT_ERR((((uint32_t)diag0 << 0) & ~((uint32_t)0x0000007F)) == 0); + REG_BLE_WR(BLE_DIAGCNTL_ADDR, ((uint32_t)diag3en << 31) | ((uint32_t)diag3 << 24) | ((uint32_t)diag2en << 23) | ((uint32_t)diag2 << 16) | ((uint32_t)diag1en << 15) | ((uint32_t)diag1 << 8) | ((uint32_t)diag0en << 7) | ((uint32_t)diag0 << 0)); +} + +__INLINE void ble_diagcntl_unpack(uint8_t* diag3en, uint8_t* diag3, uint8_t* diag2en, uint8_t* diag2, uint8_t* diag1en, uint8_t* diag1, uint8_t* diag0en, uint8_t* diag0) +{ + uint32_t localVal = REG_BLE_RD(BLE_DIAGCNTL_ADDR); + + *diag3en = (localVal & ((uint32_t)0x80000000)) >> 31; + *diag3 = (localVal & ((uint32_t)0x7F000000)) >> 24; + *diag2en = (localVal & ((uint32_t)0x00800000)) >> 23; + *diag2 = (localVal & ((uint32_t)0x007F0000)) >> 16; + *diag1en = (localVal & ((uint32_t)0x00008000)) >> 15; + *diag1 = (localVal & ((uint32_t)0x00007F00)) >> 8; + *diag0en = (localVal & ((uint32_t)0x00000080)) >> 7; + *diag0 = (localVal & ((uint32_t)0x0000007F)) >> 0; +} + +__INLINE uint8_t ble_diagcntl_diag3_en_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_DIAGCNTL_ADDR); + return ((localVal & ((uint32_t)0x80000000)) >> 31); +} + +__INLINE void ble_diagcntl_diag3_en_setf(uint8_t diag3en) +{ + ASSERT_ERR((((uint32_t)diag3en << 31) & ~((uint32_t)0x80000000)) == 0); + REG_BLE_WR(BLE_DIAGCNTL_ADDR, (REG_BLE_RD(BLE_DIAGCNTL_ADDR) & ~((uint32_t)0x80000000)) | ((uint32_t)diag3en << 31)); +} + +__INLINE uint8_t ble_diagcntl_diag3_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_DIAGCNTL_ADDR); + return ((localVal & ((uint32_t)0x7F000000)) >> 24); +} + +__INLINE void ble_diagcntl_diag3_setf(uint8_t diag3) +{ + ASSERT_ERR((((uint32_t)diag3 << 24) & ~((uint32_t)0x7F000000)) == 0); + REG_BLE_WR(BLE_DIAGCNTL_ADDR, (REG_BLE_RD(BLE_DIAGCNTL_ADDR) & ~((uint32_t)0x7F000000)) | ((uint32_t)diag3 << 24)); +} + +__INLINE uint8_t ble_diagcntl_diag2_en_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_DIAGCNTL_ADDR); + return ((localVal & ((uint32_t)0x00800000)) >> 23); +} + +__INLINE void ble_diagcntl_diag2_en_setf(uint8_t diag2en) +{ + ASSERT_ERR((((uint32_t)diag2en << 23) & ~((uint32_t)0x00800000)) == 0); + REG_BLE_WR(BLE_DIAGCNTL_ADDR, (REG_BLE_RD(BLE_DIAGCNTL_ADDR) & ~((uint32_t)0x00800000)) | ((uint32_t)diag2en << 23)); +} + +__INLINE uint8_t ble_diagcntl_diag2_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_DIAGCNTL_ADDR); + return ((localVal & ((uint32_t)0x007F0000)) >> 16); +} + +__INLINE void ble_diagcntl_diag2_setf(uint8_t diag2) +{ + ASSERT_ERR((((uint32_t)diag2 << 16) & ~((uint32_t)0x007F0000)) == 0); + REG_BLE_WR(BLE_DIAGCNTL_ADDR, (REG_BLE_RD(BLE_DIAGCNTL_ADDR) & ~((uint32_t)0x007F0000)) | ((uint32_t)diag2 << 16)); +} + +__INLINE uint8_t ble_diagcntl_diag1_en_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_DIAGCNTL_ADDR); + return ((localVal & ((uint32_t)0x00008000)) >> 15); +} + +__INLINE void ble_diagcntl_diag1_en_setf(uint8_t diag1en) +{ + ASSERT_ERR((((uint32_t)diag1en << 15) & ~((uint32_t)0x00008000)) == 0); + REG_BLE_WR(BLE_DIAGCNTL_ADDR, (REG_BLE_RD(BLE_DIAGCNTL_ADDR) & ~((uint32_t)0x00008000)) | ((uint32_t)diag1en << 15)); +} + +__INLINE uint8_t ble_diagcntl_diag1_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_DIAGCNTL_ADDR); + return ((localVal & ((uint32_t)0x00007F00)) >> 8); +} + +__INLINE void ble_diagcntl_diag1_setf(uint8_t diag1) +{ + ASSERT_ERR((((uint32_t)diag1 << 8) & ~((uint32_t)0x00007F00)) == 0); + REG_BLE_WR(BLE_DIAGCNTL_ADDR, (REG_BLE_RD(BLE_DIAGCNTL_ADDR) & ~((uint32_t)0x00007F00)) | ((uint32_t)diag1 << 8)); +} + +__INLINE uint8_t ble_diagcntl_diag0_en_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_DIAGCNTL_ADDR); + return ((localVal & ((uint32_t)0x00000080)) >> 7); +} + +__INLINE void ble_diagcntl_diag0_en_setf(uint8_t diag0en) +{ + ASSERT_ERR((((uint32_t)diag0en << 7) & ~((uint32_t)0x00000080)) == 0); + REG_BLE_WR(BLE_DIAGCNTL_ADDR, (REG_BLE_RD(BLE_DIAGCNTL_ADDR) & ~((uint32_t)0x00000080)) | ((uint32_t)diag0en << 7)); +} + +__INLINE uint8_t ble_diagcntl_diag0_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_DIAGCNTL_ADDR); + return ((localVal & ((uint32_t)0x0000007F)) >> 0); +} + +__INLINE void ble_diagcntl_diag0_setf(uint8_t diag0) +{ + ASSERT_ERR((((uint32_t)diag0 << 0) & ~((uint32_t)0x0000007F)) == 0); + REG_BLE_WR(BLE_DIAGCNTL_ADDR, (REG_BLE_RD(BLE_DIAGCNTL_ADDR) & ~((uint32_t)0x0000007F)) | ((uint32_t)diag0 << 0)); +} + +/** + * @brief DIAGSTAT register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31:24 DIAG3STAT 0x0 + * 23:16 DIAG2STAT 0x0 + * 15:08 DIAG1STAT 0x0 + * 07:00 DIAG0STAT 0x0 + *+ */ +#define BLE_DIAGSTAT_ADDR BASEBAND_REG_BASE +0x54 //0x50800054 +#define BLE_DIAGSTAT_OFFSET 0x00000054 +#define BLE_DIAGSTAT_INDEX 0x00000015 +#define BLE_DIAGSTAT_RESET 0x00000000 + +__INLINE uint32_t ble_diagstat_get(void) +{ + return REG_BLE_RD(BLE_DIAGSTAT_ADDR); +} + +// field definitions +#define BLE_DIAG3STAT_MASK ((uint32_t)0xFF000000) +#define BLE_DIAG3STAT_LSB 24 +#define BLE_DIAG3STAT_WIDTH ((uint32_t)0x00000008) +#define BLE_DIAG2STAT_MASK ((uint32_t)0x00FF0000) +#define BLE_DIAG2STAT_LSB 16 +#define BLE_DIAG2STAT_WIDTH ((uint32_t)0x00000008) +#define BLE_DIAG1STAT_MASK ((uint32_t)0x0000FF00) +#define BLE_DIAG1STAT_LSB 8 +#define BLE_DIAG1STAT_WIDTH ((uint32_t)0x00000008) +#define BLE_DIAG0STAT_MASK ((uint32_t)0x000000FF) +#define BLE_DIAG0STAT_LSB 0 +#define BLE_DIAG0STAT_WIDTH ((uint32_t)0x00000008) + +#define BLE_DIAG3STAT_RST 0x0 +#define BLE_DIAG2STAT_RST 0x0 +#define BLE_DIAG1STAT_RST 0x0 +#define BLE_DIAG0STAT_RST 0x0 + +__INLINE void ble_diagstat_unpack(uint8_t* diag3stat, uint8_t* diag2stat, uint8_t* diag1stat, uint8_t* diag0stat) +{ + uint32_t localVal = REG_BLE_RD(BLE_DIAGSTAT_ADDR); + + *diag3stat = (localVal & ((uint32_t)0xFF000000)) >> 24; + *diag2stat = (localVal & ((uint32_t)0x00FF0000)) >> 16; + *diag1stat = (localVal & ((uint32_t)0x0000FF00)) >> 8; + *diag0stat = (localVal & ((uint32_t)0x000000FF)) >> 0; +} + +__INLINE uint8_t ble_diagstat_diag3stat_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_DIAGSTAT_ADDR); + return ((localVal & ((uint32_t)0xFF000000)) >> 24); +} + +__INLINE uint8_t ble_diagstat_diag2stat_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_DIAGSTAT_ADDR); + return ((localVal & ((uint32_t)0x00FF0000)) >> 16); +} + +__INLINE uint8_t ble_diagstat_diag1stat_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_DIAGSTAT_ADDR); + return ((localVal & ((uint32_t)0x0000FF00)) >> 8); +} + +__INLINE uint8_t ble_diagstat_diag0stat_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_DIAGSTAT_ADDR); + return ((localVal & ((uint32_t)0x000000FF)) >> 0); +} + +/** + * @brief DEBUGADDMAX register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31:16 REG_ADDMAX 0x0 + * 15:00 EM_ADDMAX 0x0 + *+ */ +#define BLE_DEBUGADDMAX_ADDR BASEBAND_REG_BASE +0x58 //0x50800058 +#define BLE_DEBUGADDMAX_OFFSET 0x00000058 +#define BLE_DEBUGADDMAX_INDEX 0x00000016 +#define BLE_DEBUGADDMAX_RESET 0x00000000 + +__INLINE uint32_t ble_debugaddmax_get(void) +{ + return REG_BLE_RD(BLE_DEBUGADDMAX_ADDR); +} + +__INLINE void ble_debugaddmax_set(uint32_t value) +{ + REG_BLE_WR(BLE_DEBUGADDMAX_ADDR, value); +} + +// field definitions +#define BLE_REG_ADDMAX_MASK ((uint32_t)0xFFFF0000) +#define BLE_REG_ADDMAX_LSB 16 +#define BLE_REG_ADDMAX_WIDTH ((uint32_t)0x00000010) +#define BLE_EM_ADDMAX_MASK ((uint32_t)0x0000FFFF) +#define BLE_EM_ADDMAX_LSB 0 +#define BLE_EM_ADDMAX_WIDTH ((uint32_t)0x00000010) + +#define BLE_REG_ADDMAX_RST 0x0 +#define BLE_EM_ADDMAX_RST 0x0 + +__INLINE void ble_debugaddmax_pack(uint16_t regaddmax, uint16_t emaddmax) +{ + ASSERT_ERR((((uint32_t)regaddmax << 16) & ~((uint32_t)0xFFFF0000)) == 0); + ASSERT_ERR((((uint32_t)emaddmax << 0) & ~((uint32_t)0x0000FFFF)) == 0); + REG_BLE_WR(BLE_DEBUGADDMAX_ADDR, ((uint32_t)regaddmax << 16) | ((uint32_t)emaddmax << 0)); +} + +__INLINE void ble_debugaddmax_unpack(uint16_t* regaddmax, uint16_t* emaddmax) +{ + uint32_t localVal = REG_BLE_RD(BLE_DEBUGADDMAX_ADDR); + + *regaddmax = (localVal & ((uint32_t)0xFFFF0000)) >> 16; + *emaddmax = (localVal & ((uint32_t)0x0000FFFF)) >> 0; +} + +__INLINE uint16_t ble_debugaddmax_reg_addmax_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_DEBUGADDMAX_ADDR); + return ((localVal & ((uint32_t)0xFFFF0000)) >> 16); +} + +__INLINE void ble_debugaddmax_reg_addmax_setf(uint16_t regaddmax) +{ + ASSERT_ERR((((uint32_t)regaddmax << 16) & ~((uint32_t)0xFFFF0000)) == 0); + REG_BLE_WR(BLE_DEBUGADDMAX_ADDR, (REG_BLE_RD(BLE_DEBUGADDMAX_ADDR) & ~((uint32_t)0xFFFF0000)) | ((uint32_t)regaddmax << 16)); +} + +__INLINE uint16_t ble_debugaddmax_em_addmax_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_DEBUGADDMAX_ADDR); + return ((localVal & ((uint32_t)0x0000FFFF)) >> 0); +} + +__INLINE void ble_debugaddmax_em_addmax_setf(uint16_t emaddmax) +{ + ASSERT_ERR((((uint32_t)emaddmax << 0) & ~((uint32_t)0x0000FFFF)) == 0); + REG_BLE_WR(BLE_DEBUGADDMAX_ADDR, (REG_BLE_RD(BLE_DEBUGADDMAX_ADDR) & ~((uint32_t)0x0000FFFF)) | ((uint32_t)emaddmax << 0)); +} + +/** + * @brief DEBUGADDMIN register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31:16 REG_ADDMIN 0x0 + * 15:00 EM_ADDMIN 0x0 + *+ */ +#define BLE_DEBUGADDMIN_ADDR BASEBAND_REG_BASE +0x5C //0x5080005C +#define BLE_DEBUGADDMIN_OFFSET 0x0000005C +#define BLE_DEBUGADDMIN_INDEX 0x00000017 +#define BLE_DEBUGADDMIN_RESET 0x00000000 + +__INLINE uint32_t ble_debugaddmin_get(void) +{ + return REG_BLE_RD(BLE_DEBUGADDMIN_ADDR); +} + +__INLINE void ble_debugaddmin_set(uint32_t value) +{ + REG_BLE_WR(BLE_DEBUGADDMIN_ADDR, value); +} + +// field definitions +#define BLE_REG_ADDMIN_MASK ((uint32_t)0xFFFF0000) +#define BLE_REG_ADDMIN_LSB 16 +#define BLE_REG_ADDMIN_WIDTH ((uint32_t)0x00000010) +#define BLE_EM_ADDMIN_MASK ((uint32_t)0x0000FFFF) +#define BLE_EM_ADDMIN_LSB 0 +#define BLE_EM_ADDMIN_WIDTH ((uint32_t)0x00000010) + +#define BLE_REG_ADDMIN_RST 0x0 +#define BLE_EM_ADDMIN_RST 0x0 + +__INLINE void ble_debugaddmin_pack(uint16_t regaddmin, uint16_t emaddmin) +{ + ASSERT_ERR((((uint32_t)regaddmin << 16) & ~((uint32_t)0xFFFF0000)) == 0); + ASSERT_ERR((((uint32_t)emaddmin << 0) & ~((uint32_t)0x0000FFFF)) == 0); + REG_BLE_WR(BLE_DEBUGADDMIN_ADDR, ((uint32_t)regaddmin << 16) | ((uint32_t)emaddmin << 0)); +} + +__INLINE void ble_debugaddmin_unpack(uint16_t* regaddmin, uint16_t* emaddmin) +{ + uint32_t localVal = REG_BLE_RD(BLE_DEBUGADDMIN_ADDR); + + *regaddmin = (localVal & ((uint32_t)0xFFFF0000)) >> 16; + *emaddmin = (localVal & ((uint32_t)0x0000FFFF)) >> 0; +} + +__INLINE uint16_t ble_debugaddmin_reg_addmin_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_DEBUGADDMIN_ADDR); + return ((localVal & ((uint32_t)0xFFFF0000)) >> 16); +} + +__INLINE void ble_debugaddmin_reg_addmin_setf(uint16_t regaddmin) +{ + ASSERT_ERR((((uint32_t)regaddmin << 16) & ~((uint32_t)0xFFFF0000)) == 0); + REG_BLE_WR(BLE_DEBUGADDMIN_ADDR, (REG_BLE_RD(BLE_DEBUGADDMIN_ADDR) & ~((uint32_t)0xFFFF0000)) | ((uint32_t)regaddmin << 16)); +} + +__INLINE uint16_t ble_debugaddmin_em_addmin_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_DEBUGADDMIN_ADDR); + return ((localVal & ((uint32_t)0x0000FFFF)) >> 0); +} + +__INLINE void ble_debugaddmin_em_addmin_setf(uint16_t emaddmin) +{ + ASSERT_ERR((((uint32_t)emaddmin << 0) & ~((uint32_t)0x0000FFFF)) == 0); + REG_BLE_WR(BLE_DEBUGADDMIN_ADDR, (REG_BLE_RD(BLE_DEBUGADDMIN_ADDR) & ~((uint32_t)0x0000FFFF)) | ((uint32_t)emaddmin << 0)); +} + +/** + * @brief ERRORTYPESTAT register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 22 DFCNTL_EMACC_ERROR 0 + * 21 FIFOINTOVF 0 + * 20 PHY_ERROR 0 + * 19 TXAEHEADER_PTR_ERROR 0 + * 18 TMAFS_UNDERRUN 0 + * 17 RAL_UNDERRUN 0 + * 16 RAL_ERROR 0 + * 15 RXDATA_PTR_ERROR 0 + * 14 TXDATA_PTR_ERROR 0 + * 13 RXDESC_EMPTY_ERROR 0 + * 12 TXDESC_EMPTY_ERROR 0 + * 11 CSFORMAT_ERROR 0 + * 10 LLCHMAP_ERROR 0 + * 09 ADV_UNDERRUN 0 + * 08 IFS_UNDERRUN 0 + * 07 LIST_ERROR 0 + * 06 EVT_CNTL_APFM_ERROR 0 + * 05 ACT_SCHDL_APFM_ERROR 0 + * 04 ACT_SCHDL_ENTRY_ERROR 0 + * 03 RADIO_EMACC_ERROR 0 + * 02 PKTCNTL_EMACC_ERROR 0 + * 01 RXCRYPT_ERROR 0 + * 00 TXCRYPT_ERROR 0 + *+ */ +#define BLE_ERRORTYPESTAT_ADDR BASEBAND_REG_BASE +0x60 //0x50800060 +#define BLE_ERRORTYPESTAT_OFFSET 0x00000060 +#define BLE_ERRORTYPESTAT_INDEX 0x00000018 +#define BLE_ERRORTYPESTAT_RESET 0x00000000 + +__INLINE uint32_t ble_errortypestat_get(void) +{ + return REG_BLE_RD(BLE_ERRORTYPESTAT_ADDR); +} + +// field definitions +#define BLE_DFCNTL_EMACC_ERROR_BIT ((uint32_t)0x00400000) +#define BLE_DFCNTL_EMACC_ERROR_POS 22 +#define BLE_FIFOINTOVF_BIT ((uint32_t)0x00200000) +#define BLE_FIFOINTOVF_POS 21 +#define BLE_PHY_ERROR_BIT ((uint32_t)0x00100000) +#define BLE_PHY_ERROR_POS 20 +#define BLE_TXAEHEADER_PTR_ERROR_BIT ((uint32_t)0x00080000) +#define BLE_TXAEHEADER_PTR_ERROR_POS 19 +#define BLE_TMAFS_UNDERRUN_BIT ((uint32_t)0x00040000) +#define BLE_TMAFS_UNDERRUN_POS 18 +#define BLE_RAL_UNDERRUN_BIT ((uint32_t)0x00020000) +#define BLE_RAL_UNDERRUN_POS 17 +#define BLE_RAL_ERROR_BIT ((uint32_t)0x00010000) +#define BLE_RAL_ERROR_POS 16 +#define BLE_RXDATA_PTR_ERROR_BIT ((uint32_t)0x00008000) +#define BLE_RXDATA_PTR_ERROR_POS 15 +#define BLE_TXDATA_PTR_ERROR_BIT ((uint32_t)0x00004000) +#define BLE_TXDATA_PTR_ERROR_POS 14 +#define BLE_RXDESC_EMPTY_ERROR_BIT ((uint32_t)0x00002000) +#define BLE_RXDESC_EMPTY_ERROR_POS 13 +#define BLE_TXDESC_EMPTY_ERROR_BIT ((uint32_t)0x00001000) +#define BLE_TXDESC_EMPTY_ERROR_POS 12 +#define BLE_CSFORMAT_ERROR_BIT ((uint32_t)0x00000800) +#define BLE_CSFORMAT_ERROR_POS 11 +#define BLE_LLCHMAP_ERROR_BIT ((uint32_t)0x00000400) +#define BLE_LLCHMAP_ERROR_POS 10 +#define BLE_ADV_UNDERRUN_BIT ((uint32_t)0x00000200) +#define BLE_ADV_UNDERRUN_POS 9 +#define BLE_IFS_UNDERRUN_BIT ((uint32_t)0x00000100) +#define BLE_IFS_UNDERRUN_POS 8 +#define BLE_LIST_ERROR_BIT ((uint32_t)0x00000080) +#define BLE_LIST_ERROR_POS 7 +#define BLE_EVT_CNTL_APFM_ERROR_BIT ((uint32_t)0x00000040) +#define BLE_EVT_CNTL_APFM_ERROR_POS 6 +#define BLE_ACT_SCHDL_APFM_ERROR_BIT ((uint32_t)0x00000020) +#define BLE_ACT_SCHDL_APFM_ERROR_POS 5 +#define BLE_ACT_SCHDL_ENTRY_ERROR_BIT ((uint32_t)0x00000010) +#define BLE_ACT_SCHDL_ENTRY_ERROR_POS 4 +#define BLE_RADIO_EMACC_ERROR_BIT ((uint32_t)0x00000008) +#define BLE_RADIO_EMACC_ERROR_POS 3 +#define BLE_PKTCNTL_EMACC_ERROR_BIT ((uint32_t)0x00000004) +#define BLE_PKTCNTL_EMACC_ERROR_POS 2 +#define BLE_RXCRYPT_ERROR_BIT ((uint32_t)0x00000002) +#define BLE_RXCRYPT_ERROR_POS 1 +#define BLE_TXCRYPT_ERROR_BIT ((uint32_t)0x00000001) +#define BLE_TXCRYPT_ERROR_POS 0 + +#define BLE_DFCNTL_EMACC_ERROR_RST 0x0 +#define BLE_FIFOINTOVF_RST 0x0 +#define BLE_PHY_ERROR_RST 0x0 +#define BLE_TXAEHEADER_PTR_ERROR_RST 0x0 +#define BLE_TMAFS_UNDERRUN_RST 0x0 +#define BLE_RAL_UNDERRUN_RST 0x0 +#define BLE_RAL_ERROR_RST 0x0 +#define BLE_RXDATA_PTR_ERROR_RST 0x0 +#define BLE_TXDATA_PTR_ERROR_RST 0x0 +#define BLE_RXDESC_EMPTY_ERROR_RST 0x0 +#define BLE_TXDESC_EMPTY_ERROR_RST 0x0 +#define BLE_CSFORMAT_ERROR_RST 0x0 +#define BLE_LLCHMAP_ERROR_RST 0x0 +#define BLE_ADV_UNDERRUN_RST 0x0 +#define BLE_IFS_UNDERRUN_RST 0x0 +#define BLE_LIST_ERROR_RST 0x0 +#define BLE_EVT_CNTL_APFM_ERROR_RST 0x0 +#define BLE_ACT_SCHDL_APFM_ERROR_RST 0x0 +#define BLE_ACT_SCHDL_ENTRY_ERROR_RST 0x0 +#define BLE_RADIO_EMACC_ERROR_RST 0x0 +#define BLE_PKTCNTL_EMACC_ERROR_RST 0x0 +#define BLE_RXCRYPT_ERROR_RST 0x0 +#define BLE_TXCRYPT_ERROR_RST 0x0 + +__INLINE void ble_errortypestat_unpack(uint8_t* dfcntlemaccerror, uint8_t* fifointovf, uint8_t* phyerror, uint8_t* txaeheaderptrerror, uint8_t* tmafsunderrun, uint8_t* ralunderrun, uint8_t* ralerror, uint8_t* rxdataptrerror, uint8_t* txdataptrerror, uint8_t* rxdescemptyerror, uint8_t* txdescemptyerror, uint8_t* csformaterror, uint8_t* llchmaperror, uint8_t* advunderrun, uint8_t* ifsunderrun, uint8_t* listerror, uint8_t* evtcntlapfmerror, uint8_t* actschdlapfmerror, uint8_t* actschdlentryerror, uint8_t* radioemaccerror, uint8_t* pktcntlemaccerror, uint8_t* rxcrypterror, uint8_t* txcrypterror) +{ + uint32_t localVal = REG_BLE_RD(BLE_ERRORTYPESTAT_ADDR); + + *dfcntlemaccerror = (localVal & ((uint32_t)0x00400000)) >> 22; + *fifointovf = (localVal & ((uint32_t)0x00200000)) >> 21; + *phyerror = (localVal & ((uint32_t)0x00100000)) >> 20; + *txaeheaderptrerror = (localVal & ((uint32_t)0x00080000)) >> 19; + *tmafsunderrun = (localVal & ((uint32_t)0x00040000)) >> 18; + *ralunderrun = (localVal & ((uint32_t)0x00020000)) >> 17; + *ralerror = (localVal & ((uint32_t)0x00010000)) >> 16; + *rxdataptrerror = (localVal & ((uint32_t)0x00008000)) >> 15; + *txdataptrerror = (localVal & ((uint32_t)0x00004000)) >> 14; + *rxdescemptyerror = (localVal & ((uint32_t)0x00002000)) >> 13; + *txdescemptyerror = (localVal & ((uint32_t)0x00001000)) >> 12; + *csformaterror = (localVal & ((uint32_t)0x00000800)) >> 11; + *llchmaperror = (localVal & ((uint32_t)0x00000400)) >> 10; + *advunderrun = (localVal & ((uint32_t)0x00000200)) >> 9; + *ifsunderrun = (localVal & ((uint32_t)0x00000100)) >> 8; + *listerror = (localVal & ((uint32_t)0x00000080)) >> 7; + *evtcntlapfmerror = (localVal & ((uint32_t)0x00000040)) >> 6; + *actschdlapfmerror = (localVal & ((uint32_t)0x00000020)) >> 5; + *actschdlentryerror = (localVal & ((uint32_t)0x00000010)) >> 4; + *radioemaccerror = (localVal & ((uint32_t)0x00000008)) >> 3; + *pktcntlemaccerror = (localVal & ((uint32_t)0x00000004)) >> 2; + *rxcrypterror = (localVal & ((uint32_t)0x00000002)) >> 1; + *txcrypterror = (localVal & ((uint32_t)0x00000001)) >> 0; +} + +__INLINE uint8_t ble_errortypestat_dfcntl_emacc_error_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_ERRORTYPESTAT_ADDR); + return ((localVal & ((uint32_t)0x00400000)) >> 22); +} + +__INLINE uint8_t ble_errortypestat_fifointovf_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_ERRORTYPESTAT_ADDR); + return ((localVal & ((uint32_t)0x00200000)) >> 21); +} + +__INLINE uint8_t ble_errortypestat_phy_error_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_ERRORTYPESTAT_ADDR); + return ((localVal & ((uint32_t)0x00100000)) >> 20); +} + +__INLINE uint8_t ble_errortypestat_txaeheader_ptr_error_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_ERRORTYPESTAT_ADDR); + return ((localVal & ((uint32_t)0x00080000)) >> 19); +} + +__INLINE uint8_t ble_errortypestat_tmafs_underrun_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_ERRORTYPESTAT_ADDR); + return ((localVal & ((uint32_t)0x00040000)) >> 18); +} + +__INLINE uint8_t ble_errortypestat_ral_underrun_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_ERRORTYPESTAT_ADDR); + return ((localVal & ((uint32_t)0x00020000)) >> 17); +} + +__INLINE uint8_t ble_errortypestat_ral_error_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_ERRORTYPESTAT_ADDR); + return ((localVal & ((uint32_t)0x00010000)) >> 16); +} + +__INLINE uint8_t ble_errortypestat_rxdata_ptr_error_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_ERRORTYPESTAT_ADDR); + return ((localVal & ((uint32_t)0x00008000)) >> 15); +} + +__INLINE uint8_t ble_errortypestat_txdata_ptr_error_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_ERRORTYPESTAT_ADDR); + return ((localVal & ((uint32_t)0x00004000)) >> 14); +} + +__INLINE uint8_t ble_errortypestat_rxdesc_empty_error_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_ERRORTYPESTAT_ADDR); + return ((localVal & ((uint32_t)0x00002000)) >> 13); +} + +__INLINE uint8_t ble_errortypestat_txdesc_empty_error_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_ERRORTYPESTAT_ADDR); + return ((localVal & ((uint32_t)0x00001000)) >> 12); +} + +__INLINE uint8_t ble_errortypestat_csformat_error_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_ERRORTYPESTAT_ADDR); + return ((localVal & ((uint32_t)0x00000800)) >> 11); +} + +__INLINE uint8_t ble_errortypestat_llchmap_error_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_ERRORTYPESTAT_ADDR); + return ((localVal & ((uint32_t)0x00000400)) >> 10); +} + +__INLINE uint8_t ble_errortypestat_adv_underrun_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_ERRORTYPESTAT_ADDR); + return ((localVal & ((uint32_t)0x00000200)) >> 9); +} + +__INLINE uint8_t ble_errortypestat_ifs_underrun_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_ERRORTYPESTAT_ADDR); + return ((localVal & ((uint32_t)0x00000100)) >> 8); +} + +__INLINE uint8_t ble_errortypestat_list_error_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_ERRORTYPESTAT_ADDR); + return ((localVal & ((uint32_t)0x00000080)) >> 7); +} + +__INLINE uint8_t ble_errortypestat_evt_cntl_apfm_error_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_ERRORTYPESTAT_ADDR); + return ((localVal & ((uint32_t)0x00000040)) >> 6); +} + +__INLINE uint8_t ble_errortypestat_act_schdl_apfm_error_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_ERRORTYPESTAT_ADDR); + return ((localVal & ((uint32_t)0x00000020)) >> 5); +} + +__INLINE uint8_t ble_errortypestat_act_schdl_entry_error_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_ERRORTYPESTAT_ADDR); + return ((localVal & ((uint32_t)0x00000010)) >> 4); +} + +__INLINE uint8_t ble_errortypestat_radio_emacc_error_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_ERRORTYPESTAT_ADDR); + return ((localVal & ((uint32_t)0x00000008)) >> 3); +} + +__INLINE uint8_t ble_errortypestat_pktcntl_emacc_error_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_ERRORTYPESTAT_ADDR); + return ((localVal & ((uint32_t)0x00000004)) >> 2); +} + +__INLINE uint8_t ble_errortypestat_rxcrypt_error_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_ERRORTYPESTAT_ADDR); + return ((localVal & ((uint32_t)0x00000002)) >> 1); +} + +__INLINE uint8_t ble_errortypestat_txcrypt_error_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_ERRORTYPESTAT_ADDR); + return ((localVal & ((uint32_t)0x00000001)) >> 0); +} + +/** + * @brief SWPROFILING register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31 SWPROF31 0 + * 30 SWPROF30 0 + * 29 SWPROF29 0 + * 28 SWPROF28 0 + * 27 SWPROF27 0 + * 26 SWPROF26 0 + * 25 SWPROF25 0 + * 24 SWPROF24 0 + * 23 SWPROF23 0 + * 22 SWPROF22 0 + * 21 SWPROF21 0 + * 20 SWPROF20 0 + * 19 SWPROF19 0 + * 18 SWPROF18 0 + * 17 SWPROF17 0 + * 16 SWPROF16 0 + * 15 SWPROF15 0 + * 14 SWPROF14 0 + * 13 SWPROF13 0 + * 12 SWPROF12 0 + * 11 SWPROF11 0 + * 10 SWPROF10 0 + * 09 SWPROF9 0 + * 08 SWPROF8 0 + * 07 SWPROF7 0 + * 06 SWPROF6 0 + * 05 SWPROF5 0 + * 04 SWPROF4 0 + * 03 SWPROF3 0 + * 02 SWPROF2 0 + * 01 SWPROF1 0 + * 00 SWPROF0 0 + *+ */ +#define BLE_SWPROFILING_ADDR BASEBAND_REG_BASE +0x64 //0x50800064 +#define BLE_SWPROFILING_OFFSET 0x00000064 +#define BLE_SWPROFILING_INDEX 0x00000019 +#define BLE_SWPROFILING_RESET 0x00000000 + +__INLINE uint32_t ble_swprofiling_get(void) +{ + return REG_BLE_RD(BLE_SWPROFILING_ADDR); +} + +__INLINE void ble_swprofiling_set(uint32_t value) +{ + REG_BLE_WR(BLE_SWPROFILING_ADDR, value); +} + +// field definitions +#define BLE_SWPROF31_BIT ((uint32_t)0x80000000) +#define BLE_SWPROF31_POS 31 +#define BLE_SWPROF30_BIT ((uint32_t)0x40000000) +#define BLE_SWPROF30_POS 30 +#define BLE_SWPROF29_BIT ((uint32_t)0x20000000) +#define BLE_SWPROF29_POS 29 +#define BLE_SWPROF28_BIT ((uint32_t)0x10000000) +#define BLE_SWPROF28_POS 28 +#define BLE_SWPROF27_BIT ((uint32_t)0x08000000) +#define BLE_SWPROF27_POS 27 +#define BLE_SWPROF26_BIT ((uint32_t)0x04000000) +#define BLE_SWPROF26_POS 26 +#define BLE_SWPROF25_BIT ((uint32_t)0x02000000) +#define BLE_SWPROF25_POS 25 +#define BLE_SWPROF24_BIT ((uint32_t)0x01000000) +#define BLE_SWPROF24_POS 24 +#define BLE_SWPROF23_BIT ((uint32_t)0x00800000) +#define BLE_SWPROF23_POS 23 +#define BLE_SWPROF22_BIT ((uint32_t)0x00400000) +#define BLE_SWPROF22_POS 22 +#define BLE_SWPROF21_BIT ((uint32_t)0x00200000) +#define BLE_SWPROF21_POS 21 +#define BLE_SWPROF20_BIT ((uint32_t)0x00100000) +#define BLE_SWPROF20_POS 20 +#define BLE_SWPROF19_BIT ((uint32_t)0x00080000) +#define BLE_SWPROF19_POS 19 +#define BLE_SWPROF18_BIT ((uint32_t)0x00040000) +#define BLE_SWPROF18_POS 18 +#define BLE_SWPROF17_BIT ((uint32_t)0x00020000) +#define BLE_SWPROF17_POS 17 +#define BLE_SWPROF16_BIT ((uint32_t)0x00010000) +#define BLE_SWPROF16_POS 16 +#define BLE_SWPROF15_BIT ((uint32_t)0x00008000) +#define BLE_SWPROF15_POS 15 +#define BLE_SWPROF14_BIT ((uint32_t)0x00004000) +#define BLE_SWPROF14_POS 14 +#define BLE_SWPROF13_BIT ((uint32_t)0x00002000) +#define BLE_SWPROF13_POS 13 +#define BLE_SWPROF12_BIT ((uint32_t)0x00001000) +#define BLE_SWPROF12_POS 12 +#define BLE_SWPROF11_BIT ((uint32_t)0x00000800) +#define BLE_SWPROF11_POS 11 +#define BLE_SWPROF10_BIT ((uint32_t)0x00000400) +#define BLE_SWPROF10_POS 10 +#define BLE_SWPROF9_BIT ((uint32_t)0x00000200) +#define BLE_SWPROF9_POS 9 +#define BLE_SWPROF8_BIT ((uint32_t)0x00000100) +#define BLE_SWPROF8_POS 8 +#define BLE_SWPROF7_BIT ((uint32_t)0x00000080) +#define BLE_SWPROF7_POS 7 +#define BLE_SWPROF6_BIT ((uint32_t)0x00000040) +#define BLE_SWPROF6_POS 6 +#define BLE_SWPROF5_BIT ((uint32_t)0x00000020) +#define BLE_SWPROF5_POS 5 +#define BLE_SWPROF4_BIT ((uint32_t)0x00000010) +#define BLE_SWPROF4_POS 4 +#define BLE_SWPROF3_BIT ((uint32_t)0x00000008) +#define BLE_SWPROF3_POS 3 +#define BLE_SWPROF2_BIT ((uint32_t)0x00000004) +#define BLE_SWPROF2_POS 2 +#define BLE_SWPROF1_BIT ((uint32_t)0x00000002) +#define BLE_SWPROF1_POS 1 +#define BLE_SWPROF0_BIT ((uint32_t)0x00000001) +#define BLE_SWPROF0_POS 0 + +#define BLE_SWPROF31_RST 0x0 +#define BLE_SWPROF30_RST 0x0 +#define BLE_SWPROF29_RST 0x0 +#define BLE_SWPROF28_RST 0x0 +#define BLE_SWPROF27_RST 0x0 +#define BLE_SWPROF26_RST 0x0 +#define BLE_SWPROF25_RST 0x0 +#define BLE_SWPROF24_RST 0x0 +#define BLE_SWPROF23_RST 0x0 +#define BLE_SWPROF22_RST 0x0 +#define BLE_SWPROF21_RST 0x0 +#define BLE_SWPROF20_RST 0x0 +#define BLE_SWPROF19_RST 0x0 +#define BLE_SWPROF18_RST 0x0 +#define BLE_SWPROF17_RST 0x0 +#define BLE_SWPROF16_RST 0x0 +#define BLE_SWPROF15_RST 0x0 +#define BLE_SWPROF14_RST 0x0 +#define BLE_SWPROF13_RST 0x0 +#define BLE_SWPROF12_RST 0x0 +#define BLE_SWPROF11_RST 0x0 +#define BLE_SWPROF10_RST 0x0 +#define BLE_SWPROF9_RST 0x0 +#define BLE_SWPROF8_RST 0x0 +#define BLE_SWPROF7_RST 0x0 +#define BLE_SWPROF6_RST 0x0 +#define BLE_SWPROF5_RST 0x0 +#define BLE_SWPROF4_RST 0x0 +#define BLE_SWPROF3_RST 0x0 +#define BLE_SWPROF2_RST 0x0 +#define BLE_SWPROF1_RST 0x0 +#define BLE_SWPROF0_RST 0x0 + +__INLINE void ble_swprofiling_pack(uint8_t swprof31, uint8_t swprof30, uint8_t swprof29, uint8_t swprof28, uint8_t swprof27, uint8_t swprof26, uint8_t swprof25, uint8_t swprof24, uint8_t swprof23, uint8_t swprof22, uint8_t swprof21, uint8_t swprof20, uint8_t swprof19, uint8_t swprof18, uint8_t swprof17, uint8_t swprof16, uint8_t swprof15, uint8_t swprof14, uint8_t swprof13, uint8_t swprof12, uint8_t swprof11, uint8_t swprof10, uint8_t swprof9, uint8_t swprof8, uint8_t swprof7, uint8_t swprof6, uint8_t swprof5, uint8_t swprof4, uint8_t swprof3, uint8_t swprof2, uint8_t swprof1, uint8_t swprof0) +{ + ASSERT_ERR((((uint32_t)swprof31 << 31) & ~((uint32_t)0x80000000)) == 0); + ASSERT_ERR((((uint32_t)swprof30 << 30) & ~((uint32_t)0x40000000)) == 0); + ASSERT_ERR((((uint32_t)swprof29 << 29) & ~((uint32_t)0x20000000)) == 0); + ASSERT_ERR((((uint32_t)swprof28 << 28) & ~((uint32_t)0x10000000)) == 0); + ASSERT_ERR((((uint32_t)swprof27 << 27) & ~((uint32_t)0x08000000)) == 0); + ASSERT_ERR((((uint32_t)swprof26 << 26) & ~((uint32_t)0x04000000)) == 0); + ASSERT_ERR((((uint32_t)swprof25 << 25) & ~((uint32_t)0x02000000)) == 0); + ASSERT_ERR((((uint32_t)swprof24 << 24) & ~((uint32_t)0x01000000)) == 0); + ASSERT_ERR((((uint32_t)swprof23 << 23) & ~((uint32_t)0x00800000)) == 0); + ASSERT_ERR((((uint32_t)swprof22 << 22) & ~((uint32_t)0x00400000)) == 0); + ASSERT_ERR((((uint32_t)swprof21 << 21) & ~((uint32_t)0x00200000)) == 0); + ASSERT_ERR((((uint32_t)swprof20 << 20) & ~((uint32_t)0x00100000)) == 0); + ASSERT_ERR((((uint32_t)swprof19 << 19) & ~((uint32_t)0x00080000)) == 0); + ASSERT_ERR((((uint32_t)swprof18 << 18) & ~((uint32_t)0x00040000)) == 0); + ASSERT_ERR((((uint32_t)swprof17 << 17) & ~((uint32_t)0x00020000)) == 0); + ASSERT_ERR((((uint32_t)swprof16 << 16) & ~((uint32_t)0x00010000)) == 0); + ASSERT_ERR((((uint32_t)swprof15 << 15) & ~((uint32_t)0x00008000)) == 0); + ASSERT_ERR((((uint32_t)swprof14 << 14) & ~((uint32_t)0x00004000)) == 0); + ASSERT_ERR((((uint32_t)swprof13 << 13) & ~((uint32_t)0x00002000)) == 0); + ASSERT_ERR((((uint32_t)swprof12 << 12) & ~((uint32_t)0x00001000)) == 0); + ASSERT_ERR((((uint32_t)swprof11 << 11) & ~((uint32_t)0x00000800)) == 0); + ASSERT_ERR((((uint32_t)swprof10 << 10) & ~((uint32_t)0x00000400)) == 0); + ASSERT_ERR((((uint32_t)swprof9 << 9) & ~((uint32_t)0x00000200)) == 0); + ASSERT_ERR((((uint32_t)swprof8 << 8) & ~((uint32_t)0x00000100)) == 0); + ASSERT_ERR((((uint32_t)swprof7 << 7) & ~((uint32_t)0x00000080)) == 0); + ASSERT_ERR((((uint32_t)swprof6 << 6) & ~((uint32_t)0x00000040)) == 0); + ASSERT_ERR((((uint32_t)swprof5 << 5) & ~((uint32_t)0x00000020)) == 0); + ASSERT_ERR((((uint32_t)swprof4 << 4) & ~((uint32_t)0x00000010)) == 0); + ASSERT_ERR((((uint32_t)swprof3 << 3) & ~((uint32_t)0x00000008)) == 0); + ASSERT_ERR((((uint32_t)swprof2 << 2) & ~((uint32_t)0x00000004)) == 0); + ASSERT_ERR((((uint32_t)swprof1 << 1) & ~((uint32_t)0x00000002)) == 0); + ASSERT_ERR((((uint32_t)swprof0 << 0) & ~((uint32_t)0x00000001)) == 0); + REG_BLE_WR(BLE_SWPROFILING_ADDR, ((uint32_t)swprof31 << 31) | ((uint32_t)swprof30 << 30) | ((uint32_t)swprof29 << 29) | ((uint32_t)swprof28 << 28) | ((uint32_t)swprof27 << 27) | ((uint32_t)swprof26 << 26) | ((uint32_t)swprof25 << 25) | ((uint32_t)swprof24 << 24) | ((uint32_t)swprof23 << 23) | ((uint32_t)swprof22 << 22) | ((uint32_t)swprof21 << 21) | ((uint32_t)swprof20 << 20) | ((uint32_t)swprof19 << 19) | ((uint32_t)swprof18 << 18) | ((uint32_t)swprof17 << 17) | ((uint32_t)swprof16 << 16) | ((uint32_t)swprof15 << 15) | ((uint32_t)swprof14 << 14) | ((uint32_t)swprof13 << 13) | ((uint32_t)swprof12 << 12) | ((uint32_t)swprof11 << 11) | ((uint32_t)swprof10 << 10) | ((uint32_t)swprof9 << 9) | ((uint32_t)swprof8 << 8) | ((uint32_t)swprof7 << 7) | ((uint32_t)swprof6 << 6) | ((uint32_t)swprof5 << 5) | ((uint32_t)swprof4 << 4) | ((uint32_t)swprof3 << 3) | ((uint32_t)swprof2 << 2) | ((uint32_t)swprof1 << 1) | ((uint32_t)swprof0 << 0)); +} + +__INLINE void ble_swprofiling_unpack(uint8_t* swprof31, uint8_t* swprof30, uint8_t* swprof29, uint8_t* swprof28, uint8_t* swprof27, uint8_t* swprof26, uint8_t* swprof25, uint8_t* swprof24, uint8_t* swprof23, uint8_t* swprof22, uint8_t* swprof21, uint8_t* swprof20, uint8_t* swprof19, uint8_t* swprof18, uint8_t* swprof17, uint8_t* swprof16, uint8_t* swprof15, uint8_t* swprof14, uint8_t* swprof13, uint8_t* swprof12, uint8_t* swprof11, uint8_t* swprof10, uint8_t* swprof9, uint8_t* swprof8, uint8_t* swprof7, uint8_t* swprof6, uint8_t* swprof5, uint8_t* swprof4, uint8_t* swprof3, uint8_t* swprof2, uint8_t* swprof1, uint8_t* swprof0) +{ + uint32_t localVal = REG_BLE_RD(BLE_SWPROFILING_ADDR); + + *swprof31 = (localVal & ((uint32_t)0x80000000)) >> 31; + *swprof30 = (localVal & ((uint32_t)0x40000000)) >> 30; + *swprof29 = (localVal & ((uint32_t)0x20000000)) >> 29; + *swprof28 = (localVal & ((uint32_t)0x10000000)) >> 28; + *swprof27 = (localVal & ((uint32_t)0x08000000)) >> 27; + *swprof26 = (localVal & ((uint32_t)0x04000000)) >> 26; + *swprof25 = (localVal & ((uint32_t)0x02000000)) >> 25; + *swprof24 = (localVal & ((uint32_t)0x01000000)) >> 24; + *swprof23 = (localVal & ((uint32_t)0x00800000)) >> 23; + *swprof22 = (localVal & ((uint32_t)0x00400000)) >> 22; + *swprof21 = (localVal & ((uint32_t)0x00200000)) >> 21; + *swprof20 = (localVal & ((uint32_t)0x00100000)) >> 20; + *swprof19 = (localVal & ((uint32_t)0x00080000)) >> 19; + *swprof18 = (localVal & ((uint32_t)0x00040000)) >> 18; + *swprof17 = (localVal & ((uint32_t)0x00020000)) >> 17; + *swprof16 = (localVal & ((uint32_t)0x00010000)) >> 16; + *swprof15 = (localVal & ((uint32_t)0x00008000)) >> 15; + *swprof14 = (localVal & ((uint32_t)0x00004000)) >> 14; + *swprof13 = (localVal & ((uint32_t)0x00002000)) >> 13; + *swprof12 = (localVal & ((uint32_t)0x00001000)) >> 12; + *swprof11 = (localVal & ((uint32_t)0x00000800)) >> 11; + *swprof10 = (localVal & ((uint32_t)0x00000400)) >> 10; + *swprof9 = (localVal & ((uint32_t)0x00000200)) >> 9; + *swprof8 = (localVal & ((uint32_t)0x00000100)) >> 8; + *swprof7 = (localVal & ((uint32_t)0x00000080)) >> 7; + *swprof6 = (localVal & ((uint32_t)0x00000040)) >> 6; + *swprof5 = (localVal & ((uint32_t)0x00000020)) >> 5; + *swprof4 = (localVal & ((uint32_t)0x00000010)) >> 4; + *swprof3 = (localVal & ((uint32_t)0x00000008)) >> 3; + *swprof2 = (localVal & ((uint32_t)0x00000004)) >> 2; + *swprof1 = (localVal & ((uint32_t)0x00000002)) >> 1; + *swprof0 = (localVal & ((uint32_t)0x00000001)) >> 0; +} + +__INLINE uint8_t ble_swprofiling_swprof31_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x80000000)) >> 31); +} + +__INLINE void ble_swprofiling_swprof31_setf(uint8_t swprof31) +{ + ASSERT_ERR((((uint32_t)swprof31 << 31) & ~((uint32_t)0x80000000)) == 0); + REG_BLE_WR(BLE_SWPROFILING_ADDR, (REG_BLE_RD(BLE_SWPROFILING_ADDR) & ~((uint32_t)0x80000000)) | ((uint32_t)swprof31 << 31)); +} + +__INLINE uint8_t ble_swprofiling_swprof30_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x40000000)) >> 30); +} + +__INLINE void ble_swprofiling_swprof30_setf(uint8_t swprof30) +{ + ASSERT_ERR((((uint32_t)swprof30 << 30) & ~((uint32_t)0x40000000)) == 0); + REG_BLE_WR(BLE_SWPROFILING_ADDR, (REG_BLE_RD(BLE_SWPROFILING_ADDR) & ~((uint32_t)0x40000000)) | ((uint32_t)swprof30 << 30)); +} + +__INLINE uint8_t ble_swprofiling_swprof29_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x20000000)) >> 29); +} + +__INLINE void ble_swprofiling_swprof29_setf(uint8_t swprof29) +{ + ASSERT_ERR((((uint32_t)swprof29 << 29) & ~((uint32_t)0x20000000)) == 0); + REG_BLE_WR(BLE_SWPROFILING_ADDR, (REG_BLE_RD(BLE_SWPROFILING_ADDR) & ~((uint32_t)0x20000000)) | ((uint32_t)swprof29 << 29)); +} + +__INLINE uint8_t ble_swprofiling_swprof28_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x10000000)) >> 28); +} + +__INLINE void ble_swprofiling_swprof28_setf(uint8_t swprof28) +{ + ASSERT_ERR((((uint32_t)swprof28 << 28) & ~((uint32_t)0x10000000)) == 0); + REG_BLE_WR(BLE_SWPROFILING_ADDR, (REG_BLE_RD(BLE_SWPROFILING_ADDR) & ~((uint32_t)0x10000000)) | ((uint32_t)swprof28 << 28)); +} + +__INLINE uint8_t ble_swprofiling_swprof27_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x08000000)) >> 27); +} + +__INLINE void ble_swprofiling_swprof27_setf(uint8_t swprof27) +{ + ASSERT_ERR((((uint32_t)swprof27 << 27) & ~((uint32_t)0x08000000)) == 0); + REG_BLE_WR(BLE_SWPROFILING_ADDR, (REG_BLE_RD(BLE_SWPROFILING_ADDR) & ~((uint32_t)0x08000000)) | ((uint32_t)swprof27 << 27)); +} + +__INLINE uint8_t ble_swprofiling_swprof26_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x04000000)) >> 26); +} + +__INLINE void ble_swprofiling_swprof26_setf(uint8_t swprof26) +{ + ASSERT_ERR((((uint32_t)swprof26 << 26) & ~((uint32_t)0x04000000)) == 0); + REG_BLE_WR(BLE_SWPROFILING_ADDR, (REG_BLE_RD(BLE_SWPROFILING_ADDR) & ~((uint32_t)0x04000000)) | ((uint32_t)swprof26 << 26)); +} + +__INLINE uint8_t ble_swprofiling_swprof25_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x02000000)) >> 25); +} + +__INLINE void ble_swprofiling_swprof25_setf(uint8_t swprof25) +{ + ASSERT_ERR((((uint32_t)swprof25 << 25) & ~((uint32_t)0x02000000)) == 0); + REG_BLE_WR(BLE_SWPROFILING_ADDR, (REG_BLE_RD(BLE_SWPROFILING_ADDR) & ~((uint32_t)0x02000000)) | ((uint32_t)swprof25 << 25)); +} + +__INLINE uint8_t ble_swprofiling_swprof24_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x01000000)) >> 24); +} + +__INLINE void ble_swprofiling_swprof24_setf(uint8_t swprof24) +{ + ASSERT_ERR((((uint32_t)swprof24 << 24) & ~((uint32_t)0x01000000)) == 0); + REG_BLE_WR(BLE_SWPROFILING_ADDR, (REG_BLE_RD(BLE_SWPROFILING_ADDR) & ~((uint32_t)0x01000000)) | ((uint32_t)swprof24 << 24)); +} + +__INLINE uint8_t ble_swprofiling_swprof23_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x00800000)) >> 23); +} + +__INLINE void ble_swprofiling_swprof23_setf(uint8_t swprof23) +{ + ASSERT_ERR((((uint32_t)swprof23 << 23) & ~((uint32_t)0x00800000)) == 0); + REG_BLE_WR(BLE_SWPROFILING_ADDR, (REG_BLE_RD(BLE_SWPROFILING_ADDR) & ~((uint32_t)0x00800000)) | ((uint32_t)swprof23 << 23)); +} + +__INLINE uint8_t ble_swprofiling_swprof22_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x00400000)) >> 22); +} + +__INLINE void ble_swprofiling_swprof22_setf(uint8_t swprof22) +{ + ASSERT_ERR((((uint32_t)swprof22 << 22) & ~((uint32_t)0x00400000)) == 0); + REG_BLE_WR(BLE_SWPROFILING_ADDR, (REG_BLE_RD(BLE_SWPROFILING_ADDR) & ~((uint32_t)0x00400000)) | ((uint32_t)swprof22 << 22)); +} + +__INLINE uint8_t ble_swprofiling_swprof21_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x00200000)) >> 21); +} + +__INLINE void ble_swprofiling_swprof21_setf(uint8_t swprof21) +{ + ASSERT_ERR((((uint32_t)swprof21 << 21) & ~((uint32_t)0x00200000)) == 0); + REG_BLE_WR(BLE_SWPROFILING_ADDR, (REG_BLE_RD(BLE_SWPROFILING_ADDR) & ~((uint32_t)0x00200000)) | ((uint32_t)swprof21 << 21)); +} + +__INLINE uint8_t ble_swprofiling_swprof20_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x00100000)) >> 20); +} + +__INLINE void ble_swprofiling_swprof20_setf(uint8_t swprof20) +{ + ASSERT_ERR((((uint32_t)swprof20 << 20) & ~((uint32_t)0x00100000)) == 0); + REG_BLE_WR(BLE_SWPROFILING_ADDR, (REG_BLE_RD(BLE_SWPROFILING_ADDR) & ~((uint32_t)0x00100000)) | ((uint32_t)swprof20 << 20)); +} + +__INLINE uint8_t ble_swprofiling_swprof19_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x00080000)) >> 19); +} + +__INLINE void ble_swprofiling_swprof19_setf(uint8_t swprof19) +{ + ASSERT_ERR((((uint32_t)swprof19 << 19) & ~((uint32_t)0x00080000)) == 0); + REG_BLE_WR(BLE_SWPROFILING_ADDR, (REG_BLE_RD(BLE_SWPROFILING_ADDR) & ~((uint32_t)0x00080000)) | ((uint32_t)swprof19 << 19)); +} + +__INLINE uint8_t ble_swprofiling_swprof18_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x00040000)) >> 18); +} + +__INLINE void ble_swprofiling_swprof18_setf(uint8_t swprof18) +{ + ASSERT_ERR((((uint32_t)swprof18 << 18) & ~((uint32_t)0x00040000)) == 0); + REG_BLE_WR(BLE_SWPROFILING_ADDR, (REG_BLE_RD(BLE_SWPROFILING_ADDR) & ~((uint32_t)0x00040000)) | ((uint32_t)swprof18 << 18)); +} + +__INLINE uint8_t ble_swprofiling_swprof17_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x00020000)) >> 17); +} + +__INLINE void ble_swprofiling_swprof17_setf(uint8_t swprof17) +{ + ASSERT_ERR((((uint32_t)swprof17 << 17) & ~((uint32_t)0x00020000)) == 0); + REG_BLE_WR(BLE_SWPROFILING_ADDR, (REG_BLE_RD(BLE_SWPROFILING_ADDR) & ~((uint32_t)0x00020000)) | ((uint32_t)swprof17 << 17)); +} + +__INLINE uint8_t ble_swprofiling_swprof16_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x00010000)) >> 16); +} + +__INLINE void ble_swprofiling_swprof16_setf(uint8_t swprof16) +{ + ASSERT_ERR((((uint32_t)swprof16 << 16) & ~((uint32_t)0x00010000)) == 0); + REG_BLE_WR(BLE_SWPROFILING_ADDR, (REG_BLE_RD(BLE_SWPROFILING_ADDR) & ~((uint32_t)0x00010000)) | ((uint32_t)swprof16 << 16)); +} + +__INLINE uint8_t ble_swprofiling_swprof15_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x00008000)) >> 15); +} + +__INLINE void ble_swprofiling_swprof15_setf(uint8_t swprof15) +{ + ASSERT_ERR((((uint32_t)swprof15 << 15) & ~((uint32_t)0x00008000)) == 0); + REG_BLE_WR(BLE_SWPROFILING_ADDR, (REG_BLE_RD(BLE_SWPROFILING_ADDR) & ~((uint32_t)0x00008000)) | ((uint32_t)swprof15 << 15)); +} + +__INLINE uint8_t ble_swprofiling_swprof14_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x00004000)) >> 14); +} + +__INLINE void ble_swprofiling_swprof14_setf(uint8_t swprof14) +{ + ASSERT_ERR((((uint32_t)swprof14 << 14) & ~((uint32_t)0x00004000)) == 0); + REG_BLE_WR(BLE_SWPROFILING_ADDR, (REG_BLE_RD(BLE_SWPROFILING_ADDR) & ~((uint32_t)0x00004000)) | ((uint32_t)swprof14 << 14)); +} + +__INLINE uint8_t ble_swprofiling_swprof13_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x00002000)) >> 13); +} + +__INLINE void ble_swprofiling_swprof13_setf(uint8_t swprof13) +{ + ASSERT_ERR((((uint32_t)swprof13 << 13) & ~((uint32_t)0x00002000)) == 0); + REG_BLE_WR(BLE_SWPROFILING_ADDR, (REG_BLE_RD(BLE_SWPROFILING_ADDR) & ~((uint32_t)0x00002000)) | ((uint32_t)swprof13 << 13)); +} + +__INLINE uint8_t ble_swprofiling_swprof12_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x00001000)) >> 12); +} + +__INLINE void ble_swprofiling_swprof12_setf(uint8_t swprof12) +{ + ASSERT_ERR((((uint32_t)swprof12 << 12) & ~((uint32_t)0x00001000)) == 0); + REG_BLE_WR(BLE_SWPROFILING_ADDR, (REG_BLE_RD(BLE_SWPROFILING_ADDR) & ~((uint32_t)0x00001000)) | ((uint32_t)swprof12 << 12)); +} + +__INLINE uint8_t ble_swprofiling_swprof11_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x00000800)) >> 11); +} + +__INLINE void ble_swprofiling_swprof11_setf(uint8_t swprof11) +{ + ASSERT_ERR((((uint32_t)swprof11 << 11) & ~((uint32_t)0x00000800)) == 0); + REG_BLE_WR(BLE_SWPROFILING_ADDR, (REG_BLE_RD(BLE_SWPROFILING_ADDR) & ~((uint32_t)0x00000800)) | ((uint32_t)swprof11 << 11)); +} + +__INLINE uint8_t ble_swprofiling_swprof10_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x00000400)) >> 10); +} + +__INLINE void ble_swprofiling_swprof10_setf(uint8_t swprof10) +{ + ASSERT_ERR((((uint32_t)swprof10 << 10) & ~((uint32_t)0x00000400)) == 0); + REG_BLE_WR(BLE_SWPROFILING_ADDR, (REG_BLE_RD(BLE_SWPROFILING_ADDR) & ~((uint32_t)0x00000400)) | ((uint32_t)swprof10 << 10)); +} + +__INLINE uint8_t ble_swprofiling_swprof9_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x00000200)) >> 9); +} + +__INLINE void ble_swprofiling_swprof9_setf(uint8_t swprof9) +{ + ASSERT_ERR((((uint32_t)swprof9 << 9) & ~((uint32_t)0x00000200)) == 0); + REG_BLE_WR(BLE_SWPROFILING_ADDR, (REG_BLE_RD(BLE_SWPROFILING_ADDR) & ~((uint32_t)0x00000200)) | ((uint32_t)swprof9 << 9)); +} + +__INLINE uint8_t ble_swprofiling_swprof8_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x00000100)) >> 8); +} + +__INLINE void ble_swprofiling_swprof8_setf(uint8_t swprof8) +{ + ASSERT_ERR((((uint32_t)swprof8 << 8) & ~((uint32_t)0x00000100)) == 0); + REG_BLE_WR(BLE_SWPROFILING_ADDR, (REG_BLE_RD(BLE_SWPROFILING_ADDR) & ~((uint32_t)0x00000100)) | ((uint32_t)swprof8 << 8)); +} + +__INLINE uint8_t ble_swprofiling_swprof7_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x00000080)) >> 7); +} + +__INLINE void ble_swprofiling_swprof7_setf(uint8_t swprof7) +{ + ASSERT_ERR((((uint32_t)swprof7 << 7) & ~((uint32_t)0x00000080)) == 0); + REG_BLE_WR(BLE_SWPROFILING_ADDR, (REG_BLE_RD(BLE_SWPROFILING_ADDR) & ~((uint32_t)0x00000080)) | ((uint32_t)swprof7 << 7)); +} + +__INLINE uint8_t ble_swprofiling_swprof6_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x00000040)) >> 6); +} + +__INLINE void ble_swprofiling_swprof6_setf(uint8_t swprof6) +{ + ASSERT_ERR((((uint32_t)swprof6 << 6) & ~((uint32_t)0x00000040)) == 0); + REG_BLE_WR(BLE_SWPROFILING_ADDR, (REG_BLE_RD(BLE_SWPROFILING_ADDR) & ~((uint32_t)0x00000040)) | ((uint32_t)swprof6 << 6)); +} + +__INLINE uint8_t ble_swprofiling_swprof5_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x00000020)) >> 5); +} + +__INLINE void ble_swprofiling_swprof5_setf(uint8_t swprof5) +{ + ASSERT_ERR((((uint32_t)swprof5 << 5) & ~((uint32_t)0x00000020)) == 0); + REG_BLE_WR(BLE_SWPROFILING_ADDR, (REG_BLE_RD(BLE_SWPROFILING_ADDR) & ~((uint32_t)0x00000020)) | ((uint32_t)swprof5 << 5)); +} + +__INLINE uint8_t ble_swprofiling_swprof4_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x00000010)) >> 4); +} + +__INLINE void ble_swprofiling_swprof4_setf(uint8_t swprof4) +{ + ASSERT_ERR((((uint32_t)swprof4 << 4) & ~((uint32_t)0x00000010)) == 0); + REG_BLE_WR(BLE_SWPROFILING_ADDR, (REG_BLE_RD(BLE_SWPROFILING_ADDR) & ~((uint32_t)0x00000010)) | ((uint32_t)swprof4 << 4)); +} + +__INLINE uint8_t ble_swprofiling_swprof3_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x00000008)) >> 3); +} + +__INLINE void ble_swprofiling_swprof3_setf(uint8_t swprof3) +{ + ASSERT_ERR((((uint32_t)swprof3 << 3) & ~((uint32_t)0x00000008)) == 0); + REG_BLE_WR(BLE_SWPROFILING_ADDR, (REG_BLE_RD(BLE_SWPROFILING_ADDR) & ~((uint32_t)0x00000008)) | ((uint32_t)swprof3 << 3)); +} + +__INLINE uint8_t ble_swprofiling_swprof2_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x00000004)) >> 2); +} + +__INLINE void ble_swprofiling_swprof2_setf(uint8_t swprof2) +{ + ASSERT_ERR((((uint32_t)swprof2 << 2) & ~((uint32_t)0x00000004)) == 0); + REG_BLE_WR(BLE_SWPROFILING_ADDR, (REG_BLE_RD(BLE_SWPROFILING_ADDR) & ~((uint32_t)0x00000004)) | ((uint32_t)swprof2 << 2)); +} + +__INLINE uint8_t ble_swprofiling_swprof1_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x00000002)) >> 1); +} + +__INLINE void ble_swprofiling_swprof1_setf(uint8_t swprof1) +{ + ASSERT_ERR((((uint32_t)swprof1 << 1) & ~((uint32_t)0x00000002)) == 0); + REG_BLE_WR(BLE_SWPROFILING_ADDR, (REG_BLE_RD(BLE_SWPROFILING_ADDR) & ~((uint32_t)0x00000002)) | ((uint32_t)swprof1 << 1)); +} + +__INLINE uint8_t ble_swprofiling_swprof0_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x00000001)) >> 0); +} + +__INLINE void ble_swprofiling_swprof0_setf(uint8_t swprof0) +{ + ASSERT_ERR((((uint32_t)swprof0 << 0) & ~((uint32_t)0x00000001)) == 0); + REG_BLE_WR(BLE_SWPROFILING_ADDR, (REG_BLE_RD(BLE_SWPROFILING_ADDR) & ~((uint32_t)0x00000001)) | ((uint32_t)swprof0 << 0)); +} + +/** + * @brief RADIOCNTL0 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 29:16 SPIPTR 0x0 + * 07 SPICFG 0 + * 05:04 SPIFREQ 0x0 + * 01 SPICOMP 1 + * 00 SPIGO 0 + *+ */ +#define BLE_RADIOCNTL0_ADDR BASEBAND_REG_BASE +0x70 //0x50800070 +#define BLE_RADIOCNTL0_OFFSET 0x00000070 +#define BLE_RADIOCNTL0_INDEX 0x0000001C +#define BLE_RADIOCNTL0_RESET 0x00000002 + +__INLINE uint32_t ble_radiocntl0_get(void) +{ + return REG_BLE_RD(BLE_RADIOCNTL0_ADDR); +} + +__INLINE void ble_radiocntl0_set(uint32_t value) +{ + REG_BLE_WR(BLE_RADIOCNTL0_ADDR, value); +} + +// field definitions +#define BLE_SPIPTR_MASK ((uint32_t)0x3FFF0000) +#define BLE_SPIPTR_LSB 16 +#define BLE_SPIPTR_WIDTH ((uint32_t)0x0000000E) +#define BLE_SPICFG_BIT ((uint32_t)0x00000080) +#define BLE_SPICFG_POS 7 +#define BLE_SPIFREQ_MASK ((uint32_t)0x00000030) +#define BLE_SPIFREQ_LSB 4 +#define BLE_SPIFREQ_WIDTH ((uint32_t)0x00000002) +#define BLE_SPICOMP_BIT ((uint32_t)0x00000002) +#define BLE_SPICOMP_POS 1 +#define BLE_SPIGO_BIT ((uint32_t)0x00000001) +#define BLE_SPIGO_POS 0 + +#define BLE_SPIPTR_RST 0x0 +#define BLE_SPICFG_RST 0x0 +#define BLE_SPIFREQ_RST 0x0 +#define BLE_SPICOMP_RST 0x1 +#define BLE_SPIGO_RST 0x0 + +__INLINE void ble_radiocntl0_pack(uint16_t spiptr, uint8_t spicfg, uint8_t spifreq, uint8_t spigo) +{ + ASSERT_ERR((((uint32_t)spiptr << 16) & ~((uint32_t)0x3FFF0000)) == 0); + ASSERT_ERR((((uint32_t)spicfg << 7) & ~((uint32_t)0x00000080)) == 0); + ASSERT_ERR((((uint32_t)spifreq << 4) & ~((uint32_t)0x00000030)) == 0); + ASSERT_ERR((((uint32_t)spigo << 0) & ~((uint32_t)0x00000001)) == 0); + REG_BLE_WR(BLE_RADIOCNTL0_ADDR, ((uint32_t)spiptr << 16) | ((uint32_t)spicfg << 7) | ((uint32_t)spifreq << 4) | ((uint32_t)spigo << 0)); +} + +__INLINE void ble_radiocntl0_unpack(uint16_t* spiptr, uint8_t* spicfg, uint8_t* spifreq, uint8_t* spicomp, uint8_t* spigo) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOCNTL0_ADDR); + + *spiptr = (localVal & ((uint32_t)0x3FFF0000)) >> 16; + *spicfg = (localVal & ((uint32_t)0x00000080)) >> 7; + *spifreq = (localVal & ((uint32_t)0x00000030)) >> 4; + *spicomp = (localVal & ((uint32_t)0x00000002)) >> 1; + *spigo = (localVal & ((uint32_t)0x00000001)) >> 0; +} + +__INLINE uint16_t ble_radiocntl0_spiptr_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOCNTL0_ADDR); + return ((localVal & ((uint32_t)0x3FFF0000)) >> 16); +} + +__INLINE void ble_radiocntl0_spiptr_setf(uint16_t spiptr) +{ + ASSERT_ERR((((uint32_t)spiptr << 16) & ~((uint32_t)0x3FFF0000)) == 0); + REG_BLE_WR(BLE_RADIOCNTL0_ADDR, (REG_BLE_RD(BLE_RADIOCNTL0_ADDR) & ~((uint32_t)0x3FFF0000)) | ((uint32_t)spiptr << 16)); +} + +__INLINE uint8_t ble_radiocntl0_spicfg_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOCNTL0_ADDR); + return ((localVal & ((uint32_t)0x00000080)) >> 7); +} + +__INLINE void ble_radiocntl0_spicfg_setf(uint8_t spicfg) +{ + ASSERT_ERR((((uint32_t)spicfg << 7) & ~((uint32_t)0x00000080)) == 0); + REG_BLE_WR(BLE_RADIOCNTL0_ADDR, (REG_BLE_RD(BLE_RADIOCNTL0_ADDR) & ~((uint32_t)0x00000080)) | ((uint32_t)spicfg << 7)); +} + +__INLINE uint8_t ble_radiocntl0_spifreq_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOCNTL0_ADDR); + return ((localVal & ((uint32_t)0x00000030)) >> 4); +} + +__INLINE void ble_radiocntl0_spifreq_setf(uint8_t spifreq) +{ + ASSERT_ERR((((uint32_t)spifreq << 4) & ~((uint32_t)0x00000030)) == 0); + REG_BLE_WR(BLE_RADIOCNTL0_ADDR, (REG_BLE_RD(BLE_RADIOCNTL0_ADDR) & ~((uint32_t)0x00000030)) | ((uint32_t)spifreq << 4)); +} + +__INLINE uint8_t ble_radiocntl0_spicomp_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOCNTL0_ADDR); + return ((localVal & ((uint32_t)0x00000002)) >> 1); +} + +__INLINE uint8_t ble_radiocntl0_spigo_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOCNTL0_ADDR); + return ((localVal & ((uint32_t)0x00000001)) >> 0); +} + +__INLINE void ble_radiocntl0_spigo_setf(uint8_t spigo) +{ + ASSERT_ERR((((uint32_t)spigo << 0) & ~((uint32_t)0x00000001)) == 0); + REG_BLE_WR(BLE_RADIOCNTL0_ADDR, (REG_BLE_RD(BLE_RADIOCNTL0_ADDR) & ~((uint32_t)0x00000001)) | ((uint32_t)spigo << 0)); +} + +/** + * @brief RADIOCNTL1 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31 FORCEAGC_EN 0 + * 30 FORCEIQ 0 + * 29 RXDNSL 0 + * 28 TXDNSL 0 + * 27:16 FORCEAGC_LENGTH 0x0 + * 15 SYNC_PULSE_MODE 0 + * 14 SYNC_PULSE_SRC 0 + * 13 DPCORR_EN 0 + * 12 JEF_SELECT 0 + * 09:04 XRFSEL 0x0 + * 03:00 SUBVERSION 0x0 + *+ */ +#define BLE_RADIOCNTL1_ADDR BASEBAND_REG_BASE +0x74 //0x50800074 +#define BLE_RADIOCNTL1_OFFSET 0x00000074 +#define BLE_RADIOCNTL1_INDEX 0x0000001D +#define BLE_RADIOCNTL1_RESET 0x00000000 + +__INLINE uint32_t ble_radiocntl1_get(void) +{ + return REG_BLE_RD(BLE_RADIOCNTL1_ADDR); +} + +__INLINE void ble_radiocntl1_set(uint32_t value) +{ + REG_BLE_WR(BLE_RADIOCNTL1_ADDR, value); +} + +// field definitions +#define BLE_FORCEAGC_EN_BIT ((uint32_t)0x80000000) +#define BLE_FORCEAGC_EN_POS 31 +#define BLE_FORCEIQ_BIT ((uint32_t)0x40000000) +#define BLE_FORCEIQ_POS 30 +#define BLE_RXDNSL_BIT ((uint32_t)0x20000000) +#define BLE_RXDNSL_POS 29 +#define BLE_TXDNSL_BIT ((uint32_t)0x10000000) +#define BLE_TXDNSL_POS 28 +#define BLE_FORCEAGC_LENGTH_MASK ((uint32_t)0x0FFF0000) +#define BLE_FORCEAGC_LENGTH_LSB 16 +#define BLE_FORCEAGC_LENGTH_WIDTH ((uint32_t)0x0000000C) +#define BLE_SYNC_PULSE_MODE_BIT ((uint32_t)0x00008000) +#define BLE_SYNC_PULSE_MODE_POS 15 +#define BLE_SYNC_PULSE_SRC_BIT ((uint32_t)0x00004000) +#define BLE_SYNC_PULSE_SRC_POS 14 +#define BLE_DPCORR_EN_BIT ((uint32_t)0x00002000) +#define BLE_DPCORR_EN_POS 13 +#define BLE_JEF_SELECT_BIT ((uint32_t)0x00001000) +#define BLE_JEF_SELECT_POS 12 +#define BLE_XRFSEL_MASK ((uint32_t)0x000003F0) +#define BLE_XRFSEL_LSB 4 +#define BLE_XRFSEL_WIDTH ((uint32_t)0x00000006) +#define BLE_SUBVERSION_MASK ((uint32_t)0x0000000F) +#define BLE_SUBVERSION_LSB 0 +#define BLE_SUBVERSION_WIDTH ((uint32_t)0x00000004) + +#define BLE_FORCEAGC_EN_RST 0x0 +#define BLE_FORCEIQ_RST 0x0 +#define BLE_RXDNSL_RST 0x0 +#define BLE_TXDNSL_RST 0x0 +#define BLE_FORCEAGC_LENGTH_RST 0x0 +#define BLE_SYNC_PULSE_MODE_RST 0x0 +#define BLE_SYNC_PULSE_SRC_RST 0x0 +#define BLE_DPCORR_EN_RST 0x0 +#define BLE_JEF_SELECT_RST 0x0 +#define BLE_XRFSEL_RST 0x0 +#define BLE_SUBVERSION_RST 0x0 + +__INLINE void ble_radiocntl1_pack(uint8_t forceagcen, uint8_t forceiq, uint8_t rxdnsl, uint8_t txdnsl, uint16_t forceagclength, uint8_t syncpulsemode, uint8_t syncpulsesrc, uint8_t dpcorren, uint8_t jefselect, uint8_t xrfsel, uint8_t subversion) +{ + ASSERT_ERR((((uint32_t)forceagcen << 31) & ~((uint32_t)0x80000000)) == 0); + ASSERT_ERR((((uint32_t)forceiq << 30) & ~((uint32_t)0x40000000)) == 0); + ASSERT_ERR((((uint32_t)rxdnsl << 29) & ~((uint32_t)0x20000000)) == 0); + ASSERT_ERR((((uint32_t)txdnsl << 28) & ~((uint32_t)0x10000000)) == 0); + ASSERT_ERR((((uint32_t)forceagclength << 16) & ~((uint32_t)0x0FFF0000)) == 0); + ASSERT_ERR((((uint32_t)syncpulsemode << 15) & ~((uint32_t)0x00008000)) == 0); + ASSERT_ERR((((uint32_t)syncpulsesrc << 14) & ~((uint32_t)0x00004000)) == 0); + ASSERT_ERR((((uint32_t)dpcorren << 13) & ~((uint32_t)0x00002000)) == 0); + ASSERT_ERR((((uint32_t)jefselect << 12) & ~((uint32_t)0x00001000)) == 0); + ASSERT_ERR((((uint32_t)xrfsel << 4) & ~((uint32_t)0x000003F0)) == 0); + ASSERT_ERR((((uint32_t)subversion << 0) & ~((uint32_t)0x0000000F)) == 0); + REG_BLE_WR(BLE_RADIOCNTL1_ADDR, ((uint32_t)forceagcen << 31) | ((uint32_t)forceiq << 30) | ((uint32_t)rxdnsl << 29) | ((uint32_t)txdnsl << 28) | ((uint32_t)forceagclength << 16) | ((uint32_t)syncpulsemode << 15) | ((uint32_t)syncpulsesrc << 14) | ((uint32_t)dpcorren << 13) | ((uint32_t)jefselect << 12) | ((uint32_t)xrfsel << 4) | ((uint32_t)subversion << 0)); +} + +__INLINE void ble_radiocntl1_unpack(uint8_t* forceagcen, uint8_t* forceiq, uint8_t* rxdnsl, uint8_t* txdnsl, uint16_t* forceagclength, uint8_t* syncpulsemode, uint8_t* syncpulsesrc, uint8_t* dpcorren, uint8_t* jefselect, uint8_t* xrfsel, uint8_t* subversion) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOCNTL1_ADDR); + + *forceagcen = (localVal & ((uint32_t)0x80000000)) >> 31; + *forceiq = (localVal & ((uint32_t)0x40000000)) >> 30; + *rxdnsl = (localVal & ((uint32_t)0x20000000)) >> 29; + *txdnsl = (localVal & ((uint32_t)0x10000000)) >> 28; + *forceagclength = (localVal & ((uint32_t)0x0FFF0000)) >> 16; + *syncpulsemode = (localVal & ((uint32_t)0x00008000)) >> 15; + *syncpulsesrc = (localVal & ((uint32_t)0x00004000)) >> 14; + *dpcorren = (localVal & ((uint32_t)0x00002000)) >> 13; + *jefselect = (localVal & ((uint32_t)0x00001000)) >> 12; + *xrfsel = (localVal & ((uint32_t)0x000003F0)) >> 4; + *subversion = (localVal & ((uint32_t)0x0000000F)) >> 0; +} + +__INLINE uint8_t ble_radiocntl1_forceagc_en_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOCNTL1_ADDR); + return ((localVal & ((uint32_t)0x80000000)) >> 31); +} + +__INLINE void ble_radiocntl1_forceagc_en_setf(uint8_t forceagcen) +{ + ASSERT_ERR((((uint32_t)forceagcen << 31) & ~((uint32_t)0x80000000)) == 0); + REG_BLE_WR(BLE_RADIOCNTL1_ADDR, (REG_BLE_RD(BLE_RADIOCNTL1_ADDR) & ~((uint32_t)0x80000000)) | ((uint32_t)forceagcen << 31)); +} + +__INLINE uint8_t ble_radiocntl1_forceiq_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOCNTL1_ADDR); + return ((localVal & ((uint32_t)0x40000000)) >> 30); +} + +__INLINE void ble_radiocntl1_forceiq_setf(uint8_t forceiq) +{ + ASSERT_ERR((((uint32_t)forceiq << 30) & ~((uint32_t)0x40000000)) == 0); + REG_BLE_WR(BLE_RADIOCNTL1_ADDR, (REG_BLE_RD(BLE_RADIOCNTL1_ADDR) & ~((uint32_t)0x40000000)) | ((uint32_t)forceiq << 30)); +} + +__INLINE uint8_t ble_radiocntl1_rxdnsl_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOCNTL1_ADDR); + return ((localVal & ((uint32_t)0x20000000)) >> 29); +} + +__INLINE void ble_radiocntl1_rxdnsl_setf(uint8_t rxdnsl) +{ + ASSERT_ERR((((uint32_t)rxdnsl << 29) & ~((uint32_t)0x20000000)) == 0); + REG_BLE_WR(BLE_RADIOCNTL1_ADDR, (REG_BLE_RD(BLE_RADIOCNTL1_ADDR) & ~((uint32_t)0x20000000)) | ((uint32_t)rxdnsl << 29)); +} + +__INLINE uint8_t ble_radiocntl1_txdnsl_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOCNTL1_ADDR); + return ((localVal & ((uint32_t)0x10000000)) >> 28); +} + +__INLINE void ble_radiocntl1_txdnsl_setf(uint8_t txdnsl) +{ + ASSERT_ERR((((uint32_t)txdnsl << 28) & ~((uint32_t)0x10000000)) == 0); + REG_BLE_WR(BLE_RADIOCNTL1_ADDR, (REG_BLE_RD(BLE_RADIOCNTL1_ADDR) & ~((uint32_t)0x10000000)) | ((uint32_t)txdnsl << 28)); +} + +__INLINE uint16_t ble_radiocntl1_forceagc_length_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOCNTL1_ADDR); + return ((localVal & ((uint32_t)0x0FFF0000)) >> 16); +} + +__INLINE void ble_radiocntl1_forceagc_length_setf(uint16_t forceagclength) +{ + ASSERT_ERR((((uint32_t)forceagclength << 16) & ~((uint32_t)0x0FFF0000)) == 0); + REG_BLE_WR(BLE_RADIOCNTL1_ADDR, (REG_BLE_RD(BLE_RADIOCNTL1_ADDR) & ~((uint32_t)0x0FFF0000)) | ((uint32_t)forceagclength << 16)); +} + +__INLINE uint8_t ble_radiocntl1_sync_pulse_mode_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOCNTL1_ADDR); + return ((localVal & ((uint32_t)0x00008000)) >> 15); +} + +__INLINE void ble_radiocntl1_sync_pulse_mode_setf(uint8_t syncpulsemode) +{ + ASSERT_ERR((((uint32_t)syncpulsemode << 15) & ~((uint32_t)0x00008000)) == 0); + REG_BLE_WR(BLE_RADIOCNTL1_ADDR, (REG_BLE_RD(BLE_RADIOCNTL1_ADDR) & ~((uint32_t)0x00008000)) | ((uint32_t)syncpulsemode << 15)); +} + +__INLINE uint8_t ble_radiocntl1_sync_pulse_src_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOCNTL1_ADDR); + return ((localVal & ((uint32_t)0x00004000)) >> 14); +} + +__INLINE void ble_radiocntl1_sync_pulse_src_setf(uint8_t syncpulsesrc) +{ + ASSERT_ERR((((uint32_t)syncpulsesrc << 14) & ~((uint32_t)0x00004000)) == 0); + REG_BLE_WR(BLE_RADIOCNTL1_ADDR, (REG_BLE_RD(BLE_RADIOCNTL1_ADDR) & ~((uint32_t)0x00004000)) | ((uint32_t)syncpulsesrc << 14)); +} + +__INLINE uint8_t ble_radiocntl1_dpcorr_en_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOCNTL1_ADDR); + return ((localVal & ((uint32_t)0x00002000)) >> 13); +} + +__INLINE void ble_radiocntl1_dpcorr_en_setf(uint8_t dpcorren) +{ + ASSERT_ERR((((uint32_t)dpcorren << 13) & ~((uint32_t)0x00002000)) == 0); + REG_BLE_WR(BLE_RADIOCNTL1_ADDR, (REG_BLE_RD(BLE_RADIOCNTL1_ADDR) & ~((uint32_t)0x00002000)) | ((uint32_t)dpcorren << 13)); +} + +__INLINE uint8_t ble_radiocntl1_jef_select_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOCNTL1_ADDR); + return ((localVal & ((uint32_t)0x00001000)) >> 12); +} + +__INLINE void ble_radiocntl1_jef_select_setf(uint8_t jefselect) +{ + ASSERT_ERR((((uint32_t)jefselect << 12) & ~((uint32_t)0x00001000)) == 0); + REG_BLE_WR(BLE_RADIOCNTL1_ADDR, (REG_BLE_RD(BLE_RADIOCNTL1_ADDR) & ~((uint32_t)0x00001000)) | ((uint32_t)jefselect << 12)); +} + +__INLINE uint8_t ble_radiocntl1_xrfsel_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOCNTL1_ADDR); + return ((localVal & ((uint32_t)0x000003F0)) >> 4); +} + +__INLINE void ble_radiocntl1_xrfsel_setf(uint8_t xrfsel) +{ + ASSERT_ERR((((uint32_t)xrfsel << 4) & ~((uint32_t)0x000003F0)) == 0); + REG_BLE_WR(BLE_RADIOCNTL1_ADDR, (REG_BLE_RD(BLE_RADIOCNTL1_ADDR) & ~((uint32_t)0x000003F0)) | ((uint32_t)xrfsel << 4)); +} + +__INLINE uint8_t ble_radiocntl1_subversion_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOCNTL1_ADDR); + return ((localVal & ((uint32_t)0x0000000F)) >> 0); +} + +__INLINE void ble_radiocntl1_subversion_setf(uint8_t subversion) +{ + ASSERT_ERR((((uint32_t)subversion << 0) & ~((uint32_t)0x0000000F)) == 0); + REG_BLE_WR(BLE_RADIOCNTL1_ADDR, (REG_BLE_RD(BLE_RADIOCNTL1_ADDR) & ~((uint32_t)0x0000000F)) | ((uint32_t)subversion << 0)); +} + +/** + * @brief RADIOCNTL2 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31:30 LRSYNCCOMPMODE 0x3 + * 29 RXCITERMBYPASS 0 + * 28:24 LRVTBFLUSH 0x8 + * 23:22 PHYMSK 0x0 + * 21:20 LRSYNCERR 0x0 + * 18:16 SYNCERR 0x0 + * 13:00 FREQTABLE_PTR 0x40 + *+ */ +#define BLE_RADIOCNTL2_ADDR BASEBAND_REG_BASE +0x78 //0x50800078 +#define BLE_RADIOCNTL2_OFFSET 0x00000078 +#define BLE_RADIOCNTL2_INDEX 0x0000001E +#define BLE_RADIOCNTL2_RESET 0xC8000040 + +__INLINE uint32_t ble_radiocntl2_get(void) +{ + return REG_BLE_RD(BLE_RADIOCNTL2_ADDR); +} + +__INLINE void ble_radiocntl2_set(uint32_t value) +{ + REG_BLE_WR(BLE_RADIOCNTL2_ADDR, value); +} + +// field definitions +#define BLE_LRSYNCCOMPMODE_MASK ((uint32_t)0xC0000000) +#define BLE_LRSYNCCOMPMODE_LSB 30 +#define BLE_LRSYNCCOMPMODE_WIDTH ((uint32_t)0x00000002) +#define BLE_RXCITERMBYPASS_BIT ((uint32_t)0x20000000) +#define BLE_RXCITERMBYPASS_POS 29 +#define BLE_LRVTBFLUSH_MASK ((uint32_t)0x1F000000) +#define BLE_LRVTBFLUSH_LSB 24 +#define BLE_LRVTBFLUSH_WIDTH ((uint32_t)0x00000005) +#define BLE_PHYMSK_MASK ((uint32_t)0x00C00000) +#define BLE_PHYMSK_LSB 22 +#define BLE_PHYMSK_WIDTH ((uint32_t)0x00000002) +#define BLE_LRSYNCERR_MASK ((uint32_t)0x00300000) +#define BLE_LRSYNCERR_LSB 20 +#define BLE_LRSYNCERR_WIDTH ((uint32_t)0x00000002) +#define BLE_SYNCERR_MASK ((uint32_t)0x00070000) +#define BLE_SYNCERR_LSB 16 +#define BLE_SYNCERR_WIDTH ((uint32_t)0x00000003) +#define BLE_FREQTABLE_PTR_MASK ((uint32_t)0x00003FFF) +#define BLE_FREQTABLE_PTR_LSB 0 +#define BLE_FREQTABLE_PTR_WIDTH ((uint32_t)0x0000000E) + +#define BLE_LRSYNCCOMPMODE_RST 0x3 +#define BLE_RXCITERMBYPASS_RST 0x0 +#define BLE_LRVTBFLUSH_RST 0x8 +#define BLE_PHYMSK_RST 0x0 +#define BLE_LRSYNCERR_RST 0x0 +#define BLE_SYNCERR_RST 0x0 +#define BLE_FREQTABLE_PTR_RST 0x40 + +__INLINE void ble_radiocntl2_pack(uint8_t lrsynccompmode, uint8_t rxcitermbypass, uint8_t lrvtbflush, uint8_t phymsk, uint8_t lrsyncerr, uint8_t syncerr, uint16_t freqtableptr) +{ + ASSERT_ERR((((uint32_t)lrsynccompmode << 30) & ~((uint32_t)0xC0000000)) == 0); + ASSERT_ERR((((uint32_t)rxcitermbypass << 29) & ~((uint32_t)0x20000000)) == 0); + ASSERT_ERR((((uint32_t)lrvtbflush << 24) & ~((uint32_t)0x1F000000)) == 0); + ASSERT_ERR((((uint32_t)phymsk << 22) & ~((uint32_t)0x00C00000)) == 0); + ASSERT_ERR((((uint32_t)lrsyncerr << 20) & ~((uint32_t)0x00300000)) == 0); + ASSERT_ERR((((uint32_t)syncerr << 16) & ~((uint32_t)0x00070000)) == 0); + ASSERT_ERR((((uint32_t)freqtableptr << 0) & ~((uint32_t)0x00003FFF)) == 0); + REG_BLE_WR(BLE_RADIOCNTL2_ADDR, ((uint32_t)lrsynccompmode << 30) | ((uint32_t)rxcitermbypass << 29) | ((uint32_t)lrvtbflush << 24) | ((uint32_t)phymsk << 22) | ((uint32_t)lrsyncerr << 20) | ((uint32_t)syncerr << 16) | ((uint32_t)freqtableptr << 0)); +} + +__INLINE void ble_radiocntl2_unpack(uint8_t* lrsynccompmode, uint8_t* rxcitermbypass, uint8_t* lrvtbflush, uint8_t* phymsk, uint8_t* lrsyncerr, uint8_t* syncerr, uint16_t* freqtableptr) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOCNTL2_ADDR); + + *lrsynccompmode = (localVal & ((uint32_t)0xC0000000)) >> 30; + *rxcitermbypass = (localVal & ((uint32_t)0x20000000)) >> 29; + *lrvtbflush = (localVal & ((uint32_t)0x1F000000)) >> 24; + *phymsk = (localVal & ((uint32_t)0x00C00000)) >> 22; + *lrsyncerr = (localVal & ((uint32_t)0x00300000)) >> 20; + *syncerr = (localVal & ((uint32_t)0x00070000)) >> 16; + *freqtableptr = (localVal & ((uint32_t)0x00003FFF)) >> 0; +} + +__INLINE uint8_t ble_radiocntl2_lrsynccompmode_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOCNTL2_ADDR); + return ((localVal & ((uint32_t)0xC0000000)) >> 30); +} + +__INLINE void ble_radiocntl2_lrsynccompmode_setf(uint8_t lrsynccompmode) +{ + ASSERT_ERR((((uint32_t)lrsynccompmode << 30) & ~((uint32_t)0xC0000000)) == 0); + REG_BLE_WR(BLE_RADIOCNTL2_ADDR, (REG_BLE_RD(BLE_RADIOCNTL2_ADDR) & ~((uint32_t)0xC0000000)) | ((uint32_t)lrsynccompmode << 30)); +} + +__INLINE uint8_t ble_radiocntl2_rxcitermbypass_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOCNTL2_ADDR); + return ((localVal & ((uint32_t)0x20000000)) >> 29); +} + +__INLINE void ble_radiocntl2_rxcitermbypass_setf(uint8_t rxcitermbypass) +{ + ASSERT_ERR((((uint32_t)rxcitermbypass << 29) & ~((uint32_t)0x20000000)) == 0); + REG_BLE_WR(BLE_RADIOCNTL2_ADDR, (REG_BLE_RD(BLE_RADIOCNTL2_ADDR) & ~((uint32_t)0x20000000)) | ((uint32_t)rxcitermbypass << 29)); +} + +__INLINE uint8_t ble_radiocntl2_lrvtbflush_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOCNTL2_ADDR); + return ((localVal & ((uint32_t)0x1F000000)) >> 24); +} + +__INLINE void ble_radiocntl2_lrvtbflush_setf(uint8_t lrvtbflush) +{ + ASSERT_ERR((((uint32_t)lrvtbflush << 24) & ~((uint32_t)0x1F000000)) == 0); + REG_BLE_WR(BLE_RADIOCNTL2_ADDR, (REG_BLE_RD(BLE_RADIOCNTL2_ADDR) & ~((uint32_t)0x1F000000)) | ((uint32_t)lrvtbflush << 24)); +} + +__INLINE uint8_t ble_radiocntl2_phymsk_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOCNTL2_ADDR); + return ((localVal & ((uint32_t)0x00C00000)) >> 22); +} + +__INLINE void ble_radiocntl2_phymsk_setf(uint8_t phymsk) +{ + ASSERT_ERR((((uint32_t)phymsk << 22) & ~((uint32_t)0x00C00000)) == 0); + REG_BLE_WR(BLE_RADIOCNTL2_ADDR, (REG_BLE_RD(BLE_RADIOCNTL2_ADDR) & ~((uint32_t)0x00C00000)) | ((uint32_t)phymsk << 22)); +} + +__INLINE uint8_t ble_radiocntl2_lrsyncerr_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOCNTL2_ADDR); + return ((localVal & ((uint32_t)0x00300000)) >> 20); +} + +__INLINE void ble_radiocntl2_lrsyncerr_setf(uint8_t lrsyncerr) +{ + ASSERT_ERR((((uint32_t)lrsyncerr << 20) & ~((uint32_t)0x00300000)) == 0); + REG_BLE_WR(BLE_RADIOCNTL2_ADDR, (REG_BLE_RD(BLE_RADIOCNTL2_ADDR) & ~((uint32_t)0x00300000)) | ((uint32_t)lrsyncerr << 20)); +} + +__INLINE uint8_t ble_radiocntl2_syncerr_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOCNTL2_ADDR); + return ((localVal & ((uint32_t)0x00070000)) >> 16); +} + +__INLINE void ble_radiocntl2_syncerr_setf(uint8_t syncerr) +{ + ASSERT_ERR((((uint32_t)syncerr << 16) & ~((uint32_t)0x00070000)) == 0); + REG_BLE_WR(BLE_RADIOCNTL2_ADDR, (REG_BLE_RD(BLE_RADIOCNTL2_ADDR) & ~((uint32_t)0x00070000)) | ((uint32_t)syncerr << 16)); +} + +__INLINE uint16_t ble_radiocntl2_freqtable_ptr_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOCNTL2_ADDR); + return ((localVal & ((uint32_t)0x00003FFF)) >> 0); +} + +__INLINE void ble_radiocntl2_freqtable_ptr_setf(uint16_t freqtableptr) +{ + ASSERT_ERR((((uint32_t)freqtableptr << 0) & ~((uint32_t)0x00003FFF)) == 0); + REG_BLE_WR(BLE_RADIOCNTL2_ADDR, (REG_BLE_RD(BLE_RADIOCNTL2_ADDR) & ~((uint32_t)0x00003FFF)) | ((uint32_t)freqtableptr << 0)); +} + +/** + * @brief RADIOCNTL3 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31:30 RXRATE3CFG 0x3 + * 29:28 RXRATE2CFG 0x2 + * 27:26 RXRATE1CFG 0x1 + * 25:24 RXRATE0CFG 0x0 + * 18 RXSYNC_ROUTING 0 + * 17:16 RXVALID_BEH 0x0 + * 15:14 TXRATE3CFG 0x3 + * 13:12 TXRATE2CFG 0x2 + * 11:10 TXRATE1CFG 0x1 + * 09:08 TXRATE0CFG 0x0 + * 01:00 TXVALID_BEH 0x0 + *+ */ +#define BLE_RADIOCNTL3_ADDR BASEBAND_REG_BASE +0x7C //0x5080007C +#define BLE_RADIOCNTL3_OFFSET 0x0000007C +#define BLE_RADIOCNTL3_INDEX 0x0000001F +#define BLE_RADIOCNTL3_RESET 0xE400E400 + +__INLINE uint32_t ble_radiocntl3_get(void) +{ + return REG_BLE_RD(BLE_RADIOCNTL3_ADDR); +} + +__INLINE void ble_radiocntl3_set(uint32_t value) +{ + REG_BLE_WR(BLE_RADIOCNTL3_ADDR, value); +} + +// field definitions +#define BLE_RXRATE3CFG_MASK ((uint32_t)0xC0000000) +#define BLE_RXRATE3CFG_LSB 30 +#define BLE_RXRATE3CFG_WIDTH ((uint32_t)0x00000002) +#define BLE_RXRATE2CFG_MASK ((uint32_t)0x30000000) +#define BLE_RXRATE2CFG_LSB 28 +#define BLE_RXRATE2CFG_WIDTH ((uint32_t)0x00000002) +#define BLE_RXRATE1CFG_MASK ((uint32_t)0x0C000000) +#define BLE_RXRATE1CFG_LSB 26 +#define BLE_RXRATE1CFG_WIDTH ((uint32_t)0x00000002) +#define BLE_RXRATE0CFG_MASK ((uint32_t)0x03000000) +#define BLE_RXRATE0CFG_LSB 24 +#define BLE_RXRATE0CFG_WIDTH ((uint32_t)0x00000002) +#define BLE_RXSYNC_ROUTING_BIT ((uint32_t)0x00040000) +#define BLE_RXSYNC_ROUTING_POS 18 +#define BLE_RXVALID_BEH_MASK ((uint32_t)0x00030000) +#define BLE_RXVALID_BEH_LSB 16 +#define BLE_RXVALID_BEH_WIDTH ((uint32_t)0x00000002) +#define BLE_TXRATE3CFG_MASK ((uint32_t)0x0000C000) +#define BLE_TXRATE3CFG_LSB 14 +#define BLE_TXRATE3CFG_WIDTH ((uint32_t)0x00000002) +#define BLE_TXRATE2CFG_MASK ((uint32_t)0x00003000) +#define BLE_TXRATE2CFG_LSB 12 +#define BLE_TXRATE2CFG_WIDTH ((uint32_t)0x00000002) +#define BLE_TXRATE1CFG_MASK ((uint32_t)0x00000C00) +#define BLE_TXRATE1CFG_LSB 10 +#define BLE_TXRATE1CFG_WIDTH ((uint32_t)0x00000002) +#define BLE_TXRATE0CFG_MASK ((uint32_t)0x00000300) +#define BLE_TXRATE0CFG_LSB 8 +#define BLE_TXRATE0CFG_WIDTH ((uint32_t)0x00000002) +#define BLE_TXVALID_BEH_MASK ((uint32_t)0x00000003) +#define BLE_TXVALID_BEH_LSB 0 +#define BLE_TXVALID_BEH_WIDTH ((uint32_t)0x00000002) + +#define BLE_RXRATE3CFG_RST 0x3 +#define BLE_RXRATE2CFG_RST 0x2 +#define BLE_RXRATE1CFG_RST 0x1 +#define BLE_RXRATE0CFG_RST 0x0 +#define BLE_RXSYNC_ROUTING_RST 0x0 +#define BLE_RXVALID_BEH_RST 0x0 +#define BLE_TXRATE3CFG_RST 0x3 +#define BLE_TXRATE2CFG_RST 0x2 +#define BLE_TXRATE1CFG_RST 0x1 +#define BLE_TXRATE0CFG_RST 0x0 +#define BLE_TXVALID_BEH_RST 0x0 + +__INLINE void ble_radiocntl3_pack(uint8_t rxrate3cfg, uint8_t rxrate2cfg, uint8_t rxrate1cfg, uint8_t rxrate0cfg, uint8_t rxsyncrouting, uint8_t rxvalidbeh, uint8_t txrate3cfg, uint8_t txrate2cfg, uint8_t txrate1cfg, uint8_t txrate0cfg, uint8_t txvalidbeh) +{ + ASSERT_ERR((((uint32_t)rxrate3cfg << 30) & ~((uint32_t)0xC0000000)) == 0); + ASSERT_ERR((((uint32_t)rxrate2cfg << 28) & ~((uint32_t)0x30000000)) == 0); + ASSERT_ERR((((uint32_t)rxrate1cfg << 26) & ~((uint32_t)0x0C000000)) == 0); + ASSERT_ERR((((uint32_t)rxrate0cfg << 24) & ~((uint32_t)0x03000000)) == 0); + ASSERT_ERR((((uint32_t)rxsyncrouting << 18) & ~((uint32_t)0x00040000)) == 0); + ASSERT_ERR((((uint32_t)rxvalidbeh << 16) & ~((uint32_t)0x00030000)) == 0); + ASSERT_ERR((((uint32_t)txrate3cfg << 14) & ~((uint32_t)0x0000C000)) == 0); + ASSERT_ERR((((uint32_t)txrate2cfg << 12) & ~((uint32_t)0x00003000)) == 0); + ASSERT_ERR((((uint32_t)txrate1cfg << 10) & ~((uint32_t)0x00000C00)) == 0); + ASSERT_ERR((((uint32_t)txrate0cfg << 8) & ~((uint32_t)0x00000300)) == 0); + ASSERT_ERR((((uint32_t)txvalidbeh << 0) & ~((uint32_t)0x00000003)) == 0); + REG_BLE_WR(BLE_RADIOCNTL3_ADDR, ((uint32_t)rxrate3cfg << 30) | ((uint32_t)rxrate2cfg << 28) | ((uint32_t)rxrate1cfg << 26) | ((uint32_t)rxrate0cfg << 24) | ((uint32_t)rxsyncrouting << 18) | ((uint32_t)rxvalidbeh << 16) | ((uint32_t)txrate3cfg << 14) | ((uint32_t)txrate2cfg << 12) | ((uint32_t)txrate1cfg << 10) | ((uint32_t)txrate0cfg << 8) | ((uint32_t)txvalidbeh << 0)); +} + +__INLINE void ble_radiocntl3_unpack(uint8_t* rxrate3cfg, uint8_t* rxrate2cfg, uint8_t* rxrate1cfg, uint8_t* rxrate0cfg, uint8_t* rxsyncrouting, uint8_t* rxvalidbeh, uint8_t* txrate3cfg, uint8_t* txrate2cfg, uint8_t* txrate1cfg, uint8_t* txrate0cfg, uint8_t* txvalidbeh) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOCNTL3_ADDR); + + *rxrate3cfg = (localVal & ((uint32_t)0xC0000000)) >> 30; + *rxrate2cfg = (localVal & ((uint32_t)0x30000000)) >> 28; + *rxrate1cfg = (localVal & ((uint32_t)0x0C000000)) >> 26; + *rxrate0cfg = (localVal & ((uint32_t)0x03000000)) >> 24; + *rxsyncrouting = (localVal & ((uint32_t)0x00040000)) >> 18; + *rxvalidbeh = (localVal & ((uint32_t)0x00030000)) >> 16; + *txrate3cfg = (localVal & ((uint32_t)0x0000C000)) >> 14; + *txrate2cfg = (localVal & ((uint32_t)0x00003000)) >> 12; + *txrate1cfg = (localVal & ((uint32_t)0x00000C00)) >> 10; + *txrate0cfg = (localVal & ((uint32_t)0x00000300)) >> 8; + *txvalidbeh = (localVal & ((uint32_t)0x00000003)) >> 0; +} + +__INLINE uint8_t ble_radiocntl3_rxrate3cfg_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOCNTL3_ADDR); + return ((localVal & ((uint32_t)0xC0000000)) >> 30); +} + +__INLINE void ble_radiocntl3_rxrate3cfg_setf(uint8_t rxrate3cfg) +{ + ASSERT_ERR((((uint32_t)rxrate3cfg << 30) & ~((uint32_t)0xC0000000)) == 0); + REG_BLE_WR(BLE_RADIOCNTL3_ADDR, (REG_BLE_RD(BLE_RADIOCNTL3_ADDR) & ~((uint32_t)0xC0000000)) | ((uint32_t)rxrate3cfg << 30)); +} + +__INLINE uint8_t ble_radiocntl3_rxrate2cfg_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOCNTL3_ADDR); + return ((localVal & ((uint32_t)0x30000000)) >> 28); +} + +__INLINE void ble_radiocntl3_rxrate2cfg_setf(uint8_t rxrate2cfg) +{ + ASSERT_ERR((((uint32_t)rxrate2cfg << 28) & ~((uint32_t)0x30000000)) == 0); + REG_BLE_WR(BLE_RADIOCNTL3_ADDR, (REG_BLE_RD(BLE_RADIOCNTL3_ADDR) & ~((uint32_t)0x30000000)) | ((uint32_t)rxrate2cfg << 28)); +} + +__INLINE uint8_t ble_radiocntl3_rxrate1cfg_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOCNTL3_ADDR); + return ((localVal & ((uint32_t)0x0C000000)) >> 26); +} + +__INLINE void ble_radiocntl3_rxrate1cfg_setf(uint8_t rxrate1cfg) +{ + ASSERT_ERR((((uint32_t)rxrate1cfg << 26) & ~((uint32_t)0x0C000000)) == 0); + REG_BLE_WR(BLE_RADIOCNTL3_ADDR, (REG_BLE_RD(BLE_RADIOCNTL3_ADDR) & ~((uint32_t)0x0C000000)) | ((uint32_t)rxrate1cfg << 26)); +} + +__INLINE uint8_t ble_radiocntl3_rxrate0cfg_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOCNTL3_ADDR); + return ((localVal & ((uint32_t)0x03000000)) >> 24); +} + +__INLINE void ble_radiocntl3_rxrate0cfg_setf(uint8_t rxrate0cfg) +{ + ASSERT_ERR((((uint32_t)rxrate0cfg << 24) & ~((uint32_t)0x03000000)) == 0); + REG_BLE_WR(BLE_RADIOCNTL3_ADDR, (REG_BLE_RD(BLE_RADIOCNTL3_ADDR) & ~((uint32_t)0x03000000)) | ((uint32_t)rxrate0cfg << 24)); +} + +__INLINE uint8_t ble_radiocntl3_rxsync_routing_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOCNTL3_ADDR); + return ((localVal & ((uint32_t)0x00040000)) >> 18); +} + +__INLINE void ble_radiocntl3_rxsync_routing_setf(uint8_t rxsyncrouting) +{ + ASSERT_ERR((((uint32_t)rxsyncrouting << 18) & ~((uint32_t)0x00040000)) == 0); + REG_BLE_WR(BLE_RADIOCNTL3_ADDR, (REG_BLE_RD(BLE_RADIOCNTL3_ADDR) & ~((uint32_t)0x00040000)) | ((uint32_t)rxsyncrouting << 18)); +} + +__INLINE uint8_t ble_radiocntl3_rxvalid_beh_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOCNTL3_ADDR); + return ((localVal & ((uint32_t)0x00030000)) >> 16); +} + +__INLINE void ble_radiocntl3_rxvalid_beh_setf(uint8_t rxvalidbeh) +{ + ASSERT_ERR((((uint32_t)rxvalidbeh << 16) & ~((uint32_t)0x00030000)) == 0); + REG_BLE_WR(BLE_RADIOCNTL3_ADDR, (REG_BLE_RD(BLE_RADIOCNTL3_ADDR) & ~((uint32_t)0x00030000)) | ((uint32_t)rxvalidbeh << 16)); +} + +__INLINE uint8_t ble_radiocntl3_txrate3cfg_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOCNTL3_ADDR); + return ((localVal & ((uint32_t)0x0000C000)) >> 14); +} + +__INLINE void ble_radiocntl3_txrate3cfg_setf(uint8_t txrate3cfg) +{ + ASSERT_ERR((((uint32_t)txrate3cfg << 14) & ~((uint32_t)0x0000C000)) == 0); + REG_BLE_WR(BLE_RADIOCNTL3_ADDR, (REG_BLE_RD(BLE_RADIOCNTL3_ADDR) & ~((uint32_t)0x0000C000)) | ((uint32_t)txrate3cfg << 14)); +} + +__INLINE uint8_t ble_radiocntl3_txrate2cfg_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOCNTL3_ADDR); + return ((localVal & ((uint32_t)0x00003000)) >> 12); +} + +__INLINE void ble_radiocntl3_txrate2cfg_setf(uint8_t txrate2cfg) +{ + ASSERT_ERR((((uint32_t)txrate2cfg << 12) & ~((uint32_t)0x00003000)) == 0); + REG_BLE_WR(BLE_RADIOCNTL3_ADDR, (REG_BLE_RD(BLE_RADIOCNTL3_ADDR) & ~((uint32_t)0x00003000)) | ((uint32_t)txrate2cfg << 12)); +} + +__INLINE uint8_t ble_radiocntl3_txrate1cfg_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOCNTL3_ADDR); + return ((localVal & ((uint32_t)0x00000C00)) >> 10); +} + +__INLINE void ble_radiocntl3_txrate1cfg_setf(uint8_t txrate1cfg) +{ + ASSERT_ERR((((uint32_t)txrate1cfg << 10) & ~((uint32_t)0x00000C00)) == 0); + REG_BLE_WR(BLE_RADIOCNTL3_ADDR, (REG_BLE_RD(BLE_RADIOCNTL3_ADDR) & ~((uint32_t)0x00000C00)) | ((uint32_t)txrate1cfg << 10)); +} + +__INLINE uint8_t ble_radiocntl3_txrate0cfg_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOCNTL3_ADDR); + return ((localVal & ((uint32_t)0x00000300)) >> 8); +} + +__INLINE void ble_radiocntl3_txrate0cfg_setf(uint8_t txrate0cfg) +{ + ASSERT_ERR((((uint32_t)txrate0cfg << 8) & ~((uint32_t)0x00000300)) == 0); + REG_BLE_WR(BLE_RADIOCNTL3_ADDR, (REG_BLE_RD(BLE_RADIOCNTL3_ADDR) & ~((uint32_t)0x00000300)) | ((uint32_t)txrate0cfg << 8)); +} + +__INLINE uint8_t ble_radiocntl3_txvalid_beh_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOCNTL3_ADDR); + return ((localVal & ((uint32_t)0x00000003)) >> 0); +} + +__INLINE void ble_radiocntl3_txvalid_beh_setf(uint8_t txvalidbeh) +{ + ASSERT_ERR((((uint32_t)txvalidbeh << 0) & ~((uint32_t)0x00000003)) == 0); + REG_BLE_WR(BLE_RADIOCNTL3_ADDR, (REG_BLE_RD(BLE_RADIOCNTL3_ADDR) & ~((uint32_t)0x00000003)) | ((uint32_t)txvalidbeh << 0)); +} + +/** + * @brief RADIOPWRUPDN0 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31:24 SYNC_POSITION0 0x0 + * 23:16 RXPWRUP0 0x0 + * 14:08 TXPWRDN0 0x0 + * 07:00 TXPWRUP0 0x0 + *+ */ +#define BLE_RADIOPWRUPDN0_ADDR BASEBAND_REG_BASE +0x80 //0x50800080 +#define BLE_RADIOPWRUPDN0_OFFSET 0x00000080 +#define BLE_RADIOPWRUPDN0_INDEX 0x00000020 +#define BLE_RADIOPWRUPDN0_RESET 0x00000000 + +__INLINE uint32_t ble_radiopwrupdn0_get(void) +{ + return REG_BLE_RD(BLE_RADIOPWRUPDN0_ADDR); +} + +__INLINE void ble_radiopwrupdn0_set(uint32_t value) +{ + REG_BLE_WR(BLE_RADIOPWRUPDN0_ADDR, value); +} + +// field definitions +#define BLE_SYNC_POSITION0_MASK ((uint32_t)0xFF000000) +#define BLE_SYNC_POSITION0_LSB 24 +#define BLE_SYNC_POSITION0_WIDTH ((uint32_t)0x00000008) +#define BLE_RXPWRUP0_MASK ((uint32_t)0x00FF0000) +#define BLE_RXPWRUP0_LSB 16 +#define BLE_RXPWRUP0_WIDTH ((uint32_t)0x00000008) +#define BLE_TXPWRDN0_MASK ((uint32_t)0x00007F00) +#define BLE_TXPWRDN0_LSB 8 +#define BLE_TXPWRDN0_WIDTH ((uint32_t)0x00000007) +#define BLE_TXPWRUP0_MASK ((uint32_t)0x000000FF) +#define BLE_TXPWRUP0_LSB 0 +#define BLE_TXPWRUP0_WIDTH ((uint32_t)0x00000008) + +#define BLE_SYNC_POSITION0_RST 0x0 +#define BLE_RXPWRUP0_RST 0x0 +#define BLE_TXPWRDN0_RST 0x0 +#define BLE_TXPWRUP0_RST 0x0 + +__INLINE void ble_radiopwrupdn0_pack(uint8_t syncposition0, uint8_t rxpwrup0, uint8_t txpwrdn0, uint8_t txpwrup0) +{ + ASSERT_ERR((((uint32_t)syncposition0 << 24) & ~((uint32_t)0xFF000000)) == 0); + ASSERT_ERR((((uint32_t)rxpwrup0 << 16) & ~((uint32_t)0x00FF0000)) == 0); + ASSERT_ERR((((uint32_t)txpwrdn0 << 8) & ~((uint32_t)0x00007F00)) == 0); + ASSERT_ERR((((uint32_t)txpwrup0 << 0) & ~((uint32_t)0x000000FF)) == 0); + REG_BLE_WR(BLE_RADIOPWRUPDN0_ADDR, ((uint32_t)syncposition0 << 24) | ((uint32_t)rxpwrup0 << 16) | ((uint32_t)txpwrdn0 << 8) | ((uint32_t)txpwrup0 << 0)); +} + +__INLINE void ble_radiopwrupdn0_unpack(uint8_t* syncposition0, uint8_t* rxpwrup0, uint8_t* txpwrdn0, uint8_t* txpwrup0) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOPWRUPDN0_ADDR); + + *syncposition0 = (localVal & ((uint32_t)0xFF000000)) >> 24; + *rxpwrup0 = (localVal & ((uint32_t)0x00FF0000)) >> 16; + *txpwrdn0 = (localVal & ((uint32_t)0x00007F00)) >> 8; + *txpwrup0 = (localVal & ((uint32_t)0x000000FF)) >> 0; +} + +__INLINE uint8_t ble_radiopwrupdn0_sync_position0_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOPWRUPDN0_ADDR); + return ((localVal & ((uint32_t)0xFF000000)) >> 24); +} + +__INLINE void ble_radiopwrupdn0_sync_position0_setf(uint8_t syncposition0) +{ + ASSERT_ERR((((uint32_t)syncposition0 << 24) & ~((uint32_t)0xFF000000)) == 0); + REG_BLE_WR(BLE_RADIOPWRUPDN0_ADDR, (REG_BLE_RD(BLE_RADIOPWRUPDN0_ADDR) & ~((uint32_t)0xFF000000)) | ((uint32_t)syncposition0 << 24)); +} + +__INLINE uint8_t ble_radiopwrupdn0_rxpwrup0_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOPWRUPDN0_ADDR); + return ((localVal & ((uint32_t)0x00FF0000)) >> 16); +} + +__INLINE void ble_radiopwrupdn0_rxpwrup0_setf(uint8_t rxpwrup0) +{ + ASSERT_ERR((((uint32_t)rxpwrup0 << 16) & ~((uint32_t)0x00FF0000)) == 0); + REG_BLE_WR(BLE_RADIOPWRUPDN0_ADDR, (REG_BLE_RD(BLE_RADIOPWRUPDN0_ADDR) & ~((uint32_t)0x00FF0000)) | ((uint32_t)rxpwrup0 << 16)); +} + +__INLINE uint8_t ble_radiopwrupdn0_txpwrdn0_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOPWRUPDN0_ADDR); + return ((localVal & ((uint32_t)0x00007F00)) >> 8); +} + +__INLINE void ble_radiopwrupdn0_txpwrdn0_setf(uint8_t txpwrdn0) +{ + ASSERT_ERR((((uint32_t)txpwrdn0 << 8) & ~((uint32_t)0x00007F00)) == 0); + REG_BLE_WR(BLE_RADIOPWRUPDN0_ADDR, (REG_BLE_RD(BLE_RADIOPWRUPDN0_ADDR) & ~((uint32_t)0x00007F00)) | ((uint32_t)txpwrdn0 << 8)); +} + +__INLINE uint8_t ble_radiopwrupdn0_txpwrup0_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOPWRUPDN0_ADDR); + return ((localVal & ((uint32_t)0x000000FF)) >> 0); +} + +__INLINE void ble_radiopwrupdn0_txpwrup0_setf(uint8_t txpwrup0) +{ + ASSERT_ERR((((uint32_t)txpwrup0 << 0) & ~((uint32_t)0x000000FF)) == 0); + REG_BLE_WR(BLE_RADIOPWRUPDN0_ADDR, (REG_BLE_RD(BLE_RADIOPWRUPDN0_ADDR) & ~((uint32_t)0x000000FF)) | ((uint32_t)txpwrup0 << 0)); +} + +/** + * @brief RADIOPWRUPDN1 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31:24 SYNC_POSITION1 0x0 + * 23:16 RXPWRUP1 0x0 + * 14:08 TXPWRDN1 0x0 + * 07:00 TXPWRUP1 0x0 + *+ */ +#define BLE_RADIOPWRUPDN1_ADDR BASEBAND_REG_BASE +0x84 // 0x50800084 +#define BLE_RADIOPWRUPDN1_OFFSET 0x00000084 +#define BLE_RADIOPWRUPDN1_INDEX 0x00000021 +#define BLE_RADIOPWRUPDN1_RESET 0x00000000 + +__INLINE uint32_t ble_radiopwrupdn1_get(void) +{ + return REG_BLE_RD(BLE_RADIOPWRUPDN1_ADDR); +} + +__INLINE void ble_radiopwrupdn1_set(uint32_t value) +{ + REG_BLE_WR(BLE_RADIOPWRUPDN1_ADDR, value); +} + +// field definitions +#define BLE_SYNC_POSITION1_MASK ((uint32_t)0xFF000000) +#define BLE_SYNC_POSITION1_LSB 24 +#define BLE_SYNC_POSITION1_WIDTH ((uint32_t)0x00000008) +#define BLE_RXPWRUP1_MASK ((uint32_t)0x00FF0000) +#define BLE_RXPWRUP1_LSB 16 +#define BLE_RXPWRUP1_WIDTH ((uint32_t)0x00000008) +#define BLE_TXPWRDN1_MASK ((uint32_t)0x00007F00) +#define BLE_TXPWRDN1_LSB 8 +#define BLE_TXPWRDN1_WIDTH ((uint32_t)0x00000007) +#define BLE_TXPWRUP1_MASK ((uint32_t)0x000000FF) +#define BLE_TXPWRUP1_LSB 0 +#define BLE_TXPWRUP1_WIDTH ((uint32_t)0x00000008) + +#define BLE_SYNC_POSITION1_RST 0x0 +#define BLE_RXPWRUP1_RST 0x0 +#define BLE_TXPWRDN1_RST 0x0 +#define BLE_TXPWRUP1_RST 0x0 + +__INLINE void ble_radiopwrupdn1_pack(uint8_t syncposition1, uint8_t rxpwrup1, uint8_t txpwrdn1, uint8_t txpwrup1) +{ + ASSERT_ERR((((uint32_t)syncposition1 << 24) & ~((uint32_t)0xFF000000)) == 0); + ASSERT_ERR((((uint32_t)rxpwrup1 << 16) & ~((uint32_t)0x00FF0000)) == 0); + ASSERT_ERR((((uint32_t)txpwrdn1 << 8) & ~((uint32_t)0x00007F00)) == 0); + ASSERT_ERR((((uint32_t)txpwrup1 << 0) & ~((uint32_t)0x000000FF)) == 0); + REG_BLE_WR(BLE_RADIOPWRUPDN1_ADDR, ((uint32_t)syncposition1 << 24) | ((uint32_t)rxpwrup1 << 16) | ((uint32_t)txpwrdn1 << 8) | ((uint32_t)txpwrup1 << 0)); +} + +__INLINE void ble_radiopwrupdn1_unpack(uint8_t* syncposition1, uint8_t* rxpwrup1, uint8_t* txpwrdn1, uint8_t* txpwrup1) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOPWRUPDN1_ADDR); + + *syncposition1 = (localVal & ((uint32_t)0xFF000000)) >> 24; + *rxpwrup1 = (localVal & ((uint32_t)0x00FF0000)) >> 16; + *txpwrdn1 = (localVal & ((uint32_t)0x00007F00)) >> 8; + *txpwrup1 = (localVal & ((uint32_t)0x000000FF)) >> 0; +} + +__INLINE uint8_t ble_radiopwrupdn1_sync_position1_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOPWRUPDN1_ADDR); + return ((localVal & ((uint32_t)0xFF000000)) >> 24); +} + +__INLINE void ble_radiopwrupdn1_sync_position1_setf(uint8_t syncposition1) +{ + ASSERT_ERR((((uint32_t)syncposition1 << 24) & ~((uint32_t)0xFF000000)) == 0); + REG_BLE_WR(BLE_RADIOPWRUPDN1_ADDR, (REG_BLE_RD(BLE_RADIOPWRUPDN1_ADDR) & ~((uint32_t)0xFF000000)) | ((uint32_t)syncposition1 << 24)); +} + +__INLINE uint8_t ble_radiopwrupdn1_rxpwrup1_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOPWRUPDN1_ADDR); + return ((localVal & ((uint32_t)0x00FF0000)) >> 16); +} + +__INLINE void ble_radiopwrupdn1_rxpwrup1_setf(uint8_t rxpwrup1) +{ + ASSERT_ERR((((uint32_t)rxpwrup1 << 16) & ~((uint32_t)0x00FF0000)) == 0); + REG_BLE_WR(BLE_RADIOPWRUPDN1_ADDR, (REG_BLE_RD(BLE_RADIOPWRUPDN1_ADDR) & ~((uint32_t)0x00FF0000)) | ((uint32_t)rxpwrup1 << 16)); +} + +__INLINE uint8_t ble_radiopwrupdn1_txpwrdn1_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOPWRUPDN1_ADDR); + return ((localVal & ((uint32_t)0x00007F00)) >> 8); +} + +__INLINE void ble_radiopwrupdn1_txpwrdn1_setf(uint8_t txpwrdn1) +{ + ASSERT_ERR((((uint32_t)txpwrdn1 << 8) & ~((uint32_t)0x00007F00)) == 0); + REG_BLE_WR(BLE_RADIOPWRUPDN1_ADDR, (REG_BLE_RD(BLE_RADIOPWRUPDN1_ADDR) & ~((uint32_t)0x00007F00)) | ((uint32_t)txpwrdn1 << 8)); +} + +__INLINE uint8_t ble_radiopwrupdn1_txpwrup1_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOPWRUPDN1_ADDR); + return ((localVal & ((uint32_t)0x000000FF)) >> 0); +} + +__INLINE void ble_radiopwrupdn1_txpwrup1_setf(uint8_t txpwrup1) +{ + ASSERT_ERR((((uint32_t)txpwrup1 << 0) & ~((uint32_t)0x000000FF)) == 0); + REG_BLE_WR(BLE_RADIOPWRUPDN1_ADDR, (REG_BLE_RD(BLE_RADIOPWRUPDN1_ADDR) & ~((uint32_t)0x000000FF)) | ((uint32_t)txpwrup1 << 0)); +} + +/** + * @brief RADIOPWRUPDN2 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31:24 SYNC_POSITION2 0x0 + * 23:16 RXPWRUP2 0x0 + * 14:08 TXPWRDN2 0x0 + * 07:00 TXPWRUP2 0x0 + *+ */ +#define BLE_RADIOPWRUPDN2_ADDR BASEBAND_REG_BASE +0x88 // 0x50800088 +#define BLE_RADIOPWRUPDN2_OFFSET 0x00000088 +#define BLE_RADIOPWRUPDN2_INDEX 0x00000022 +#define BLE_RADIOPWRUPDN2_RESET 0x00000000 + +__INLINE uint32_t ble_radiopwrupdn2_get(void) +{ + return REG_BLE_RD(BLE_RADIOPWRUPDN2_ADDR); +} + +__INLINE void ble_radiopwrupdn2_set(uint32_t value) +{ + REG_BLE_WR(BLE_RADIOPWRUPDN2_ADDR, value); +} + +// field definitions +#define BLE_SYNC_POSITION2_MASK ((uint32_t)0xFF000000) +#define BLE_SYNC_POSITION2_LSB 24 +#define BLE_SYNC_POSITION2_WIDTH ((uint32_t)0x00000008) +#define BLE_RXPWRUP2_MASK ((uint32_t)0x00FF0000) +#define BLE_RXPWRUP2_LSB 16 +#define BLE_RXPWRUP2_WIDTH ((uint32_t)0x00000008) +#define BLE_TXPWRDN2_MASK ((uint32_t)0x00007F00) +#define BLE_TXPWRDN2_LSB 8 +#define BLE_TXPWRDN2_WIDTH ((uint32_t)0x00000007) +#define BLE_TXPWRUP2_MASK ((uint32_t)0x000000FF) +#define BLE_TXPWRUP2_LSB 0 +#define BLE_TXPWRUP2_WIDTH ((uint32_t)0x00000008) + +#define BLE_SYNC_POSITION2_RST 0x0 +#define BLE_RXPWRUP2_RST 0x0 +#define BLE_TXPWRDN2_RST 0x0 +#define BLE_TXPWRUP2_RST 0x0 + +__INLINE void ble_radiopwrupdn2_pack(uint8_t syncposition2, uint8_t rxpwrup2, uint8_t txpwrdn2, uint8_t txpwrup2) +{ + ASSERT_ERR((((uint32_t)syncposition2 << 24) & ~((uint32_t)0xFF000000)) == 0); + ASSERT_ERR((((uint32_t)rxpwrup2 << 16) & ~((uint32_t)0x00FF0000)) == 0); + ASSERT_ERR((((uint32_t)txpwrdn2 << 8) & ~((uint32_t)0x00007F00)) == 0); + ASSERT_ERR((((uint32_t)txpwrup2 << 0) & ~((uint32_t)0x000000FF)) == 0); + REG_BLE_WR(BLE_RADIOPWRUPDN2_ADDR, ((uint32_t)syncposition2 << 24) | ((uint32_t)rxpwrup2 << 16) | ((uint32_t)txpwrdn2 << 8) | ((uint32_t)txpwrup2 << 0)); +} + +__INLINE void ble_radiopwrupdn2_unpack(uint8_t* syncposition2, uint8_t* rxpwrup2, uint8_t* txpwrdn2, uint8_t* txpwrup2) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOPWRUPDN2_ADDR); + + *syncposition2 = (localVal & ((uint32_t)0xFF000000)) >> 24; + *rxpwrup2 = (localVal & ((uint32_t)0x00FF0000)) >> 16; + *txpwrdn2 = (localVal & ((uint32_t)0x00007F00)) >> 8; + *txpwrup2 = (localVal & ((uint32_t)0x000000FF)) >> 0; +} + +__INLINE uint8_t ble_radiopwrupdn2_sync_position2_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOPWRUPDN2_ADDR); + return ((localVal & ((uint32_t)0xFF000000)) >> 24); +} + +__INLINE void ble_radiopwrupdn2_sync_position2_setf(uint8_t syncposition2) +{ + ASSERT_ERR((((uint32_t)syncposition2 << 24) & ~((uint32_t)0xFF000000)) == 0); + REG_BLE_WR(BLE_RADIOPWRUPDN2_ADDR, (REG_BLE_RD(BLE_RADIOPWRUPDN2_ADDR) & ~((uint32_t)0xFF000000)) | ((uint32_t)syncposition2 << 24)); +} + +__INLINE uint8_t ble_radiopwrupdn2_rxpwrup2_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOPWRUPDN2_ADDR); + return ((localVal & ((uint32_t)0x00FF0000)) >> 16); +} + +__INLINE void ble_radiopwrupdn2_rxpwrup2_setf(uint8_t rxpwrup2) +{ + ASSERT_ERR((((uint32_t)rxpwrup2 << 16) & ~((uint32_t)0x00FF0000)) == 0); + REG_BLE_WR(BLE_RADIOPWRUPDN2_ADDR, (REG_BLE_RD(BLE_RADIOPWRUPDN2_ADDR) & ~((uint32_t)0x00FF0000)) | ((uint32_t)rxpwrup2 << 16)); +} + +__INLINE uint8_t ble_radiopwrupdn2_txpwrdn2_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOPWRUPDN2_ADDR); + return ((localVal & ((uint32_t)0x00007F00)) >> 8); +} + +__INLINE void ble_radiopwrupdn2_txpwrdn2_setf(uint8_t txpwrdn2) +{ + ASSERT_ERR((((uint32_t)txpwrdn2 << 8) & ~((uint32_t)0x00007F00)) == 0); + REG_BLE_WR(BLE_RADIOPWRUPDN2_ADDR, (REG_BLE_RD(BLE_RADIOPWRUPDN2_ADDR) & ~((uint32_t)0x00007F00)) | ((uint32_t)txpwrdn2 << 8)); +} + +__INLINE uint8_t ble_radiopwrupdn2_txpwrup2_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOPWRUPDN2_ADDR); + return ((localVal & ((uint32_t)0x000000FF)) >> 0); +} + +__INLINE void ble_radiopwrupdn2_txpwrup2_setf(uint8_t txpwrup2) +{ + ASSERT_ERR((((uint32_t)txpwrup2 << 0) & ~((uint32_t)0x000000FF)) == 0); + REG_BLE_WR(BLE_RADIOPWRUPDN2_ADDR, (REG_BLE_RD(BLE_RADIOPWRUPDN2_ADDR) & ~((uint32_t)0x000000FF)) | ((uint32_t)txpwrup2 << 0)); +} + +/** + * @brief RADIOPWRUPDN3 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 14:08 TXPWRDN3 0x0 + * 07:00 TXPWRUP3 0x0 + *+ */ +#define BLE_RADIOPWRUPDN3_ADDR BASEBAND_REG_BASE +0x8C //0x5080008C +#define BLE_RADIOPWRUPDN3_OFFSET 0x0000008C +#define BLE_RADIOPWRUPDN3_INDEX 0x00000023 +#define BLE_RADIOPWRUPDN3_RESET 0x00000000 + +__INLINE uint32_t ble_radiopwrupdn3_get(void) +{ + return REG_BLE_RD(BLE_RADIOPWRUPDN3_ADDR); +} + +__INLINE void ble_radiopwrupdn3_set(uint32_t value) +{ + REG_BLE_WR(BLE_RADIOPWRUPDN3_ADDR, value); +} + +// field definitions +#define BLE_TXPWRDN3_MASK ((uint32_t)0x00007F00) +#define BLE_TXPWRDN3_LSB 8 +#define BLE_TXPWRDN3_WIDTH ((uint32_t)0x00000007) +#define BLE_TXPWRUP3_MASK ((uint32_t)0x000000FF) +#define BLE_TXPWRUP3_LSB 0 +#define BLE_TXPWRUP3_WIDTH ((uint32_t)0x00000008) + +#define BLE_TXPWRDN3_RST 0x0 +#define BLE_TXPWRUP3_RST 0x0 + +__INLINE void ble_radiopwrupdn3_pack(uint8_t txpwrdn3, uint8_t txpwrup3) +{ + ASSERT_ERR((((uint32_t)txpwrdn3 << 8) & ~((uint32_t)0x00007F00)) == 0); + ASSERT_ERR((((uint32_t)txpwrup3 << 0) & ~((uint32_t)0x000000FF)) == 0); + REG_BLE_WR(BLE_RADIOPWRUPDN3_ADDR, ((uint32_t)txpwrdn3 << 8) | ((uint32_t)txpwrup3 << 0)); +} + +__INLINE void ble_radiopwrupdn3_unpack(uint8_t* txpwrdn3, uint8_t* txpwrup3) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOPWRUPDN3_ADDR); + + *txpwrdn3 = (localVal & ((uint32_t)0x00007F00)) >> 8; + *txpwrup3 = (localVal & ((uint32_t)0x000000FF)) >> 0; +} + +__INLINE uint8_t ble_radiopwrupdn3_txpwrdn3_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOPWRUPDN3_ADDR); + return ((localVal & ((uint32_t)0x00007F00)) >> 8); +} + +__INLINE void ble_radiopwrupdn3_txpwrdn3_setf(uint8_t txpwrdn3) +{ + ASSERT_ERR((((uint32_t)txpwrdn3 << 8) & ~((uint32_t)0x00007F00)) == 0); + REG_BLE_WR(BLE_RADIOPWRUPDN3_ADDR, (REG_BLE_RD(BLE_RADIOPWRUPDN3_ADDR) & ~((uint32_t)0x00007F00)) | ((uint32_t)txpwrdn3 << 8)); +} + +__INLINE uint8_t ble_radiopwrupdn3_txpwrup3_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOPWRUPDN3_ADDR); + return ((localVal & ((uint32_t)0x000000FF)) >> 0); +} + +__INLINE void ble_radiopwrupdn3_txpwrup3_setf(uint8_t txpwrup3) +{ + ASSERT_ERR((((uint32_t)txpwrup3 << 0) & ~((uint32_t)0x000000FF)) == 0); + REG_BLE_WR(BLE_RADIOPWRUPDN3_ADDR, (REG_BLE_RD(BLE_RADIOPWRUPDN3_ADDR) & ~((uint32_t)0x000000FF)) | ((uint32_t)txpwrup3 << 0)); +} + +/** + * @brief RADIOTXRXTIM0 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 22:16 RFRXTMDA0 0x0 + * 14:08 RXPATHDLY0 0x0 + * 06:00 TXPATHDLY0 0x0 + *+ */ +#define BLE_RADIOTXRXTIM0_ADDR BASEBAND_REG_BASE +0x90 //0x50800090 +#define BLE_RADIOTXRXTIM0_OFFSET 0x00000090 +#define BLE_RADIOTXRXTIM0_INDEX 0x00000024 +#define BLE_RADIOTXRXTIM0_RESET 0x00000000 + +__INLINE uint32_t ble_radiotxrxtim0_get(void) +{ + return REG_BLE_RD(BLE_RADIOTXRXTIM0_ADDR); +} + +__INLINE void ble_radiotxrxtim0_set(uint32_t value) +{ + REG_BLE_WR(BLE_RADIOTXRXTIM0_ADDR, value); +} + +// field definitions +#define BLE_RFRXTMDA0_MASK ((uint32_t)0x007F0000) +#define BLE_RFRXTMDA0_LSB 16 +#define BLE_RFRXTMDA0_WIDTH ((uint32_t)0x00000007) +#define BLE_RXPATHDLY0_MASK ((uint32_t)0x00007F00) +#define BLE_RXPATHDLY0_LSB 8 +#define BLE_RXPATHDLY0_WIDTH ((uint32_t)0x00000007) +#define BLE_TXPATHDLY0_MASK ((uint32_t)0x0000007F) +#define BLE_TXPATHDLY0_LSB 0 +#define BLE_TXPATHDLY0_WIDTH ((uint32_t)0x00000007) + +#define BLE_RFRXTMDA0_RST 0x0 +#define BLE_RXPATHDLY0_RST 0x0 +#define BLE_TXPATHDLY0_RST 0x0 + +__INLINE void ble_radiotxrxtim0_pack(uint8_t rfrxtmda0, uint8_t rxpathdly0, uint8_t txpathdly0) +{ + ASSERT_ERR((((uint32_t)rfrxtmda0 << 16) & ~((uint32_t)0x007F0000)) == 0); + ASSERT_ERR((((uint32_t)rxpathdly0 << 8) & ~((uint32_t)0x00007F00)) == 0); + ASSERT_ERR((((uint32_t)txpathdly0 << 0) & ~((uint32_t)0x0000007F)) == 0); + REG_BLE_WR(BLE_RADIOTXRXTIM0_ADDR, ((uint32_t)rfrxtmda0 << 16) | ((uint32_t)rxpathdly0 << 8) | ((uint32_t)txpathdly0 << 0)); +} + +__INLINE void ble_radiotxrxtim0_unpack(uint8_t* rfrxtmda0, uint8_t* rxpathdly0, uint8_t* txpathdly0) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOTXRXTIM0_ADDR); + + *rfrxtmda0 = (localVal & ((uint32_t)0x007F0000)) >> 16; + *rxpathdly0 = (localVal & ((uint32_t)0x00007F00)) >> 8; + *txpathdly0 = (localVal & ((uint32_t)0x0000007F)) >> 0; +} + +__INLINE uint8_t ble_radiotxrxtim0_rfrxtmda0_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOTXRXTIM0_ADDR); + return ((localVal & ((uint32_t)0x007F0000)) >> 16); +} + +__INLINE void ble_radiotxrxtim0_rfrxtmda0_setf(uint8_t rfrxtmda0) +{ + ASSERT_ERR((((uint32_t)rfrxtmda0 << 16) & ~((uint32_t)0x007F0000)) == 0); + REG_BLE_WR(BLE_RADIOTXRXTIM0_ADDR, (REG_BLE_RD(BLE_RADIOTXRXTIM0_ADDR) & ~((uint32_t)0x007F0000)) | ((uint32_t)rfrxtmda0 << 16)); +} + +__INLINE uint8_t ble_radiotxrxtim0_rxpathdly0_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOTXRXTIM0_ADDR); + return ((localVal & ((uint32_t)0x00007F00)) >> 8); +} + +__INLINE void ble_radiotxrxtim0_rxpathdly0_setf(uint8_t rxpathdly0) +{ + ASSERT_ERR((((uint32_t)rxpathdly0 << 8) & ~((uint32_t)0x00007F00)) == 0); + REG_BLE_WR(BLE_RADIOTXRXTIM0_ADDR, (REG_BLE_RD(BLE_RADIOTXRXTIM0_ADDR) & ~((uint32_t)0x00007F00)) | ((uint32_t)rxpathdly0 << 8)); +} + +__INLINE uint8_t ble_radiotxrxtim0_txpathdly0_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOTXRXTIM0_ADDR); + return ((localVal & ((uint32_t)0x0000007F)) >> 0); +} + +__INLINE void ble_radiotxrxtim0_txpathdly0_setf(uint8_t txpathdly0) +{ + ASSERT_ERR((((uint32_t)txpathdly0 << 0) & ~((uint32_t)0x0000007F)) == 0); + REG_BLE_WR(BLE_RADIOTXRXTIM0_ADDR, (REG_BLE_RD(BLE_RADIOTXRXTIM0_ADDR) & ~((uint32_t)0x0000007F)) | ((uint32_t)txpathdly0 << 0)); +} + +/** + * @brief RADIOTXRXTIM1 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 22:16 RFRXTMDA1 0x0 + * 14:08 RXPATHDLY1 0x0 + * 06:00 TXPATHDLY1 0x0 + *+ */ +#define BLE_RADIOTXRXTIM1_ADDR BASEBAND_REG_BASE +0x94 // 0x50800094 +#define BLE_RADIOTXRXTIM1_OFFSET 0x00000094 +#define BLE_RADIOTXRXTIM1_INDEX 0x00000025 +#define BLE_RADIOTXRXTIM1_RESET 0x00000000 + +__INLINE uint32_t ble_radiotxrxtim1_get(void) +{ + return REG_BLE_RD(BLE_RADIOTXRXTIM1_ADDR); +} + +__INLINE void ble_radiotxrxtim1_set(uint32_t value) +{ + REG_BLE_WR(BLE_RADIOTXRXTIM1_ADDR, value); +} + +// field definitions +#define BLE_RFRXTMDA1_MASK ((uint32_t)0x007F0000) +#define BLE_RFRXTMDA1_LSB 16 +#define BLE_RFRXTMDA1_WIDTH ((uint32_t)0x00000007) +#define BLE_RXPATHDLY1_MASK ((uint32_t)0x00007F00) +#define BLE_RXPATHDLY1_LSB 8 +#define BLE_RXPATHDLY1_WIDTH ((uint32_t)0x00000007) +#define BLE_TXPATHDLY1_MASK ((uint32_t)0x0000007F) +#define BLE_TXPATHDLY1_LSB 0 +#define BLE_TXPATHDLY1_WIDTH ((uint32_t)0x00000007) + +#define BLE_RFRXTMDA1_RST 0x0 +#define BLE_RXPATHDLY1_RST 0x0 +#define BLE_TXPATHDLY1_RST 0x0 + +__INLINE void ble_radiotxrxtim1_pack(uint8_t rfrxtmda1, uint8_t rxpathdly1, uint8_t txpathdly1) +{ + ASSERT_ERR((((uint32_t)rfrxtmda1 << 16) & ~((uint32_t)0x007F0000)) == 0); + ASSERT_ERR((((uint32_t)rxpathdly1 << 8) & ~((uint32_t)0x00007F00)) == 0); + ASSERT_ERR((((uint32_t)txpathdly1 << 0) & ~((uint32_t)0x0000007F)) == 0); + REG_BLE_WR(BLE_RADIOTXRXTIM1_ADDR, ((uint32_t)rfrxtmda1 << 16) | ((uint32_t)rxpathdly1 << 8) | ((uint32_t)txpathdly1 << 0)); +} + +__INLINE void ble_radiotxrxtim1_unpack(uint8_t* rfrxtmda1, uint8_t* rxpathdly1, uint8_t* txpathdly1) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOTXRXTIM1_ADDR); + + *rfrxtmda1 = (localVal & ((uint32_t)0x007F0000)) >> 16; + *rxpathdly1 = (localVal & ((uint32_t)0x00007F00)) >> 8; + *txpathdly1 = (localVal & ((uint32_t)0x0000007F)) >> 0; +} + +__INLINE uint8_t ble_radiotxrxtim1_rfrxtmda1_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOTXRXTIM1_ADDR); + return ((localVal & ((uint32_t)0x007F0000)) >> 16); +} + +__INLINE void ble_radiotxrxtim1_rfrxtmda1_setf(uint8_t rfrxtmda1) +{ + ASSERT_ERR((((uint32_t)rfrxtmda1 << 16) & ~((uint32_t)0x007F0000)) == 0); + REG_BLE_WR(BLE_RADIOTXRXTIM1_ADDR, (REG_BLE_RD(BLE_RADIOTXRXTIM1_ADDR) & ~((uint32_t)0x007F0000)) | ((uint32_t)rfrxtmda1 << 16)); +} + +__INLINE uint8_t ble_radiotxrxtim1_rxpathdly1_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOTXRXTIM1_ADDR); + return ((localVal & ((uint32_t)0x00007F00)) >> 8); +} + +__INLINE void ble_radiotxrxtim1_rxpathdly1_setf(uint8_t rxpathdly1) +{ + ASSERT_ERR((((uint32_t)rxpathdly1 << 8) & ~((uint32_t)0x00007F00)) == 0); + REG_BLE_WR(BLE_RADIOTXRXTIM1_ADDR, (REG_BLE_RD(BLE_RADIOTXRXTIM1_ADDR) & ~((uint32_t)0x00007F00)) | ((uint32_t)rxpathdly1 << 8)); +} + +__INLINE uint8_t ble_radiotxrxtim1_txpathdly1_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOTXRXTIM1_ADDR); + return ((localVal & ((uint32_t)0x0000007F)) >> 0); +} + +__INLINE void ble_radiotxrxtim1_txpathdly1_setf(uint8_t txpathdly1) +{ + ASSERT_ERR((((uint32_t)txpathdly1 << 0) & ~((uint32_t)0x0000007F)) == 0); + REG_BLE_WR(BLE_RADIOTXRXTIM1_ADDR, (REG_BLE_RD(BLE_RADIOTXRXTIM1_ADDR) & ~((uint32_t)0x0000007F)) | ((uint32_t)txpathdly1 << 0)); +} + +/** + * @brief RADIOTXRXTIM2 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31:24 RXFLUSHPATHDLY2 0x0 + * 23:16 RFRXTMDA2 0x0 + * 15:08 RXPATHDLY2 0x0 + * 06:00 TXPATHDLY2 0x0 + *+ */ +#define BLE_RADIOTXRXTIM2_ADDR BASEBAND_REG_BASE +0x98 //0x50800098 +#define BLE_RADIOTXRXTIM2_OFFSET 0x00000098 +#define BLE_RADIOTXRXTIM2_INDEX 0x00000026 +#define BLE_RADIOTXRXTIM2_RESET 0x00000000 + +__INLINE uint32_t ble_radiotxrxtim2_get(void) +{ + return REG_BLE_RD(BLE_RADIOTXRXTIM2_ADDR); +} + +__INLINE void ble_radiotxrxtim2_set(uint32_t value) +{ + REG_BLE_WR(BLE_RADIOTXRXTIM2_ADDR, value); +} + +// field definitions +#define BLE_RXFLUSHPATHDLY2_MASK ((uint32_t)0xFF000000) +#define BLE_RXFLUSHPATHDLY2_LSB 24 +#define BLE_RXFLUSHPATHDLY2_WIDTH ((uint32_t)0x00000008) +#define BLE_RFRXTMDA2_MASK ((uint32_t)0x00FF0000) +#define BLE_RFRXTMDA2_LSB 16 +#define BLE_RFRXTMDA2_WIDTH ((uint32_t)0x00000008) +#define BLE_RXPATHDLY2_MASK ((uint32_t)0x0000FF00) +#define BLE_RXPATHDLY2_LSB 8 +#define BLE_RXPATHDLY2_WIDTH ((uint32_t)0x00000008) +#define BLE_TXPATHDLY2_MASK ((uint32_t)0x0000007F) +#define BLE_TXPATHDLY2_LSB 0 +#define BLE_TXPATHDLY2_WIDTH ((uint32_t)0x00000007) + +#define BLE_RXFLUSHPATHDLY2_RST 0x0 +#define BLE_RFRXTMDA2_RST 0x0 +#define BLE_RXPATHDLY2_RST 0x0 +#define BLE_TXPATHDLY2_RST 0x0 + +__INLINE void ble_radiotxrxtim2_pack(uint8_t rxflushpathdly2, uint8_t rfrxtmda2, uint8_t rxpathdly2, uint8_t txpathdly2) +{ + ASSERT_ERR((((uint32_t)rxflushpathdly2 << 24) & ~((uint32_t)0xFF000000)) == 0); + ASSERT_ERR((((uint32_t)rfrxtmda2 << 16) & ~((uint32_t)0x00FF0000)) == 0); + ASSERT_ERR((((uint32_t)rxpathdly2 << 8) & ~((uint32_t)0x0000FF00)) == 0); + ASSERT_ERR((((uint32_t)txpathdly2 << 0) & ~((uint32_t)0x0000007F)) == 0); + REG_BLE_WR(BLE_RADIOTXRXTIM2_ADDR, ((uint32_t)rxflushpathdly2 << 24) | ((uint32_t)rfrxtmda2 << 16) | ((uint32_t)rxpathdly2 << 8) | ((uint32_t)txpathdly2 << 0)); +} + +__INLINE void ble_radiotxrxtim2_unpack(uint8_t* rxflushpathdly2, uint8_t* rfrxtmda2, uint8_t* rxpathdly2, uint8_t* txpathdly2) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOTXRXTIM2_ADDR); + + *rxflushpathdly2 = (localVal & ((uint32_t)0xFF000000)) >> 24; + *rfrxtmda2 = (localVal & ((uint32_t)0x00FF0000)) >> 16; + *rxpathdly2 = (localVal & ((uint32_t)0x0000FF00)) >> 8; + *txpathdly2 = (localVal & ((uint32_t)0x0000007F)) >> 0; +} + +__INLINE uint8_t ble_radiotxrxtim2_rxflushpathdly2_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOTXRXTIM2_ADDR); + return ((localVal & ((uint32_t)0xFF000000)) >> 24); +} + +__INLINE void ble_radiotxrxtim2_rxflushpathdly2_setf(uint8_t rxflushpathdly2) +{ + ASSERT_ERR((((uint32_t)rxflushpathdly2 << 24) & ~((uint32_t)0xFF000000)) == 0); + REG_BLE_WR(BLE_RADIOTXRXTIM2_ADDR, (REG_BLE_RD(BLE_RADIOTXRXTIM2_ADDR) & ~((uint32_t)0xFF000000)) | ((uint32_t)rxflushpathdly2 << 24)); +} + +__INLINE uint8_t ble_radiotxrxtim2_rfrxtmda2_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOTXRXTIM2_ADDR); + return ((localVal & ((uint32_t)0x00FF0000)) >> 16); +} + +__INLINE void ble_radiotxrxtim2_rfrxtmda2_setf(uint8_t rfrxtmda2) +{ + ASSERT_ERR((((uint32_t)rfrxtmda2 << 16) & ~((uint32_t)0x00FF0000)) == 0); + REG_BLE_WR(BLE_RADIOTXRXTIM2_ADDR, (REG_BLE_RD(BLE_RADIOTXRXTIM2_ADDR) & ~((uint32_t)0x00FF0000)) | ((uint32_t)rfrxtmda2 << 16)); +} + +__INLINE uint8_t ble_radiotxrxtim2_rxpathdly2_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOTXRXTIM2_ADDR); + return ((localVal & ((uint32_t)0x0000FF00)) >> 8); +} + +__INLINE void ble_radiotxrxtim2_rxpathdly2_setf(uint8_t rxpathdly2) +{ + ASSERT_ERR((((uint32_t)rxpathdly2 << 8) & ~((uint32_t)0x0000FF00)) == 0); + REG_BLE_WR(BLE_RADIOTXRXTIM2_ADDR, (REG_BLE_RD(BLE_RADIOTXRXTIM2_ADDR) & ~((uint32_t)0x0000FF00)) | ((uint32_t)rxpathdly2 << 8)); +} + +__INLINE uint8_t ble_radiotxrxtim2_txpathdly2_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOTXRXTIM2_ADDR); + return ((localVal & ((uint32_t)0x0000007F)) >> 0); +} + +__INLINE void ble_radiotxrxtim2_txpathdly2_setf(uint8_t txpathdly2) +{ + ASSERT_ERR((((uint32_t)txpathdly2 << 0) & ~((uint32_t)0x0000007F)) == 0); + REG_BLE_WR(BLE_RADIOTXRXTIM2_ADDR, (REG_BLE_RD(BLE_RADIOTXRXTIM2_ADDR) & ~((uint32_t)0x0000007F)) | ((uint32_t)txpathdly2 << 0)); +} + +/** + * @brief RADIOTXRXTIM3 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31:24 RXFLUSHPATHDLY3 0x0 + * 22:16 RFRXTMDA3 0x0 + * 06:00 TXPATHDLY3 0x0 + *+ */ +#define BLE_RADIOTXRXTIM3_ADDR BASEBAND_REG_BASE +0x9C //0x5080009C +#define BLE_RADIOTXRXTIM3_OFFSET 0x0000009C +#define BLE_RADIOTXRXTIM3_INDEX 0x00000027 +#define BLE_RADIOTXRXTIM3_RESET 0x00000000 + +__INLINE uint32_t ble_radiotxrxtim3_get(void) +{ + return REG_BLE_RD(BLE_RADIOTXRXTIM3_ADDR); +} + +__INLINE void ble_radiotxrxtim3_set(uint32_t value) +{ + REG_BLE_WR(BLE_RADIOTXRXTIM3_ADDR, value); +} + +// field definitions +#define BLE_RXFLUSHPATHDLY3_MASK ((uint32_t)0xFF000000) +#define BLE_RXFLUSHPATHDLY3_LSB 24 +#define BLE_RXFLUSHPATHDLY3_WIDTH ((uint32_t)0x00000008) +#define BLE_RFRXTMDA3_MASK ((uint32_t)0x007F0000) +#define BLE_RFRXTMDA3_LSB 16 +#define BLE_RFRXTMDA3_WIDTH ((uint32_t)0x00000007) +#define BLE_TXPATHDLY3_MASK ((uint32_t)0x0000007F) +#define BLE_TXPATHDLY3_LSB 0 +#define BLE_TXPATHDLY3_WIDTH ((uint32_t)0x00000007) + +#define BLE_RXFLUSHPATHDLY3_RST 0x0 +#define BLE_RFRXTMDA3_RST 0x0 +#define BLE_TXPATHDLY3_RST 0x0 + +__INLINE void ble_radiotxrxtim3_pack(uint8_t rxflushpathdly3, uint8_t rfrxtmda3, uint8_t txpathdly3) +{ + ASSERT_ERR((((uint32_t)rxflushpathdly3 << 24) & ~((uint32_t)0xFF000000)) == 0); + ASSERT_ERR((((uint32_t)rfrxtmda3 << 16) & ~((uint32_t)0x007F0000)) == 0); + ASSERT_ERR((((uint32_t)txpathdly3 << 0) & ~((uint32_t)0x0000007F)) == 0); + REG_BLE_WR(BLE_RADIOTXRXTIM3_ADDR, ((uint32_t)rxflushpathdly3 << 24) | ((uint32_t)rfrxtmda3 << 16) | ((uint32_t)txpathdly3 << 0)); +} + +__INLINE void ble_radiotxrxtim3_unpack(uint8_t* rxflushpathdly3, uint8_t* rfrxtmda3, uint8_t* txpathdly3) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOTXRXTIM3_ADDR); + + *rxflushpathdly3 = (localVal & ((uint32_t)0xFF000000)) >> 24; + *rfrxtmda3 = (localVal & ((uint32_t)0x007F0000)) >> 16; + *txpathdly3 = (localVal & ((uint32_t)0x0000007F)) >> 0; +} + +__INLINE uint8_t ble_radiotxrxtim3_rxflushpathdly3_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOTXRXTIM3_ADDR); + return ((localVal & ((uint32_t)0xFF000000)) >> 24); +} + +__INLINE void ble_radiotxrxtim3_rxflushpathdly3_setf(uint8_t rxflushpathdly3) +{ + ASSERT_ERR((((uint32_t)rxflushpathdly3 << 24) & ~((uint32_t)0xFF000000)) == 0); + REG_BLE_WR(BLE_RADIOTXRXTIM3_ADDR, (REG_BLE_RD(BLE_RADIOTXRXTIM3_ADDR) & ~((uint32_t)0xFF000000)) | ((uint32_t)rxflushpathdly3 << 24)); +} + +__INLINE uint8_t ble_radiotxrxtim3_rfrxtmda3_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOTXRXTIM3_ADDR); + return ((localVal & ((uint32_t)0x007F0000)) >> 16); +} + +__INLINE void ble_radiotxrxtim3_rfrxtmda3_setf(uint8_t rfrxtmda3) +{ + ASSERT_ERR((((uint32_t)rfrxtmda3 << 16) & ~((uint32_t)0x007F0000)) == 0); + REG_BLE_WR(BLE_RADIOTXRXTIM3_ADDR, (REG_BLE_RD(BLE_RADIOTXRXTIM3_ADDR) & ~((uint32_t)0x007F0000)) | ((uint32_t)rfrxtmda3 << 16)); +} + +__INLINE uint8_t ble_radiotxrxtim3_txpathdly3_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RADIOTXRXTIM3_ADDR); + return ((localVal & ((uint32_t)0x0000007F)) >> 0); +} + +__INLINE void ble_radiotxrxtim3_txpathdly3_setf(uint8_t txpathdly3) +{ + ASSERT_ERR((((uint32_t)txpathdly3 << 0) & ~((uint32_t)0x0000007F)) == 0); + REG_BLE_WR(BLE_RADIOTXRXTIM3_ADDR, (REG_BLE_RD(BLE_RADIOTXRXTIM3_ADDR) & ~((uint32_t)0x0000007F)) | ((uint32_t)txpathdly3 << 0)); +} + +/** + * @brief SPIPTRCNTL0 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 29:16 TXOFFPTR 0x0 + * 13:00 TXONPTR 0x0 + *+ */ +#define BLE_SPIPTRCNTL0_ADDR BASEBAND_REG_BASE +0xA0 //0x508000A0 +#define BLE_SPIPTRCNTL0_OFFSET 0x000000A0 +#define BLE_SPIPTRCNTL0_INDEX 0x00000028 +#define BLE_SPIPTRCNTL0_RESET 0x00000000 + +__INLINE uint32_t ble_spiptrcntl0_get(void) +{ + return REG_BLE_RD(BLE_SPIPTRCNTL0_ADDR); +} + +__INLINE void ble_spiptrcntl0_set(uint32_t value) +{ + REG_BLE_WR(BLE_SPIPTRCNTL0_ADDR, value); +} + +// field definitions +#define BLE_TXOFFPTR_MASK ((uint32_t)0x3FFF0000) +#define BLE_TXOFFPTR_LSB 16 +#define BLE_TXOFFPTR_WIDTH ((uint32_t)0x0000000E) +#define BLE_TXONPTR_MASK ((uint32_t)0x00003FFF) +#define BLE_TXONPTR_LSB 0 +#define BLE_TXONPTR_WIDTH ((uint32_t)0x0000000E) + +#define BLE_TXOFFPTR_RST 0x0 +#define BLE_TXONPTR_RST 0x0 + +__INLINE void ble_spiptrcntl0_pack(uint16_t txoffptr, uint16_t txonptr) +{ + ASSERT_ERR((((uint32_t)txoffptr << 16) & ~((uint32_t)0x3FFF0000)) == 0); + ASSERT_ERR((((uint32_t)txonptr << 0) & ~((uint32_t)0x00003FFF)) == 0); + REG_BLE_WR(BLE_SPIPTRCNTL0_ADDR, ((uint32_t)txoffptr << 16) | ((uint32_t)txonptr << 0)); +} + +__INLINE void ble_spiptrcntl0_unpack(uint16_t* txoffptr, uint16_t* txonptr) +{ + uint32_t localVal = REG_BLE_RD(BLE_SPIPTRCNTL0_ADDR); + + *txoffptr = (localVal & ((uint32_t)0x3FFF0000)) >> 16; + *txonptr = (localVal & ((uint32_t)0x00003FFF)) >> 0; +} + +__INLINE uint16_t ble_spiptrcntl0_txoffptr_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_SPIPTRCNTL0_ADDR); + return ((localVal & ((uint32_t)0x3FFF0000)) >> 16); +} + +__INLINE void ble_spiptrcntl0_txoffptr_setf(uint16_t txoffptr) +{ + ASSERT_ERR((((uint32_t)txoffptr << 16) & ~((uint32_t)0x3FFF0000)) == 0); + REG_BLE_WR(BLE_SPIPTRCNTL0_ADDR, (REG_BLE_RD(BLE_SPIPTRCNTL0_ADDR) & ~((uint32_t)0x3FFF0000)) | ((uint32_t)txoffptr << 16)); +} + +__INLINE uint16_t ble_spiptrcntl0_txonptr_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_SPIPTRCNTL0_ADDR); + return ((localVal & ((uint32_t)0x00003FFF)) >> 0); +} + +__INLINE void ble_spiptrcntl0_txonptr_setf(uint16_t txonptr) +{ + ASSERT_ERR((((uint32_t)txonptr << 0) & ~((uint32_t)0x00003FFF)) == 0); + REG_BLE_WR(BLE_SPIPTRCNTL0_ADDR, (REG_BLE_RD(BLE_SPIPTRCNTL0_ADDR) & ~((uint32_t)0x00003FFF)) | ((uint32_t)txonptr << 0)); +} + +/** + * @brief SPIPTRCNTL1 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 29:16 RXOFFPTR 0x0 + * 13:00 RXONPTR 0x0 + *+ */ +#define BLE_SPIPTRCNTL1_ADDR BASEBAND_REG_BASE +0xA4 //0x508000A4 +#define BLE_SPIPTRCNTL1_OFFSET 0x000000A4 +#define BLE_SPIPTRCNTL1_INDEX 0x00000029 +#define BLE_SPIPTRCNTL1_RESET 0x00000000 + +__INLINE uint32_t ble_spiptrcntl1_get(void) +{ + return REG_BLE_RD(BLE_SPIPTRCNTL1_ADDR); +} + +__INLINE void ble_spiptrcntl1_set(uint32_t value) +{ + REG_BLE_WR(BLE_SPIPTRCNTL1_ADDR, value); +} + +// field definitions +#define BLE_RXOFFPTR_MASK ((uint32_t)0x3FFF0000) +#define BLE_RXOFFPTR_LSB 16 +#define BLE_RXOFFPTR_WIDTH ((uint32_t)0x0000000E) +#define BLE_RXONPTR_MASK ((uint32_t)0x00003FFF) +#define BLE_RXONPTR_LSB 0 +#define BLE_RXONPTR_WIDTH ((uint32_t)0x0000000E) + +#define BLE_RXOFFPTR_RST 0x0 +#define BLE_RXONPTR_RST 0x0 + +__INLINE void ble_spiptrcntl1_pack(uint16_t rxoffptr, uint16_t rxonptr) +{ + ASSERT_ERR((((uint32_t)rxoffptr << 16) & ~((uint32_t)0x3FFF0000)) == 0); + ASSERT_ERR((((uint32_t)rxonptr << 0) & ~((uint32_t)0x00003FFF)) == 0); + REG_BLE_WR(BLE_SPIPTRCNTL1_ADDR, ((uint32_t)rxoffptr << 16) | ((uint32_t)rxonptr << 0)); +} + +__INLINE void ble_spiptrcntl1_unpack(uint16_t* rxoffptr, uint16_t* rxonptr) +{ + uint32_t localVal = REG_BLE_RD(BLE_SPIPTRCNTL1_ADDR); + + *rxoffptr = (localVal & ((uint32_t)0x3FFF0000)) >> 16; + *rxonptr = (localVal & ((uint32_t)0x00003FFF)) >> 0; +} + +__INLINE uint16_t ble_spiptrcntl1_rxoffptr_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_SPIPTRCNTL1_ADDR); + return ((localVal & ((uint32_t)0x3FFF0000)) >> 16); +} + +__INLINE void ble_spiptrcntl1_rxoffptr_setf(uint16_t rxoffptr) +{ + ASSERT_ERR((((uint32_t)rxoffptr << 16) & ~((uint32_t)0x3FFF0000)) == 0); + REG_BLE_WR(BLE_SPIPTRCNTL1_ADDR, (REG_BLE_RD(BLE_SPIPTRCNTL1_ADDR) & ~((uint32_t)0x3FFF0000)) | ((uint32_t)rxoffptr << 16)); +} + +__INLINE uint16_t ble_spiptrcntl1_rxonptr_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_SPIPTRCNTL1_ADDR); + return ((localVal & ((uint32_t)0x00003FFF)) >> 0); +} + +__INLINE void ble_spiptrcntl1_rxonptr_setf(uint16_t rxonptr) +{ + ASSERT_ERR((((uint32_t)rxonptr << 0) & ~((uint32_t)0x00003FFF)) == 0); + REG_BLE_WR(BLE_SPIPTRCNTL1_ADDR, (REG_BLE_RD(BLE_SPIPTRCNTL1_ADDR) & ~((uint32_t)0x00003FFF)) | ((uint32_t)rxonptr << 0)); +} + +/** + * @brief SPIPTRCNTL2 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 29:16 RXLENGTHPTR 0x0 + * 13:00 RSSIPTR 0x0 + *+ */ +#define BLE_SPIPTRCNTL2_ADDR BASEBAND_REG_BASE +0xA8 //0x508000A8 +#define BLE_SPIPTRCNTL2_OFFSET 0x000000A8 +#define BLE_SPIPTRCNTL2_INDEX 0x0000002A +#define BLE_SPIPTRCNTL2_RESET 0x00000000 + +__INLINE uint32_t ble_spiptrcntl2_get(void) +{ + return REG_BLE_RD(BLE_SPIPTRCNTL2_ADDR); +} + +__INLINE void ble_spiptrcntl2_set(uint32_t value) +{ + REG_BLE_WR(BLE_SPIPTRCNTL2_ADDR, value); +} + +// field definitions +#define BLE_RXLENGTHPTR_MASK ((uint32_t)0x3FFF0000) +#define BLE_RXLENGTHPTR_LSB 16 +#define BLE_RXLENGTHPTR_WIDTH ((uint32_t)0x0000000E) +#define BLE_RSSIPTR_MASK ((uint32_t)0x00003FFF) +#define BLE_RSSIPTR_LSB 0 +#define BLE_RSSIPTR_WIDTH ((uint32_t)0x0000000E) + +#define BLE_RXLENGTHPTR_RST 0x0 +#define BLE_RSSIPTR_RST 0x0 + +__INLINE void ble_spiptrcntl2_pack(uint16_t rxlengthptr, uint16_t rssiptr) +{ + ASSERT_ERR((((uint32_t)rxlengthptr << 16) & ~((uint32_t)0x3FFF0000)) == 0); + ASSERT_ERR((((uint32_t)rssiptr << 0) & ~((uint32_t)0x00003FFF)) == 0); + REG_BLE_WR(BLE_SPIPTRCNTL2_ADDR, ((uint32_t)rxlengthptr << 16) | ((uint32_t)rssiptr << 0)); +} + +__INLINE void ble_spiptrcntl2_unpack(uint16_t* rxlengthptr, uint16_t* rssiptr) +{ + uint32_t localVal = REG_BLE_RD(BLE_SPIPTRCNTL2_ADDR); + + *rxlengthptr = (localVal & ((uint32_t)0x3FFF0000)) >> 16; + *rssiptr = (localVal & ((uint32_t)0x00003FFF)) >> 0; +} + +__INLINE uint16_t ble_spiptrcntl2_rxlengthptr_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_SPIPTRCNTL2_ADDR); + return ((localVal & ((uint32_t)0x3FFF0000)) >> 16); +} + +__INLINE void ble_spiptrcntl2_rxlengthptr_setf(uint16_t rxlengthptr) +{ + ASSERT_ERR((((uint32_t)rxlengthptr << 16) & ~((uint32_t)0x3FFF0000)) == 0); + REG_BLE_WR(BLE_SPIPTRCNTL2_ADDR, (REG_BLE_RD(BLE_SPIPTRCNTL2_ADDR) & ~((uint32_t)0x3FFF0000)) | ((uint32_t)rxlengthptr << 16)); +} + +__INLINE uint16_t ble_spiptrcntl2_rssiptr_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_SPIPTRCNTL2_ADDR); + return ((localVal & ((uint32_t)0x00003FFF)) >> 0); +} + +__INLINE void ble_spiptrcntl2_rssiptr_setf(uint16_t rssiptr) +{ + ASSERT_ERR((((uint32_t)rssiptr << 0) & ~((uint32_t)0x00003FFF)) == 0); + REG_BLE_WR(BLE_SPIPTRCNTL2_ADDR, (REG_BLE_RD(BLE_SPIPTRCNTL2_ADDR) & ~((uint32_t)0x00003FFF)) | ((uint32_t)rssiptr << 0)); +} + +/** + * @brief SPIPTRCNTL3 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 13:00 RXPKTTYPPTR 0x0 + *+ */ +#define BLE_SPIPTRCNTL3_ADDR BASEBAND_REG_BASE +0xAC // 0x508000AC +#define BLE_SPIPTRCNTL3_OFFSET 0x000000AC +#define BLE_SPIPTRCNTL3_INDEX 0x0000002B +#define BLE_SPIPTRCNTL3_RESET 0x00000000 + +__INLINE uint32_t ble_spiptrcntl3_get(void) +{ + return REG_BLE_RD(BLE_SPIPTRCNTL3_ADDR); +} + +__INLINE void ble_spiptrcntl3_set(uint32_t value) +{ + REG_BLE_WR(BLE_SPIPTRCNTL3_ADDR, value); +} + +// field definitions +#define BLE_RXPKTTYPPTR_MASK ((uint32_t)0x00003FFF) +#define BLE_RXPKTTYPPTR_LSB 0 +#define BLE_RXPKTTYPPTR_WIDTH ((uint32_t)0x0000000E) + +#define BLE_RXPKTTYPPTR_RST 0x0 + +__INLINE uint16_t ble_spiptrcntl3_rxpkttypptr_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_SPIPTRCNTL3_ADDR); + ASSERT_ERR((localVal & ~((uint32_t)0x00003FFF)) == 0); + return (localVal >> 0); +} + +__INLINE void ble_spiptrcntl3_rxpkttypptr_setf(uint16_t rxpkttypptr) +{ + ASSERT_ERR((((uint32_t)rxpkttypptr << 0) & ~((uint32_t)0x00003FFF)) == 0); + REG_BLE_WR(BLE_SPIPTRCNTL3_ADDR, (uint32_t)rxpkttypptr << 0); +} + +/** + * @brief AESCNTL register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 01 AES_MODE 0 + * 00 AES_START 0 + *+ */ +#define BLE_AESCNTL_ADDR BASEBAND_REG_BASE +0xB0 //0x508000B0 +#define BLE_AESCNTL_OFFSET 0x000000B0 +#define BLE_AESCNTL_INDEX 0x0000002C +#define BLE_AESCNTL_RESET 0x00000000 + +__INLINE uint32_t ble_aescntl_get(void) +{ + return REG_BLE_RD(BLE_AESCNTL_ADDR); +} + +__INLINE void ble_aescntl_set(uint32_t value) +{ + REG_BLE_WR(BLE_AESCNTL_ADDR, value); +} + +// field definitions +#define BLE_AES_MODE_BIT ((uint32_t)0x00000002) +#define BLE_AES_MODE_POS 1 +#define BLE_AES_START_BIT ((uint32_t)0x00000001) +#define BLE_AES_START_POS 0 + +#define BLE_AES_MODE_RST 0x0 +#define BLE_AES_START_RST 0x0 + +__INLINE void ble_aescntl_pack(uint8_t aesmode, uint8_t aesstart) +{ + ASSERT_ERR((((uint32_t)aesmode << 1) & ~((uint32_t)0x00000002)) == 0); + ASSERT_ERR((((uint32_t)aesstart << 0) & ~((uint32_t)0x00000001)) == 0); + REG_BLE_WR(BLE_AESCNTL_ADDR, ((uint32_t)aesmode << 1) | ((uint32_t)aesstart << 0)); +} + +__INLINE void ble_aescntl_unpack(uint8_t* aesmode, uint8_t* aesstart) +{ + uint32_t localVal = REG_BLE_RD(BLE_AESCNTL_ADDR); + + *aesmode = (localVal & ((uint32_t)0x00000002)) >> 1; + *aesstart = (localVal & ((uint32_t)0x00000001)) >> 0; +} + +__INLINE uint8_t ble_aescntl_aes_mode_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_AESCNTL_ADDR); + return ((localVal & ((uint32_t)0x00000002)) >> 1); +} + +__INLINE void ble_aescntl_aes_mode_setf(uint8_t aesmode) +{ + ASSERT_ERR((((uint32_t)aesmode << 1) & ~((uint32_t)0x00000002)) == 0); + REG_BLE_WR(BLE_AESCNTL_ADDR, (REG_BLE_RD(BLE_AESCNTL_ADDR) & ~((uint32_t)0x00000002)) | ((uint32_t)aesmode << 1)); +} + +__INLINE uint8_t ble_aescntl_aes_start_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_AESCNTL_ADDR); + return ((localVal & ((uint32_t)0x00000001)) >> 0); +} + +__INLINE void ble_aescntl_aes_start_setf(uint8_t aesstart) +{ + ASSERT_ERR((((uint32_t)aesstart << 0) & ~((uint32_t)0x00000001)) == 0); + REG_BLE_WR(BLE_AESCNTL_ADDR, (REG_BLE_RD(BLE_AESCNTL_ADDR) & ~((uint32_t)0x00000001)) | ((uint32_t)aesstart << 0)); +} + +/** + * @brief AESKEY31_0 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31:00 AESKEY31_0 0x0 + *+ */ +#define BLE_AESKEY31_0_ADDR BASEBAND_REG_BASE +0xB4 // 0x508000B4 +#define BLE_AESKEY31_0_OFFSET 0x000000B4 +#define BLE_AESKEY31_0_INDEX 0x0000002D +#define BLE_AESKEY31_0_RESET 0x00000000 + +__INLINE uint32_t ble_aeskey31_0_get(void) +{ + return REG_BLE_RD(BLE_AESKEY31_0_ADDR); +} + +__INLINE void ble_aeskey31_0_set(uint32_t value) +{ + REG_BLE_WR(BLE_AESKEY31_0_ADDR, value); +} + +// field definitions +#define BLE_AESKEY31_0_MASK ((uint32_t)0xFFFFFFFF) +#define BLE_AESKEY31_0_LSB 0 +#define BLE_AESKEY31_0_WIDTH ((uint32_t)0x00000020) + +#define BLE_AESKEY31_0_RST 0x0 + +__INLINE uint32_t ble_aeskey31_0_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_AESKEY31_0_ADDR); + ASSERT_ERR((localVal & ~((uint32_t)0xFFFFFFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void ble_aeskey31_0_setf(uint32_t aeskey310) +{ + ASSERT_ERR((((uint32_t)aeskey310 << 0) & ~((uint32_t)0xFFFFFFFF)) == 0); + REG_BLE_WR(BLE_AESKEY31_0_ADDR, (uint32_t)aeskey310 << 0); +} + +/** + * @brief AESKEY63_32 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31:00 AESKEY63_32 0x0 + *+ */ +#define BLE_AESKEY63_32_ADDR BASEBAND_REG_BASE +0xB8 // 0x508000B8 +#define BLE_AESKEY63_32_OFFSET 0x000000B8 +#define BLE_AESKEY63_32_INDEX 0x0000002E +#define BLE_AESKEY63_32_RESET 0x00000000 + +__INLINE uint32_t ble_aeskey63_32_get(void) +{ + return REG_BLE_RD(BLE_AESKEY63_32_ADDR); +} + +__INLINE void ble_aeskey63_32_set(uint32_t value) +{ + REG_BLE_WR(BLE_AESKEY63_32_ADDR, value); +} + +// field definitions +#define BLE_AESKEY63_32_MASK ((uint32_t)0xFFFFFFFF) +#define BLE_AESKEY63_32_LSB 0 +#define BLE_AESKEY63_32_WIDTH ((uint32_t)0x00000020) + +#define BLE_AESKEY63_32_RST 0x0 + +__INLINE uint32_t ble_aeskey63_32_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_AESKEY63_32_ADDR); + ASSERT_ERR((localVal & ~((uint32_t)0xFFFFFFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void ble_aeskey63_32_setf(uint32_t aeskey6332) +{ + ASSERT_ERR((((uint32_t)aeskey6332 << 0) & ~((uint32_t)0xFFFFFFFF)) == 0); + REG_BLE_WR(BLE_AESKEY63_32_ADDR, (uint32_t)aeskey6332 << 0); +} + +/** + * @brief AESKEY95_64 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31:00 AESKEY95_64 0x0 + *+ */ +#define BLE_AESKEY95_64_ADDR BASEBAND_REG_BASE +0xBC //0x508000BC +#define BLE_AESKEY95_64_OFFSET 0x000000BC +#define BLE_AESKEY95_64_INDEX 0x0000002F +#define BLE_AESKEY95_64_RESET 0x00000000 + +__INLINE uint32_t ble_aeskey95_64_get(void) +{ + return REG_BLE_RD(BLE_AESKEY95_64_ADDR); +} + +__INLINE void ble_aeskey95_64_set(uint32_t value) +{ + REG_BLE_WR(BLE_AESKEY95_64_ADDR, value); +} + +// field definitions +#define BLE_AESKEY95_64_MASK ((uint32_t)0xFFFFFFFF) +#define BLE_AESKEY95_64_LSB 0 +#define BLE_AESKEY95_64_WIDTH ((uint32_t)0x00000020) + +#define BLE_AESKEY95_64_RST 0x0 + +__INLINE uint32_t ble_aeskey95_64_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_AESKEY95_64_ADDR); + ASSERT_ERR((localVal & ~((uint32_t)0xFFFFFFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void ble_aeskey95_64_setf(uint32_t aeskey9564) +{ + ASSERT_ERR((((uint32_t)aeskey9564 << 0) & ~((uint32_t)0xFFFFFFFF)) == 0); + REG_BLE_WR(BLE_AESKEY95_64_ADDR, (uint32_t)aeskey9564 << 0); +} + +/** + * @brief AESKEY127_96 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31:00 AESKEY127_96 0x0 + *+ */ +#define BLE_AESKEY127_96_ADDR BASEBAND_REG_BASE +0xC0 //0x508000C0 +#define BLE_AESKEY127_96_OFFSET 0x000000C0 +#define BLE_AESKEY127_96_INDEX 0x00000030 +#define BLE_AESKEY127_96_RESET 0x00000000 + +__INLINE uint32_t ble_aeskey127_96_get(void) +{ + return REG_BLE_RD(BLE_AESKEY127_96_ADDR); +} + +__INLINE void ble_aeskey127_96_set(uint32_t value) +{ + REG_BLE_WR(BLE_AESKEY127_96_ADDR, value); +} + +// field definitions +#define BLE_AESKEY127_96_MASK ((uint32_t)0xFFFFFFFF) +#define BLE_AESKEY127_96_LSB 0 +#define BLE_AESKEY127_96_WIDTH ((uint32_t)0x00000020) + +#define BLE_AESKEY127_96_RST 0x0 + +__INLINE uint32_t ble_aeskey127_96_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_AESKEY127_96_ADDR); + ASSERT_ERR((localVal & ~((uint32_t)0xFFFFFFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void ble_aeskey127_96_setf(uint32_t aeskey12796) +{ + ASSERT_ERR((((uint32_t)aeskey12796 << 0) & ~((uint32_t)0xFFFFFFFF)) == 0); + REG_BLE_WR(BLE_AESKEY127_96_ADDR, (uint32_t)aeskey12796 << 0); +} + +/** + * @brief AESPTR register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 13:00 AESPTR 0x0 + *+ */ +#define BLE_AESPTR_ADDR BASEBAND_REG_BASE +0xC4 //0x508000C4 +#define BLE_AESPTR_OFFSET 0x000000C4 +#define BLE_AESPTR_INDEX 0x00000031 +#define BLE_AESPTR_RESET 0x00000000 + +__INLINE uint32_t ble_aesptr_get(void) +{ + return REG_BLE_RD(BLE_AESPTR_ADDR); +} + +__INLINE void ble_aesptr_set(uint32_t value) +{ + REG_BLE_WR(BLE_AESPTR_ADDR, value); +} + +// field definitions +#define BLE_AESPTR_MASK ((uint32_t)0x00003FFF) +#define BLE_AESPTR_LSB 0 +#define BLE_AESPTR_WIDTH ((uint32_t)0x0000000E) + +#define BLE_AESPTR_RST 0x0 + +__INLINE uint16_t ble_aesptr_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_AESPTR_ADDR); + ASSERT_ERR((localVal & ~((uint32_t)0x00003FFF)) == 0); + return (localVal >> 0); +} + +__INLINE void ble_aesptr_setf(uint16_t aesptr) +{ + ASSERT_ERR((((uint32_t)aesptr << 0) & ~((uint32_t)0x00003FFF)) == 0); + REG_BLE_WR(BLE_AESPTR_ADDR, (uint32_t)aesptr << 0); +} + +/** + * @brief TXMICVAL register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31:00 TXMICVAL 0x0 + *+ */ +#define BLE_TXMICVAL_ADDR BASEBAND_REG_BASE +0xC8 //0x508000C8 +#define BLE_TXMICVAL_OFFSET 0x000000C8 +#define BLE_TXMICVAL_INDEX 0x00000032 +#define BLE_TXMICVAL_RESET 0x00000000 + +__INLINE uint32_t ble_txmicval_get(void) +{ + return REG_BLE_RD(BLE_TXMICVAL_ADDR); +} + +// field definitions +#define BLE_TXMICVAL_MASK ((uint32_t)0xFFFFFFFF) +#define BLE_TXMICVAL_LSB 0 +#define BLE_TXMICVAL_WIDTH ((uint32_t)0x00000020) + +#define BLE_TXMICVAL_RST 0x0 + +__INLINE uint32_t ble_txmicval_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_TXMICVAL_ADDR); + ASSERT_ERR((localVal & ~((uint32_t)0xFFFFFFFF)) == 0); + return (localVal >> 0); +} + +/** + * @brief RXMICVAL register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31:00 RXMICVAL 0x0 + *+ */ +#define BLE_RXMICVAL_ADDR BASEBAND_REG_BASE +0xCC //0x508000CC +#define BLE_RXMICVAL_OFFSET 0x000000CC +#define BLE_RXMICVAL_INDEX 0x00000033 +#define BLE_RXMICVAL_RESET 0x00000000 + +__INLINE uint32_t ble_rxmicval_get(void) +{ + return REG_BLE_RD(BLE_RXMICVAL_ADDR); +} + +// field definitions +#define BLE_RXMICVAL_MASK ((uint32_t)0xFFFFFFFF) +#define BLE_RXMICVAL_LSB 0 +#define BLE_RXMICVAL_WIDTH ((uint32_t)0x00000020) + +#define BLE_RXMICVAL_RST 0x0 + +__INLINE uint32_t ble_rxmicval_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RXMICVAL_ADDR); + ASSERT_ERR((localVal & ~((uint32_t)0xFFFFFFFF)) == 0); + return (localVal >> 0); +} + +/** + * @brief RFTESTCNTL register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31 INFINITERX 0 + * 27 RXPKTCNTEN 0 + * 25:24 PERCOUNT_MODE 0x0 + * 15 INFINITETX 0 + * 14 TXLENGTHSRC 0 + * 13 PRBSTYPE 0 + * 12 TXPLDSRC 0 + * 11 TXPKTCNTEN 0 + * 07:00 TXLENGTH 0x0 + *+ */ +#define BLE_RFTESTCNTL_ADDR BASEBAND_REG_BASE +0xD0 //0x508000D0 +#define BLE_RFTESTCNTL_OFFSET 0x000000D0 +#define BLE_RFTESTCNTL_INDEX 0x00000034 +#define BLE_RFTESTCNTL_RESET 0x00000000 + +__INLINE uint32_t ble_rftestcntl_get(void) +{ + return REG_BLE_RD(BLE_RFTESTCNTL_ADDR); +} + +__INLINE void ble_rftestcntl_set(uint32_t value) +{ + REG_BLE_WR(BLE_RFTESTCNTL_ADDR, value); +} + +// field definitions +#define BLE_INFINITERX_BIT ((uint32_t)0x80000000) +#define BLE_INFINITERX_POS 31 +#define BLE_RXPKTCNTEN_BIT ((uint32_t)0x08000000) +#define BLE_RXPKTCNTEN_POS 27 +#define BLE_PERCOUNT_MODE_MASK ((uint32_t)0x03000000) +#define BLE_PERCOUNT_MODE_LSB 24 +#define BLE_PERCOUNT_MODE_WIDTH ((uint32_t)0x00000002) +#define BLE_INFINITETX_BIT ((uint32_t)0x00008000) +#define BLE_INFINITETX_POS 15 +#define BLE_TXLENGTHSRC_BIT ((uint32_t)0x00004000) +#define BLE_TXLENGTHSRC_POS 14 +#define BLE_PRBSTYPE_BIT ((uint32_t)0x00002000) +#define BLE_PRBSTYPE_POS 13 +#define BLE_TXPLDSRC_BIT ((uint32_t)0x00001000) +#define BLE_TXPLDSRC_POS 12 +#define BLE_TXPKTCNTEN_BIT ((uint32_t)0x00000800) +#define BLE_TXPKTCNTEN_POS 11 +#define BLE_TXLENGTH_MASK ((uint32_t)0x000000FF) +#define BLE_TXLENGTH_LSB 0 +#define BLE_TXLENGTH_WIDTH ((uint32_t)0x00000008) + +#define BLE_INFINITERX_RST 0x0 +#define BLE_RXPKTCNTEN_RST 0x0 +#define BLE_PERCOUNT_MODE_RST 0x0 +#define BLE_INFINITETX_RST 0x0 +#define BLE_TXLENGTHSRC_RST 0x0 +#define BLE_PRBSTYPE_RST 0x0 +#define BLE_TXPLDSRC_RST 0x0 +#define BLE_TXPKTCNTEN_RST 0x0 +#define BLE_TXLENGTH_RST 0x0 + +__INLINE void ble_rftestcntl_pack(uint8_t infiniterx, uint8_t rxpktcnten, uint8_t percountmode, uint8_t infinitetx, uint8_t txlengthsrc, uint8_t prbstype, uint8_t txpldsrc, uint8_t txpktcnten, uint8_t txlength) +{ + ASSERT_ERR((((uint32_t)infiniterx << 31) & ~((uint32_t)0x80000000)) == 0); + ASSERT_ERR((((uint32_t)rxpktcnten << 27) & ~((uint32_t)0x08000000)) == 0); + ASSERT_ERR((((uint32_t)percountmode << 24) & ~((uint32_t)0x03000000)) == 0); + ASSERT_ERR((((uint32_t)infinitetx << 15) & ~((uint32_t)0x00008000)) == 0); + ASSERT_ERR((((uint32_t)txlengthsrc << 14) & ~((uint32_t)0x00004000)) == 0); + ASSERT_ERR((((uint32_t)prbstype << 13) & ~((uint32_t)0x00002000)) == 0); + ASSERT_ERR((((uint32_t)txpldsrc << 12) & ~((uint32_t)0x00001000)) == 0); + ASSERT_ERR((((uint32_t)txpktcnten << 11) & ~((uint32_t)0x00000800)) == 0); + ASSERT_ERR((((uint32_t)txlength << 0) & ~((uint32_t)0x000000FF)) == 0); + REG_BLE_WR(BLE_RFTESTCNTL_ADDR, ((uint32_t)infiniterx << 31) | ((uint32_t)rxpktcnten << 27) | ((uint32_t)percountmode << 24) | ((uint32_t)infinitetx << 15) | ((uint32_t)txlengthsrc << 14) | ((uint32_t)prbstype << 13) | ((uint32_t)txpldsrc << 12) | ((uint32_t)txpktcnten << 11) | ((uint32_t)txlength << 0)); +} + +__INLINE void ble_rftestcntl_unpack(uint8_t* infiniterx, uint8_t* rxpktcnten, uint8_t* percountmode, uint8_t* infinitetx, uint8_t* txlengthsrc, uint8_t* prbstype, uint8_t* txpldsrc, uint8_t* txpktcnten, uint8_t* txlength) +{ + uint32_t localVal = REG_BLE_RD(BLE_RFTESTCNTL_ADDR); + + *infiniterx = (localVal & ((uint32_t)0x80000000)) >> 31; + *rxpktcnten = (localVal & ((uint32_t)0x08000000)) >> 27; + *percountmode = (localVal & ((uint32_t)0x03000000)) >> 24; + *infinitetx = (localVal & ((uint32_t)0x00008000)) >> 15; + *txlengthsrc = (localVal & ((uint32_t)0x00004000)) >> 14; + *prbstype = (localVal & ((uint32_t)0x00002000)) >> 13; + *txpldsrc = (localVal & ((uint32_t)0x00001000)) >> 12; + *txpktcnten = (localVal & ((uint32_t)0x00000800)) >> 11; + *txlength = (localVal & ((uint32_t)0x000000FF)) >> 0; +} + +__INLINE uint8_t ble_rftestcntl_infiniterx_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RFTESTCNTL_ADDR); + return ((localVal & ((uint32_t)0x80000000)) >> 31); +} + +__INLINE void ble_rftestcntl_infiniterx_setf(uint8_t infiniterx) +{ + ASSERT_ERR((((uint32_t)infiniterx << 31) & ~((uint32_t)0x80000000)) == 0); + REG_BLE_WR(BLE_RFTESTCNTL_ADDR, (REG_BLE_RD(BLE_RFTESTCNTL_ADDR) & ~((uint32_t)0x80000000)) | ((uint32_t)infiniterx << 31)); +} + +__INLINE uint8_t ble_rftestcntl_rxpktcnten_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RFTESTCNTL_ADDR); + return ((localVal & ((uint32_t)0x08000000)) >> 27); +} + +__INLINE void ble_rftestcntl_rxpktcnten_setf(uint8_t rxpktcnten) +{ + ASSERT_ERR((((uint32_t)rxpktcnten << 27) & ~((uint32_t)0x08000000)) == 0); + REG_BLE_WR(BLE_RFTESTCNTL_ADDR, (REG_BLE_RD(BLE_RFTESTCNTL_ADDR) & ~((uint32_t)0x08000000)) | ((uint32_t)rxpktcnten << 27)); +} + +__INLINE uint8_t ble_rftestcntl_percount_mode_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RFTESTCNTL_ADDR); + return ((localVal & ((uint32_t)0x03000000)) >> 24); +} + +__INLINE void ble_rftestcntl_percount_mode_setf(uint8_t percountmode) +{ + ASSERT_ERR((((uint32_t)percountmode << 24) & ~((uint32_t)0x03000000)) == 0); + REG_BLE_WR(BLE_RFTESTCNTL_ADDR, (REG_BLE_RD(BLE_RFTESTCNTL_ADDR) & ~((uint32_t)0x03000000)) | ((uint32_t)percountmode << 24)); +} + +__INLINE uint8_t ble_rftestcntl_infinitetx_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RFTESTCNTL_ADDR); + return ((localVal & ((uint32_t)0x00008000)) >> 15); +} + +__INLINE void ble_rftestcntl_infinitetx_setf(uint8_t infinitetx) +{ + ASSERT_ERR((((uint32_t)infinitetx << 15) & ~((uint32_t)0x00008000)) == 0); + REG_BLE_WR(BLE_RFTESTCNTL_ADDR, (REG_BLE_RD(BLE_RFTESTCNTL_ADDR) & ~((uint32_t)0x00008000)) | ((uint32_t)infinitetx << 15)); +} + +__INLINE uint8_t ble_rftestcntl_txlengthsrc_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RFTESTCNTL_ADDR); + return ((localVal & ((uint32_t)0x00004000)) >> 14); +} + +__INLINE void ble_rftestcntl_txlengthsrc_setf(uint8_t txlengthsrc) +{ + ASSERT_ERR((((uint32_t)txlengthsrc << 14) & ~((uint32_t)0x00004000)) == 0); + REG_BLE_WR(BLE_RFTESTCNTL_ADDR, (REG_BLE_RD(BLE_RFTESTCNTL_ADDR) & ~((uint32_t)0x00004000)) | ((uint32_t)txlengthsrc << 14)); +} + +__INLINE uint8_t ble_rftestcntl_prbstype_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RFTESTCNTL_ADDR); + return ((localVal & ((uint32_t)0x00002000)) >> 13); +} + +__INLINE void ble_rftestcntl_prbstype_setf(uint8_t prbstype) +{ + ASSERT_ERR((((uint32_t)prbstype << 13) & ~((uint32_t)0x00002000)) == 0); + REG_BLE_WR(BLE_RFTESTCNTL_ADDR, (REG_BLE_RD(BLE_RFTESTCNTL_ADDR) & ~((uint32_t)0x00002000)) | ((uint32_t)prbstype << 13)); +} + +__INLINE uint8_t ble_rftestcntl_txpldsrc_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RFTESTCNTL_ADDR); + return ((localVal & ((uint32_t)0x00001000)) >> 12); +} + +__INLINE void ble_rftestcntl_txpldsrc_setf(uint8_t txpldsrc) +{ + ASSERT_ERR((((uint32_t)txpldsrc << 12) & ~((uint32_t)0x00001000)) == 0); + REG_BLE_WR(BLE_RFTESTCNTL_ADDR, (REG_BLE_RD(BLE_RFTESTCNTL_ADDR) & ~((uint32_t)0x00001000)) | ((uint32_t)txpldsrc << 12)); +} + +__INLINE uint8_t ble_rftestcntl_txpktcnten_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RFTESTCNTL_ADDR); + return ((localVal & ((uint32_t)0x00000800)) >> 11); +} + +__INLINE void ble_rftestcntl_txpktcnten_setf(uint8_t txpktcnten) +{ + ASSERT_ERR((((uint32_t)txpktcnten << 11) & ~((uint32_t)0x00000800)) == 0); + REG_BLE_WR(BLE_RFTESTCNTL_ADDR, (REG_BLE_RD(BLE_RFTESTCNTL_ADDR) & ~((uint32_t)0x00000800)) | ((uint32_t)txpktcnten << 11)); +} + +__INLINE uint8_t ble_rftestcntl_txlength_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RFTESTCNTL_ADDR); + return ((localVal & ((uint32_t)0x000000FF)) >> 0); +} + +__INLINE void ble_rftestcntl_txlength_setf(uint8_t txlength) +{ + ASSERT_ERR((((uint32_t)txlength << 0) & ~((uint32_t)0x000000FF)) == 0); + REG_BLE_WR(BLE_RFTESTCNTL_ADDR, (REG_BLE_RD(BLE_RFTESTCNTL_ADDR) & ~((uint32_t)0x000000FF)) | ((uint32_t)txlength << 0)); +} + +/** + * @brief RFTESTTXSTAT register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31:00 TXPKTCNT 0x0 + *+ */ +#define BLE_RFTESTTXSTAT_ADDR BASEBAND_REG_BASE +0xD4 //0x508000D4 +#define BLE_RFTESTTXSTAT_OFFSET 0x000000D4 +#define BLE_RFTESTTXSTAT_INDEX 0x00000035 +#define BLE_RFTESTTXSTAT_RESET 0x00000000 + +__INLINE uint32_t ble_rftesttxstat_get(void) +{ + return REG_BLE_RD(BLE_RFTESTTXSTAT_ADDR); +} + +// field definitions +#define BLE_TXPKTCNT_MASK ((uint32_t)0xFFFFFFFF) +#define BLE_TXPKTCNT_LSB 0 +#define BLE_TXPKTCNT_WIDTH ((uint32_t)0x00000020) + +#define BLE_TXPKTCNT_RST 0x0 + +__INLINE uint32_t ble_rftesttxstat_txpktcnt_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RFTESTTXSTAT_ADDR); + ASSERT_ERR((localVal & ~((uint32_t)0xFFFFFFFF)) == 0); + return (localVal >> 0); +} + +/** + * @brief RFTESTRXSTAT register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31:00 RXPKTCNT 0x0 + *+ */ +#define BLE_RFTESTRXSTAT_ADDR BASEBAND_REG_BASE +0xD8 // 0x508000D8 +#define BLE_RFTESTRXSTAT_OFFSET 0x000000D8 +#define BLE_RFTESTRXSTAT_INDEX 0x00000036 +#define BLE_RFTESTRXSTAT_RESET 0x00000000 + +__INLINE uint32_t ble_rftestrxstat_get(void) +{ + return REG_BLE_RD(BLE_RFTESTRXSTAT_ADDR); +} + +// field definitions +#define BLE_RXPKTCNT_MASK ((uint32_t)0xFFFFFFFF) +#define BLE_RXPKTCNT_LSB 0 +#define BLE_RXPKTCNT_WIDTH ((uint32_t)0x00000020) + +#define BLE_RXPKTCNT_RST 0x0 + +__INLINE uint32_t ble_rftestrxstat_rxpktcnt_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RFTESTRXSTAT_ADDR); + ASSERT_ERR((localVal & ~((uint32_t)0xFFFFFFFF)) == 0); + return (localVal >> 0); +} + +/** + * @brief TIMGENCNTL register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 25:16 PREFETCHABORT_TIME 0x1FE + * 08:00 PREFETCH_TIME 0x96 + *+ */ +#define BLE_TIMGENCNTL_ADDR BASEBAND_REG_BASE +0xE0 // 0x508000E0 +#define BLE_TIMGENCNTL_OFFSET 0x000000E0 +#define BLE_TIMGENCNTL_INDEX 0x00000038 +#define BLE_TIMGENCNTL_RESET 0x01FE0096 + +__INLINE uint32_t ble_timgencntl_get(void) +{ + return REG_BLE_RD(BLE_TIMGENCNTL_ADDR); +} + +__INLINE void ble_timgencntl_set(uint32_t value) +{ + REG_BLE_WR(BLE_TIMGENCNTL_ADDR, value); +} + +// field definitions +#define BLE_PREFETCHABORT_TIME_MASK ((uint32_t)0x03FF0000) +#define BLE_PREFETCHABORT_TIME_LSB 16 +#define BLE_PREFETCHABORT_TIME_WIDTH ((uint32_t)0x0000000A) +#define BLE_PREFETCH_TIME_MASK ((uint32_t)0x000001FF) +#define BLE_PREFETCH_TIME_LSB 0 +#define BLE_PREFETCH_TIME_WIDTH ((uint32_t)0x00000009) + +#define BLE_PREFETCHABORT_TIME_RST 0x1FE +#define BLE_PREFETCH_TIME_RST 0x96 + +__INLINE void ble_timgencntl_pack(uint16_t prefetchaborttime, uint16_t prefetchtime) +{ + ASSERT_ERR((((uint32_t)prefetchaborttime << 16) & ~((uint32_t)0x03FF0000)) == 0); + ASSERT_ERR((((uint32_t)prefetchtime << 0) & ~((uint32_t)0x000001FF)) == 0); + REG_BLE_WR(BLE_TIMGENCNTL_ADDR, ((uint32_t)prefetchaborttime << 16) | ((uint32_t)prefetchtime << 0)); +} + +__INLINE void ble_timgencntl_unpack(uint16_t* prefetchaborttime, uint16_t* prefetchtime) +{ + uint32_t localVal = REG_BLE_RD(BLE_TIMGENCNTL_ADDR); + + *prefetchaborttime = (localVal & ((uint32_t)0x03FF0000)) >> 16; + *prefetchtime = (localVal & ((uint32_t)0x000001FF)) >> 0; +} + +__INLINE uint16_t ble_timgencntl_prefetchabort_time_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_TIMGENCNTL_ADDR); + return ((localVal & ((uint32_t)0x03FF0000)) >> 16); +} + +__INLINE void ble_timgencntl_prefetchabort_time_setf(uint16_t prefetchaborttime) +{ + ASSERT_ERR((((uint32_t)prefetchaborttime << 16) & ~((uint32_t)0x03FF0000)) == 0); + REG_BLE_WR(BLE_TIMGENCNTL_ADDR, (REG_BLE_RD(BLE_TIMGENCNTL_ADDR) & ~((uint32_t)0x03FF0000)) | ((uint32_t)prefetchaborttime << 16)); +} + +__INLINE uint16_t ble_timgencntl_prefetch_time_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_TIMGENCNTL_ADDR); + return ((localVal & ((uint32_t)0x000001FF)) >> 0); +} + +__INLINE void ble_timgencntl_prefetch_time_setf(uint16_t prefetchtime) +{ + ASSERT_ERR((((uint32_t)prefetchtime << 0) & ~((uint32_t)0x000001FF)) == 0); + REG_BLE_WR(BLE_TIMGENCNTL_ADDR, (REG_BLE_RD(BLE_TIMGENCNTL_ADDR) & ~((uint32_t)0x000001FF)) | ((uint32_t)prefetchtime << 0)); +} + +/** + * @brief FINETIMTGT register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 27:00 FINETARGET 0x0 + *+ */ +#define BLE_FINETIMTGT_ADDR BASEBAND_REG_BASE +0xE4 //0x508000E4 +#define BLE_FINETIMTGT_OFFSET 0x000000E4 +#define BLE_FINETIMTGT_INDEX 0x00000039 +#define BLE_FINETIMTGT_RESET 0x00000000 + +__INLINE uint32_t ble_finetimtgt_get(void) +{ + return REG_BLE_RD(BLE_FINETIMTGT_ADDR); +} + +__INLINE void ble_finetimtgt_set(uint32_t value) +{ + REG_BLE_WR(BLE_FINETIMTGT_ADDR, value); +} + +// field definitions +#define BLE_FINETARGET_MASK ((uint32_t)0x0FFFFFFF) +#define BLE_FINETARGET_LSB 0 +#define BLE_FINETARGET_WIDTH ((uint32_t)0x0000001C) + +#define BLE_FINETARGET_RST 0x0 + +__INLINE uint32_t ble_finetimtgt_finetarget_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_FINETIMTGT_ADDR); + ASSERT_ERR((localVal & ~((uint32_t)0x0FFFFFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void ble_finetimtgt_finetarget_setf(uint32_t finetarget) +{ + ASSERT_ERR((((uint32_t)finetarget << 0) & ~((uint32_t)0x0FFFFFFF)) == 0); + REG_BLE_WR(BLE_FINETIMTGT_ADDR, (uint32_t)finetarget << 0); +} + +/** + * @brief CLKNTGT1 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 27:00 CLKNTGT1 0x0 + *+ */ +#define BLE_CLKNTGT1_ADDR BASEBAND_REG_BASE +0xE8 //0x508000E8 +#define BLE_CLKNTGT1_OFFSET 0x000000E8 +#define BLE_CLKNTGT1_INDEX 0x0000003A +#define BLE_CLKNTGT1_RESET 0x00000000 + +__INLINE uint32_t ble_clkntgt1_get(void) +{ + return REG_BLE_RD(BLE_CLKNTGT1_ADDR); +} + +__INLINE void ble_clkntgt1_set(uint32_t value) +{ + REG_BLE_WR(BLE_CLKNTGT1_ADDR, value); +} + +// field definitions +#define BLE_CLKNTGT1_MASK ((uint32_t)0x0FFFFFFF) +#define BLE_CLKNTGT1_LSB 0 +#define BLE_CLKNTGT1_WIDTH ((uint32_t)0x0000001C) + +#define BLE_CLKNTGT1_RST 0x0 + +__INLINE uint32_t ble_clkntgt1_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_CLKNTGT1_ADDR); + ASSERT_ERR((localVal & ~((uint32_t)0x0FFFFFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void ble_clkntgt1_setf(uint32_t clkntgt1) +{ + ASSERT_ERR((((uint32_t)clkntgt1 << 0) & ~((uint32_t)0x0FFFFFFF)) == 0); + REG_BLE_WR(BLE_CLKNTGT1_ADDR, (uint32_t)clkntgt1 << 0); +} + +/** + * @brief HMICROSECTGT1 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 09:00 HMICROSECTGT1 0x0 + *+ */ +#define BLE_HMICROSECTGT1_ADDR BASEBAND_REG_BASE +0xEC //0x508000EC +#define BLE_HMICROSECTGT1_OFFSET 0x000000EC +#define BLE_HMICROSECTGT1_INDEX 0x0000003B +#define BLE_HMICROSECTGT1_RESET 0x00000000 + +__INLINE uint32_t ble_hmicrosectgt1_get(void) +{ + return REG_BLE_RD(BLE_HMICROSECTGT1_ADDR); +} + +__INLINE void ble_hmicrosectgt1_set(uint32_t value) +{ + REG_BLE_WR(BLE_HMICROSECTGT1_ADDR, value); +} + +// field definitions +#define BLE_HMICROSECTGT1_MASK ((uint32_t)0x000003FF) +#define BLE_HMICROSECTGT1_LSB 0 +#define BLE_HMICROSECTGT1_WIDTH ((uint32_t)0x0000000A) + +#define BLE_HMICROSECTGT1_RST 0x0 + +__INLINE uint16_t ble_hmicrosectgt1_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_HMICROSECTGT1_ADDR); + ASSERT_ERR((localVal & ~((uint32_t)0x000003FF)) == 0); + return (localVal >> 0); +} + +__INLINE void ble_hmicrosectgt1_setf(uint16_t hmicrosectgt1) +{ + ASSERT_ERR((((uint32_t)hmicrosectgt1 << 0) & ~((uint32_t)0x000003FF)) == 0); + REG_BLE_WR(BLE_HMICROSECTGT1_ADDR, (uint32_t)hmicrosectgt1 << 0); +} + +/** + * @brief CLKNTGT2 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 27:00 CLKNTGT2 0x0 + *+ */ +#define BLE_CLKNTGT2_ADDR BASEBAND_REG_BASE +0xF0 //0x508000F0 +#define BLE_CLKNTGT2_OFFSET 0x000000F0 +#define BLE_CLKNTGT2_INDEX 0x0000003C +#define BLE_CLKNTGT2_RESET 0x00000000 + +__INLINE uint32_t ble_clkntgt2_get(void) +{ + return REG_BLE_RD(BLE_CLKNTGT2_ADDR); +} + +__INLINE void ble_clkntgt2_set(uint32_t value) +{ + REG_BLE_WR(BLE_CLKNTGT2_ADDR, value); +} + +// field definitions +#define BLE_CLKNTGT2_MASK ((uint32_t)0x0FFFFFFF) +#define BLE_CLKNTGT2_LSB 0 +#define BLE_CLKNTGT2_WIDTH ((uint32_t)0x0000001C) + +#define BLE_CLKNTGT2_RST 0x0 + +__INLINE uint32_t ble_clkntgt2_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_CLKNTGT2_ADDR); + ASSERT_ERR((localVal & ~((uint32_t)0x0FFFFFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void ble_clkntgt2_setf(uint32_t clkntgt2) +{ + ASSERT_ERR((((uint32_t)clkntgt2 << 0) & ~((uint32_t)0x0FFFFFFF)) == 0); + REG_BLE_WR(BLE_CLKNTGT2_ADDR, (uint32_t)clkntgt2 << 0); +} + +/** + * @brief HMICROSECTGT2 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 09:00 HMICROSECTGT2 0x0 + *+ */ +#define BLE_HMICROSECTGT2_ADDR BASEBAND_REG_BASE +0xF4 //0x508000F4 +#define BLE_HMICROSECTGT2_OFFSET 0x000000F4 +#define BLE_HMICROSECTGT2_INDEX 0x0000003D +#define BLE_HMICROSECTGT2_RESET 0x00000000 + +__INLINE uint32_t ble_hmicrosectgt2_get(void) +{ + return REG_BLE_RD(BLE_HMICROSECTGT2_ADDR); +} + +__INLINE void ble_hmicrosectgt2_set(uint32_t value) +{ + REG_BLE_WR(BLE_HMICROSECTGT2_ADDR, value); +} + +// field definitions +#define BLE_HMICROSECTGT2_MASK ((uint32_t)0x000003FF) +#define BLE_HMICROSECTGT2_LSB 0 +#define BLE_HMICROSECTGT2_WIDTH ((uint32_t)0x0000000A) + +#define BLE_HMICROSECTGT2_RST 0x0 + +__INLINE uint16_t ble_hmicrosectgt2_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_HMICROSECTGT2_ADDR); + ASSERT_ERR((localVal & ~((uint32_t)0x000003FF)) == 0); + return (localVal >> 0); +} + +__INLINE void ble_hmicrosectgt2_setf(uint16_t hmicrosectgt2) +{ + ASSERT_ERR((((uint32_t)hmicrosectgt2 << 0) & ~((uint32_t)0x000003FF)) == 0); + REG_BLE_WR(BLE_HMICROSECTGT2_ADDR, (uint32_t)hmicrosectgt2 << 0); +} + +/** + * @brief SLOTCLK register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31 SAMP 0 + * 30 CLKN_UPD 0 + * 27:00 SCLK 0x0 + *+ */ +#define BLE_SLOTCLK_ADDR BASEBAND_REG_BASE +0xF8 // 0x508000F8 +#define BLE_SLOTCLK_OFFSET 0x000000F8 +#define BLE_SLOTCLK_INDEX 0x0000003E +#define BLE_SLOTCLK_RESET 0x00000000 + +__INLINE uint32_t ble_slotclk_get(void) +{ + return REG_BLE_RD(BLE_SLOTCLK_ADDR); +} + +__INLINE void ble_slotclk_set(uint32_t value) +{ + REG_BLE_WR(BLE_SLOTCLK_ADDR, value); +} + +// field definitions +#define BLE_SAMP_BIT ((uint32_t)0x80000000) +#define BLE_SAMP_POS 31 +#define BLE_CLKN_UPD_BIT ((uint32_t)0x40000000) +#define BLE_CLKN_UPD_POS 30 +#define BLE_SCLK_MASK ((uint32_t)0x0FFFFFFF) +#define BLE_SCLK_LSB 0 +#define BLE_SCLK_WIDTH ((uint32_t)0x0000001C) + +#define BLE_SAMP_RST 0x0 +#define BLE_CLKN_UPD_RST 0x0 +#define BLE_SCLK_RST 0x0 + +__INLINE void ble_slotclk_pack(uint8_t samp, uint8_t clknupd, uint32_t sclk) +{ + ASSERT_ERR((((uint32_t)samp << 31) & ~((uint32_t)0x80000000)) == 0); + ASSERT_ERR((((uint32_t)clknupd << 30) & ~((uint32_t)0x40000000)) == 0); + ASSERT_ERR((((uint32_t)sclk << 0) & ~((uint32_t)0x0FFFFFFF)) == 0); + REG_BLE_WR(BLE_SLOTCLK_ADDR, ((uint32_t)samp << 31) | ((uint32_t)clknupd << 30) | ((uint32_t)sclk << 0)); +} + +__INLINE void ble_slotclk_unpack(uint8_t* samp, uint8_t* clknupd, uint32_t* sclk) +{ + uint32_t localVal = REG_BLE_RD(BLE_SLOTCLK_ADDR); + + *samp = (localVal & ((uint32_t)0x80000000)) >> 31; + *clknupd = (localVal & ((uint32_t)0x40000000)) >> 30; + *sclk = (localVal & ((uint32_t)0x0FFFFFFF)) >> 0; +} + +__INLINE uint8_t ble_slotclk_samp_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_SLOTCLK_ADDR); + return ((localVal & ((uint32_t)0x80000000)) >> 31); +} + +__INLINE void ble_slotclk_samp_setf(uint8_t samp) +{ + ASSERT_ERR((((uint32_t)samp << 31) & ~((uint32_t)0x80000000)) == 0); + REG_BLE_WR(BLE_SLOTCLK_ADDR, (REG_BLE_RD(BLE_SLOTCLK_ADDR) & ~((uint32_t)0x80000000)) | ((uint32_t)samp << 31)); +} + +__INLINE uint8_t ble_slotclk_clkn_upd_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_SLOTCLK_ADDR); + return ((localVal & ((uint32_t)0x40000000)) >> 30); +} + +__INLINE void ble_slotclk_clkn_upd_setf(uint8_t clknupd) +{ + ASSERT_ERR((((uint32_t)clknupd << 30) & ~((uint32_t)0x40000000)) == 0); + REG_BLE_WR(BLE_SLOTCLK_ADDR, (REG_BLE_RD(BLE_SLOTCLK_ADDR) & ~((uint32_t)0x40000000)) | ((uint32_t)clknupd << 30)); +} + +__INLINE uint32_t ble_slotclk_sclk_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_SLOTCLK_ADDR); + return ((localVal & ((uint32_t)0x0FFFFFFF)) >> 0); +} + +__INLINE void ble_slotclk_sclk_setf(uint32_t sclk) +{ + ASSERT_ERR((((uint32_t)sclk << 0) & ~((uint32_t)0x0FFFFFFF)) == 0); + REG_BLE_WR(BLE_SLOTCLK_ADDR, (REG_BLE_RD(BLE_SLOTCLK_ADDR) & ~((uint32_t)0x0FFFFFFF)) | ((uint32_t)sclk << 0)); +} + +/** + * @brief FINETIMECNT register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 09:00 FINECNT 0x0 + *+ */ +#define BLE_FINETIMECNT_ADDR BASEBAND_REG_BASE +0xFC // 0x508000FC +#define BLE_FINETIMECNT_OFFSET 0x000000FC +#define BLE_FINETIMECNT_INDEX 0x0000003F +#define BLE_FINETIMECNT_RESET 0x00000000 + +__INLINE uint32_t ble_finetimecnt_get(void) +{ + return REG_BLE_RD(BLE_FINETIMECNT_ADDR); +} + +// field definitions +#define BLE_FINECNT_MASK ((uint32_t)0x000003FF) +#define BLE_FINECNT_LSB 0 +#define BLE_FINECNT_WIDTH ((uint32_t)0x0000000A) + +#define BLE_FINECNT_RST 0x0 + +__INLINE uint16_t ble_finetimecnt_finecnt_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_FINETIMECNT_ADDR); + ASSERT_ERR((localVal & ~((uint32_t)0x000003FF)) == 0); + return (localVal >> 0); +} + +/** + * @brief ACTSCHCNTL register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31 START_ACT 0 + * 03:00 ENTRY_IDX 0x0 + *+ */ +#define BLE_ACTSCHCNTL_ADDR BASEBAND_REG_BASE +0x100 // 0x50800100 +#define BLE_ACTSCHCNTL_OFFSET 0x00000100 +#define BLE_ACTSCHCNTL_INDEX 0x00000040 +#define BLE_ACTSCHCNTL_RESET 0x00000000 + +__INLINE uint32_t ble_actschcntl_get(void) +{ + return REG_BLE_RD(BLE_ACTSCHCNTL_ADDR); +} + +__INLINE void ble_actschcntl_set(uint32_t value) +{ + REG_BLE_WR(BLE_ACTSCHCNTL_ADDR, value); +} + +// field definitions +#define BLE_START_ACT_BIT ((uint32_t)0x80000000) +#define BLE_START_ACT_POS 31 +#define BLE_ENTRY_IDX_MASK ((uint32_t)0x0000000F) +#define BLE_ENTRY_IDX_LSB 0 +#define BLE_ENTRY_IDX_WIDTH ((uint32_t)0x00000004) + +#define BLE_START_ACT_RST 0x0 +#define BLE_ENTRY_IDX_RST 0x0 + +__INLINE void ble_actschcntl_pack(uint8_t startact, uint8_t entryidx) +{ + ASSERT_ERR((((uint32_t)startact << 31) & ~((uint32_t)0x80000000)) == 0); + ASSERT_ERR((((uint32_t)entryidx << 0) & ~((uint32_t)0x0000000F)) == 0); + REG_BLE_WR(BLE_ACTSCHCNTL_ADDR, ((uint32_t)startact << 31) | ((uint32_t)entryidx << 0)); +} + +__INLINE void ble_actschcntl_unpack(uint8_t* startact, uint8_t* entryidx) +{ + uint32_t localVal = REG_BLE_RD(BLE_ACTSCHCNTL_ADDR); + + *startact = (localVal & ((uint32_t)0x80000000)) >> 31; + *entryidx = (localVal & ((uint32_t)0x0000000F)) >> 0; +} + +__INLINE uint8_t ble_actschcntl_start_act_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_ACTSCHCNTL_ADDR); + return ((localVal & ((uint32_t)0x80000000)) >> 31); +} + +__INLINE void ble_actschcntl_start_act_setf(uint8_t startact) +{ + ASSERT_ERR((((uint32_t)startact << 31) & ~((uint32_t)0x80000000)) == 0); + REG_BLE_WR(BLE_ACTSCHCNTL_ADDR, (REG_BLE_RD(BLE_ACTSCHCNTL_ADDR) & ~((uint32_t)0x80000000)) | ((uint32_t)startact << 31)); +} + +__INLINE uint8_t ble_actschcntl_entry_idx_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_ACTSCHCNTL_ADDR); + return ((localVal & ((uint32_t)0x0000000F)) >> 0); +} + +__INLINE void ble_actschcntl_entry_idx_setf(uint8_t entryidx) +{ + ASSERT_ERR((((uint32_t)entryidx << 0) & ~((uint32_t)0x0000000F)) == 0); + REG_BLE_WR(BLE_ACTSCHCNTL_ADDR, (REG_BLE_RD(BLE_ACTSCHCNTL_ADDR) & ~((uint32_t)0x0000000F)) | ((uint32_t)entryidx << 0)); +} + +/** + * @brief STARTEVTCLKNTS register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 27:00 STARTEVTCLKNTS 0x0 + *+ */ +#define BLE_STARTEVTCLKNTS_ADDR BASEBAND_REG_BASE +0x104 // 0x50800104 +#define BLE_STARTEVTCLKNTS_OFFSET 0x00000104 +#define BLE_STARTEVTCLKNTS_INDEX 0x00000041 +#define BLE_STARTEVTCLKNTS_RESET 0x00000000 + +__INLINE uint32_t ble_startevtclknts_get(void) +{ + return REG_BLE_RD(BLE_STARTEVTCLKNTS_ADDR); +} + +// field definitions +#define BLE_STARTEVTCLKNTS_MASK ((uint32_t)0x0FFFFFFF) +#define BLE_STARTEVTCLKNTS_LSB 0 +#define BLE_STARTEVTCLKNTS_WIDTH ((uint32_t)0x0000001C) + +#define BLE_STARTEVTCLKNTS_RST 0x0 + +__INLINE uint32_t ble_startevtclknts_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_STARTEVTCLKNTS_ADDR); + ASSERT_ERR((localVal & ~((uint32_t)0x0FFFFFFF)) == 0); + return (localVal >> 0); +} + +/** + * @brief STARTEVTFINECNTTS register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 09:00 STARTEVTFINECNTTS 0x0 + *+ */ +#define BLE_STARTEVTFINECNTTS_ADDR BASEBAND_REG_BASE +0x108 // 0x50800108 +#define BLE_STARTEVTFINECNTTS_OFFSET 0x00000108 +#define BLE_STARTEVTFINECNTTS_INDEX 0x00000042 +#define BLE_STARTEVTFINECNTTS_RESET 0x00000000 + +__INLINE uint32_t ble_startevtfinecntts_get(void) +{ + return REG_BLE_RD(BLE_STARTEVTFINECNTTS_ADDR); +} + +// field definitions +#define BLE_STARTEVTFINECNTTS_MASK ((uint32_t)0x000003FF) +#define BLE_STARTEVTFINECNTTS_LSB 0 +#define BLE_STARTEVTFINECNTTS_WIDTH ((uint32_t)0x0000000A) + +#define BLE_STARTEVTFINECNTTS_RST 0x0 + +__INLINE uint16_t ble_startevtfinecntts_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_STARTEVTFINECNTTS_ADDR); + ASSERT_ERR((localVal & ~((uint32_t)0x000003FF)) == 0); + return (localVal >> 0); +} + +/** + * @brief ENDEVTCLKNTS register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 27:00 ENDEVTCLKNTS 0x0 + *+ */ +#define BLE_ENDEVTCLKNTS_ADDR BASEBAND_REG_BASE +0x10C //0x5080010C +#define BLE_ENDEVTCLKNTS_OFFSET 0x0000010C +#define BLE_ENDEVTCLKNTS_INDEX 0x00000043 +#define BLE_ENDEVTCLKNTS_RESET 0x00000000 + +__INLINE uint32_t ble_endevtclknts_get(void) +{ + return REG_BLE_RD(BLE_ENDEVTCLKNTS_ADDR); +} + +// field definitions +#define BLE_ENDEVTCLKNTS_MASK ((uint32_t)0x0FFFFFFF) +#define BLE_ENDEVTCLKNTS_LSB 0 +#define BLE_ENDEVTCLKNTS_WIDTH ((uint32_t)0x0000001C) + +#define BLE_ENDEVTCLKNTS_RST 0x0 + +__INLINE uint32_t ble_endevtclknts_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_ENDEVTCLKNTS_ADDR); + ASSERT_ERR((localVal & ~((uint32_t)0x0FFFFFFF)) == 0); + return (localVal >> 0); +} + +/** + * @brief ENDEVTFINECNTTS register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 09:00 ENDEVTFINECNTTS 0x0 + *+ */ +#define BLE_ENDEVTFINECNTTS_ADDR BASEBAND_REG_BASE +0x110 //0x50800110 +#define BLE_ENDEVTFINECNTTS_OFFSET 0x00000110 +#define BLE_ENDEVTFINECNTTS_INDEX 0x00000044 +#define BLE_ENDEVTFINECNTTS_RESET 0x00000000 + +__INLINE uint32_t ble_endevtfinecntts_get(void) +{ + return REG_BLE_RD(BLE_ENDEVTFINECNTTS_ADDR); +} + +// field definitions +#define BLE_ENDEVTFINECNTTS_MASK ((uint32_t)0x000003FF) +#define BLE_ENDEVTFINECNTTS_LSB 0 +#define BLE_ENDEVTFINECNTTS_WIDTH ((uint32_t)0x0000000A) + +#define BLE_ENDEVTFINECNTTS_RST 0x0 + +__INLINE uint16_t ble_endevtfinecntts_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_ENDEVTFINECNTTS_ADDR); + ASSERT_ERR((localVal & ~((uint32_t)0x000003FF)) == 0); + return (localVal >> 0); +} + +/** + * @brief SKIPEVTCLKNTS register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 27:00 SKIPEVTCLKNTS 0x0 + *+ */ +#define BLE_SKIPEVTCLKNTS_ADDR BASEBAND_REG_BASE +0x114 // 0x50800114 +#define BLE_SKIPEVTCLKNTS_OFFSET 0x00000114 +#define BLE_SKIPEVTCLKNTS_INDEX 0x00000045 +#define BLE_SKIPEVTCLKNTS_RESET 0x00000000 + +__INLINE uint32_t ble_skipevtclknts_get(void) +{ + return REG_BLE_RD(BLE_SKIPEVTCLKNTS_ADDR); +} + +// field definitions +#define BLE_SKIPEVTCLKNTS_MASK ((uint32_t)0x0FFFFFFF) +#define BLE_SKIPEVTCLKNTS_LSB 0 +#define BLE_SKIPEVTCLKNTS_WIDTH ((uint32_t)0x0000001C) + +#define BLE_SKIPEVTCLKNTS_RST 0x0 + +__INLINE uint32_t ble_skipevtclknts_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_SKIPEVTCLKNTS_ADDR); + ASSERT_ERR((localVal & ~((uint32_t)0x0FFFFFFF)) == 0); + return (localVal >> 0); +} + +/** + * @brief SKIPEVTFINECNTTS register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 09:00 SKIPEVTFINECNTTS 0x0 + *+ */ +#define BLE_SKIPEVTFINECNTTS_ADDR BASEBAND_REG_BASE +0x118 // 0x50800118 +#define BLE_SKIPEVTFINECNTTS_OFFSET 0x00000118 +#define BLE_SKIPEVTFINECNTTS_INDEX 0x00000046 +#define BLE_SKIPEVTFINECNTTS_RESET 0x00000000 + +__INLINE uint32_t ble_skipevtfinecntts_get(void) +{ + return REG_BLE_RD(BLE_SKIPEVTFINECNTTS_ADDR); +} + +// field definitions +#define BLE_SKIPEVTFINECNTTS_MASK ((uint32_t)0x000003FF) +#define BLE_SKIPEVTFINECNTTS_LSB 0 +#define BLE_SKIPEVTFINECNTTS_WIDTH ((uint32_t)0x0000000A) + +#define BLE_SKIPEVTFINECNTTS_RST 0x0 + +__INLINE uint16_t ble_skipevtfinecntts_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_SKIPEVTFINECNTTS_ADDR); + ASSERT_ERR((localVal & ~((uint32_t)0x000003FF)) == 0); + return (localVal >> 0); +} + +/** + * @brief ADVTIM register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31:24 TX_AUXPTR_THR 0x0 + * 23:16 RX_AUXPTR_THR 0x0 + * 13:00 ADVINT 0x0 + *+ */ +#define BLE_ADVTIM_ADDR BASEBAND_REG_BASE +0x120 // 0x50800120 +#define BLE_ADVTIM_OFFSET 0x00000120 +#define BLE_ADVTIM_INDEX 0x00000048 +#define BLE_ADVTIM_RESET 0x00000000 + +__INLINE uint32_t ble_advtim_get(void) +{ + return REG_BLE_RD(BLE_ADVTIM_ADDR); +} + +__INLINE void ble_advtim_set(uint32_t value) +{ + REG_BLE_WR(BLE_ADVTIM_ADDR, value); +} + +// field definitions +#define BLE_TX_AUXPTR_THR_MASK ((uint32_t)0xFF000000) +#define BLE_TX_AUXPTR_THR_LSB 24 +#define BLE_TX_AUXPTR_THR_WIDTH ((uint32_t)0x00000008) +#define BLE_RX_AUXPTR_THR_MASK ((uint32_t)0x00FF0000) +#define BLE_RX_AUXPTR_THR_LSB 16 +#define BLE_RX_AUXPTR_THR_WIDTH ((uint32_t)0x00000008) +#define BLE_ADVINT_MASK ((uint32_t)0x00003FFF) +#define BLE_ADVINT_LSB 0 +#define BLE_ADVINT_WIDTH ((uint32_t)0x0000000E) + +#define BLE_TX_AUXPTR_THR_RST 0x0 +#define BLE_RX_AUXPTR_THR_RST 0x0 +#define BLE_ADVINT_RST 0x0 + +__INLINE void ble_advtim_pack(uint8_t txauxptrthr, uint8_t rxauxptrthr, uint16_t advint) +{ + ASSERT_ERR((((uint32_t)txauxptrthr << 24) & ~((uint32_t)0xFF000000)) == 0); + ASSERT_ERR((((uint32_t)rxauxptrthr << 16) & ~((uint32_t)0x00FF0000)) == 0); + ASSERT_ERR((((uint32_t)advint << 0) & ~((uint32_t)0x00003FFF)) == 0); + REG_BLE_WR(BLE_ADVTIM_ADDR, ((uint32_t)txauxptrthr << 24) | ((uint32_t)rxauxptrthr << 16) | ((uint32_t)advint << 0)); +} + +__INLINE void ble_advtim_unpack(uint8_t* txauxptrthr, uint8_t* rxauxptrthr, uint16_t* advint) +{ + uint32_t localVal = REG_BLE_RD(BLE_ADVTIM_ADDR); + + *txauxptrthr = (localVal & ((uint32_t)0xFF000000)) >> 24; + *rxauxptrthr = (localVal & ((uint32_t)0x00FF0000)) >> 16; + *advint = (localVal & ((uint32_t)0x00003FFF)) >> 0; +} + +__INLINE uint8_t ble_advtim_tx_auxptr_thr_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_ADVTIM_ADDR); + return ((localVal & ((uint32_t)0xFF000000)) >> 24); +} + +__INLINE void ble_advtim_tx_auxptr_thr_setf(uint8_t txauxptrthr) +{ + ASSERT_ERR((((uint32_t)txauxptrthr << 24) & ~((uint32_t)0xFF000000)) == 0); + REG_BLE_WR(BLE_ADVTIM_ADDR, (REG_BLE_RD(BLE_ADVTIM_ADDR) & ~((uint32_t)0xFF000000)) | ((uint32_t)txauxptrthr << 24)); +} + +__INLINE uint8_t ble_advtim_rx_auxptr_thr_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_ADVTIM_ADDR); + return ((localVal & ((uint32_t)0x00FF0000)) >> 16); +} + +__INLINE void ble_advtim_rx_auxptr_thr_setf(uint8_t rxauxptrthr) +{ + ASSERT_ERR((((uint32_t)rxauxptrthr << 16) & ~((uint32_t)0x00FF0000)) == 0); + REG_BLE_WR(BLE_ADVTIM_ADDR, (REG_BLE_RD(BLE_ADVTIM_ADDR) & ~((uint32_t)0x00FF0000)) | ((uint32_t)rxauxptrthr << 16)); +} + +__INLINE uint16_t ble_advtim_advint_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_ADVTIM_ADDR); + return ((localVal & ((uint32_t)0x00003FFF)) >> 0); +} + +__INLINE void ble_advtim_advint_setf(uint16_t advint) +{ + ASSERT_ERR((((uint32_t)advint << 0) & ~((uint32_t)0x00003FFF)) == 0); + REG_BLE_WR(BLE_ADVTIM_ADDR, (REG_BLE_RD(BLE_ADVTIM_ADDR) & ~((uint32_t)0x00003FFF)) | ((uint32_t)advint << 0)); +} + +/** + * @brief ACTSCANCNTL register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 24:16 BACKOFF 0x1 + * 08:00 UPPERLIMIT 0x1 + *+ */ +#define BLE_ACTSCANCNTL_ADDR BASEBAND_REG_BASE +0x124 // 0x50800124 +#define BLE_ACTSCANCNTL_OFFSET 0x00000124 +#define BLE_ACTSCANCNTL_INDEX 0x00000049 +#define BLE_ACTSCANCNTL_RESET 0x00010001 + +__INLINE uint32_t ble_actscancntl_get(void) +{ + return REG_BLE_RD(BLE_ACTSCANCNTL_ADDR); +} + +__INLINE void ble_actscancntl_set(uint32_t value) +{ + REG_BLE_WR(BLE_ACTSCANCNTL_ADDR, value); +} + +// field definitions +#define BLE_BACKOFF_MASK ((uint32_t)0x01FF0000) +#define BLE_BACKOFF_LSB 16 +#define BLE_BACKOFF_WIDTH ((uint32_t)0x00000009) +#define BLE_UPPERLIMIT_MASK ((uint32_t)0x000001FF) +#define BLE_UPPERLIMIT_LSB 0 +#define BLE_UPPERLIMIT_WIDTH ((uint32_t)0x00000009) + +#define BLE_BACKOFF_RST 0x1 +#define BLE_UPPERLIMIT_RST 0x1 + +__INLINE void ble_actscancntl_pack(uint16_t backoff, uint16_t upperlimit) +{ + ASSERT_ERR((((uint32_t)backoff << 16) & ~((uint32_t)0x01FF0000)) == 0); + ASSERT_ERR((((uint32_t)upperlimit << 0) & ~((uint32_t)0x000001FF)) == 0); + REG_BLE_WR(BLE_ACTSCANCNTL_ADDR, ((uint32_t)backoff << 16) | ((uint32_t)upperlimit << 0)); +} + +__INLINE void ble_actscancntl_unpack(uint16_t* backoff, uint16_t* upperlimit) +{ + uint32_t localVal = REG_BLE_RD(BLE_ACTSCANCNTL_ADDR); + + *backoff = (localVal & ((uint32_t)0x01FF0000)) >> 16; + *upperlimit = (localVal & ((uint32_t)0x000001FF)) >> 0; +} + +__INLINE uint16_t ble_actscancntl_backoff_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_ACTSCANCNTL_ADDR); + return ((localVal & ((uint32_t)0x01FF0000)) >> 16); +} + +__INLINE void ble_actscancntl_backoff_setf(uint16_t backoff) +{ + ASSERT_ERR((((uint32_t)backoff << 16) & ~((uint32_t)0x01FF0000)) == 0); + REG_BLE_WR(BLE_ACTSCANCNTL_ADDR, (REG_BLE_RD(BLE_ACTSCANCNTL_ADDR) & ~((uint32_t)0x01FF0000)) | ((uint32_t)backoff << 16)); +} + +__INLINE uint16_t ble_actscancntl_upperlimit_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_ACTSCANCNTL_ADDR); + return ((localVal & ((uint32_t)0x000001FF)) >> 0); +} + +__INLINE void ble_actscancntl_upperlimit_setf(uint16_t upperlimit) +{ + ASSERT_ERR((((uint32_t)upperlimit << 0) & ~((uint32_t)0x000001FF)) == 0); + REG_BLE_WR(BLE_ACTSCANCNTL_ADDR, (REG_BLE_RD(BLE_ACTSCANCNTL_ADDR) & ~((uint32_t)0x000001FF)) | ((uint32_t)upperlimit << 0)); +} + +/** + * @brief WPALCNTL register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 23:16 WPALNBDEV 0x0 + * 13:00 WPALBASEPTR 0x0 + *+ */ +#define BLE_WPALCNTL_ADDR BASEBAND_REG_BASE +0x130 // 0x50800130 +#define BLE_WPALCNTL_OFFSET 0x00000130 +#define BLE_WPALCNTL_INDEX 0x0000004C +#define BLE_WPALCNTL_RESET 0x00000000 + +__INLINE uint32_t ble_wpalcntl_get(void) +{ + return REG_BLE_RD(BLE_WPALCNTL_ADDR); +} + +__INLINE void ble_wpalcntl_set(uint32_t value) +{ + REG_BLE_WR(BLE_WPALCNTL_ADDR, value); +} + +// field definitions +#define BLE_WPALNBDEV_MASK ((uint32_t)0x00FF0000) +#define BLE_WPALNBDEV_LSB 16 +#define BLE_WPALNBDEV_WIDTH ((uint32_t)0x00000008) +#define BLE_WPALBASEPTR_MASK ((uint32_t)0x00003FFF) +#define BLE_WPALBASEPTR_LSB 0 +#define BLE_WPALBASEPTR_WIDTH ((uint32_t)0x0000000E) + +#define BLE_WPALNBDEV_RST 0x0 +#define BLE_WPALBASEPTR_RST 0x0 + +__INLINE void ble_wpalcntl_pack(uint8_t wpalnbdev, uint16_t wpalbaseptr) +{ + ASSERT_ERR((((uint32_t)wpalnbdev << 16) & ~((uint32_t)0x00FF0000)) == 0); + ASSERT_ERR((((uint32_t)wpalbaseptr << 0) & ~((uint32_t)0x00003FFF)) == 0); + REG_BLE_WR(BLE_WPALCNTL_ADDR, ((uint32_t)wpalnbdev << 16) | ((uint32_t)wpalbaseptr << 0)); +} + +__INLINE void ble_wpalcntl_unpack(uint8_t* wpalnbdev, uint16_t* wpalbaseptr) +{ + uint32_t localVal = REG_BLE_RD(BLE_WPALCNTL_ADDR); + + *wpalnbdev = (localVal & ((uint32_t)0x00FF0000)) >> 16; + *wpalbaseptr = (localVal & ((uint32_t)0x00003FFF)) >> 0; +} + +__INLINE uint8_t ble_wpalcntl_wpalnbdev_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_WPALCNTL_ADDR); + return ((localVal & ((uint32_t)0x00FF0000)) >> 16); +} + +__INLINE void ble_wpalcntl_wpalnbdev_setf(uint8_t wpalnbdev) +{ + ASSERT_ERR((((uint32_t)wpalnbdev << 16) & ~((uint32_t)0x00FF0000)) == 0); + REG_BLE_WR(BLE_WPALCNTL_ADDR, (REG_BLE_RD(BLE_WPALCNTL_ADDR) & ~((uint32_t)0x00FF0000)) | ((uint32_t)wpalnbdev << 16)); +} + +__INLINE uint16_t ble_wpalcntl_wpalbaseptr_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_WPALCNTL_ADDR); + return ((localVal & ((uint32_t)0x00003FFF)) >> 0); +} + +__INLINE void ble_wpalcntl_wpalbaseptr_setf(uint16_t wpalbaseptr) +{ + ASSERT_ERR((((uint32_t)wpalbaseptr << 0) & ~((uint32_t)0x00003FFF)) == 0); + REG_BLE_WR(BLE_WPALCNTL_ADDR, (REG_BLE_RD(BLE_WPALCNTL_ADDR) & ~((uint32_t)0x00003FFF)) | ((uint32_t)wpalbaseptr << 0)); +} + +/** + * @brief WPALCURRENTPTR register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 13:00 WPALCURRENTPTR 0x0 + *+ */ +#define BLE_WPALCURRENTPTR_ADDR BASEBAND_REG_BASE +0x134 // 0x50800134 +#define BLE_WPALCURRENTPTR_OFFSET 0x00000134 +#define BLE_WPALCURRENTPTR_INDEX 0x0000004D +#define BLE_WPALCURRENTPTR_RESET 0x00000000 + +__INLINE uint32_t ble_wpalcurrentptr_get(void) +{ + return REG_BLE_RD(BLE_WPALCURRENTPTR_ADDR); +} + +__INLINE void ble_wpalcurrentptr_set(uint32_t value) +{ + REG_BLE_WR(BLE_WPALCURRENTPTR_ADDR, value); +} + +// field definitions +#define BLE_WPALCURRENTPTR_MASK ((uint32_t)0x00003FFF) +#define BLE_WPALCURRENTPTR_LSB 0 +#define BLE_WPALCURRENTPTR_WIDTH ((uint32_t)0x0000000E) + +#define BLE_WPALCURRENTPTR_RST 0x0 + +__INLINE uint16_t ble_wpalcurrentptr_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_WPALCURRENTPTR_ADDR); + ASSERT_ERR((localVal & ~((uint32_t)0x00003FFF)) == 0); + return (localVal >> 0); +} + +__INLINE void ble_wpalcurrentptr_setf(uint16_t wpalcurrentptr) +{ + ASSERT_ERR((((uint32_t)wpalcurrentptr << 0) & ~((uint32_t)0x00003FFF)) == 0); + REG_BLE_WR(BLE_WPALCURRENTPTR_ADDR, (uint32_t)wpalcurrentptr << 0); +} + +/** + * @brief SEARCH_TIMEOUT register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 05:00 SEARCH_TIMEOUT 0x10 + *+ */ +#define BLE_SEARCH_TIMEOUT_ADDR BASEBAND_REG_BASE +0x138 //0x50800138 +#define BLE_SEARCH_TIMEOUT_OFFSET 0x00000138 +#define BLE_SEARCH_TIMEOUT_INDEX 0x0000004E +#define BLE_SEARCH_TIMEOUT_RESET 0x00000010 + +__INLINE uint32_t ble_search_timeout_get(void) +{ + return REG_BLE_RD(BLE_SEARCH_TIMEOUT_ADDR); +} + +__INLINE void ble_search_timeout_set(uint32_t value) +{ + REG_BLE_WR(BLE_SEARCH_TIMEOUT_ADDR, value); +} + +// field definitions +#define BLE_SEARCH_TIMEOUT_MASK ((uint32_t)0x0000003F) +#define BLE_SEARCH_TIMEOUT_LSB 0 +#define BLE_SEARCH_TIMEOUT_WIDTH ((uint32_t)0x00000006) + +#define BLE_SEARCH_TIMEOUT_RST 0x10 + +__INLINE uint8_t ble_search_timeout_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_SEARCH_TIMEOUT_ADDR); + ASSERT_ERR((localVal & ~((uint32_t)0x0000003F)) == 0); + return (localVal >> 0); +} + +__INLINE void ble_search_timeout_setf(uint8_t searchtimeout) +{ + ASSERT_ERR((((uint32_t)searchtimeout << 0) & ~((uint32_t)0x0000003F)) == 0); + REG_BLE_WR(BLE_SEARCH_TIMEOUT_ADDR, (uint32_t)searchtimeout << 0); +} + +/** + * @brief COEXIFCNTL0 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 21:20 MWSSCANFREQMSK 0x0 + * 19:18 WLCRXPRIOMODE 0x0 + * 17:16 WLCTXPRIOMODE 0x0 + * 15:14 MWSTXFRQMSK 0x0 + * 13:12 MWSRXFRQMSK 0x0 + * 11:10 MWSTXMSK 0x0 + * 09:08 MWSRXMSK 0x0 + * 07:06 WLANTXMSK 0x0 + * 05:04 WLANRXMSK 0x1 + * 03 MWSWCI_EN 0 + * 02 MWSCOEX_EN 0 + * 01 SYNCGEN_EN 0 + * 00 WLANCOEX_EN 0 + *+ */ +#define BLE_COEXIFCNTL0_ADDR BASEBAND_REG_BASE +0x140 // 0x50800140 +#define BLE_COEXIFCNTL0_OFFSET 0x00000140 +#define BLE_COEXIFCNTL0_INDEX 0x00000050 +#define BLE_COEXIFCNTL0_RESET 0x00000010 + +__INLINE uint32_t ble_coexifcntl0_get(void) +{ + return REG_BLE_RD(BLE_COEXIFCNTL0_ADDR); +} + +__INLINE void ble_coexifcntl0_set(uint32_t value) +{ + REG_BLE_WR(BLE_COEXIFCNTL0_ADDR, value); +} + +// field definitions +#define BLE_MWSSCANFREQMSK_MASK ((uint32_t)0x00300000) +#define BLE_MWSSCANFREQMSK_LSB 20 +#define BLE_MWSSCANFREQMSK_WIDTH ((uint32_t)0x00000002) +#define BLE_WLCRXPRIOMODE_MASK ((uint32_t)0x000C0000) +#define BLE_WLCRXPRIOMODE_LSB 18 +#define BLE_WLCRXPRIOMODE_WIDTH ((uint32_t)0x00000002) +#define BLE_WLCTXPRIOMODE_MASK ((uint32_t)0x00030000) +#define BLE_WLCTXPRIOMODE_LSB 16 +#define BLE_WLCTXPRIOMODE_WIDTH ((uint32_t)0x00000002) +#define BLE_MWSTXFRQMSK_MASK ((uint32_t)0x0000C000) +#define BLE_MWSTXFRQMSK_LSB 14 +#define BLE_MWSTXFRQMSK_WIDTH ((uint32_t)0x00000002) +#define BLE_MWSRXFRQMSK_MASK ((uint32_t)0x00003000) +#define BLE_MWSRXFRQMSK_LSB 12 +#define BLE_MWSRXFRQMSK_WIDTH ((uint32_t)0x00000002) +#define BLE_MWSTXMSK_MASK ((uint32_t)0x00000C00) +#define BLE_MWSTXMSK_LSB 10 +#define BLE_MWSTXMSK_WIDTH ((uint32_t)0x00000002) +#define BLE_MWSRXMSK_MASK ((uint32_t)0x00000300) +#define BLE_MWSRXMSK_LSB 8 +#define BLE_MWSRXMSK_WIDTH ((uint32_t)0x00000002) +#define BLE_WLANTXMSK_MASK ((uint32_t)0x000000C0) +#define BLE_WLANTXMSK_LSB 6 +#define BLE_WLANTXMSK_WIDTH ((uint32_t)0x00000002) +#define BLE_WLANRXMSK_MASK ((uint32_t)0x00000030) +#define BLE_WLANRXMSK_LSB 4 +#define BLE_WLANRXMSK_WIDTH ((uint32_t)0x00000002) +#define BLE_MWSWCI_EN_BIT ((uint32_t)0x00000008) +#define BLE_MWSWCI_EN_POS 3 +#define BLE_MWSCOEX_EN_BIT ((uint32_t)0x00000004) +#define BLE_MWSCOEX_EN_POS 2 +#define BLE_SYNCGEN_EN_BIT ((uint32_t)0x00000002) +#define BLE_SYNCGEN_EN_POS 1 +#define BLE_WLANCOEX_EN_BIT ((uint32_t)0x00000001) +#define BLE_WLANCOEX_EN_POS 0 + +#define BLE_MWSSCANFREQMSK_RST 0x0 +#define BLE_WLCRXPRIOMODE_RST 0x0 +#define BLE_WLCTXPRIOMODE_RST 0x0 +#define BLE_MWSTXFRQMSK_RST 0x0 +#define BLE_MWSRXFRQMSK_RST 0x0 +#define BLE_MWSTXMSK_RST 0x0 +#define BLE_MWSRXMSK_RST 0x0 +#define BLE_WLANTXMSK_RST 0x0 +#define BLE_WLANRXMSK_RST 0x1 +#define BLE_MWSWCI_EN_RST 0x0 +#define BLE_MWSCOEX_EN_RST 0x0 +#define BLE_SYNCGEN_EN_RST 0x0 +#define BLE_WLANCOEX_EN_RST 0x0 + +__INLINE void ble_coexifcntl0_pack(uint8_t mwsscanfreqmsk, uint8_t wlcrxpriomode, uint8_t wlctxpriomode, uint8_t mwstxfrqmsk, uint8_t mwsrxfrqmsk, uint8_t mwstxmsk, uint8_t mwsrxmsk, uint8_t wlantxmsk, uint8_t wlanrxmsk, uint8_t mwswcien, uint8_t mwscoexen, uint8_t syncgenen, uint8_t wlancoexen) +{ + ASSERT_ERR((((uint32_t)mwsscanfreqmsk << 20) & ~((uint32_t)0x00300000)) == 0); + ASSERT_ERR((((uint32_t)wlcrxpriomode << 18) & ~((uint32_t)0x000C0000)) == 0); + ASSERT_ERR((((uint32_t)wlctxpriomode << 16) & ~((uint32_t)0x00030000)) == 0); + ASSERT_ERR((((uint32_t)mwstxfrqmsk << 14) & ~((uint32_t)0x0000C000)) == 0); + ASSERT_ERR((((uint32_t)mwsrxfrqmsk << 12) & ~((uint32_t)0x00003000)) == 0); + ASSERT_ERR((((uint32_t)mwstxmsk << 10) & ~((uint32_t)0x00000C00)) == 0); + ASSERT_ERR((((uint32_t)mwsrxmsk << 8) & ~((uint32_t)0x00000300)) == 0); + ASSERT_ERR((((uint32_t)wlantxmsk << 6) & ~((uint32_t)0x000000C0)) == 0); + ASSERT_ERR((((uint32_t)wlanrxmsk << 4) & ~((uint32_t)0x00000030)) == 0); + ASSERT_ERR((((uint32_t)mwswcien << 3) & ~((uint32_t)0x00000008)) == 0); + ASSERT_ERR((((uint32_t)mwscoexen << 2) & ~((uint32_t)0x00000004)) == 0); + ASSERT_ERR((((uint32_t)syncgenen << 1) & ~((uint32_t)0x00000002)) == 0); + ASSERT_ERR((((uint32_t)wlancoexen << 0) & ~((uint32_t)0x00000001)) == 0); + REG_BLE_WR(BLE_COEXIFCNTL0_ADDR, ((uint32_t)mwsscanfreqmsk << 20) | ((uint32_t)wlcrxpriomode << 18) | ((uint32_t)wlctxpriomode << 16) | ((uint32_t)mwstxfrqmsk << 14) | ((uint32_t)mwsrxfrqmsk << 12) | ((uint32_t)mwstxmsk << 10) | ((uint32_t)mwsrxmsk << 8) | ((uint32_t)wlantxmsk << 6) | ((uint32_t)wlanrxmsk << 4) | ((uint32_t)mwswcien << 3) | ((uint32_t)mwscoexen << 2) | ((uint32_t)syncgenen << 1) | ((uint32_t)wlancoexen << 0)); +} + +__INLINE void ble_coexifcntl0_unpack(uint8_t* mwsscanfreqmsk, uint8_t* wlcrxpriomode, uint8_t* wlctxpriomode, uint8_t* mwstxfrqmsk, uint8_t* mwsrxfrqmsk, uint8_t* mwstxmsk, uint8_t* mwsrxmsk, uint8_t* wlantxmsk, uint8_t* wlanrxmsk, uint8_t* mwswcien, uint8_t* mwscoexen, uint8_t* syncgenen, uint8_t* wlancoexen) +{ + uint32_t localVal = REG_BLE_RD(BLE_COEXIFCNTL0_ADDR); + + *mwsscanfreqmsk = (localVal & ((uint32_t)0x00300000)) >> 20; + *wlcrxpriomode = (localVal & ((uint32_t)0x000C0000)) >> 18; + *wlctxpriomode = (localVal & ((uint32_t)0x00030000)) >> 16; + *mwstxfrqmsk = (localVal & ((uint32_t)0x0000C000)) >> 14; + *mwsrxfrqmsk = (localVal & ((uint32_t)0x00003000)) >> 12; + *mwstxmsk = (localVal & ((uint32_t)0x00000C00)) >> 10; + *mwsrxmsk = (localVal & ((uint32_t)0x00000300)) >> 8; + *wlantxmsk = (localVal & ((uint32_t)0x000000C0)) >> 6; + *wlanrxmsk = (localVal & ((uint32_t)0x00000030)) >> 4; + *mwswcien = (localVal & ((uint32_t)0x00000008)) >> 3; + *mwscoexen = (localVal & ((uint32_t)0x00000004)) >> 2; + *syncgenen = (localVal & ((uint32_t)0x00000002)) >> 1; + *wlancoexen = (localVal & ((uint32_t)0x00000001)) >> 0; +} + +__INLINE uint8_t ble_coexifcntl0_mwsscanfreqmsk_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_COEXIFCNTL0_ADDR); + return ((localVal & ((uint32_t)0x00300000)) >> 20); +} + +__INLINE void ble_coexifcntl0_mwsscanfreqmsk_setf(uint8_t mwsscanfreqmsk) +{ + ASSERT_ERR((((uint32_t)mwsscanfreqmsk << 20) & ~((uint32_t)0x00300000)) == 0); + REG_BLE_WR(BLE_COEXIFCNTL0_ADDR, (REG_BLE_RD(BLE_COEXIFCNTL0_ADDR) & ~((uint32_t)0x00300000)) | ((uint32_t)mwsscanfreqmsk << 20)); +} + +__INLINE uint8_t ble_coexifcntl0_wlcrxpriomode_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_COEXIFCNTL0_ADDR); + return ((localVal & ((uint32_t)0x000C0000)) >> 18); +} + +__INLINE void ble_coexifcntl0_wlcrxpriomode_setf(uint8_t wlcrxpriomode) +{ + ASSERT_ERR((((uint32_t)wlcrxpriomode << 18) & ~((uint32_t)0x000C0000)) == 0); + REG_BLE_WR(BLE_COEXIFCNTL0_ADDR, (REG_BLE_RD(BLE_COEXIFCNTL0_ADDR) & ~((uint32_t)0x000C0000)) | ((uint32_t)wlcrxpriomode << 18)); +} + +__INLINE uint8_t ble_coexifcntl0_wlctxpriomode_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_COEXIFCNTL0_ADDR); + return ((localVal & ((uint32_t)0x00030000)) >> 16); +} + +__INLINE void ble_coexifcntl0_wlctxpriomode_setf(uint8_t wlctxpriomode) +{ + ASSERT_ERR((((uint32_t)wlctxpriomode << 16) & ~((uint32_t)0x00030000)) == 0); + REG_BLE_WR(BLE_COEXIFCNTL0_ADDR, (REG_BLE_RD(BLE_COEXIFCNTL0_ADDR) & ~((uint32_t)0x00030000)) | ((uint32_t)wlctxpriomode << 16)); +} + +__INLINE uint8_t ble_coexifcntl0_mwstxfrqmsk_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_COEXIFCNTL0_ADDR); + return ((localVal & ((uint32_t)0x0000C000)) >> 14); +} + +__INLINE void ble_coexifcntl0_mwstxfrqmsk_setf(uint8_t mwstxfrqmsk) +{ + ASSERT_ERR((((uint32_t)mwstxfrqmsk << 14) & ~((uint32_t)0x0000C000)) == 0); + REG_BLE_WR(BLE_COEXIFCNTL0_ADDR, (REG_BLE_RD(BLE_COEXIFCNTL0_ADDR) & ~((uint32_t)0x0000C000)) | ((uint32_t)mwstxfrqmsk << 14)); +} + +__INLINE uint8_t ble_coexifcntl0_mwsrxfrqmsk_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_COEXIFCNTL0_ADDR); + return ((localVal & ((uint32_t)0x00003000)) >> 12); +} + +__INLINE void ble_coexifcntl0_mwsrxfrqmsk_setf(uint8_t mwsrxfrqmsk) +{ + ASSERT_ERR((((uint32_t)mwsrxfrqmsk << 12) & ~((uint32_t)0x00003000)) == 0); + REG_BLE_WR(BLE_COEXIFCNTL0_ADDR, (REG_BLE_RD(BLE_COEXIFCNTL0_ADDR) & ~((uint32_t)0x00003000)) | ((uint32_t)mwsrxfrqmsk << 12)); +} + +__INLINE uint8_t ble_coexifcntl0_mwstxmsk_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_COEXIFCNTL0_ADDR); + return ((localVal & ((uint32_t)0x00000C00)) >> 10); +} + +__INLINE void ble_coexifcntl0_mwstxmsk_setf(uint8_t mwstxmsk) +{ + ASSERT_ERR((((uint32_t)mwstxmsk << 10) & ~((uint32_t)0x00000C00)) == 0); + REG_BLE_WR(BLE_COEXIFCNTL0_ADDR, (REG_BLE_RD(BLE_COEXIFCNTL0_ADDR) & ~((uint32_t)0x00000C00)) | ((uint32_t)mwstxmsk << 10)); +} + +__INLINE uint8_t ble_coexifcntl0_mwsrxmsk_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_COEXIFCNTL0_ADDR); + return ((localVal & ((uint32_t)0x00000300)) >> 8); +} + +__INLINE void ble_coexifcntl0_mwsrxmsk_setf(uint8_t mwsrxmsk) +{ + ASSERT_ERR((((uint32_t)mwsrxmsk << 8) & ~((uint32_t)0x00000300)) == 0); + REG_BLE_WR(BLE_COEXIFCNTL0_ADDR, (REG_BLE_RD(BLE_COEXIFCNTL0_ADDR) & ~((uint32_t)0x00000300)) | ((uint32_t)mwsrxmsk << 8)); +} + +__INLINE uint8_t ble_coexifcntl0_wlantxmsk_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_COEXIFCNTL0_ADDR); + return ((localVal & ((uint32_t)0x000000C0)) >> 6); +} + +__INLINE void ble_coexifcntl0_wlantxmsk_setf(uint8_t wlantxmsk) +{ + ASSERT_ERR((((uint32_t)wlantxmsk << 6) & ~((uint32_t)0x000000C0)) == 0); + REG_BLE_WR(BLE_COEXIFCNTL0_ADDR, (REG_BLE_RD(BLE_COEXIFCNTL0_ADDR) & ~((uint32_t)0x000000C0)) | ((uint32_t)wlantxmsk << 6)); +} + +__INLINE uint8_t ble_coexifcntl0_wlanrxmsk_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_COEXIFCNTL0_ADDR); + return ((localVal & ((uint32_t)0x00000030)) >> 4); +} + +__INLINE void ble_coexifcntl0_wlanrxmsk_setf(uint8_t wlanrxmsk) +{ + ASSERT_ERR((((uint32_t)wlanrxmsk << 4) & ~((uint32_t)0x00000030)) == 0); + REG_BLE_WR(BLE_COEXIFCNTL0_ADDR, (REG_BLE_RD(BLE_COEXIFCNTL0_ADDR) & ~((uint32_t)0x00000030)) | ((uint32_t)wlanrxmsk << 4)); +} + +__INLINE uint8_t ble_coexifcntl0_mwswci_en_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_COEXIFCNTL0_ADDR); + return ((localVal & ((uint32_t)0x00000008)) >> 3); +} + +__INLINE void ble_coexifcntl0_mwswci_en_setf(uint8_t mwswcien) +{ + ASSERT_ERR((((uint32_t)mwswcien << 3) & ~((uint32_t)0x00000008)) == 0); + REG_BLE_WR(BLE_COEXIFCNTL0_ADDR, (REG_BLE_RD(BLE_COEXIFCNTL0_ADDR) & ~((uint32_t)0x00000008)) | ((uint32_t)mwswcien << 3)); +} + +__INLINE uint8_t ble_coexifcntl0_mwscoex_en_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_COEXIFCNTL0_ADDR); + return ((localVal & ((uint32_t)0x00000004)) >> 2); +} + +__INLINE void ble_coexifcntl0_mwscoex_en_setf(uint8_t mwscoexen) +{ + ASSERT_ERR((((uint32_t)mwscoexen << 2) & ~((uint32_t)0x00000004)) == 0); + REG_BLE_WR(BLE_COEXIFCNTL0_ADDR, (REG_BLE_RD(BLE_COEXIFCNTL0_ADDR) & ~((uint32_t)0x00000004)) | ((uint32_t)mwscoexen << 2)); +} + +__INLINE uint8_t ble_coexifcntl0_syncgen_en_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_COEXIFCNTL0_ADDR); + return ((localVal & ((uint32_t)0x00000002)) >> 1); +} + +__INLINE void ble_coexifcntl0_syncgen_en_setf(uint8_t syncgenen) +{ + ASSERT_ERR((((uint32_t)syncgenen << 1) & ~((uint32_t)0x00000002)) == 0); + REG_BLE_WR(BLE_COEXIFCNTL0_ADDR, (REG_BLE_RD(BLE_COEXIFCNTL0_ADDR) & ~((uint32_t)0x00000002)) | ((uint32_t)syncgenen << 1)); +} + +__INLINE uint8_t ble_coexifcntl0_wlancoex_en_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_COEXIFCNTL0_ADDR); + return ((localVal & ((uint32_t)0x00000001)) >> 0); +} + +__INLINE void ble_coexifcntl0_wlancoex_en_setf(uint8_t wlancoexen) +{ + ASSERT_ERR((((uint32_t)wlancoexen << 0) & ~((uint32_t)0x00000001)) == 0); + REG_BLE_WR(BLE_COEXIFCNTL0_ADDR, (REG_BLE_RD(BLE_COEXIFCNTL0_ADDR) & ~((uint32_t)0x00000001)) | ((uint32_t)wlancoexen << 0)); +} + +/** + * @brief COEXIFCNTL1 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 28:24 WLCPRXTHR 0x0 + * 20:16 WLCPTXTHR 0x0 + * 14:08 WLCPDURATION 0x0 + * 06:00 WLCPDELAY 0x0 + *+ */ +#define BLE_COEXIFCNTL1_ADDR BASEBAND_REG_BASE +0x144 //0x50800144 +#define BLE_COEXIFCNTL1_OFFSET 0x00000144 +#define BLE_COEXIFCNTL1_INDEX 0x00000051 +#define BLE_COEXIFCNTL1_RESET 0x00000000 + +__INLINE uint32_t ble_coexifcntl1_get(void) +{ + return REG_BLE_RD(BLE_COEXIFCNTL1_ADDR); +} + +__INLINE void ble_coexifcntl1_set(uint32_t value) +{ + REG_BLE_WR(BLE_COEXIFCNTL1_ADDR, value); +} + +// field definitions +#define BLE_WLCPRXTHR_MASK ((uint32_t)0x1F000000) +#define BLE_WLCPRXTHR_LSB 24 +#define BLE_WLCPRXTHR_WIDTH ((uint32_t)0x00000005) +#define BLE_WLCPTXTHR_MASK ((uint32_t)0x001F0000) +#define BLE_WLCPTXTHR_LSB 16 +#define BLE_WLCPTXTHR_WIDTH ((uint32_t)0x00000005) +#define BLE_WLCPDURATION_MASK ((uint32_t)0x00007F00) +#define BLE_WLCPDURATION_LSB 8 +#define BLE_WLCPDURATION_WIDTH ((uint32_t)0x00000007) +#define BLE_WLCPDELAY_MASK ((uint32_t)0x0000007F) +#define BLE_WLCPDELAY_LSB 0 +#define BLE_WLCPDELAY_WIDTH ((uint32_t)0x00000007) + +#define BLE_WLCPRXTHR_RST 0x0 +#define BLE_WLCPTXTHR_RST 0x0 +#define BLE_WLCPDURATION_RST 0x0 +#define BLE_WLCPDELAY_RST 0x0 + +__INLINE void ble_coexifcntl1_pack(uint8_t wlcprxthr, uint8_t wlcptxthr, uint8_t wlcpduration, uint8_t wlcpdelay) +{ + ASSERT_ERR((((uint32_t)wlcprxthr << 24) & ~((uint32_t)0x1F000000)) == 0); + ASSERT_ERR((((uint32_t)wlcptxthr << 16) & ~((uint32_t)0x001F0000)) == 0); + ASSERT_ERR((((uint32_t)wlcpduration << 8) & ~((uint32_t)0x00007F00)) == 0); + ASSERT_ERR((((uint32_t)wlcpdelay << 0) & ~((uint32_t)0x0000007F)) == 0); + REG_BLE_WR(BLE_COEXIFCNTL1_ADDR, ((uint32_t)wlcprxthr << 24) | ((uint32_t)wlcptxthr << 16) | ((uint32_t)wlcpduration << 8) | ((uint32_t)wlcpdelay << 0)); +} + +__INLINE void ble_coexifcntl1_unpack(uint8_t* wlcprxthr, uint8_t* wlcptxthr, uint8_t* wlcpduration, uint8_t* wlcpdelay) +{ + uint32_t localVal = REG_BLE_RD(BLE_COEXIFCNTL1_ADDR); + + *wlcprxthr = (localVal & ((uint32_t)0x1F000000)) >> 24; + *wlcptxthr = (localVal & ((uint32_t)0x001F0000)) >> 16; + *wlcpduration = (localVal & ((uint32_t)0x00007F00)) >> 8; + *wlcpdelay = (localVal & ((uint32_t)0x0000007F)) >> 0; +} + +__INLINE uint8_t ble_coexifcntl1_wlcprxthr_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_COEXIFCNTL1_ADDR); + return ((localVal & ((uint32_t)0x1F000000)) >> 24); +} + +__INLINE void ble_coexifcntl1_wlcprxthr_setf(uint8_t wlcprxthr) +{ + ASSERT_ERR((((uint32_t)wlcprxthr << 24) & ~((uint32_t)0x1F000000)) == 0); + REG_BLE_WR(BLE_COEXIFCNTL1_ADDR, (REG_BLE_RD(BLE_COEXIFCNTL1_ADDR) & ~((uint32_t)0x1F000000)) | ((uint32_t)wlcprxthr << 24)); +} + +__INLINE uint8_t ble_coexifcntl1_wlcptxthr_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_COEXIFCNTL1_ADDR); + return ((localVal & ((uint32_t)0x001F0000)) >> 16); +} + +__INLINE void ble_coexifcntl1_wlcptxthr_setf(uint8_t wlcptxthr) +{ + ASSERT_ERR((((uint32_t)wlcptxthr << 16) & ~((uint32_t)0x001F0000)) == 0); + REG_BLE_WR(BLE_COEXIFCNTL1_ADDR, (REG_BLE_RD(BLE_COEXIFCNTL1_ADDR) & ~((uint32_t)0x001F0000)) | ((uint32_t)wlcptxthr << 16)); +} + +__INLINE uint8_t ble_coexifcntl1_wlcpduration_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_COEXIFCNTL1_ADDR); + return ((localVal & ((uint32_t)0x00007F00)) >> 8); +} + +__INLINE void ble_coexifcntl1_wlcpduration_setf(uint8_t wlcpduration) +{ + ASSERT_ERR((((uint32_t)wlcpduration << 8) & ~((uint32_t)0x00007F00)) == 0); + REG_BLE_WR(BLE_COEXIFCNTL1_ADDR, (REG_BLE_RD(BLE_COEXIFCNTL1_ADDR) & ~((uint32_t)0x00007F00)) | ((uint32_t)wlcpduration << 8)); +} + +__INLINE uint8_t ble_coexifcntl1_wlcpdelay_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_COEXIFCNTL1_ADDR); + return ((localVal & ((uint32_t)0x0000007F)) >> 0); +} + +__INLINE void ble_coexifcntl1_wlcpdelay_setf(uint8_t wlcpdelay) +{ + ASSERT_ERR((((uint32_t)wlcpdelay << 0) & ~((uint32_t)0x0000007F)) == 0); + REG_BLE_WR(BLE_COEXIFCNTL1_ADDR, (REG_BLE_RD(BLE_COEXIFCNTL1_ADDR) & ~((uint32_t)0x0000007F)) | ((uint32_t)wlcpdelay << 0)); +} + +/** + * @brief COEXIFCNTL2 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 11:08 RX_ANT_DELAY 0x0 + * 03:00 TX_ANT_DELAY 0x0 + *+ */ +#define BLE_COEXIFCNTL2_ADDR BASEBAND_REG_BASE +0x148 //0x50800148 +#define BLE_COEXIFCNTL2_OFFSET 0x00000148 +#define BLE_COEXIFCNTL2_INDEX 0x00000052 +#define BLE_COEXIFCNTL2_RESET 0x00000000 + +__INLINE uint32_t ble_coexifcntl2_get(void) +{ + return REG_BLE_RD(BLE_COEXIFCNTL2_ADDR); +} + +__INLINE void ble_coexifcntl2_set(uint32_t value) +{ + REG_BLE_WR(BLE_COEXIFCNTL2_ADDR, value); +} + +// field definitions +#define BLE_RX_ANT_DELAY_MASK ((uint32_t)0x00000F00) +#define BLE_RX_ANT_DELAY_LSB 8 +#define BLE_RX_ANT_DELAY_WIDTH ((uint32_t)0x00000004) +#define BLE_TX_ANT_DELAY_MASK ((uint32_t)0x0000000F) +#define BLE_TX_ANT_DELAY_LSB 0 +#define BLE_TX_ANT_DELAY_WIDTH ((uint32_t)0x00000004) + +#define BLE_RX_ANT_DELAY_RST 0x0 +#define BLE_TX_ANT_DELAY_RST 0x0 + +__INLINE void ble_coexifcntl2_pack(uint8_t rxantdelay, uint8_t txantdelay) +{ + ASSERT_ERR((((uint32_t)rxantdelay << 8) & ~((uint32_t)0x00000F00)) == 0); + ASSERT_ERR((((uint32_t)txantdelay << 0) & ~((uint32_t)0x0000000F)) == 0); + REG_BLE_WR(BLE_COEXIFCNTL2_ADDR, ((uint32_t)rxantdelay << 8) | ((uint32_t)txantdelay << 0)); +} + +__INLINE void ble_coexifcntl2_unpack(uint8_t* rxantdelay, uint8_t* txantdelay) +{ + uint32_t localVal = REG_BLE_RD(BLE_COEXIFCNTL2_ADDR); + + *rxantdelay = (localVal & ((uint32_t)0x00000F00)) >> 8; + *txantdelay = (localVal & ((uint32_t)0x0000000F)) >> 0; +} + +__INLINE uint8_t ble_coexifcntl2_rx_ant_delay_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_COEXIFCNTL2_ADDR); + return ((localVal & ((uint32_t)0x00000F00)) >> 8); +} + +__INLINE void ble_coexifcntl2_rx_ant_delay_setf(uint8_t rxantdelay) +{ + ASSERT_ERR((((uint32_t)rxantdelay << 8) & ~((uint32_t)0x00000F00)) == 0); + REG_BLE_WR(BLE_COEXIFCNTL2_ADDR, (REG_BLE_RD(BLE_COEXIFCNTL2_ADDR) & ~((uint32_t)0x00000F00)) | ((uint32_t)rxantdelay << 8)); +} + +__INLINE uint8_t ble_coexifcntl2_tx_ant_delay_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_COEXIFCNTL2_ADDR); + return ((localVal & ((uint32_t)0x0000000F)) >> 0); +} + +__INLINE void ble_coexifcntl2_tx_ant_delay_setf(uint8_t txantdelay) +{ + ASSERT_ERR((((uint32_t)txantdelay << 0) & ~((uint32_t)0x0000000F)) == 0); + REG_BLE_WR(BLE_COEXIFCNTL2_ADDR, (REG_BLE_RD(BLE_COEXIFCNTL2_ADDR) & ~((uint32_t)0x0000000F)) | ((uint32_t)txantdelay << 0)); +} + +/** + * @brief BLEMPRIO0 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31:28 BLEM7 0x3 + * 27:24 BLEM6 0x4 + * 23:20 BLEM5 0x8 + * 19:16 BLEM4 0x9 + * 15:12 BLEM3 0xA + * 11:08 BLEM2 0xD + * 07:04 BLEM1 0xE + * 03:00 BLEM0 0xF + *+ */ +#define BLE_BLEMPRIO0_ADDR BASEBAND_REG_BASE +0x14C // 0x5080014C +#define BLE_BLEMPRIO0_OFFSET 0x0000014C +#define BLE_BLEMPRIO0_INDEX 0x00000053 +#define BLE_BLEMPRIO0_RESET 0x3489ADEF + +__INLINE uint32_t ble_blemprio0_get(void) +{ + return REG_BLE_RD(BLE_BLEMPRIO0_ADDR); +} + +__INLINE void ble_blemprio0_set(uint32_t value) +{ + REG_BLE_WR(BLE_BLEMPRIO0_ADDR, value); +} + +// field definitions +#define BLE_BLEM7_MASK ((uint32_t)0xF0000000) +#define BLE_BLEM7_LSB 28 +#define BLE_BLEM7_WIDTH ((uint32_t)0x00000004) +#define BLE_BLEM6_MASK ((uint32_t)0x0F000000) +#define BLE_BLEM6_LSB 24 +#define BLE_BLEM6_WIDTH ((uint32_t)0x00000004) +#define BLE_BLEM5_MASK ((uint32_t)0x00F00000) +#define BLE_BLEM5_LSB 20 +#define BLE_BLEM5_WIDTH ((uint32_t)0x00000004) +#define BLE_BLEM4_MASK ((uint32_t)0x000F0000) +#define BLE_BLEM4_LSB 16 +#define BLE_BLEM4_WIDTH ((uint32_t)0x00000004) +#define BLE_BLEM3_MASK ((uint32_t)0x0000F000) +#define BLE_BLEM3_LSB 12 +#define BLE_BLEM3_WIDTH ((uint32_t)0x00000004) +#define BLE_BLEM2_MASK ((uint32_t)0x00000F00) +#define BLE_BLEM2_LSB 8 +#define BLE_BLEM2_WIDTH ((uint32_t)0x00000004) +#define BLE_BLEM1_MASK ((uint32_t)0x000000F0) +#define BLE_BLEM1_LSB 4 +#define BLE_BLEM1_WIDTH ((uint32_t)0x00000004) +#define BLE_BLEM0_MASK ((uint32_t)0x0000000F) +#define BLE_BLEM0_LSB 0 +#define BLE_BLEM0_WIDTH ((uint32_t)0x00000004) + +#define BLE_BLEM7_RST 0x3 +#define BLE_BLEM6_RST 0x4 +#define BLE_BLEM5_RST 0x8 +#define BLE_BLEM4_RST 0x9 +#define BLE_BLEM3_RST 0xA +#define BLE_BLEM2_RST 0xD +#define BLE_BLEM1_RST 0xE +#define BLE_BLEM0_RST 0xF + +__INLINE void ble_blemprio0_pack(uint8_t blem7, uint8_t blem6, uint8_t blem5, uint8_t blem4, uint8_t blem3, uint8_t blem2, uint8_t blem1, uint8_t blem0) +{ + ASSERT_ERR((((uint32_t)blem7 << 28) & ~((uint32_t)0xF0000000)) == 0); + ASSERT_ERR((((uint32_t)blem6 << 24) & ~((uint32_t)0x0F000000)) == 0); + ASSERT_ERR((((uint32_t)blem5 << 20) & ~((uint32_t)0x00F00000)) == 0); + ASSERT_ERR((((uint32_t)blem4 << 16) & ~((uint32_t)0x000F0000)) == 0); + ASSERT_ERR((((uint32_t)blem3 << 12) & ~((uint32_t)0x0000F000)) == 0); + ASSERT_ERR((((uint32_t)blem2 << 8) & ~((uint32_t)0x00000F00)) == 0); + ASSERT_ERR((((uint32_t)blem1 << 4) & ~((uint32_t)0x000000F0)) == 0); + ASSERT_ERR((((uint32_t)blem0 << 0) & ~((uint32_t)0x0000000F)) == 0); + REG_BLE_WR(BLE_BLEMPRIO0_ADDR, ((uint32_t)blem7 << 28) | ((uint32_t)blem6 << 24) | ((uint32_t)blem5 << 20) | ((uint32_t)blem4 << 16) | ((uint32_t)blem3 << 12) | ((uint32_t)blem2 << 8) | ((uint32_t)blem1 << 4) | ((uint32_t)blem0 << 0)); +} + +__INLINE void ble_blemprio0_unpack(uint8_t* blem7, uint8_t* blem6, uint8_t* blem5, uint8_t* blem4, uint8_t* blem3, uint8_t* blem2, uint8_t* blem1, uint8_t* blem0) +{ + uint32_t localVal = REG_BLE_RD(BLE_BLEMPRIO0_ADDR); + + *blem7 = (localVal & ((uint32_t)0xF0000000)) >> 28; + *blem6 = (localVal & ((uint32_t)0x0F000000)) >> 24; + *blem5 = (localVal & ((uint32_t)0x00F00000)) >> 20; + *blem4 = (localVal & ((uint32_t)0x000F0000)) >> 16; + *blem3 = (localVal & ((uint32_t)0x0000F000)) >> 12; + *blem2 = (localVal & ((uint32_t)0x00000F00)) >> 8; + *blem1 = (localVal & ((uint32_t)0x000000F0)) >> 4; + *blem0 = (localVal & ((uint32_t)0x0000000F)) >> 0; +} + +__INLINE uint8_t ble_blemprio0_blem7_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_BLEMPRIO0_ADDR); + return ((localVal & ((uint32_t)0xF0000000)) >> 28); +} + +__INLINE void ble_blemprio0_blem7_setf(uint8_t blem7) +{ + ASSERT_ERR((((uint32_t)blem7 << 28) & ~((uint32_t)0xF0000000)) == 0); + REG_BLE_WR(BLE_BLEMPRIO0_ADDR, (REG_BLE_RD(BLE_BLEMPRIO0_ADDR) & ~((uint32_t)0xF0000000)) | ((uint32_t)blem7 << 28)); +} + +__INLINE uint8_t ble_blemprio0_blem6_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_BLEMPRIO0_ADDR); + return ((localVal & ((uint32_t)0x0F000000)) >> 24); +} + +__INLINE void ble_blemprio0_blem6_setf(uint8_t blem6) +{ + ASSERT_ERR((((uint32_t)blem6 << 24) & ~((uint32_t)0x0F000000)) == 0); + REG_BLE_WR(BLE_BLEMPRIO0_ADDR, (REG_BLE_RD(BLE_BLEMPRIO0_ADDR) & ~((uint32_t)0x0F000000)) | ((uint32_t)blem6 << 24)); +} + +__INLINE uint8_t ble_blemprio0_blem5_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_BLEMPRIO0_ADDR); + return ((localVal & ((uint32_t)0x00F00000)) >> 20); +} + +__INLINE void ble_blemprio0_blem5_setf(uint8_t blem5) +{ + ASSERT_ERR((((uint32_t)blem5 << 20) & ~((uint32_t)0x00F00000)) == 0); + REG_BLE_WR(BLE_BLEMPRIO0_ADDR, (REG_BLE_RD(BLE_BLEMPRIO0_ADDR) & ~((uint32_t)0x00F00000)) | ((uint32_t)blem5 << 20)); +} + +__INLINE uint8_t ble_blemprio0_blem4_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_BLEMPRIO0_ADDR); + return ((localVal & ((uint32_t)0x000F0000)) >> 16); +} + +__INLINE void ble_blemprio0_blem4_setf(uint8_t blem4) +{ + ASSERT_ERR((((uint32_t)blem4 << 16) & ~((uint32_t)0x000F0000)) == 0); + REG_BLE_WR(BLE_BLEMPRIO0_ADDR, (REG_BLE_RD(BLE_BLEMPRIO0_ADDR) & ~((uint32_t)0x000F0000)) | ((uint32_t)blem4 << 16)); +} + +__INLINE uint8_t ble_blemprio0_blem3_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_BLEMPRIO0_ADDR); + return ((localVal & ((uint32_t)0x0000F000)) >> 12); +} + +__INLINE void ble_blemprio0_blem3_setf(uint8_t blem3) +{ + ASSERT_ERR((((uint32_t)blem3 << 12) & ~((uint32_t)0x0000F000)) == 0); + REG_BLE_WR(BLE_BLEMPRIO0_ADDR, (REG_BLE_RD(BLE_BLEMPRIO0_ADDR) & ~((uint32_t)0x0000F000)) | ((uint32_t)blem3 << 12)); +} + +__INLINE uint8_t ble_blemprio0_blem2_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_BLEMPRIO0_ADDR); + return ((localVal & ((uint32_t)0x00000F00)) >> 8); +} + +__INLINE void ble_blemprio0_blem2_setf(uint8_t blem2) +{ + ASSERT_ERR((((uint32_t)blem2 << 8) & ~((uint32_t)0x00000F00)) == 0); + REG_BLE_WR(BLE_BLEMPRIO0_ADDR, (REG_BLE_RD(BLE_BLEMPRIO0_ADDR) & ~((uint32_t)0x00000F00)) | ((uint32_t)blem2 << 8)); +} + +__INLINE uint8_t ble_blemprio0_blem1_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_BLEMPRIO0_ADDR); + return ((localVal & ((uint32_t)0x000000F0)) >> 4); +} + +__INLINE void ble_blemprio0_blem1_setf(uint8_t blem1) +{ + ASSERT_ERR((((uint32_t)blem1 << 4) & ~((uint32_t)0x000000F0)) == 0); + REG_BLE_WR(BLE_BLEMPRIO0_ADDR, (REG_BLE_RD(BLE_BLEMPRIO0_ADDR) & ~((uint32_t)0x000000F0)) | ((uint32_t)blem1 << 4)); +} + +__INLINE uint8_t ble_blemprio0_blem0_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_BLEMPRIO0_ADDR); + return ((localVal & ((uint32_t)0x0000000F)) >> 0); +} + +__INLINE void ble_blemprio0_blem0_setf(uint8_t blem0) +{ + ASSERT_ERR((((uint32_t)blem0 << 0) & ~((uint32_t)0x0000000F)) == 0); + REG_BLE_WR(BLE_BLEMPRIO0_ADDR, (REG_BLE_RD(BLE_BLEMPRIO0_ADDR) & ~((uint32_t)0x0000000F)) | ((uint32_t)blem0 << 0)); +} + +/** + * @brief BLEMPRIO1 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31:28 BLEM15 0x3 + * 27:24 BLEM14 0x4 + * 23:20 BLEM13 0x8 + * 19:16 BLEM12 0x9 + * 15:12 BLEM11 0xA + * 11:08 BLEM10 0xF + * 07:04 BLEM9 0xD + * 03:00 BLEM8 0xC + *+ */ +#define BLE_BLEMPRIO1_ADDR BASEBAND_REG_BASE +0x150 // 0x50800150 +#define BLE_BLEMPRIO1_OFFSET 0x00000150 +#define BLE_BLEMPRIO1_INDEX 0x00000054 +#define BLE_BLEMPRIO1_RESET 0x3489AFDC + +__INLINE uint32_t ble_blemprio1_get(void) +{ + return REG_BLE_RD(BLE_BLEMPRIO1_ADDR); +} + +__INLINE void ble_blemprio1_set(uint32_t value) +{ + REG_BLE_WR(BLE_BLEMPRIO1_ADDR, value); +} + +// field definitions +#define BLE_BLEM15_MASK ((uint32_t)0xF0000000) +#define BLE_BLEM15_LSB 28 +#define BLE_BLEM15_WIDTH ((uint32_t)0x00000004) +#define BLE_BLEM14_MASK ((uint32_t)0x0F000000) +#define BLE_BLEM14_LSB 24 +#define BLE_BLEM14_WIDTH ((uint32_t)0x00000004) +#define BLE_BLEM13_MASK ((uint32_t)0x00F00000) +#define BLE_BLEM13_LSB 20 +#define BLE_BLEM13_WIDTH ((uint32_t)0x00000004) +#define BLE_BLEM12_MASK ((uint32_t)0x000F0000) +#define BLE_BLEM12_LSB 16 +#define BLE_BLEM12_WIDTH ((uint32_t)0x00000004) +#define BLE_BLEM11_MASK ((uint32_t)0x0000F000) +#define BLE_BLEM11_LSB 12 +#define BLE_BLEM11_WIDTH ((uint32_t)0x00000004) +#define BLE_BLEM10_MASK ((uint32_t)0x00000F00) +#define BLE_BLEM10_LSB 8 +#define BLE_BLEM10_WIDTH ((uint32_t)0x00000004) +#define BLE_BLEM9_MASK ((uint32_t)0x000000F0) +#define BLE_BLEM9_LSB 4 +#define BLE_BLEM9_WIDTH ((uint32_t)0x00000004) +#define BLE_BLEM8_MASK ((uint32_t)0x0000000F) +#define BLE_BLEM8_LSB 0 +#define BLE_BLEM8_WIDTH ((uint32_t)0x00000004) + +#define BLE_BLEM15_RST 0x3 +#define BLE_BLEM14_RST 0x4 +#define BLE_BLEM13_RST 0x8 +#define BLE_BLEM12_RST 0x9 +#define BLE_BLEM11_RST 0xA +#define BLE_BLEM10_RST 0xF +#define BLE_BLEM9_RST 0xD +#define BLE_BLEM8_RST 0xC + +__INLINE void ble_blemprio1_pack(uint8_t blem15, uint8_t blem14, uint8_t blem13, uint8_t blem12, uint8_t blem11, uint8_t blem10, uint8_t blem9, uint8_t blem8) +{ + ASSERT_ERR((((uint32_t)blem15 << 28) & ~((uint32_t)0xF0000000)) == 0); + ASSERT_ERR((((uint32_t)blem14 << 24) & ~((uint32_t)0x0F000000)) == 0); + ASSERT_ERR((((uint32_t)blem13 << 20) & ~((uint32_t)0x00F00000)) == 0); + ASSERT_ERR((((uint32_t)blem12 << 16) & ~((uint32_t)0x000F0000)) == 0); + ASSERT_ERR((((uint32_t)blem11 << 12) & ~((uint32_t)0x0000F000)) == 0); + ASSERT_ERR((((uint32_t)blem10 << 8) & ~((uint32_t)0x00000F00)) == 0); + ASSERT_ERR((((uint32_t)blem9 << 4) & ~((uint32_t)0x000000F0)) == 0); + ASSERT_ERR((((uint32_t)blem8 << 0) & ~((uint32_t)0x0000000F)) == 0); + REG_BLE_WR(BLE_BLEMPRIO1_ADDR, ((uint32_t)blem15 << 28) | ((uint32_t)blem14 << 24) | ((uint32_t)blem13 << 20) | ((uint32_t)blem12 << 16) | ((uint32_t)blem11 << 12) | ((uint32_t)blem10 << 8) | ((uint32_t)blem9 << 4) | ((uint32_t)blem8 << 0)); +} + +__INLINE void ble_blemprio1_unpack(uint8_t* blem15, uint8_t* blem14, uint8_t* blem13, uint8_t* blem12, uint8_t* blem11, uint8_t* blem10, uint8_t* blem9, uint8_t* blem8) +{ + uint32_t localVal = REG_BLE_RD(BLE_BLEMPRIO1_ADDR); + + *blem15 = (localVal & ((uint32_t)0xF0000000)) >> 28; + *blem14 = (localVal & ((uint32_t)0x0F000000)) >> 24; + *blem13 = (localVal & ((uint32_t)0x00F00000)) >> 20; + *blem12 = (localVal & ((uint32_t)0x000F0000)) >> 16; + *blem11 = (localVal & ((uint32_t)0x0000F000)) >> 12; + *blem10 = (localVal & ((uint32_t)0x00000F00)) >> 8; + *blem9 = (localVal & ((uint32_t)0x000000F0)) >> 4; + *blem8 = (localVal & ((uint32_t)0x0000000F)) >> 0; +} + +__INLINE uint8_t ble_blemprio1_blem15_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_BLEMPRIO1_ADDR); + return ((localVal & ((uint32_t)0xF0000000)) >> 28); +} + +__INLINE void ble_blemprio1_blem15_setf(uint8_t blem15) +{ + ASSERT_ERR((((uint32_t)blem15 << 28) & ~((uint32_t)0xF0000000)) == 0); + REG_BLE_WR(BLE_BLEMPRIO1_ADDR, (REG_BLE_RD(BLE_BLEMPRIO1_ADDR) & ~((uint32_t)0xF0000000)) | ((uint32_t)blem15 << 28)); +} + +__INLINE uint8_t ble_blemprio1_blem14_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_BLEMPRIO1_ADDR); + return ((localVal & ((uint32_t)0x0F000000)) >> 24); +} + +__INLINE void ble_blemprio1_blem14_setf(uint8_t blem14) +{ + ASSERT_ERR((((uint32_t)blem14 << 24) & ~((uint32_t)0x0F000000)) == 0); + REG_BLE_WR(BLE_BLEMPRIO1_ADDR, (REG_BLE_RD(BLE_BLEMPRIO1_ADDR) & ~((uint32_t)0x0F000000)) | ((uint32_t)blem14 << 24)); +} + +__INLINE uint8_t ble_blemprio1_blem13_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_BLEMPRIO1_ADDR); + return ((localVal & ((uint32_t)0x00F00000)) >> 20); +} + +__INLINE void ble_blemprio1_blem13_setf(uint8_t blem13) +{ + ASSERT_ERR((((uint32_t)blem13 << 20) & ~((uint32_t)0x00F00000)) == 0); + REG_BLE_WR(BLE_BLEMPRIO1_ADDR, (REG_BLE_RD(BLE_BLEMPRIO1_ADDR) & ~((uint32_t)0x00F00000)) | ((uint32_t)blem13 << 20)); +} + +__INLINE uint8_t ble_blemprio1_blem12_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_BLEMPRIO1_ADDR); + return ((localVal & ((uint32_t)0x000F0000)) >> 16); +} + +__INLINE void ble_blemprio1_blem12_setf(uint8_t blem12) +{ + ASSERT_ERR((((uint32_t)blem12 << 16) & ~((uint32_t)0x000F0000)) == 0); + REG_BLE_WR(BLE_BLEMPRIO1_ADDR, (REG_BLE_RD(BLE_BLEMPRIO1_ADDR) & ~((uint32_t)0x000F0000)) | ((uint32_t)blem12 << 16)); +} + +__INLINE uint8_t ble_blemprio1_blem11_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_BLEMPRIO1_ADDR); + return ((localVal & ((uint32_t)0x0000F000)) >> 12); +} + +__INLINE void ble_blemprio1_blem11_setf(uint8_t blem11) +{ + ASSERT_ERR((((uint32_t)blem11 << 12) & ~((uint32_t)0x0000F000)) == 0); + REG_BLE_WR(BLE_BLEMPRIO1_ADDR, (REG_BLE_RD(BLE_BLEMPRIO1_ADDR) & ~((uint32_t)0x0000F000)) | ((uint32_t)blem11 << 12)); +} + +__INLINE uint8_t ble_blemprio1_blem10_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_BLEMPRIO1_ADDR); + return ((localVal & ((uint32_t)0x00000F00)) >> 8); +} + +__INLINE void ble_blemprio1_blem10_setf(uint8_t blem10) +{ + ASSERT_ERR((((uint32_t)blem10 << 8) & ~((uint32_t)0x00000F00)) == 0); + REG_BLE_WR(BLE_BLEMPRIO1_ADDR, (REG_BLE_RD(BLE_BLEMPRIO1_ADDR) & ~((uint32_t)0x00000F00)) | ((uint32_t)blem10 << 8)); +} + +__INLINE uint8_t ble_blemprio1_blem9_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_BLEMPRIO1_ADDR); + return ((localVal & ((uint32_t)0x000000F0)) >> 4); +} + +__INLINE void ble_blemprio1_blem9_setf(uint8_t blem9) +{ + ASSERT_ERR((((uint32_t)blem9 << 4) & ~((uint32_t)0x000000F0)) == 0); + REG_BLE_WR(BLE_BLEMPRIO1_ADDR, (REG_BLE_RD(BLE_BLEMPRIO1_ADDR) & ~((uint32_t)0x000000F0)) | ((uint32_t)blem9 << 4)); +} + +__INLINE uint8_t ble_blemprio1_blem8_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_BLEMPRIO1_ADDR); + return ((localVal & ((uint32_t)0x0000000F)) >> 0); +} + +__INLINE void ble_blemprio1_blem8_setf(uint8_t blem8) +{ + ASSERT_ERR((((uint32_t)blem8 << 0) & ~((uint32_t)0x0000000F)) == 0); + REG_BLE_WR(BLE_BLEMPRIO1_ADDR, (REG_BLE_RD(BLE_BLEMPRIO1_ADDR) & ~((uint32_t)0x0000000F)) | ((uint32_t)blem8 << 0)); +} + +/** + * @brief BLEMPRIO2 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31:28 BLEMDEFAULT 0x3 + * 11:08 BLEM18 0x2 + * 07:04 BLEM17 0x7 + * 03:00 BLEM16 0x7 + *+ */ +#define BLE_BLEMPRIO2_ADDR BASEBAND_REG_BASE +0x154 //0x50800154 +#define BLE_BLEMPRIO2_OFFSET 0x00000154 +#define BLE_BLEMPRIO2_INDEX 0x00000055 +#define BLE_BLEMPRIO2_RESET 0x30000277 + +__INLINE uint32_t ble_blemprio2_get(void) +{ + return REG_BLE_RD(BLE_BLEMPRIO2_ADDR); +} + +__INLINE void ble_blemprio2_set(uint32_t value) +{ + REG_BLE_WR(BLE_BLEMPRIO2_ADDR, value); +} + +// field definitions +#define BLE_BLEMDEFAULT_MASK ((uint32_t)0xF0000000) +#define BLE_BLEMDEFAULT_LSB 28 +#define BLE_BLEMDEFAULT_WIDTH ((uint32_t)0x00000004) +#define BLE_BLEM18_MASK ((uint32_t)0x00000F00) +#define BLE_BLEM18_LSB 8 +#define BLE_BLEM18_WIDTH ((uint32_t)0x00000004) +#define BLE_BLEM17_MASK ((uint32_t)0x000000F0) +#define BLE_BLEM17_LSB 4 +#define BLE_BLEM17_WIDTH ((uint32_t)0x00000004) +#define BLE_BLEM16_MASK ((uint32_t)0x0000000F) +#define BLE_BLEM16_LSB 0 +#define BLE_BLEM16_WIDTH ((uint32_t)0x00000004) + +#define BLE_BLEMDEFAULT_RST 0x3 +#define BLE_BLEM18_RST 0x2 +#define BLE_BLEM17_RST 0x7 +#define BLE_BLEM16_RST 0x7 + +__INLINE void ble_blemprio2_pack(uint8_t blemdefault, uint8_t blem18, uint8_t blem17, uint8_t blem16) +{ + ASSERT_ERR((((uint32_t)blemdefault << 28) & ~((uint32_t)0xF0000000)) == 0); + ASSERT_ERR((((uint32_t)blem18 << 8) & ~((uint32_t)0x00000F00)) == 0); + ASSERT_ERR((((uint32_t)blem17 << 4) & ~((uint32_t)0x000000F0)) == 0); + ASSERT_ERR((((uint32_t)blem16 << 0) & ~((uint32_t)0x0000000F)) == 0); + REG_BLE_WR(BLE_BLEMPRIO2_ADDR, ((uint32_t)blemdefault << 28) | ((uint32_t)blem18 << 8) | ((uint32_t)blem17 << 4) | ((uint32_t)blem16 << 0)); +} + +__INLINE void ble_blemprio2_unpack(uint8_t* blemdefault, uint8_t* blem18, uint8_t* blem17, uint8_t* blem16) +{ + uint32_t localVal = REG_BLE_RD(BLE_BLEMPRIO2_ADDR); + + *blemdefault = (localVal & ((uint32_t)0xF0000000)) >> 28; + *blem18 = (localVal & ((uint32_t)0x00000F00)) >> 8; + *blem17 = (localVal & ((uint32_t)0x000000F0)) >> 4; + *blem16 = (localVal & ((uint32_t)0x0000000F)) >> 0; +} + +__INLINE uint8_t ble_blemprio2_blemdefault_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_BLEMPRIO2_ADDR); + return ((localVal & ((uint32_t)0xF0000000)) >> 28); +} + +__INLINE void ble_blemprio2_blemdefault_setf(uint8_t blemdefault) +{ + ASSERT_ERR((((uint32_t)blemdefault << 28) & ~((uint32_t)0xF0000000)) == 0); + REG_BLE_WR(BLE_BLEMPRIO2_ADDR, (REG_BLE_RD(BLE_BLEMPRIO2_ADDR) & ~((uint32_t)0xF0000000)) | ((uint32_t)blemdefault << 28)); +} + +__INLINE uint8_t ble_blemprio2_blem18_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_BLEMPRIO2_ADDR); + return ((localVal & ((uint32_t)0x00000F00)) >> 8); +} + +__INLINE void ble_blemprio2_blem18_setf(uint8_t blem18) +{ + ASSERT_ERR((((uint32_t)blem18 << 8) & ~((uint32_t)0x00000F00)) == 0); + REG_BLE_WR(BLE_BLEMPRIO2_ADDR, (REG_BLE_RD(BLE_BLEMPRIO2_ADDR) & ~((uint32_t)0x00000F00)) | ((uint32_t)blem18 << 8)); +} + +__INLINE uint8_t ble_blemprio2_blem17_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_BLEMPRIO2_ADDR); + return ((localVal & ((uint32_t)0x000000F0)) >> 4); +} + +__INLINE void ble_blemprio2_blem17_setf(uint8_t blem17) +{ + ASSERT_ERR((((uint32_t)blem17 << 4) & ~((uint32_t)0x000000F0)) == 0); + REG_BLE_WR(BLE_BLEMPRIO2_ADDR, (REG_BLE_RD(BLE_BLEMPRIO2_ADDR) & ~((uint32_t)0x000000F0)) | ((uint32_t)blem17 << 4)); +} + +__INLINE uint8_t ble_blemprio2_blem16_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_BLEMPRIO2_ADDR); + return ((localVal & ((uint32_t)0x0000000F)) >> 0); +} + +__INLINE void ble_blemprio2_blem16_setf(uint8_t blem16) +{ + ASSERT_ERR((((uint32_t)blem16 << 0) & ~((uint32_t)0x0000000F)) == 0); + REG_BLE_WR(BLE_BLEMPRIO2_ADDR, (REG_BLE_RD(BLE_BLEMPRIO2_ADDR) & ~((uint32_t)0x0000000F)) | ((uint32_t)blem16 << 0)); +} + +/** + * @brief RALCNTL register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 23:16 RALNBDEV 0x0 + * 13:00 RALBASEPTR 0x0 + *+ */ +#define BLE_RALCNTL_ADDR BASEBAND_REG_BASE +0x160 //0x50800160 +#define BLE_RALCNTL_OFFSET 0x00000160 +#define BLE_RALCNTL_INDEX 0x00000058 +#define BLE_RALCNTL_RESET 0x00000000 + +__INLINE uint32_t ble_ralcntl_get(void) +{ + return REG_BLE_RD(BLE_RALCNTL_ADDR); +} + +__INLINE void ble_ralcntl_set(uint32_t value) +{ + REG_BLE_WR(BLE_RALCNTL_ADDR, value); +} + +// field definitions +#define BLE_RALNBDEV_MASK ((uint32_t)0x00FF0000) +#define BLE_RALNBDEV_LSB 16 +#define BLE_RALNBDEV_WIDTH ((uint32_t)0x00000008) +#define BLE_RALBASEPTR_MASK ((uint32_t)0x00003FFF) +#define BLE_RALBASEPTR_LSB 0 +#define BLE_RALBASEPTR_WIDTH ((uint32_t)0x0000000E) + +#define BLE_RALNBDEV_RST 0x0 +#define BLE_RALBASEPTR_RST 0x0 + +__INLINE void ble_ralcntl_pack(uint8_t ralnbdev, uint16_t ralbaseptr) +{ + ASSERT_ERR((((uint32_t)ralnbdev << 16) & ~((uint32_t)0x00FF0000)) == 0); + ASSERT_ERR((((uint32_t)ralbaseptr << 0) & ~((uint32_t)0x00003FFF)) == 0); + REG_BLE_WR(BLE_RALCNTL_ADDR, ((uint32_t)ralnbdev << 16) | ((uint32_t)ralbaseptr << 0)); +} + +__INLINE void ble_ralcntl_unpack(uint8_t* ralnbdev, uint16_t* ralbaseptr) +{ + uint32_t localVal = REG_BLE_RD(BLE_RALCNTL_ADDR); + + *ralnbdev = (localVal & ((uint32_t)0x00FF0000)) >> 16; + *ralbaseptr = (localVal & ((uint32_t)0x00003FFF)) >> 0; +} + +__INLINE uint8_t ble_ralcntl_ralnbdev_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RALCNTL_ADDR); + return ((localVal & ((uint32_t)0x00FF0000)) >> 16); +} + +__INLINE void ble_ralcntl_ralnbdev_setf(uint8_t ralnbdev) +{ + ASSERT_ERR((((uint32_t)ralnbdev << 16) & ~((uint32_t)0x00FF0000)) == 0); + REG_BLE_WR(BLE_RALCNTL_ADDR, (REG_BLE_RD(BLE_RALCNTL_ADDR) & ~((uint32_t)0x00FF0000)) | ((uint32_t)ralnbdev << 16)); +} + +__INLINE uint16_t ble_ralcntl_ralbaseptr_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RALCNTL_ADDR); + return ((localVal & ((uint32_t)0x00003FFF)) >> 0); +} + +__INLINE void ble_ralcntl_ralbaseptr_setf(uint16_t ralbaseptr) +{ + ASSERT_ERR((((uint32_t)ralbaseptr << 0) & ~((uint32_t)0x00003FFF)) == 0); + REG_BLE_WR(BLE_RALCNTL_ADDR, (REG_BLE_RD(BLE_RALCNTL_ADDR) & ~((uint32_t)0x00003FFF)) | ((uint32_t)ralbaseptr << 0)); +} + +/** + * @brief RALCURRENTPTR register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 13:00 RALCURRENTPTR 0x0 + *+ */ +#define BLE_RALCURRENTPTR_ADDR BASEBAND_REG_BASE +0x164 //0x50800164 +#define BLE_RALCURRENTPTR_OFFSET 0x00000164 +#define BLE_RALCURRENTPTR_INDEX 0x00000059 +#define BLE_RALCURRENTPTR_RESET 0x00000000 + +__INLINE uint32_t ble_ralcurrentptr_get(void) +{ + return REG_BLE_RD(BLE_RALCURRENTPTR_ADDR); +} + +__INLINE void ble_ralcurrentptr_set(uint32_t value) +{ + REG_BLE_WR(BLE_RALCURRENTPTR_ADDR, value); +} + +// field definitions +#define BLE_RALCURRENTPTR_MASK ((uint32_t)0x00003FFF) +#define BLE_RALCURRENTPTR_LSB 0 +#define BLE_RALCURRENTPTR_WIDTH ((uint32_t)0x0000000E) + +#define BLE_RALCURRENTPTR_RST 0x0 + +__INLINE uint16_t ble_ralcurrentptr_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RALCURRENTPTR_ADDR); + ASSERT_ERR((localVal & ~((uint32_t)0x00003FFF)) == 0); + return (localVal >> 0); +} + +__INLINE void ble_ralcurrentptr_setf(uint16_t ralcurrentptr) +{ + ASSERT_ERR((((uint32_t)ralcurrentptr << 0) & ~((uint32_t)0x00003FFF)) == 0); + REG_BLE_WR(BLE_RALCURRENTPTR_ADDR, (uint32_t)ralcurrentptr << 0); +} + +/** + * @brief RAL_LOCAL_RND register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31 LRND_INIT 0 + * 21:00 LRND_VAL 0x3F0F0F + *+ */ +#define BLE_RAL_LOCAL_RND_ADDR BASEBAND_REG_BASE +0x168 //0x50800168 +#define BLE_RAL_LOCAL_RND_OFFSET 0x00000168 +#define BLE_RAL_LOCAL_RND_INDEX 0x0000005A +#define BLE_RAL_LOCAL_RND_RESET 0x003F0F0F + +__INLINE uint32_t ble_ral_local_rnd_get(void) +{ + return REG_BLE_RD(BLE_RAL_LOCAL_RND_ADDR); +} + +__INLINE void ble_ral_local_rnd_set(uint32_t value) +{ + REG_BLE_WR(BLE_RAL_LOCAL_RND_ADDR, value); +} + +// field definitions +#define BLE_LRND_INIT_BIT ((uint32_t)0x80000000) +#define BLE_LRND_INIT_POS 31 +#define BLE_LRND_VAL_MASK ((uint32_t)0x003FFFFF) +#define BLE_LRND_VAL_LSB 0 +#define BLE_LRND_VAL_WIDTH ((uint32_t)0x00000016) + +#define BLE_LRND_INIT_RST 0x0 +#define BLE_LRND_VAL_RST 0x3F0F0F + +__INLINE void ble_ral_local_rnd_pack(uint8_t lrndinit, uint32_t lrndval) +{ + ASSERT_ERR((((uint32_t)lrndinit << 31) & ~((uint32_t)0x80000000)) == 0); + ASSERT_ERR((((uint32_t)lrndval << 0) & ~((uint32_t)0x003FFFFF)) == 0); + REG_BLE_WR(BLE_RAL_LOCAL_RND_ADDR, ((uint32_t)lrndinit << 31) | ((uint32_t)lrndval << 0)); +} + +__INLINE void ble_ral_local_rnd_unpack(uint8_t* lrndinit, uint32_t* lrndval) +{ + uint32_t localVal = REG_BLE_RD(BLE_RAL_LOCAL_RND_ADDR); + + *lrndinit = (localVal & ((uint32_t)0x80000000)) >> 31; + *lrndval = (localVal & ((uint32_t)0x003FFFFF)) >> 0; +} + +__INLINE uint8_t ble_ral_local_rnd_lrnd_init_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RAL_LOCAL_RND_ADDR); + return ((localVal & ((uint32_t)0x80000000)) >> 31); +} + +__INLINE void ble_ral_local_rnd_lrnd_init_setf(uint8_t lrndinit) +{ + ASSERT_ERR((((uint32_t)lrndinit << 31) & ~((uint32_t)0x80000000)) == 0); + REG_BLE_WR(BLE_RAL_LOCAL_RND_ADDR, (REG_BLE_RD(BLE_RAL_LOCAL_RND_ADDR) & ~((uint32_t)0x80000000)) | ((uint32_t)lrndinit << 31)); +} + +__INLINE uint32_t ble_ral_local_rnd_lrnd_val_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RAL_LOCAL_RND_ADDR); + return ((localVal & ((uint32_t)0x003FFFFF)) >> 0); +} + +__INLINE void ble_ral_local_rnd_lrnd_val_setf(uint32_t lrndval) +{ + ASSERT_ERR((((uint32_t)lrndval << 0) & ~((uint32_t)0x003FFFFF)) == 0); + REG_BLE_WR(BLE_RAL_LOCAL_RND_ADDR, (REG_BLE_RD(BLE_RAL_LOCAL_RND_ADDR) & ~((uint32_t)0x003FFFFF)) | ((uint32_t)lrndval << 0)); +} + +/** + * @brief RAL_PEER_RND register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31 PRND_INIT 0 + * 21:00 PRND_VAL 0x30F0F0 + *+ */ +#define BLE_RAL_PEER_RND_ADDR BASEBAND_REG_BASE +0x16C //0x5080016C +#define BLE_RAL_PEER_RND_OFFSET 0x0000016C +#define BLE_RAL_PEER_RND_INDEX 0x0000005B +#define BLE_RAL_PEER_RND_RESET 0x0030F0F0 + +__INLINE uint32_t ble_ral_peer_rnd_get(void) +{ + return REG_BLE_RD(BLE_RAL_PEER_RND_ADDR); +} + +__INLINE void ble_ral_peer_rnd_set(uint32_t value) +{ + REG_BLE_WR(BLE_RAL_PEER_RND_ADDR, value); +} + +// field definitions +#define BLE_PRND_INIT_BIT ((uint32_t)0x80000000) +#define BLE_PRND_INIT_POS 31 +#define BLE_PRND_VAL_MASK ((uint32_t)0x003FFFFF) +#define BLE_PRND_VAL_LSB 0 +#define BLE_PRND_VAL_WIDTH ((uint32_t)0x00000016) + +#define BLE_PRND_INIT_RST 0x0 +#define BLE_PRND_VAL_RST 0x30F0F0 + +__INLINE void ble_ral_peer_rnd_pack(uint8_t prndinit, uint32_t prndval) +{ + ASSERT_ERR((((uint32_t)prndinit << 31) & ~((uint32_t)0x80000000)) == 0); + ASSERT_ERR((((uint32_t)prndval << 0) & ~((uint32_t)0x003FFFFF)) == 0); + REG_BLE_WR(BLE_RAL_PEER_RND_ADDR, ((uint32_t)prndinit << 31) | ((uint32_t)prndval << 0)); +} + +__INLINE void ble_ral_peer_rnd_unpack(uint8_t* prndinit, uint32_t* prndval) +{ + uint32_t localVal = REG_BLE_RD(BLE_RAL_PEER_RND_ADDR); + + *prndinit = (localVal & ((uint32_t)0x80000000)) >> 31; + *prndval = (localVal & ((uint32_t)0x003FFFFF)) >> 0; +} + +__INLINE uint8_t ble_ral_peer_rnd_prnd_init_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RAL_PEER_RND_ADDR); + return ((localVal & ((uint32_t)0x80000000)) >> 31); +} + +__INLINE void ble_ral_peer_rnd_prnd_init_setf(uint8_t prndinit) +{ + ASSERT_ERR((((uint32_t)prndinit << 31) & ~((uint32_t)0x80000000)) == 0); + REG_BLE_WR(BLE_RAL_PEER_RND_ADDR, (REG_BLE_RD(BLE_RAL_PEER_RND_ADDR) & ~((uint32_t)0x80000000)) | ((uint32_t)prndinit << 31)); +} + +__INLINE uint32_t ble_ral_peer_rnd_prnd_val_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_RAL_PEER_RND_ADDR); + return ((localVal & ((uint32_t)0x003FFFFF)) >> 0); +} + +__INLINE void ble_ral_peer_rnd_prnd_val_setf(uint32_t prndval) +{ + ASSERT_ERR((((uint32_t)prndval << 0) & ~((uint32_t)0x003FFFFF)) == 0); + REG_BLE_WR(BLE_RAL_PEER_RND_ADDR, (REG_BLE_RD(BLE_RAL_PEER_RND_ADDR) & ~((uint32_t)0x003FFFFF)) | ((uint32_t)prndval << 0)); +} + +/** + * @brief DFCNTL0_1US register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31:24 RXSAMPSTINST0_1US 0x0 + * 23:16 RXSWSTINST0_1US 0x0 + * 07:00 TXSWSTINST0_1US 0x0 + *+ */ +#define BLE_DFCNTL0_1US_ADDR BASEBAND_REG_BASE +0x170 //0x50800170 +#define BLE_DFCNTL0_1US_OFFSET 0x00000170 +#define BLE_DFCNTL0_1US_INDEX 0x0000005C +#define BLE_DFCNTL0_1US_RESET 0x00000000 + +__INLINE uint32_t ble_dfcntl0_1us_get(void) +{ + return REG_BLE_RD(BLE_DFCNTL0_1US_ADDR); +} + +__INLINE void ble_dfcntl0_1us_set(uint32_t value) +{ + REG_BLE_WR(BLE_DFCNTL0_1US_ADDR, value); +} + +// field definitions +#define BLE_RXSAMPSTINST0_1US_MASK ((uint32_t)0xFF000000) +#define BLE_RXSAMPSTINST0_1US_LSB 24 +#define BLE_RXSAMPSTINST0_1US_WIDTH ((uint32_t)0x00000008) +#define BLE_RXSWSTINST0_1US_MASK ((uint32_t)0x00FF0000) +#define BLE_RXSWSTINST0_1US_LSB 16 +#define BLE_RXSWSTINST0_1US_WIDTH ((uint32_t)0x00000008) +#define BLE_TXSWSTINST0_1US_MASK ((uint32_t)0x000000FF) +#define BLE_TXSWSTINST0_1US_LSB 0 +#define BLE_TXSWSTINST0_1US_WIDTH ((uint32_t)0x00000008) + +#define BLE_RXSAMPSTINST0_1US_RST 0x0 +#define BLE_RXSWSTINST0_1US_RST 0x0 +#define BLE_TXSWSTINST0_1US_RST 0x0 + +__INLINE void ble_dfcntl0_1us_pack(uint8_t rxsampstinst01us, uint8_t rxswstinst01us, uint8_t txswstinst01us) +{ + ASSERT_ERR((((uint32_t)rxsampstinst01us << 24) & ~((uint32_t)0xFF000000)) == 0); + ASSERT_ERR((((uint32_t)rxswstinst01us << 16) & ~((uint32_t)0x00FF0000)) == 0); + ASSERT_ERR((((uint32_t)txswstinst01us << 0) & ~((uint32_t)0x000000FF)) == 0); + REG_BLE_WR(BLE_DFCNTL0_1US_ADDR, ((uint32_t)rxsampstinst01us << 24) | ((uint32_t)rxswstinst01us << 16) | ((uint32_t)txswstinst01us << 0)); +} + +__INLINE void ble_dfcntl0_1us_unpack(uint8_t* rxsampstinst01us, uint8_t* rxswstinst01us, uint8_t* txswstinst01us) +{ + uint32_t localVal = REG_BLE_RD(BLE_DFCNTL0_1US_ADDR); + + *rxsampstinst01us = (localVal & ((uint32_t)0xFF000000)) >> 24; + *rxswstinst01us = (localVal & ((uint32_t)0x00FF0000)) >> 16; + *txswstinst01us = (localVal & ((uint32_t)0x000000FF)) >> 0; +} + +__INLINE uint8_t ble_dfcntl0_1us_rxsampstinst0_1us_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_DFCNTL0_1US_ADDR); + return ((localVal & ((uint32_t)0xFF000000)) >> 24); +} + +__INLINE void ble_dfcntl0_1us_rxsampstinst0_1us_setf(uint8_t rxsampstinst01us) +{ + ASSERT_ERR((((uint32_t)rxsampstinst01us << 24) & ~((uint32_t)0xFF000000)) == 0); + REG_BLE_WR(BLE_DFCNTL0_1US_ADDR, (REG_BLE_RD(BLE_DFCNTL0_1US_ADDR) & ~((uint32_t)0xFF000000)) | ((uint32_t)rxsampstinst01us << 24)); +} + +__INLINE uint8_t ble_dfcntl0_1us_rxswstinst0_1us_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_DFCNTL0_1US_ADDR); + return ((localVal & ((uint32_t)0x00FF0000)) >> 16); +} + +__INLINE void ble_dfcntl0_1us_rxswstinst0_1us_setf(uint8_t rxswstinst01us) +{ + ASSERT_ERR((((uint32_t)rxswstinst01us << 16) & ~((uint32_t)0x00FF0000)) == 0); + REG_BLE_WR(BLE_DFCNTL0_1US_ADDR, (REG_BLE_RD(BLE_DFCNTL0_1US_ADDR) & ~((uint32_t)0x00FF0000)) | ((uint32_t)rxswstinst01us << 16)); +} + +__INLINE uint8_t ble_dfcntl0_1us_txswstinst0_1us_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_DFCNTL0_1US_ADDR); + return ((localVal & ((uint32_t)0x000000FF)) >> 0); +} + +__INLINE void ble_dfcntl0_1us_txswstinst0_1us_setf(uint8_t txswstinst01us) +{ + ASSERT_ERR((((uint32_t)txswstinst01us << 0) & ~((uint32_t)0x000000FF)) == 0); + REG_BLE_WR(BLE_DFCNTL0_1US_ADDR, (REG_BLE_RD(BLE_DFCNTL0_1US_ADDR) & ~((uint32_t)0x000000FF)) | ((uint32_t)txswstinst01us << 0)); +} + +/** + * @brief DFCNTL0_2US register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31:24 RXSAMPSTINST0_2US 0x0 + * 23:16 RXSWSTINST0_2US 0x0 + * 07:00 TXSWSTINST0_2US 0x0 + *+ */ +#define BLE_DFCNTL0_2US_ADDR BASEBAND_REG_BASE +0x174 //0x50800174 +#define BLE_DFCNTL0_2US_OFFSET 0x00000174 +#define BLE_DFCNTL0_2US_INDEX 0x0000005D +#define BLE_DFCNTL0_2US_RESET 0x00000000 + +__INLINE uint32_t ble_dfcntl0_2us_get(void) +{ + return REG_BLE_RD(BLE_DFCNTL0_2US_ADDR); +} + +__INLINE void ble_dfcntl0_2us_set(uint32_t value) +{ + REG_BLE_WR(BLE_DFCNTL0_2US_ADDR, value); +} + +// field definitions +#define BLE_RXSAMPSTINST0_2US_MASK ((uint32_t)0xFF000000) +#define BLE_RXSAMPSTINST0_2US_LSB 24 +#define BLE_RXSAMPSTINST0_2US_WIDTH ((uint32_t)0x00000008) +#define BLE_RXSWSTINST0_2US_MASK ((uint32_t)0x00FF0000) +#define BLE_RXSWSTINST0_2US_LSB 16 +#define BLE_RXSWSTINST0_2US_WIDTH ((uint32_t)0x00000008) +#define BLE_TXSWSTINST0_2US_MASK ((uint32_t)0x000000FF) +#define BLE_TXSWSTINST0_2US_LSB 0 +#define BLE_TXSWSTINST0_2US_WIDTH ((uint32_t)0x00000008) + +#define BLE_RXSAMPSTINST0_2US_RST 0x0 +#define BLE_RXSWSTINST0_2US_RST 0x0 +#define BLE_TXSWSTINST0_2US_RST 0x0 + +__INLINE void ble_dfcntl0_2us_pack(uint8_t rxsampstinst02us, uint8_t rxswstinst02us, uint8_t txswstinst02us) +{ + ASSERT_ERR((((uint32_t)rxsampstinst02us << 24) & ~((uint32_t)0xFF000000)) == 0); + ASSERT_ERR((((uint32_t)rxswstinst02us << 16) & ~((uint32_t)0x00FF0000)) == 0); + ASSERT_ERR((((uint32_t)txswstinst02us << 0) & ~((uint32_t)0x000000FF)) == 0); + REG_BLE_WR(BLE_DFCNTL0_2US_ADDR, ((uint32_t)rxsampstinst02us << 24) | ((uint32_t)rxswstinst02us << 16) | ((uint32_t)txswstinst02us << 0)); +} + +__INLINE void ble_dfcntl0_2us_unpack(uint8_t* rxsampstinst02us, uint8_t* rxswstinst02us, uint8_t* txswstinst02us) +{ + uint32_t localVal = REG_BLE_RD(BLE_DFCNTL0_2US_ADDR); + + *rxsampstinst02us = (localVal & ((uint32_t)0xFF000000)) >> 24; + *rxswstinst02us = (localVal & ((uint32_t)0x00FF0000)) >> 16; + *txswstinst02us = (localVal & ((uint32_t)0x000000FF)) >> 0; +} + +__INLINE uint8_t ble_dfcntl0_2us_rxsampstinst0_2us_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_DFCNTL0_2US_ADDR); + return ((localVal & ((uint32_t)0xFF000000)) >> 24); +} + +__INLINE void ble_dfcntl0_2us_rxsampstinst0_2us_setf(uint8_t rxsampstinst02us) +{ + ASSERT_ERR((((uint32_t)rxsampstinst02us << 24) & ~((uint32_t)0xFF000000)) == 0); + REG_BLE_WR(BLE_DFCNTL0_2US_ADDR, (REG_BLE_RD(BLE_DFCNTL0_2US_ADDR) & ~((uint32_t)0xFF000000)) | ((uint32_t)rxsampstinst02us << 24)); +} + +__INLINE uint8_t ble_dfcntl0_2us_rxswstinst0_2us_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_DFCNTL0_2US_ADDR); + return ((localVal & ((uint32_t)0x00FF0000)) >> 16); +} + +__INLINE void ble_dfcntl0_2us_rxswstinst0_2us_setf(uint8_t rxswstinst02us) +{ + ASSERT_ERR((((uint32_t)rxswstinst02us << 16) & ~((uint32_t)0x00FF0000)) == 0); + REG_BLE_WR(BLE_DFCNTL0_2US_ADDR, (REG_BLE_RD(BLE_DFCNTL0_2US_ADDR) & ~((uint32_t)0x00FF0000)) | ((uint32_t)rxswstinst02us << 16)); +} + +__INLINE uint8_t ble_dfcntl0_2us_txswstinst0_2us_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_DFCNTL0_2US_ADDR); + return ((localVal & ((uint32_t)0x000000FF)) >> 0); +} + +__INLINE void ble_dfcntl0_2us_txswstinst0_2us_setf(uint8_t txswstinst02us) +{ + ASSERT_ERR((((uint32_t)txswstinst02us << 0) & ~((uint32_t)0x000000FF)) == 0); + REG_BLE_WR(BLE_DFCNTL0_2US_ADDR, (REG_BLE_RD(BLE_DFCNTL0_2US_ADDR) & ~((uint32_t)0x000000FF)) | ((uint32_t)txswstinst02us << 0)); +} + +/** + * @brief DFCNTL1_1US register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31:24 RXSAMPSTINST1_1US 0x0 + * 23:16 RXSWSTINST1_1US 0x0 + * 07:00 TXSWSTINST1_1US 0x0 + *+ */ +#define BLE_DFCNTL1_1US_ADDR BASEBAND_REG_BASE +0x178 //0x50800178 +#define BLE_DFCNTL1_1US_OFFSET 0x00000178 +#define BLE_DFCNTL1_1US_INDEX 0x0000005E +#define BLE_DFCNTL1_1US_RESET 0x00000000 + +__INLINE uint32_t ble_dfcntl1_1us_get(void) +{ + return REG_BLE_RD(BLE_DFCNTL1_1US_ADDR); +} + +__INLINE void ble_dfcntl1_1us_set(uint32_t value) +{ + REG_BLE_WR(BLE_DFCNTL1_1US_ADDR, value); +} + +// field definitions +#define BLE_RXSAMPSTINST1_1US_MASK ((uint32_t)0xFF000000) +#define BLE_RXSAMPSTINST1_1US_LSB 24 +#define BLE_RXSAMPSTINST1_1US_WIDTH ((uint32_t)0x00000008) +#define BLE_RXSWSTINST1_1US_MASK ((uint32_t)0x00FF0000) +#define BLE_RXSWSTINST1_1US_LSB 16 +#define BLE_RXSWSTINST1_1US_WIDTH ((uint32_t)0x00000008) +#define BLE_TXSWSTINST1_1US_MASK ((uint32_t)0x000000FF) +#define BLE_TXSWSTINST1_1US_LSB 0 +#define BLE_TXSWSTINST1_1US_WIDTH ((uint32_t)0x00000008) + +#define BLE_RXSAMPSTINST1_1US_RST 0x0 +#define BLE_RXSWSTINST1_1US_RST 0x0 +#define BLE_TXSWSTINST1_1US_RST 0x0 + +__INLINE void ble_dfcntl1_1us_pack(uint8_t rxsampstinst11us, uint8_t rxswstinst11us, uint8_t txswstinst11us) +{ + ASSERT_ERR((((uint32_t)rxsampstinst11us << 24) & ~((uint32_t)0xFF000000)) == 0); + ASSERT_ERR((((uint32_t)rxswstinst11us << 16) & ~((uint32_t)0x00FF0000)) == 0); + ASSERT_ERR((((uint32_t)txswstinst11us << 0) & ~((uint32_t)0x000000FF)) == 0); + REG_BLE_WR(BLE_DFCNTL1_1US_ADDR, ((uint32_t)rxsampstinst11us << 24) | ((uint32_t)rxswstinst11us << 16) | ((uint32_t)txswstinst11us << 0)); +} + +__INLINE void ble_dfcntl1_1us_unpack(uint8_t* rxsampstinst11us, uint8_t* rxswstinst11us, uint8_t* txswstinst11us) +{ + uint32_t localVal = REG_BLE_RD(BLE_DFCNTL1_1US_ADDR); + + *rxsampstinst11us = (localVal & ((uint32_t)0xFF000000)) >> 24; + *rxswstinst11us = (localVal & ((uint32_t)0x00FF0000)) >> 16; + *txswstinst11us = (localVal & ((uint32_t)0x000000FF)) >> 0; +} + +__INLINE uint8_t ble_dfcntl1_1us_rxsampstinst1_1us_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_DFCNTL1_1US_ADDR); + return ((localVal & ((uint32_t)0xFF000000)) >> 24); +} + +__INLINE void ble_dfcntl1_1us_rxsampstinst1_1us_setf(uint8_t rxsampstinst11us) +{ + ASSERT_ERR((((uint32_t)rxsampstinst11us << 24) & ~((uint32_t)0xFF000000)) == 0); + REG_BLE_WR(BLE_DFCNTL1_1US_ADDR, (REG_BLE_RD(BLE_DFCNTL1_1US_ADDR) & ~((uint32_t)0xFF000000)) | ((uint32_t)rxsampstinst11us << 24)); +} + +__INLINE uint8_t ble_dfcntl1_1us_rxswstinst1_1us_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_DFCNTL1_1US_ADDR); + return ((localVal & ((uint32_t)0x00FF0000)) >> 16); +} + +__INLINE void ble_dfcntl1_1us_rxswstinst1_1us_setf(uint8_t rxswstinst11us) +{ + ASSERT_ERR((((uint32_t)rxswstinst11us << 16) & ~((uint32_t)0x00FF0000)) == 0); + REG_BLE_WR(BLE_DFCNTL1_1US_ADDR, (REG_BLE_RD(BLE_DFCNTL1_1US_ADDR) & ~((uint32_t)0x00FF0000)) | ((uint32_t)rxswstinst11us << 16)); +} + +__INLINE uint8_t ble_dfcntl1_1us_txswstinst1_1us_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_DFCNTL1_1US_ADDR); + return ((localVal & ((uint32_t)0x000000FF)) >> 0); +} + +__INLINE void ble_dfcntl1_1us_txswstinst1_1us_setf(uint8_t txswstinst11us) +{ + ASSERT_ERR((((uint32_t)txswstinst11us << 0) & ~((uint32_t)0x000000FF)) == 0); + REG_BLE_WR(BLE_DFCNTL1_1US_ADDR, (REG_BLE_RD(BLE_DFCNTL1_1US_ADDR) & ~((uint32_t)0x000000FF)) | ((uint32_t)txswstinst11us << 0)); +} + +/** + * @brief DFCNTL1_2US register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31:24 RXSAMPSTINST1_2US 0x0 + * 23:16 RXSWSTINST1_2US 0x0 + * 07:00 TXSWSTINST1_2US 0x0 + *+ */ +#define BLE_DFCNTL1_2US_ADDR BASEBAND_REG_BASE +0x17C // 0x5080017C +#define BLE_DFCNTL1_2US_OFFSET 0x0000017C +#define BLE_DFCNTL1_2US_INDEX 0x0000005F +#define BLE_DFCNTL1_2US_RESET 0x00000000 + +__INLINE uint32_t ble_dfcntl1_2us_get(void) +{ + return REG_BLE_RD(BLE_DFCNTL1_2US_ADDR); +} + +__INLINE void ble_dfcntl1_2us_set(uint32_t value) +{ + REG_BLE_WR(BLE_DFCNTL1_2US_ADDR, value); +} + +// field definitions +#define BLE_RXSAMPSTINST1_2US_MASK ((uint32_t)0xFF000000) +#define BLE_RXSAMPSTINST1_2US_LSB 24 +#define BLE_RXSAMPSTINST1_2US_WIDTH ((uint32_t)0x00000008) +#define BLE_RXSWSTINST1_2US_MASK ((uint32_t)0x00FF0000) +#define BLE_RXSWSTINST1_2US_LSB 16 +#define BLE_RXSWSTINST1_2US_WIDTH ((uint32_t)0x00000008) +#define BLE_TXSWSTINST1_2US_MASK ((uint32_t)0x000000FF) +#define BLE_TXSWSTINST1_2US_LSB 0 +#define BLE_TXSWSTINST1_2US_WIDTH ((uint32_t)0x00000008) + +#define BLE_RXSAMPSTINST1_2US_RST 0x0 +#define BLE_RXSWSTINST1_2US_RST 0x0 +#define BLE_TXSWSTINST1_2US_RST 0x0 + +__INLINE void ble_dfcntl1_2us_pack(uint8_t rxsampstinst12us, uint8_t rxswstinst12us, uint8_t txswstinst12us) +{ + ASSERT_ERR((((uint32_t)rxsampstinst12us << 24) & ~((uint32_t)0xFF000000)) == 0); + ASSERT_ERR((((uint32_t)rxswstinst12us << 16) & ~((uint32_t)0x00FF0000)) == 0); + ASSERT_ERR((((uint32_t)txswstinst12us << 0) & ~((uint32_t)0x000000FF)) == 0); + REG_BLE_WR(BLE_DFCNTL1_2US_ADDR, ((uint32_t)rxsampstinst12us << 24) | ((uint32_t)rxswstinst12us << 16) | ((uint32_t)txswstinst12us << 0)); +} + +__INLINE void ble_dfcntl1_2us_unpack(uint8_t* rxsampstinst12us, uint8_t* rxswstinst12us, uint8_t* txswstinst12us) +{ + uint32_t localVal = REG_BLE_RD(BLE_DFCNTL1_2US_ADDR); + + *rxsampstinst12us = (localVal & ((uint32_t)0xFF000000)) >> 24; + *rxswstinst12us = (localVal & ((uint32_t)0x00FF0000)) >> 16; + *txswstinst12us = (localVal & ((uint32_t)0x000000FF)) >> 0; +} + +__INLINE uint8_t ble_dfcntl1_2us_rxsampstinst1_2us_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_DFCNTL1_2US_ADDR); + return ((localVal & ((uint32_t)0xFF000000)) >> 24); +} + +__INLINE void ble_dfcntl1_2us_rxsampstinst1_2us_setf(uint8_t rxsampstinst12us) +{ + ASSERT_ERR((((uint32_t)rxsampstinst12us << 24) & ~((uint32_t)0xFF000000)) == 0); + REG_BLE_WR(BLE_DFCNTL1_2US_ADDR, (REG_BLE_RD(BLE_DFCNTL1_2US_ADDR) & ~((uint32_t)0xFF000000)) | ((uint32_t)rxsampstinst12us << 24)); +} + +__INLINE uint8_t ble_dfcntl1_2us_rxswstinst1_2us_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_DFCNTL1_2US_ADDR); + return ((localVal & ((uint32_t)0x00FF0000)) >> 16); +} + +__INLINE void ble_dfcntl1_2us_rxswstinst1_2us_setf(uint8_t rxswstinst12us) +{ + ASSERT_ERR((((uint32_t)rxswstinst12us << 16) & ~((uint32_t)0x00FF0000)) == 0); + REG_BLE_WR(BLE_DFCNTL1_2US_ADDR, (REG_BLE_RD(BLE_DFCNTL1_2US_ADDR) & ~((uint32_t)0x00FF0000)) | ((uint32_t)rxswstinst12us << 16)); +} + +__INLINE uint8_t ble_dfcntl1_2us_txswstinst1_2us_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_DFCNTL1_2US_ADDR); + return ((localVal & ((uint32_t)0x000000FF)) >> 0); +} + +__INLINE void ble_dfcntl1_2us_txswstinst1_2us_setf(uint8_t txswstinst12us) +{ + ASSERT_ERR((((uint32_t)txswstinst12us << 0) & ~((uint32_t)0x000000FF)) == 0); + REG_BLE_WR(BLE_DFCNTL1_2US_ADDR, (REG_BLE_RD(BLE_DFCNTL1_2US_ADDR) & ~((uint32_t)0x000000FF)) | ((uint32_t)txswstinst12us << 0)); +} + +/** + * @brief DFCURRENTPTR register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 13:00 DFCURRENTPTR 0x0 + *+ */ +#define BLE_DFCURRENTPTR_ADDR BASEBAND_REG_BASE +0x180 //0x50800180 +#define BLE_DFCURRENTPTR_OFFSET 0x00000180 +#define BLE_DFCURRENTPTR_INDEX 0x00000060 +#define BLE_DFCURRENTPTR_RESET 0x00000000 + +__INLINE uint32_t ble_dfcurrentptr_get(void) +{ + return REG_BLE_RD(BLE_DFCURRENTPTR_ADDR); +} + +__INLINE void ble_dfcurrentptr_set(uint32_t value) +{ + REG_BLE_WR(BLE_DFCURRENTPTR_ADDR, value); +} + +// field definitions +#define BLE_DFCURRENTPTR_MASK ((uint32_t)0x00003FFF) +#define BLE_DFCURRENTPTR_LSB 0 +#define BLE_DFCURRENTPTR_WIDTH ((uint32_t)0x0000000E) + +#define BLE_DFCURRENTPTR_RST 0x0 + +__INLINE uint16_t ble_dfcurrentptr_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_DFCURRENTPTR_ADDR); + ASSERT_ERR((localVal & ~((uint32_t)0x00003FFF)) == 0); + return (localVal >> 0); +} + +__INLINE void ble_dfcurrentptr_setf(uint16_t dfcurrentptr) +{ + ASSERT_ERR((((uint32_t)dfcurrentptr << 0) & ~((uint32_t)0x00003FFF)) == 0); + REG_BLE_WR(BLE_DFCURRENTPTR_ADDR, (uint32_t)dfcurrentptr << 0); +} + +/** + * @brief DFANTCNTL register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15 RXPRIMIDCNTLEN 0 + * 14:08 RXPRIMANTID 0x0 + * 07 TXPRIMIDCNTLEN 0 + * 06:00 TXPRIMANTID 0x0 + *+ */ +#define BLE_DFANTCNTL_ADDR BASEBAND_REG_BASE +0x184 //0x50800184 +#define BLE_DFANTCNTL_OFFSET 0x00000184 +#define BLE_DFANTCNTL_INDEX 0x00000061 +#define BLE_DFANTCNTL_RESET 0x00000000 + +__INLINE uint32_t ble_dfantcntl_get(void) +{ + return REG_BLE_RD(BLE_DFANTCNTL_ADDR); +} + +__INLINE void ble_dfantcntl_set(uint32_t value) +{ + REG_BLE_WR(BLE_DFANTCNTL_ADDR, value); +} + +// field definitions +#define BLE_RXPRIMIDCNTLEN_BIT ((uint32_t)0x00008000) +#define BLE_RXPRIMIDCNTLEN_POS 15 +#define BLE_RXPRIMANTID_MASK ((uint32_t)0x00007F00) +#define BLE_RXPRIMANTID_LSB 8 +#define BLE_RXPRIMANTID_WIDTH ((uint32_t)0x00000007) +#define BLE_TXPRIMIDCNTLEN_BIT ((uint32_t)0x00000080) +#define BLE_TXPRIMIDCNTLEN_POS 7 +#define BLE_TXPRIMANTID_MASK ((uint32_t)0x0000007F) +#define BLE_TXPRIMANTID_LSB 0 +#define BLE_TXPRIMANTID_WIDTH ((uint32_t)0x00000007) + +#define BLE_RXPRIMIDCNTLEN_RST 0x0 +#define BLE_RXPRIMANTID_RST 0x0 +#define BLE_TXPRIMIDCNTLEN_RST 0x0 +#define BLE_TXPRIMANTID_RST 0x0 + +__INLINE void ble_dfantcntl_pack(uint8_t rxprimidcntlen, uint8_t rxprimantid, uint8_t txprimidcntlen, uint8_t txprimantid) +{ + ASSERT_ERR((((uint32_t)rxprimidcntlen << 15) & ~((uint32_t)0x00008000)) == 0); + ASSERT_ERR((((uint32_t)rxprimantid << 8) & ~((uint32_t)0x00007F00)) == 0); + ASSERT_ERR((((uint32_t)txprimidcntlen << 7) & ~((uint32_t)0x00000080)) == 0); + ASSERT_ERR((((uint32_t)txprimantid << 0) & ~((uint32_t)0x0000007F)) == 0); + REG_BLE_WR(BLE_DFANTCNTL_ADDR, ((uint32_t)rxprimidcntlen << 15) | ((uint32_t)rxprimantid << 8) | ((uint32_t)txprimidcntlen << 7) | ((uint32_t)txprimantid << 0)); +} + +__INLINE void ble_dfantcntl_unpack(uint8_t* rxprimidcntlen, uint8_t* rxprimantid, uint8_t* txprimidcntlen, uint8_t* txprimantid) +{ + uint32_t localVal = REG_BLE_RD(BLE_DFANTCNTL_ADDR); + + *rxprimidcntlen = (localVal & ((uint32_t)0x00008000)) >> 15; + *rxprimantid = (localVal & ((uint32_t)0x00007F00)) >> 8; + *txprimidcntlen = (localVal & ((uint32_t)0x00000080)) >> 7; + *txprimantid = (localVal & ((uint32_t)0x0000007F)) >> 0; +} + +__INLINE uint8_t ble_dfantcntl_rxprimidcntlen_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_DFANTCNTL_ADDR); + return ((localVal & ((uint32_t)0x00008000)) >> 15); +} + +__INLINE void ble_dfantcntl_rxprimidcntlen_setf(uint8_t rxprimidcntlen) +{ + ASSERT_ERR((((uint32_t)rxprimidcntlen << 15) & ~((uint32_t)0x00008000)) == 0); + REG_BLE_WR(BLE_DFANTCNTL_ADDR, (REG_BLE_RD(BLE_DFANTCNTL_ADDR) & ~((uint32_t)0x00008000)) | ((uint32_t)rxprimidcntlen << 15)); +} + +__INLINE uint8_t ble_dfantcntl_rxprimantid_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_DFANTCNTL_ADDR); + return ((localVal & ((uint32_t)0x00007F00)) >> 8); +} + +__INLINE void ble_dfantcntl_rxprimantid_setf(uint8_t rxprimantid) +{ + ASSERT_ERR((((uint32_t)rxprimantid << 8) & ~((uint32_t)0x00007F00)) == 0); + REG_BLE_WR(BLE_DFANTCNTL_ADDR, (REG_BLE_RD(BLE_DFANTCNTL_ADDR) & ~((uint32_t)0x00007F00)) | ((uint32_t)rxprimantid << 8)); +} + +__INLINE uint8_t ble_dfantcntl_txprimidcntlen_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_DFANTCNTL_ADDR); + return ((localVal & ((uint32_t)0x00000080)) >> 7); +} + +__INLINE void ble_dfantcntl_txprimidcntlen_setf(uint8_t txprimidcntlen) +{ + ASSERT_ERR((((uint32_t)txprimidcntlen << 7) & ~((uint32_t)0x00000080)) == 0); + REG_BLE_WR(BLE_DFANTCNTL_ADDR, (REG_BLE_RD(BLE_DFANTCNTL_ADDR) & ~((uint32_t)0x00000080)) | ((uint32_t)txprimidcntlen << 7)); +} + +__INLINE uint8_t ble_dfantcntl_txprimantid_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_DFANTCNTL_ADDR); + return ((localVal & ((uint32_t)0x0000007F)) >> 0); +} + +__INLINE void ble_dfantcntl_txprimantid_setf(uint8_t txprimantid) +{ + ASSERT_ERR((((uint32_t)txprimantid << 0) & ~((uint32_t)0x0000007F)) == 0); + REG_BLE_WR(BLE_DFANTCNTL_ADDR, (REG_BLE_RD(BLE_DFANTCNTL_ADDR) & ~((uint32_t)0x0000007F)) | ((uint32_t)txprimantid << 0)); +} + +/** + * @brief DFIFCNTL register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 07 ANTSWITCH_BEH 0 + * 06 SAMPREQ_BEH 0 + * 05:04 SAMPVALID_BEH 0x0 + * 03:02 IF_WIDTH 0x3 + * 01 MSB_LSB_ORDER 0 + * 00 SYMBOL_ORDER 0 + *+ */ +#define BLE_DFIFCNTL_ADDR BASEBAND_REG_BASE +0x188 //0x50800188 +#define BLE_DFIFCNTL_OFFSET 0x00000188 +#define BLE_DFIFCNTL_INDEX 0x00000062 +#define BLE_DFIFCNTL_RESET 0x0000000C + +__INLINE uint32_t ble_dfifcntl_get(void) +{ + return REG_BLE_RD(BLE_DFIFCNTL_ADDR); +} + +__INLINE void ble_dfifcntl_set(uint32_t value) +{ + REG_BLE_WR(BLE_DFIFCNTL_ADDR, value); +} + +// field definitions +#define BLE_ANTSWITCH_BEH_BIT ((uint32_t)0x00000080) +#define BLE_ANTSWITCH_BEH_POS 7 +#define BLE_SAMPREQ_BEH_BIT ((uint32_t)0x00000040) +#define BLE_SAMPREQ_BEH_POS 6 +#define BLE_SAMPVALID_BEH_MASK ((uint32_t)0x00000030) +#define BLE_SAMPVALID_BEH_LSB 4 +#define BLE_SAMPVALID_BEH_WIDTH ((uint32_t)0x00000002) +#define BLE_IF_WIDTH_MASK ((uint32_t)0x0000000C) +#define BLE_IF_WIDTH_LSB 2 +#define BLE_IF_WIDTH_WIDTH ((uint32_t)0x00000002) +#define BLE_MSB_LSB_ORDER_BIT ((uint32_t)0x00000002) +#define BLE_MSB_LSB_ORDER_POS 1 +#define BLE_SYMBOL_ORDER_BIT ((uint32_t)0x00000001) +#define BLE_SYMBOL_ORDER_POS 0 + +#define BLE_ANTSWITCH_BEH_RST 0x0 +#define BLE_SAMPREQ_BEH_RST 0x0 +#define BLE_SAMPVALID_BEH_RST 0x0 +#define BLE_IF_WIDTH_RST 0x3 +#define BLE_MSB_LSB_ORDER_RST 0x0 +#define BLE_SYMBOL_ORDER_RST 0x0 + +__INLINE void ble_dfifcntl_pack(uint8_t antswitchbeh, uint8_t sampreqbeh, uint8_t sampvalidbeh, uint8_t ifwidth, uint8_t msblsborder, uint8_t symbolorder) +{ + ASSERT_ERR((((uint32_t)antswitchbeh << 7) & ~((uint32_t)0x00000080)) == 0); + ASSERT_ERR((((uint32_t)sampreqbeh << 6) & ~((uint32_t)0x00000040)) == 0); + ASSERT_ERR((((uint32_t)sampvalidbeh << 4) & ~((uint32_t)0x00000030)) == 0); + ASSERT_ERR((((uint32_t)ifwidth << 2) & ~((uint32_t)0x0000000C)) == 0); + ASSERT_ERR((((uint32_t)msblsborder << 1) & ~((uint32_t)0x00000002)) == 0); + ASSERT_ERR((((uint32_t)symbolorder << 0) & ~((uint32_t)0x00000001)) == 0); + REG_BLE_WR(BLE_DFIFCNTL_ADDR, ((uint32_t)antswitchbeh << 7) | ((uint32_t)sampreqbeh << 6) | ((uint32_t)sampvalidbeh << 4) | ((uint32_t)ifwidth << 2) | ((uint32_t)msblsborder << 1) | ((uint32_t)symbolorder << 0)); +} + +__INLINE void ble_dfifcntl_unpack(uint8_t* antswitchbeh, uint8_t* sampreqbeh, uint8_t* sampvalidbeh, uint8_t* ifwidth, uint8_t* msblsborder, uint8_t* symbolorder) +{ + uint32_t localVal = REG_BLE_RD(BLE_DFIFCNTL_ADDR); + + *antswitchbeh = (localVal & ((uint32_t)0x00000080)) >> 7; + *sampreqbeh = (localVal & ((uint32_t)0x00000040)) >> 6; + *sampvalidbeh = (localVal & ((uint32_t)0x00000030)) >> 4; + *ifwidth = (localVal & ((uint32_t)0x0000000C)) >> 2; + *msblsborder = (localVal & ((uint32_t)0x00000002)) >> 1; + *symbolorder = (localVal & ((uint32_t)0x00000001)) >> 0; +} + +__INLINE uint8_t ble_dfifcntl_antswitch_beh_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_DFIFCNTL_ADDR); + return ((localVal & ((uint32_t)0x00000080)) >> 7); +} + +__INLINE void ble_dfifcntl_antswitch_beh_setf(uint8_t antswitchbeh) +{ + ASSERT_ERR((((uint32_t)antswitchbeh << 7) & ~((uint32_t)0x00000080)) == 0); + REG_BLE_WR(BLE_DFIFCNTL_ADDR, (REG_BLE_RD(BLE_DFIFCNTL_ADDR) & ~((uint32_t)0x00000080)) | ((uint32_t)antswitchbeh << 7)); +} + +__INLINE uint8_t ble_dfifcntl_sampreq_beh_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_DFIFCNTL_ADDR); + return ((localVal & ((uint32_t)0x00000040)) >> 6); +} + +__INLINE void ble_dfifcntl_sampreq_beh_setf(uint8_t sampreqbeh) +{ + ASSERT_ERR((((uint32_t)sampreqbeh << 6) & ~((uint32_t)0x00000040)) == 0); + REG_BLE_WR(BLE_DFIFCNTL_ADDR, (REG_BLE_RD(BLE_DFIFCNTL_ADDR) & ~((uint32_t)0x00000040)) | ((uint32_t)sampreqbeh << 6)); +} + +__INLINE uint8_t ble_dfifcntl_sampvalid_beh_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_DFIFCNTL_ADDR); + return ((localVal & ((uint32_t)0x00000030)) >> 4); +} + +__INLINE void ble_dfifcntl_sampvalid_beh_setf(uint8_t sampvalidbeh) +{ + ASSERT_ERR((((uint32_t)sampvalidbeh << 4) & ~((uint32_t)0x00000030)) == 0); + REG_BLE_WR(BLE_DFIFCNTL_ADDR, (REG_BLE_RD(BLE_DFIFCNTL_ADDR) & ~((uint32_t)0x00000030)) | ((uint32_t)sampvalidbeh << 4)); +} + +__INLINE uint8_t ble_dfifcntl_if_width_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_DFIFCNTL_ADDR); + return ((localVal & ((uint32_t)0x0000000C)) >> 2); +} + +__INLINE void ble_dfifcntl_if_width_setf(uint8_t ifwidth) +{ + ASSERT_ERR((((uint32_t)ifwidth << 2) & ~((uint32_t)0x0000000C)) == 0); + REG_BLE_WR(BLE_DFIFCNTL_ADDR, (REG_BLE_RD(BLE_DFIFCNTL_ADDR) & ~((uint32_t)0x0000000C)) | ((uint32_t)ifwidth << 2)); +} + +__INLINE uint8_t ble_dfifcntl_msb_lsb_order_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_DFIFCNTL_ADDR); + return ((localVal & ((uint32_t)0x00000002)) >> 1); +} + +__INLINE void ble_dfifcntl_msb_lsb_order_setf(uint8_t msblsborder) +{ + ASSERT_ERR((((uint32_t)msblsborder << 1) & ~((uint32_t)0x00000002)) == 0); + REG_BLE_WR(BLE_DFIFCNTL_ADDR, (REG_BLE_RD(BLE_DFIFCNTL_ADDR) & ~((uint32_t)0x00000002)) | ((uint32_t)msblsborder << 1)); +} + +__INLINE uint8_t ble_dfifcntl_symbol_order_getf(void) +{ + uint32_t localVal = REG_BLE_RD(BLE_DFIFCNTL_ADDR); + return ((localVal & ((uint32_t)0x00000001)) >> 0); +} + +__INLINE void ble_dfifcntl_symbol_order_setf(uint8_t symbolorder) +{ + ASSERT_ERR((((uint32_t)symbolorder << 0) & ~((uint32_t)0x00000001)) == 0); + REG_BLE_WR(BLE_DFIFCNTL_ADDR, (REG_BLE_RD(BLE_DFIFCNTL_ADDR) & ~((uint32_t)0x00000001)) | ((uint32_t)symbolorder << 0)); +} + + +#endif // _REG_BLECORE_H_ + diff --git a/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Nationstech/ble_library/ns_ble_stack/rfinit/api/reg_em_ble_cs.h b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Nationstech/ble_library/ns_ble_stack/rfinit/api/reg_em_ble_cs.h new file mode 100644 index 0000000..b7f531f --- /dev/null +++ b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Nationstech/ble_library/ns_ble_stack/rfinit/api/reg_em_ble_cs.h @@ -0,0 +1,3796 @@ +#ifndef _REG_EM_BLE_CS_H_ +#define _REG_EM_BLE_CS_H_ + +#include
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 10 TXBSY_EN 0 + * 09 RXBSY_EN 0 + * 08 DNABORT 0 + * 04:00 FORMAT 0x0 + *+ */ +#define EM_BLE_CNTL_ADDR (EXCHANGE_MEM_BASE + EM_BLE_CS_OFFSET) +#define EM_BLE_CNTL_INDEX 0x00000000 +#define EM_BLE_CNTL_RESET 0x00000000 + +__INLINE uint16_t em_ble_cntl_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_CNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); +} + +__INLINE void em_ble_cntl_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_CNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, value); +} + +// field definitions +#define EM_BLE_TXBSY_EN_BIT ((uint16_t)0x00000400) +#define EM_BLE_TXBSY_EN_POS 10 +#define EM_BLE_RXBSY_EN_BIT ((uint16_t)0x00000200) +#define EM_BLE_RXBSY_EN_POS 9 +#define EM_BLE_DNABORT_BIT ((uint16_t)0x00000100) +#define EM_BLE_DNABORT_POS 8 +#define EM_BLE_FORMAT_MASK ((uint16_t)0x0000001F) +#define EM_BLE_FORMAT_LSB 0 +#define EM_BLE_FORMAT_WIDTH ((uint16_t)0x00000005) + +#define EM_BLE_TXBSY_EN_RST 0x0 +#define EM_BLE_RXBSY_EN_RST 0x0 +#define EM_BLE_DNABORT_RST 0x0 +#define EM_BLE_FORMAT_RST 0x0 + +__INLINE void em_ble_cntl_pack(int elt_idx, uint8_t txbsyen, uint8_t rxbsyen, uint8_t dnabort, uint8_t format) +{ + ASSERT_ERR((((uint16_t)txbsyen << 10) & ~((uint16_t)0x00000400)) == 0); + ASSERT_ERR((((uint16_t)rxbsyen << 9) & ~((uint16_t)0x00000200)) == 0); + ASSERT_ERR((((uint16_t)dnabort << 8) & ~((uint16_t)0x00000100)) == 0); + ASSERT_ERR((((uint16_t)format << 0) & ~((uint16_t)0x0000001F)) == 0); + EM_BLE_WR(EM_BLE_CNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, ((uint16_t)txbsyen << 10) | ((uint16_t)rxbsyen << 9) | ((uint16_t)dnabort << 8) | ((uint16_t)format << 0)); +} + +__INLINE void em_ble_cntl_unpack(int elt_idx, uint8_t* txbsyen, uint8_t* rxbsyen, uint8_t* dnabort, uint8_t* format) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_CNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + + *txbsyen = (localVal & ((uint16_t)0x00000400)) >> 10; + *rxbsyen = (localVal & ((uint16_t)0x00000200)) >> 9; + *dnabort = (localVal & ((uint16_t)0x00000100)) >> 8; + *format = (localVal & ((uint16_t)0x0000001F)) >> 0; +} + +__INLINE uint8_t em_ble_cntl_txbsy_en_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_CNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00000400)) >> 10); +} + +__INLINE void em_ble_cntl_txbsy_en_setf(int elt_idx, uint8_t txbsyen) +{ + ASSERT_ERR((((uint16_t)txbsyen << 10) & ~((uint16_t)0x00000400)) == 0); + EM_BLE_WR(EM_BLE_CNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_CNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00000400)) | ((uint16_t)txbsyen << 10)); +} + +__INLINE uint8_t em_ble_cntl_rxbsy_en_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_CNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00000200)) >> 9); +} + +__INLINE void em_ble_cntl_rxbsy_en_setf(int elt_idx, uint8_t rxbsyen) +{ + ASSERT_ERR((((uint16_t)rxbsyen << 9) & ~((uint16_t)0x00000200)) == 0); + EM_BLE_WR(EM_BLE_CNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_CNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00000200)) | ((uint16_t)rxbsyen << 9)); +} + +__INLINE uint8_t em_ble_cntl_dnabort_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_CNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00000100)) >> 8); +} + +__INLINE void em_ble_cntl_dnabort_setf(int elt_idx, uint8_t dnabort) +{ + ASSERT_ERR((((uint16_t)dnabort << 8) & ~((uint16_t)0x00000100)) == 0); + EM_BLE_WR(EM_BLE_CNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_CNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00000100)) | ((uint16_t)dnabort << 8)); +} + +__INLINE uint8_t em_ble_cntl_format_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_CNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x0000001F)) >> 0); +} + +__INLINE void em_ble_cntl_format_setf(int elt_idx, uint8_t format) +{ + ASSERT_ERR((((uint16_t)format << 0) & ~((uint16_t)0x0000001F)) == 0); + EM_BLE_WR(EM_BLE_CNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_CNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x0000001F)) | ((uint16_t)format << 0)); +} + +/** + * @brief LINKCNTL register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 12:08 LINKLBL 0x0 + * 06 SAS 0 + * 05 NULLRXLLIDFLT 0 + * 04 MIC_MODE 0 + * 03 CRYPT_MODE 0 + * 02 TXCRYPT_EN 0 + * 01 RXCRYPT_EN 0 + * 00 PRIV_NPUB 0 + *+ */ +#define EM_BLE_LINKCNTL_ADDR (EXCHANGE_MEM_BASE+0x02 + EM_BLE_CS_OFFSET) +#define EM_BLE_LINKCNTL_INDEX 0x00000001 +#define EM_BLE_LINKCNTL_RESET 0x00000000 + +__INLINE uint16_t em_ble_linkcntl_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_LINKCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); +} + +__INLINE void em_ble_linkcntl_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_LINKCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, value); +} + +// field definitions +#define EM_BLE_LINKLBL_MASK ((uint16_t)0x00001F00) +#define EM_BLE_LINKLBL_LSB 8 +#define EM_BLE_LINKLBL_WIDTH ((uint16_t)0x00000005) +#define EM_BLE_SAS_BIT ((uint16_t)0x00000040) +#define EM_BLE_SAS_POS 6 +#define EM_BLE_NULLRXLLIDFLT_BIT ((uint16_t)0x00000020) +#define EM_BLE_NULLRXLLIDFLT_POS 5 +#define EM_BLE_MIC_MODE_BIT ((uint16_t)0x00000010) +#define EM_BLE_MIC_MODE_POS 4 +#define EM_BLE_CRYPT_MODE_BIT ((uint16_t)0x00000008) +#define EM_BLE_CRYPT_MODE_POS 3 +#define EM_BLE_TXCRYPT_EN_BIT ((uint16_t)0x00000004) +#define EM_BLE_TXCRYPT_EN_POS 2 +#define EM_BLE_RXCRYPT_EN_BIT ((uint16_t)0x00000002) +#define EM_BLE_RXCRYPT_EN_POS 1 +#define EM_BLE_PRIV_NPUB_BIT ((uint16_t)0x00000001) +#define EM_BLE_PRIV_NPUB_POS 0 + +#define EM_BLE_LINKLBL_RST 0x0 +#define EM_BLE_SAS_RST 0x0 +#define EM_BLE_NULLRXLLIDFLT_RST 0x0 +#define EM_BLE_MIC_MODE_RST 0x0 +#define EM_BLE_CRYPT_MODE_RST 0x0 +#define EM_BLE_TXCRYPT_EN_RST 0x0 +#define EM_BLE_RXCRYPT_EN_RST 0x0 +#define EM_BLE_PRIV_NPUB_RST 0x0 + +__INLINE void em_ble_linkcntl_pack(int elt_idx, uint8_t linklbl, uint8_t sas, uint8_t nullrxllidflt, uint8_t micmode, uint8_t cryptmode, uint8_t txcrypten, uint8_t rxcrypten, uint8_t privnpub) +{ + ASSERT_ERR((((uint16_t)linklbl << 8) & ~((uint16_t)0x00001F00)) == 0); + ASSERT_ERR((((uint16_t)sas << 6) & ~((uint16_t)0x00000040)) == 0); + ASSERT_ERR((((uint16_t)nullrxllidflt << 5) & ~((uint16_t)0x00000020)) == 0); + ASSERT_ERR((((uint16_t)micmode << 4) & ~((uint16_t)0x00000010)) == 0); + ASSERT_ERR((((uint16_t)cryptmode << 3) & ~((uint16_t)0x00000008)) == 0); + ASSERT_ERR((((uint16_t)txcrypten << 2) & ~((uint16_t)0x00000004)) == 0); + ASSERT_ERR((((uint16_t)rxcrypten << 1) & ~((uint16_t)0x00000002)) == 0); + ASSERT_ERR((((uint16_t)privnpub << 0) & ~((uint16_t)0x00000001)) == 0); + EM_BLE_WR(EM_BLE_LINKCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, ((uint16_t)linklbl << 8) | ((uint16_t)sas << 6) | ((uint16_t)nullrxllidflt << 5) | ((uint16_t)micmode << 4) | ((uint16_t)cryptmode << 3) | ((uint16_t)txcrypten << 2) | ((uint16_t)rxcrypten << 1) | ((uint16_t)privnpub << 0)); +} + +__INLINE void em_ble_linkcntl_unpack(int elt_idx, uint8_t* linklbl, uint8_t* sas, uint8_t* nullrxllidflt, uint8_t* micmode, uint8_t* cryptmode, uint8_t* txcrypten, uint8_t* rxcrypten, uint8_t* privnpub) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_LINKCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + + *linklbl = (localVal & ((uint16_t)0x00001F00)) >> 8; + *sas = (localVal & ((uint16_t)0x00000040)) >> 6; + *nullrxllidflt = (localVal & ((uint16_t)0x00000020)) >> 5; + *micmode = (localVal & ((uint16_t)0x00000010)) >> 4; + *cryptmode = (localVal & ((uint16_t)0x00000008)) >> 3; + *txcrypten = (localVal & ((uint16_t)0x00000004)) >> 2; + *rxcrypten = (localVal & ((uint16_t)0x00000002)) >> 1; + *privnpub = (localVal & ((uint16_t)0x00000001)) >> 0; +} + +__INLINE uint8_t em_ble_linkcntl_linklbl_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_LINKCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00001F00)) >> 8); +} + +__INLINE void em_ble_linkcntl_linklbl_setf(int elt_idx, uint8_t linklbl) +{ + ASSERT_ERR((((uint16_t)linklbl << 8) & ~((uint16_t)0x00001F00)) == 0); + EM_BLE_WR(EM_BLE_LINKCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_LINKCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00001F00)) | ((uint16_t)linklbl << 8)); +} + +__INLINE uint8_t em_ble_linkcntl_sas_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_LINKCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00000040)) >> 6); +} + +__INLINE void em_ble_linkcntl_sas_setf(int elt_idx, uint8_t sas) +{ + ASSERT_ERR((((uint16_t)sas << 6) & ~((uint16_t)0x00000040)) == 0); + EM_BLE_WR(EM_BLE_LINKCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_LINKCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00000040)) | ((uint16_t)sas << 6)); +} + +__INLINE uint8_t em_ble_linkcntl_nullrxllidflt_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_LINKCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00000020)) >> 5); +} + +__INLINE void em_ble_linkcntl_nullrxllidflt_setf(int elt_idx, uint8_t nullrxllidflt) +{ + ASSERT_ERR((((uint16_t)nullrxllidflt << 5) & ~((uint16_t)0x00000020)) == 0); + EM_BLE_WR(EM_BLE_LINKCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_LINKCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00000020)) | ((uint16_t)nullrxllidflt << 5)); +} + +__INLINE uint8_t em_ble_linkcntl_mic_mode_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_LINKCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00000010)) >> 4); +} + +__INLINE void em_ble_linkcntl_mic_mode_setf(int elt_idx, uint8_t micmode) +{ + ASSERT_ERR((((uint16_t)micmode << 4) & ~((uint16_t)0x00000010)) == 0); + EM_BLE_WR(EM_BLE_LINKCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_LINKCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00000010)) | ((uint16_t)micmode << 4)); +} + +__INLINE uint8_t em_ble_linkcntl_crypt_mode_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_LINKCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00000008)) >> 3); +} + +__INLINE void em_ble_linkcntl_crypt_mode_setf(int elt_idx, uint8_t cryptmode) +{ + ASSERT_ERR((((uint16_t)cryptmode << 3) & ~((uint16_t)0x00000008)) == 0); + EM_BLE_WR(EM_BLE_LINKCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_LINKCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00000008)) | ((uint16_t)cryptmode << 3)); +} + +__INLINE uint8_t em_ble_linkcntl_txcrypt_en_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_LINKCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00000004)) >> 2); +} + +__INLINE void em_ble_linkcntl_txcrypt_en_setf(int elt_idx, uint8_t txcrypten) +{ + ASSERT_ERR((((uint16_t)txcrypten << 2) & ~((uint16_t)0x00000004)) == 0); + EM_BLE_WR(EM_BLE_LINKCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_LINKCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00000004)) | ((uint16_t)txcrypten << 2)); +} + +__INLINE uint8_t em_ble_linkcntl_rxcrypt_en_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_LINKCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00000002)) >> 1); +} + +__INLINE void em_ble_linkcntl_rxcrypt_en_setf(int elt_idx, uint8_t rxcrypten) +{ + ASSERT_ERR((((uint16_t)rxcrypten << 1) & ~((uint16_t)0x00000002)) == 0); + EM_BLE_WR(EM_BLE_LINKCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_LINKCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00000002)) | ((uint16_t)rxcrypten << 1)); +} + +__INLINE uint8_t em_ble_linkcntl_priv_npub_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_LINKCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00000001)) >> 0); +} + +__INLINE void em_ble_linkcntl_priv_npub_setf(int elt_idx, uint8_t privnpub) +{ + ASSERT_ERR((((uint16_t)privnpub << 0) & ~((uint16_t)0x00000001)) == 0); + EM_BLE_WR(EM_BLE_LINKCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_LINKCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00000001)) | ((uint16_t)privnpub << 0)); +} + +/** + * @brief ISOLINKCNTL register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:11 STREAM_LBL 0x0 + * 10:08 GROUP_LBL 0x0 + * 03 ISOSYNCMODE 0 + * 02 ISOSYNCEN 0 + * 01:00 ISOTYPE 0x0 + *+ */ +#define EM_BLE_ISOLINKCNTL_ADDR (EXCHANGE_MEM_BASE+0x04 + EM_BLE_CS_OFFSET) +#define EM_BLE_ISOLINKCNTL_INDEX 0x00000002 +#define EM_BLE_ISOLINKCNTL_RESET 0x00000000 + +__INLINE uint16_t em_ble_isolinkcntl_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_ISOLINKCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); +} + +__INLINE void em_ble_isolinkcntl_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_ISOLINKCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, value); +} + +// field definitions +#define EM_BLE_STREAM_LBL_MASK ((uint16_t)0x0000F800) +#define EM_BLE_STREAM_LBL_LSB 11 +#define EM_BLE_STREAM_LBL_WIDTH ((uint16_t)0x00000005) +#define EM_BLE_GROUP_LBL_MASK ((uint16_t)0x00000700) +#define EM_BLE_GROUP_LBL_LSB 8 +#define EM_BLE_GROUP_LBL_WIDTH ((uint16_t)0x00000003) +#define EM_BLE_ISOSYNCMODE_BIT ((uint16_t)0x00000008) +#define EM_BLE_ISOSYNCMODE_POS 3 +#define EM_BLE_ISOSYNCEN_BIT ((uint16_t)0x00000004) +#define EM_BLE_ISOSYNCEN_POS 2 +#define EM_BLE_ISOTYPE_MASK ((uint16_t)0x00000003) +#define EM_BLE_ISOTYPE_LSB 0 +#define EM_BLE_ISOTYPE_WIDTH ((uint16_t)0x00000002) + +#define EM_BLE_STREAM_LBL_RST 0x0 +#define EM_BLE_GROUP_LBL_RST 0x0 +#define EM_BLE_ISOSYNCMODE_RST 0x0 +#define EM_BLE_ISOSYNCEN_RST 0x0 +#define EM_BLE_ISOTYPE_RST 0x0 + +__INLINE void em_ble_isolinkcntl_pack(int elt_idx, uint8_t streamlbl, uint8_t grouplbl, uint8_t isosyncmode, uint8_t isosyncen, uint8_t isotype) +{ + ASSERT_ERR((((uint16_t)streamlbl << 11) & ~((uint16_t)0x0000F800)) == 0); + ASSERT_ERR((((uint16_t)grouplbl << 8) & ~((uint16_t)0x00000700)) == 0); + ASSERT_ERR((((uint16_t)isosyncmode << 3) & ~((uint16_t)0x00000008)) == 0); + ASSERT_ERR((((uint16_t)isosyncen << 2) & ~((uint16_t)0x00000004)) == 0); + ASSERT_ERR((((uint16_t)isotype << 0) & ~((uint16_t)0x00000003)) == 0); + EM_BLE_WR(EM_BLE_ISOLINKCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, ((uint16_t)streamlbl << 11) | ((uint16_t)grouplbl << 8) | ((uint16_t)isosyncmode << 3) | ((uint16_t)isosyncen << 2) | ((uint16_t)isotype << 0)); +} + +__INLINE void em_ble_isolinkcntl_unpack(int elt_idx, uint8_t* streamlbl, uint8_t* grouplbl, uint8_t* isosyncmode, uint8_t* isosyncen, uint8_t* isotype) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_ISOLINKCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + + *streamlbl = (localVal & ((uint16_t)0x0000F800)) >> 11; + *grouplbl = (localVal & ((uint16_t)0x00000700)) >> 8; + *isosyncmode = (localVal & ((uint16_t)0x00000008)) >> 3; + *isosyncen = (localVal & ((uint16_t)0x00000004)) >> 2; + *isotype = (localVal & ((uint16_t)0x00000003)) >> 0; +} + +__INLINE uint8_t em_ble_isolinkcntl_stream_lbl_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_ISOLINKCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x0000F800)) >> 11); +} + +__INLINE void em_ble_isolinkcntl_stream_lbl_setf(int elt_idx, uint8_t streamlbl) +{ + ASSERT_ERR((((uint16_t)streamlbl << 11) & ~((uint16_t)0x0000F800)) == 0); + EM_BLE_WR(EM_BLE_ISOLINKCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_ISOLINKCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x0000F800)) | ((uint16_t)streamlbl << 11)); +} + +__INLINE uint8_t em_ble_isolinkcntl_group_lbl_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_ISOLINKCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00000700)) >> 8); +} + +__INLINE void em_ble_isolinkcntl_group_lbl_setf(int elt_idx, uint8_t grouplbl) +{ + ASSERT_ERR((((uint16_t)grouplbl << 8) & ~((uint16_t)0x00000700)) == 0); + EM_BLE_WR(EM_BLE_ISOLINKCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_ISOLINKCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00000700)) | ((uint16_t)grouplbl << 8)); +} + +__INLINE uint8_t em_ble_isolinkcntl_isosyncmode_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_ISOLINKCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00000008)) >> 3); +} + +__INLINE void em_ble_isolinkcntl_isosyncmode_setf(int elt_idx, uint8_t isosyncmode) +{ + ASSERT_ERR((((uint16_t)isosyncmode << 3) & ~((uint16_t)0x00000008)) == 0); + EM_BLE_WR(EM_BLE_ISOLINKCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_ISOLINKCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00000008)) | ((uint16_t)isosyncmode << 3)); +} + +__INLINE uint8_t em_ble_isolinkcntl_isosyncen_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_ISOLINKCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00000004)) >> 2); +} + +__INLINE void em_ble_isolinkcntl_isosyncen_setf(int elt_idx, uint8_t isosyncen) +{ + ASSERT_ERR((((uint16_t)isosyncen << 2) & ~((uint16_t)0x00000004)) == 0); + EM_BLE_WR(EM_BLE_ISOLINKCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_ISOLINKCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00000004)) | ((uint16_t)isosyncen << 2)); +} + +__INLINE uint8_t em_ble_isolinkcntl_isotype_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_ISOLINKCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00000003)) >> 0); +} + +__INLINE void em_ble_isolinkcntl_isotype_setf(int elt_idx, uint8_t isotype) +{ + ASSERT_ERR((((uint16_t)isotype << 0) & ~((uint16_t)0x00000003)) == 0); + EM_BLE_WR(EM_BLE_ISOLINKCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_ISOLINKCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00000003)) | ((uint16_t)isotype << 0)); +} + +/** + * @brief THRCNTL_RATECNTL register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:12 RXTHR 0x0 + * 11:08 TXTHR 0x0 + * 05:04 AUX_RATE 0x0 + * 03:02 RXRATE 0x0 + * 01:00 TXRATE 0x0 + *+ */ +#define EM_BLE_THRCNTL_RATECNTL_ADDR (EXCHANGE_MEM_BASE+0x06 + EM_BLE_CS_OFFSET) +#define EM_BLE_THRCNTL_RATECNTL_INDEX 0x00000003 +#define EM_BLE_THRCNTL_RATECNTL_RESET 0x00000000 + +__INLINE uint16_t em_ble_thrcntl_ratecntl_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_THRCNTL_RATECNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); +} + +__INLINE void em_ble_thrcntl_ratecntl_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_THRCNTL_RATECNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, value); +} + +// field definitions +#define EM_BLE_RXTHR_MASK ((uint16_t)0x0000F000) +#define EM_BLE_RXTHR_LSB 12 +#define EM_BLE_RXTHR_WIDTH ((uint16_t)0x00000004) +#define EM_BLE_TXTHR_MASK ((uint16_t)0x00000F00) +#define EM_BLE_TXTHR_LSB 8 +#define EM_BLE_TXTHR_WIDTH ((uint16_t)0x00000004) +#define EM_BLE_AUX_RATE_MASK ((uint16_t)0x00000030) +#define EM_BLE_AUX_RATE_LSB 4 +#define EM_BLE_AUX_RATE_WIDTH ((uint16_t)0x00000002) +#define EM_BLE_RXRATE_MASK ((uint16_t)0x0000000C) +#define EM_BLE_RXRATE_LSB 2 +#define EM_BLE_RXRATE_WIDTH ((uint16_t)0x00000002) +#define EM_BLE_TXRATE_MASK ((uint16_t)0x00000003) +#define EM_BLE_TXRATE_LSB 0 +#define EM_BLE_TXRATE_WIDTH ((uint16_t)0x00000002) + +#define EM_BLE_RXTHR_RST 0x0 +#define EM_BLE_TXTHR_RST 0x0 +#define EM_BLE_AUX_RATE_RST 0x0 +#define EM_BLE_RXRATE_RST 0x0 +#define EM_BLE_TXRATE_RST 0x0 + +__INLINE void em_ble_thrcntl_ratecntl_pack(int elt_idx, uint8_t rxthr, uint8_t txthr, uint8_t auxrate, uint8_t rxrate, uint8_t txrate) +{ + ASSERT_ERR((((uint16_t)rxthr << 12) & ~((uint16_t)0x0000F000)) == 0); + ASSERT_ERR((((uint16_t)txthr << 8) & ~((uint16_t)0x00000F00)) == 0); + ASSERT_ERR((((uint16_t)auxrate << 4) & ~((uint16_t)0x00000030)) == 0); + ASSERT_ERR((((uint16_t)rxrate << 2) & ~((uint16_t)0x0000000C)) == 0); + ASSERT_ERR((((uint16_t)txrate << 0) & ~((uint16_t)0x00000003)) == 0); + + //TODO zengjun CHECK + if ((CO_RATE_2MBPS == auxrate) || (CO_RATE_2MBPS == rxrate )) + { +//// RFC->ABBCR0 = 0x000F00C0; + } + else + { +//// RFC->ABBCR0 = 0x000F0000; + } + //SCU->MCGR_b.RFCCLKEN = g_clock_off_define; + + EM_BLE_WR(EM_BLE_THRCNTL_RATECNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, ((uint16_t)rxthr << 12) | ((uint16_t)txthr << 8) | ((uint16_t)auxrate << 4) | ((uint16_t)rxrate << 2) | ((uint16_t)txrate << 0)); +} + +__INLINE void em_ble_thrcntl_ratecntl_unpack(int elt_idx, uint8_t* rxthr, uint8_t* txthr, uint8_t* auxrate, uint8_t* rxrate, uint8_t* txrate) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_THRCNTL_RATECNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + + *rxthr = (localVal & ((uint16_t)0x0000F000)) >> 12; + *txthr = (localVal & ((uint16_t)0x00000F00)) >> 8; + *auxrate = (localVal & ((uint16_t)0x00000030)) >> 4; + *rxrate = (localVal & ((uint16_t)0x0000000C)) >> 2; + *txrate = (localVal & ((uint16_t)0x00000003)) >> 0; +} + +__INLINE uint8_t em_ble_thrcntl_ratecntl_rxthr_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_THRCNTL_RATECNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x0000F000)) >> 12); +} + +__INLINE void em_ble_thrcntl_ratecntl_rxthr_setf(int elt_idx, uint8_t rxthr) +{ + ASSERT_ERR((((uint16_t)rxthr << 12) & ~((uint16_t)0x0000F000)) == 0); + EM_BLE_WR(EM_BLE_THRCNTL_RATECNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_THRCNTL_RATECNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x0000F000)) | ((uint16_t)rxthr << 12)); +} + +__INLINE uint8_t em_ble_thrcntl_ratecntl_txthr_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_THRCNTL_RATECNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00000F00)) >> 8); +} + +__INLINE void em_ble_thrcntl_ratecntl_txthr_setf(int elt_idx, uint8_t txthr) +{ + ASSERT_ERR((((uint16_t)txthr << 8) & ~((uint16_t)0x00000F00)) == 0); + EM_BLE_WR(EM_BLE_THRCNTL_RATECNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_THRCNTL_RATECNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00000F00)) | ((uint16_t)txthr << 8)); +} + +__INLINE uint8_t em_ble_thrcntl_ratecntl_aux_rate_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_THRCNTL_RATECNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00000030)) >> 4); +} + +__INLINE void em_ble_thrcntl_ratecntl_aux_rate_setf(int elt_idx, uint8_t auxrate) +{ + ASSERT_ERR((((uint16_t)auxrate << 4) & ~((uint16_t)0x00000030)) == 0); + EM_BLE_WR(EM_BLE_THRCNTL_RATECNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_THRCNTL_RATECNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00000030)) | ((uint16_t)auxrate << 4)); +} + +__INLINE uint8_t em_ble_thrcntl_ratecntl_rxrate_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_THRCNTL_RATECNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x0000000C)) >> 2); +} + +__INLINE void em_ble_thrcntl_ratecntl_rxrate_setf(int elt_idx, uint8_t rxrate) +{ + ASSERT_ERR((((uint16_t)rxrate << 2) & ~((uint16_t)0x0000000C)) == 0); + EM_BLE_WR(EM_BLE_THRCNTL_RATECNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_THRCNTL_RATECNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x0000000C)) | ((uint16_t)rxrate << 2)); +} + +__INLINE uint8_t em_ble_thrcntl_ratecntl_txrate_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_THRCNTL_RATECNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00000003)) >> 0); +} + +__INLINE void em_ble_thrcntl_ratecntl_txrate_setf(int elt_idx, uint8_t txrate) +{ + ASSERT_ERR((((uint16_t)txrate << 0) & ~((uint16_t)0x00000003)) == 0); + EM_BLE_WR(EM_BLE_THRCNTL_RATECNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_THRCNTL_RATECNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00000003)) | ((uint16_t)txrate << 0)); +} + +/** + * @brief LEBDADDR register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:00 BDADDR 0x0 + *+ */ +#define EM_BLE_LEBDADDR_ADDR (EXCHANGE_MEM_BASE+0x08 + EM_BLE_CS_OFFSET) +#define EM_BLE_LEBDADDR_INDEX 0x00000004 +#define EM_BLE_LEBDADDR_RESET 0x00000000 +#define EM_BLE_LEBDADDR_COUNT 3 + +__INLINE uint16_t em_ble_lebdaddr_get(int elt_idx, int reg_idx) +{ + ASSERT_ERR(reg_idx <= 2); + return EM_BLE_RD(EM_BLE_LEBDADDR_ADDR + elt_idx * REG_EM_BLE_CS_SIZE + reg_idx * 2); +} + +__INLINE void em_ble_lebdaddr_set(int elt_idx, int reg_idx, uint16_t value) +{ + ASSERT_ERR(reg_idx <= 2); + EM_BLE_WR(EM_BLE_LEBDADDR_ADDR + elt_idx * REG_EM_BLE_CS_SIZE + reg_idx * 2, value); +} + +// field definitions +#define EM_BLE_BDADDR_MASK ((uint16_t)0x0000FFFF) +#define EM_BLE_BDADDR_LSB 0 +#define EM_BLE_BDADDR_WIDTH ((uint16_t)0x00000010) + +#define EM_BLE_BDADDR_RST 0x0 + +__INLINE uint16_t em_ble_lebdaddr_bdaddr_getf(int elt_idx, int reg_idx) +{ + ASSERT_ERR(reg_idx <= 2); + uint16_t localVal = EM_BLE_RD(EM_BLE_LEBDADDR_ADDR + elt_idx * REG_EM_BLE_CS_SIZE + reg_idx * 2); + ASSERT_ERR((localVal & ~((uint16_t)0x0000FFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void em_ble_lebdaddr_bdaddr_setf(int elt_idx, int reg_idx, uint16_t bdaddr) +{ + ASSERT_ERR(reg_idx <= 2); + ASSERT_ERR((((uint16_t)bdaddr << 0) & ~((uint16_t)0x0000FFFF)) == 0); + EM_BLE_WR(EM_BLE_LEBDADDR_ADDR + elt_idx * REG_EM_BLE_CS_SIZE + reg_idx * 2, (uint16_t)bdaddr << 0); +} + +/** + * @brief SYNCWL register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:00 SYNCWORDL 0x0 + *+ */ +#define EM_BLE_SYNCWL_ADDR (EXCHANGE_MEM_BASE+0x0E + EM_BLE_CS_OFFSET) +#define EM_BLE_SYNCWL_INDEX 0x00000007 +#define EM_BLE_SYNCWL_RESET 0x00000000 + +__INLINE uint16_t em_ble_syncwl_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_SYNCWL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); +} + +__INLINE void em_ble_syncwl_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_SYNCWL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, value); +} + +// field definitions +#define EM_BLE_SYNCWORDL_MASK ((uint16_t)0x0000FFFF) +#define EM_BLE_SYNCWORDL_LSB 0 +#define EM_BLE_SYNCWORDL_WIDTH ((uint16_t)0x00000010) + +#define EM_BLE_SYNCWORDL_RST 0x0 + +__INLINE uint16_t em_ble_syncwl_syncwordl_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_SYNCWL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + ASSERT_ERR((localVal & ~((uint16_t)0x0000FFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void em_ble_syncwl_syncwordl_setf(int elt_idx, uint16_t syncwordl) +{ + ASSERT_ERR((((uint16_t)syncwordl << 0) & ~((uint16_t)0x0000FFFF)) == 0); + EM_BLE_WR(EM_BLE_SYNCWL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (uint16_t)syncwordl << 0); +} + +/** + * @brief SYNCWH register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:00 SYNCWORDH 0x0 + *+ */ +#define EM_BLE_SYNCWH_ADDR (EXCHANGE_MEM_BASE+0x10 + EM_BLE_CS_OFFSET) +#define EM_BLE_SYNCWH_INDEX 0x00000008 +#define EM_BLE_SYNCWH_RESET 0x00000000 + +__INLINE uint16_t em_ble_syncwh_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_SYNCWH_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); +} + +__INLINE void em_ble_syncwh_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_SYNCWH_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, value); +} + +// field definitions +#define EM_BLE_SYNCWORDH_MASK ((uint16_t)0x0000FFFF) +#define EM_BLE_SYNCWORDH_LSB 0 +#define EM_BLE_SYNCWORDH_WIDTH ((uint16_t)0x00000010) + +#define EM_BLE_SYNCWORDH_RST 0x0 + +__INLINE uint16_t em_ble_syncwh_syncwordh_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_SYNCWH_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + ASSERT_ERR((localVal & ~((uint16_t)0x0000FFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void em_ble_syncwh_syncwordh_setf(int elt_idx, uint16_t syncwordh) +{ + ASSERT_ERR((((uint16_t)syncwordh << 0) & ~((uint16_t)0x0000FFFF)) == 0); + EM_BLE_WR(EM_BLE_SYNCWH_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (uint16_t)syncwordh << 0); +} + +/** + * @brief CRCINIT0 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:00 CRCINIT0 0x0 + *+ */ +#define EM_BLE_CRCINIT0_ADDR (EXCHANGE_MEM_BASE+0x12 + EM_BLE_CS_OFFSET) +#define EM_BLE_CRCINIT0_INDEX 0x00000009 +#define EM_BLE_CRCINIT0_RESET 0x00000000 + +__INLINE uint16_t em_ble_crcinit0_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_CRCINIT0_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); +} + +__INLINE void em_ble_crcinit0_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_CRCINIT0_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, value); +} + +// field definitions +#define EM_BLE_CRCINIT0_MASK ((uint16_t)0x0000FFFF) +#define EM_BLE_CRCINIT0_LSB 0 +#define EM_BLE_CRCINIT0_WIDTH ((uint16_t)0x00000010) + +#define EM_BLE_CRCINIT0_RST 0x0 + +__INLINE uint16_t em_ble_crcinit0_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_CRCINIT0_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + ASSERT_ERR((localVal & ~((uint16_t)0x0000FFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void em_ble_crcinit0_setf(int elt_idx, uint16_t crcinit0) +{ + ASSERT_ERR((((uint16_t)crcinit0 << 0) & ~((uint16_t)0x0000FFFF)) == 0); + EM_BLE_WR(EM_BLE_CRCINIT0_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (uint16_t)crcinit0 << 0); +} + +/** + * @brief CRCINIT1 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:08 RXMAXCTEBUF 0x0 + * 07:00 CRCINIT1 0x0 + *+ */ +#define EM_BLE_CRCINIT1_ADDR (EXCHANGE_MEM_BASE+0x14 + EM_BLE_CS_OFFSET) +#define EM_BLE_CRCINIT1_INDEX 0x0000000A +#define EM_BLE_CRCINIT1_RESET 0x00000000 + +__INLINE uint16_t em_ble_crcinit1_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_CRCINIT1_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); +} + +__INLINE void em_ble_crcinit1_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_CRCINIT1_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, value); +} + +// field definitions +#define EM_BLE_RXMAXCTEBUF_MASK ((uint16_t)0x0000FF00) +#define EM_BLE_RXMAXCTEBUF_LSB 8 +#define EM_BLE_RXMAXCTEBUF_WIDTH ((uint16_t)0x00000008) +#define EM_BLE_CRCINIT1_MASK ((uint16_t)0x000000FF) +#define EM_BLE_CRCINIT1_LSB 0 +#define EM_BLE_CRCINIT1_WIDTH ((uint16_t)0x00000008) + +#define EM_BLE_RXMAXCTEBUF_RST 0x0 +#define EM_BLE_CRCINIT1_RST 0x0 + +__INLINE void em_ble_crcinit1_pack(int elt_idx, uint8_t rxmaxctebuf, uint8_t crcinit1) +{ + ASSERT_ERR((((uint16_t)rxmaxctebuf << 8) & ~((uint16_t)0x0000FF00)) == 0); + ASSERT_ERR((((uint16_t)crcinit1 << 0) & ~((uint16_t)0x000000FF)) == 0); + EM_BLE_WR(EM_BLE_CRCINIT1_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, ((uint16_t)rxmaxctebuf << 8) | ((uint16_t)crcinit1 << 0)); +} + +__INLINE void em_ble_crcinit1_unpack(int elt_idx, uint8_t* rxmaxctebuf, uint8_t* crcinit1) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_CRCINIT1_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + + *rxmaxctebuf = (localVal & ((uint16_t)0x0000FF00)) >> 8; + *crcinit1 = (localVal & ((uint16_t)0x000000FF)) >> 0; +} + +__INLINE uint8_t em_ble_crcinit1_rxmaxctebuf_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_CRCINIT1_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x0000FF00)) >> 8); +} + +__INLINE void em_ble_crcinit1_rxmaxctebuf_setf(int elt_idx, uint8_t rxmaxctebuf) +{ + ASSERT_ERR((((uint16_t)rxmaxctebuf << 8) & ~((uint16_t)0x0000FF00)) == 0); + EM_BLE_WR(EM_BLE_CRCINIT1_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_CRCINIT1_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x0000FF00)) | ((uint16_t)rxmaxctebuf << 8)); +} + +__INLINE uint8_t em_ble_crcinit1_crcinit1_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_CRCINIT1_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x000000FF)) >> 0); +} + +__INLINE void em_ble_crcinit1_crcinit1_setf(int elt_idx, uint8_t crcinit1) +{ + ASSERT_ERR((((uint16_t)crcinit1 << 0) & ~((uint16_t)0x000000FF)) == 0); + EM_BLE_WR(EM_BLE_CRCINIT1_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_CRCINIT1_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x000000FF)) | ((uint16_t)crcinit1 << 0)); +} + +/** + * @brief FILTPOL_RALCNTL register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:08 FILTER_POLICY 0x0 + * 04 RAL_RESOL_EN 0 + * 03 PERADV_FILT_EN 0 + * 02 LOCAL_RPA_SEL 0 + * 01 RAL_MODE 0 + * 00 RAL_EN 0 + *+ */ +#define EM_BLE_FILTPOL_RALCNTL_ADDR (EXCHANGE_MEM_BASE+0x16 + EM_BLE_CS_OFFSET) +#define EM_BLE_FILTPOL_RALCNTL_INDEX 0x0000000B +#define EM_BLE_FILTPOL_RALCNTL_RESET 0x00000000 + +__INLINE uint16_t em_ble_filtpol_ralcntl_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_FILTPOL_RALCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); +} + +__INLINE void em_ble_filtpol_ralcntl_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_FILTPOL_RALCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, value); +} + +// field definitions +#define EM_BLE_FILTER_POLICY_MASK ((uint16_t)0x0000FF00) +#define EM_BLE_FILTER_POLICY_LSB 8 +#define EM_BLE_FILTER_POLICY_WIDTH ((uint16_t)0x00000008) +#define EM_BLE_RAL_RESOL_EN_BIT ((uint16_t)0x00000010) +#define EM_BLE_RAL_RESOL_EN_POS 4 +#define EM_BLE_PERADV_FILT_EN_BIT ((uint16_t)0x00000008) +#define EM_BLE_PERADV_FILT_EN_POS 3 +#define EM_BLE_LOCAL_RPA_SEL_BIT ((uint16_t)0x00000004) +#define EM_BLE_LOCAL_RPA_SEL_POS 2 +#define EM_BLE_RAL_MODE_BIT ((uint16_t)0x00000002) +#define EM_BLE_RAL_MODE_POS 1 +#define EM_BLE_RAL_EN_BIT ((uint16_t)0x00000001) +#define EM_BLE_RAL_EN_POS 0 + +#define EM_BLE_FILTER_POLICY_RST 0x0 +#define EM_BLE_RAL_RESOL_EN_RST 0x0 +#define EM_BLE_PERADV_FILT_EN_RST 0x0 +#define EM_BLE_LOCAL_RPA_SEL_RST 0x0 +#define EM_BLE_RAL_MODE_RST 0x0 +#define EM_BLE_RAL_EN_RST 0x0 + +__INLINE void em_ble_filtpol_ralcntl_pack(int elt_idx, uint8_t filterpolicy, uint8_t ralresolen, uint8_t peradvfilten, uint8_t localrpasel, uint8_t ralmode, uint8_t ralen) +{ + ASSERT_ERR((((uint16_t)filterpolicy << 8) & ~((uint16_t)0x0000FF00)) == 0); + ASSERT_ERR((((uint16_t)ralresolen << 4) & ~((uint16_t)0x00000010)) == 0); + ASSERT_ERR((((uint16_t)peradvfilten << 3) & ~((uint16_t)0x00000008)) == 0); + ASSERT_ERR((((uint16_t)localrpasel << 2) & ~((uint16_t)0x00000004)) == 0); + ASSERT_ERR((((uint16_t)ralmode << 1) & ~((uint16_t)0x00000002)) == 0); + ASSERT_ERR((((uint16_t)ralen << 0) & ~((uint16_t)0x00000001)) == 0); + EM_BLE_WR(EM_BLE_FILTPOL_RALCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, ((uint16_t)filterpolicy << 8) | ((uint16_t)ralresolen << 4) | ((uint16_t)peradvfilten << 3) | ((uint16_t)localrpasel << 2) | ((uint16_t)ralmode << 1) | ((uint16_t)ralen << 0)); +} + +__INLINE void em_ble_filtpol_ralcntl_unpack(int elt_idx, uint8_t* filterpolicy, uint8_t* ralresolen, uint8_t* peradvfilten, uint8_t* localrpasel, uint8_t* ralmode, uint8_t* ralen) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_FILTPOL_RALCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + + *filterpolicy = (localVal & ((uint16_t)0x0000FF00)) >> 8; + *ralresolen = (localVal & ((uint16_t)0x00000010)) >> 4; + *peradvfilten = (localVal & ((uint16_t)0x00000008)) >> 3; + *localrpasel = (localVal & ((uint16_t)0x00000004)) >> 2; + *ralmode = (localVal & ((uint16_t)0x00000002)) >> 1; + *ralen = (localVal & ((uint16_t)0x00000001)) >> 0; +} + +__INLINE uint8_t em_ble_filtpol_ralcntl_filter_policy_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_FILTPOL_RALCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x0000FF00)) >> 8); +} + +__INLINE void em_ble_filtpol_ralcntl_filter_policy_setf(int elt_idx, uint8_t filterpolicy) +{ + ASSERT_ERR((((uint16_t)filterpolicy << 8) & ~((uint16_t)0x0000FF00)) == 0); + EM_BLE_WR(EM_BLE_FILTPOL_RALCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_FILTPOL_RALCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x0000FF00)) | ((uint16_t)filterpolicy << 8)); +} + +__INLINE uint8_t em_ble_filtpol_ralcntl_ral_resol_en_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_FILTPOL_RALCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00000010)) >> 4); +} + +__INLINE void em_ble_filtpol_ralcntl_ral_resol_en_setf(int elt_idx, uint8_t ralresolen) +{ + ASSERT_ERR((((uint16_t)ralresolen << 4) & ~((uint16_t)0x00000010)) == 0); + EM_BLE_WR(EM_BLE_FILTPOL_RALCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_FILTPOL_RALCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00000010)) | ((uint16_t)ralresolen << 4)); +} + +__INLINE uint8_t em_ble_filtpol_ralcntl_peradv_filt_en_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_FILTPOL_RALCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00000008)) >> 3); +} + +__INLINE void em_ble_filtpol_ralcntl_peradv_filt_en_setf(int elt_idx, uint8_t peradvfilten) +{ + ASSERT_ERR((((uint16_t)peradvfilten << 3) & ~((uint16_t)0x00000008)) == 0); + EM_BLE_WR(EM_BLE_FILTPOL_RALCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_FILTPOL_RALCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00000008)) | ((uint16_t)peradvfilten << 3)); +} + +__INLINE uint8_t em_ble_filtpol_ralcntl_local_rpa_sel_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_FILTPOL_RALCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00000004)) >> 2); +} + +__INLINE void em_ble_filtpol_ralcntl_local_rpa_sel_setf(int elt_idx, uint8_t localrpasel) +{ + ASSERT_ERR((((uint16_t)localrpasel << 2) & ~((uint16_t)0x00000004)) == 0); + EM_BLE_WR(EM_BLE_FILTPOL_RALCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_FILTPOL_RALCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00000004)) | ((uint16_t)localrpasel << 2)); +} + +__INLINE uint8_t em_ble_filtpol_ralcntl_ral_mode_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_FILTPOL_RALCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00000002)) >> 1); +} + +__INLINE void em_ble_filtpol_ralcntl_ral_mode_setf(int elt_idx, uint8_t ralmode) +{ + ASSERT_ERR((((uint16_t)ralmode << 1) & ~((uint16_t)0x00000002)) == 0); + EM_BLE_WR(EM_BLE_FILTPOL_RALCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_FILTPOL_RALCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00000002)) | ((uint16_t)ralmode << 1)); +} + +__INLINE uint8_t em_ble_filtpol_ralcntl_ral_en_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_FILTPOL_RALCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00000001)) >> 0); +} + +__INLINE void em_ble_filtpol_ralcntl_ral_en_setf(int elt_idx, uint8_t ralen) +{ + ASSERT_ERR((((uint16_t)ralen << 0) & ~((uint16_t)0x00000001)) == 0); + EM_BLE_WR(EM_BLE_FILTPOL_RALCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_FILTPOL_RALCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00000001)) | ((uint16_t)ralen << 0)); +} + +/** + * @brief HOPCNTL register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15 FH_EN 0 + * 14:13 HOP_MODE 0x0 + * 12:08 HOP_INT 0x0 + * 05:00 CH_IDX 0x0 + *+ */ +#define EM_BLE_HOPCNTL_ADDR (EXCHANGE_MEM_BASE+0x18 + EM_BLE_CS_OFFSET) +#define EM_BLE_HOPCNTL_INDEX 0x0000000C +#define EM_BLE_HOPCNTL_RESET 0x00000000 + +__INLINE uint16_t em_ble_hopcntl_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_HOPCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); +} + +__INLINE void em_ble_hopcntl_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_HOPCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, value); +} + +// field definitions +#define EM_BLE_FH_EN_BIT ((uint16_t)0x00008000) +#define EM_BLE_FH_EN_POS 15 +#define EM_BLE_HOP_MODE_MASK ((uint16_t)0x00006000) +#define EM_BLE_HOP_MODE_LSB 13 +#define EM_BLE_HOP_MODE_WIDTH ((uint16_t)0x00000002) +#define EM_BLE_HOP_INT_MASK ((uint16_t)0x00001F00) +#define EM_BLE_HOP_INT_LSB 8 +#define EM_BLE_HOP_INT_WIDTH ((uint16_t)0x00000005) +#define EM_BLE_CH_IDX_MASK ((uint16_t)0x0000003F) +#define EM_BLE_CH_IDX_LSB 0 +#define EM_BLE_CH_IDX_WIDTH ((uint16_t)0x00000006) + +#define EM_BLE_FH_EN_RST 0x0 +#define EM_BLE_HOP_MODE_RST 0x0 +#define EM_BLE_HOP_INT_RST 0x0 +#define EM_BLE_CH_IDX_RST 0x0 + +__INLINE void em_ble_hopcntl_pack(int elt_idx, uint8_t fhen, uint8_t hopmode, uint8_t hopint, uint8_t chidx) +{ + ASSERT_ERR((((uint16_t)fhen << 15) & ~((uint16_t)0x00008000)) == 0); + ASSERT_ERR((((uint16_t)hopmode << 13) & ~((uint16_t)0x00006000)) == 0); + ASSERT_ERR((((uint16_t)hopint << 8) & ~((uint16_t)0x00001F00)) == 0); + ASSERT_ERR((((uint16_t)chidx << 0) & ~((uint16_t)0x0000003F)) == 0); + EM_BLE_WR(EM_BLE_HOPCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, ((uint16_t)fhen << 15) | ((uint16_t)hopmode << 13) | ((uint16_t)hopint << 8) | ((uint16_t)chidx << 0)); +} + +__INLINE void em_ble_hopcntl_unpack(int elt_idx, uint8_t* fhen, uint8_t* hopmode, uint8_t* hopint, uint8_t* chidx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_HOPCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + + *fhen = (localVal & ((uint16_t)0x00008000)) >> 15; + *hopmode = (localVal & ((uint16_t)0x00006000)) >> 13; + *hopint = (localVal & ((uint16_t)0x00001F00)) >> 8; + *chidx = (localVal & ((uint16_t)0x0000003F)) >> 0; +} + +__INLINE uint8_t em_ble_hopcntl_fh_en_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_HOPCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00008000)) >> 15); +} + +__INLINE void em_ble_hopcntl_fh_en_setf(int elt_idx, uint8_t fhen) +{ + ASSERT_ERR((((uint16_t)fhen << 15) & ~((uint16_t)0x00008000)) == 0); + EM_BLE_WR(EM_BLE_HOPCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_HOPCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00008000)) | ((uint16_t)fhen << 15)); +} + +__INLINE uint8_t em_ble_hopcntl_hop_mode_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_HOPCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00006000)) >> 13); +} + +__INLINE void em_ble_hopcntl_hop_mode_setf(int elt_idx, uint8_t hopmode) +{ + ASSERT_ERR((((uint16_t)hopmode << 13) & ~((uint16_t)0x00006000)) == 0); + EM_BLE_WR(EM_BLE_HOPCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_HOPCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00006000)) | ((uint16_t)hopmode << 13)); +} + +__INLINE uint8_t em_ble_hopcntl_hop_int_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_HOPCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00001F00)) >> 8); +} + +__INLINE void em_ble_hopcntl_hop_int_setf(int elt_idx, uint8_t hopint) +{ + ASSERT_ERR((((uint16_t)hopint << 8) & ~((uint16_t)0x00001F00)) == 0); + EM_BLE_WR(EM_BLE_HOPCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_HOPCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00001F00)) | ((uint16_t)hopint << 8)); +} + +__INLINE uint8_t em_ble_hopcntl_ch_idx_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_HOPCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x0000003F)) >> 0); +} + +__INLINE void em_ble_hopcntl_ch_idx_setf(int elt_idx, uint8_t chidx) +{ + ASSERT_ERR((((uint16_t)chidx << 0) & ~((uint16_t)0x0000003F)) == 0); + EM_BLE_WR(EM_BLE_HOPCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_HOPCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x0000003F)) | ((uint16_t)chidx << 0)); +} + +/** + * @brief TXRXCNTL register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15 RXBUFF_FULL 0 + * 14 LASTEMPTY 0 + * 13 SN 0 + * 12 NESN 0 + * 11 RXBFMICERR 0 + * 10 RXMAFSERR 0 + * 09 ENDS_ON_SAC 0 + * 08 EXT_PA_EN 0 + * 07:00 TXPWR 0x0 + *+ */ +#define EM_BLE_TXRXCNTL_ADDR (EXCHANGE_MEM_BASE+0x1A + EM_BLE_CS_OFFSET) +#define EM_BLE_TXRXCNTL_INDEX 0x0000000D +#define EM_BLE_TXRXCNTL_RESET 0x00000000 + +__INLINE uint16_t em_ble_txrxcntl_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_TXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); +} + +__INLINE void em_ble_txrxcntl_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_TXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, value); +} + +// field definitions +#define EM_BLE_RXBUFF_FULL_BIT ((uint16_t)0x00008000) +#define EM_BLE_RXBUFF_FULL_POS 15 +#define EM_BLE_LASTEMPTY_BIT ((uint16_t)0x00004000) +#define EM_BLE_LASTEMPTY_POS 14 +#define EM_BLE_SN_BIT ((uint16_t)0x00002000) +#define EM_BLE_SN_POS 13 +#define EM_BLE_NESN_BIT ((uint16_t)0x00001000) +#define EM_BLE_NESN_POS 12 +#define EM_BLE_RXBFMICERR_BIT ((uint16_t)0x00000800) +#define EM_BLE_RXBFMICERR_POS 11 +#define EM_BLE_RXMAFSERR_BIT ((uint16_t)0x00000400) +#define EM_BLE_RXMAFSERR_POS 10 +#define EM_BLE_ENDS_ON_SAC_BIT ((uint16_t)0x00000200) +#define EM_BLE_ENDS_ON_SAC_POS 9 +#define EM_BLE_EXT_PA_EN_BIT ((uint16_t)0x00000100) +#define EM_BLE_EXT_PA_EN_POS 8 +#define EM_BLE_TXPWR_MASK ((uint16_t)0x000000FF) +#define EM_BLE_TXPWR_LSB 0 +#define EM_BLE_TXPWR_WIDTH ((uint16_t)0x00000008) + +#define EM_BLE_RXBUFF_FULL_RST 0x0 +#define EM_BLE_LASTEMPTY_RST 0x0 +#define EM_BLE_SN_RST 0x0 +#define EM_BLE_NESN_RST 0x0 +#define EM_BLE_RXBFMICERR_RST 0x0 +#define EM_BLE_RXMAFSERR_RST 0x0 +#define EM_BLE_ENDS_ON_SAC_RST 0x0 +#define EM_BLE_EXT_PA_EN_RST 0x0 +#define EM_BLE_TXPWR_RST 0x0 + +__INLINE void em_ble_txrxcntl_pack(int elt_idx, uint8_t rxbufffull, uint8_t lastempty, uint8_t sn, uint8_t nesn, uint8_t rxbfmicerr, uint8_t rxmafserr, uint8_t endsonsac, uint8_t extpaen, uint8_t txpwr) +{ + ASSERT_ERR((((uint16_t)rxbufffull << 15) & ~((uint16_t)0x00008000)) == 0); + ASSERT_ERR((((uint16_t)lastempty << 14) & ~((uint16_t)0x00004000)) == 0); + ASSERT_ERR((((uint16_t)sn << 13) & ~((uint16_t)0x00002000)) == 0); + ASSERT_ERR((((uint16_t)nesn << 12) & ~((uint16_t)0x00001000)) == 0); + ASSERT_ERR((((uint16_t)rxbfmicerr << 11) & ~((uint16_t)0x00000800)) == 0); + ASSERT_ERR((((uint16_t)rxmafserr << 10) & ~((uint16_t)0x00000400)) == 0); + ASSERT_ERR((((uint16_t)endsonsac << 9) & ~((uint16_t)0x00000200)) == 0); + ASSERT_ERR((((uint16_t)extpaen << 8) & ~((uint16_t)0x00000100)) == 0); + ASSERT_ERR((((uint16_t)txpwr << 0) & ~((uint16_t)0x000000FF)) == 0); + EM_BLE_WR(EM_BLE_TXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, ((uint16_t)rxbufffull << 15) | ((uint16_t)lastempty << 14) | ((uint16_t)sn << 13) | ((uint16_t)nesn << 12) | ((uint16_t)rxbfmicerr << 11) | ((uint16_t)rxmafserr << 10) | ((uint16_t)endsonsac << 9) | ((uint16_t)extpaen << 8) | ((uint16_t)txpwr << 0)); +} + +__INLINE void em_ble_txrxcntl_unpack(int elt_idx, uint8_t* rxbufffull, uint8_t* lastempty, uint8_t* sn, uint8_t* nesn, uint8_t* rxbfmicerr, uint8_t* rxmafserr, uint8_t* endsonsac, uint8_t* extpaen, uint8_t* txpwr) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + + *rxbufffull = (localVal & ((uint16_t)0x00008000)) >> 15; + *lastempty = (localVal & ((uint16_t)0x00004000)) >> 14; + *sn = (localVal & ((uint16_t)0x00002000)) >> 13; + *nesn = (localVal & ((uint16_t)0x00001000)) >> 12; + *rxbfmicerr = (localVal & ((uint16_t)0x00000800)) >> 11; + *rxmafserr = (localVal & ((uint16_t)0x00000400)) >> 10; + *endsonsac = (localVal & ((uint16_t)0x00000200)) >> 9; + *extpaen = (localVal & ((uint16_t)0x00000100)) >> 8; + *txpwr = (localVal & ((uint16_t)0x000000FF)) >> 0; +} + +__INLINE uint8_t em_ble_txrxcntl_rxbuff_full_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00008000)) >> 15); +} + +__INLINE void em_ble_txrxcntl_rxbuff_full_setf(int elt_idx, uint8_t rxbufffull) +{ + ASSERT_ERR((((uint16_t)rxbufffull << 15) & ~((uint16_t)0x00008000)) == 0); + EM_BLE_WR(EM_BLE_TXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_TXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00008000)) | ((uint16_t)rxbufffull << 15)); +} + +__INLINE uint8_t em_ble_txrxcntl_lastempty_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00004000)) >> 14); +} + +__INLINE void em_ble_txrxcntl_lastempty_setf(int elt_idx, uint8_t lastempty) +{ + ASSERT_ERR((((uint16_t)lastempty << 14) & ~((uint16_t)0x00004000)) == 0); + EM_BLE_WR(EM_BLE_TXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_TXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00004000)) | ((uint16_t)lastempty << 14)); +} + +__INLINE uint8_t em_ble_txrxcntl_sn_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00002000)) >> 13); +} + +__INLINE void em_ble_txrxcntl_sn_setf(int elt_idx, uint8_t sn) +{ + ASSERT_ERR((((uint16_t)sn << 13) & ~((uint16_t)0x00002000)) == 0); + EM_BLE_WR(EM_BLE_TXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_TXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00002000)) | ((uint16_t)sn << 13)); +} + +__INLINE uint8_t em_ble_txrxcntl_nesn_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00001000)) >> 12); +} + +__INLINE void em_ble_txrxcntl_nesn_setf(int elt_idx, uint8_t nesn) +{ + ASSERT_ERR((((uint16_t)nesn << 12) & ~((uint16_t)0x00001000)) == 0); + EM_BLE_WR(EM_BLE_TXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_TXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00001000)) | ((uint16_t)nesn << 12)); +} + +__INLINE uint8_t em_ble_txrxcntl_rxbfmicerr_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00000800)) >> 11); +} + +__INLINE void em_ble_txrxcntl_rxbfmicerr_setf(int elt_idx, uint8_t rxbfmicerr) +{ + ASSERT_ERR((((uint16_t)rxbfmicerr << 11) & ~((uint16_t)0x00000800)) == 0); + EM_BLE_WR(EM_BLE_TXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_TXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00000800)) | ((uint16_t)rxbfmicerr << 11)); +} + +__INLINE uint8_t em_ble_txrxcntl_rxmafserr_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00000400)) >> 10); +} + +__INLINE void em_ble_txrxcntl_rxmafserr_setf(int elt_idx, uint8_t rxmafserr) +{ + ASSERT_ERR((((uint16_t)rxmafserr << 10) & ~((uint16_t)0x00000400)) == 0); + EM_BLE_WR(EM_BLE_TXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_TXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00000400)) | ((uint16_t)rxmafserr << 10)); +} + +__INLINE uint8_t em_ble_txrxcntl_ends_on_sac_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00000200)) >> 9); +} + +__INLINE void em_ble_txrxcntl_ends_on_sac_setf(int elt_idx, uint8_t endsonsac) +{ + ASSERT_ERR((((uint16_t)endsonsac << 9) & ~((uint16_t)0x00000200)) == 0); + EM_BLE_WR(EM_BLE_TXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_TXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00000200)) | ((uint16_t)endsonsac << 9)); +} + +__INLINE uint8_t em_ble_txrxcntl_ext_pa_en_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00000100)) >> 8); +} + +__INLINE void em_ble_txrxcntl_ext_pa_en_setf(int elt_idx, uint8_t extpaen) +{ + ASSERT_ERR((((uint16_t)extpaen << 8) & ~((uint16_t)0x00000100)) == 0); + EM_BLE_WR(EM_BLE_TXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_TXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00000100)) | ((uint16_t)extpaen << 8)); +} + +__INLINE uint8_t em_ble_txrxcntl_txpwr_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x000000FF)) >> 0); +} + +__INLINE void em_ble_txrxcntl_txpwr_setf(int elt_idx, uint8_t txpwr) +{ + ASSERT_ERR((((uint16_t)txpwr << 0) & ~((uint16_t)0x000000FF)) == 0); + EM_BLE_WR(EM_BLE_TXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_TXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x000000FF)) | ((uint16_t)txpwr << 0)); +} + +/** + * @brief RXDFCNTL register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 08 DFRSPEN 0 + * 07:06 DFSWCNTL 0x0 + * 05:04 DFSAMPCNTL 0x0 + * 03:02 DFTYPE 0x0 + * 01 DFFILTEREN 0 + * 00 DFEN 0 + *+ */ +#define EM_BLE_RXDFCNTL_ADDR (EXCHANGE_MEM_BASE+0x1C + EM_BLE_CS_OFFSET) +#define EM_BLE_RXDFCNTL_INDEX 0x0000000E +#define EM_BLE_RXDFCNTL_RESET 0x00000000 + +__INLINE uint16_t em_ble_rxdfcntl_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_RXDFCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); +} + +__INLINE void em_ble_rxdfcntl_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_RXDFCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, value); +} + +// field definitions +#define EM_BLE_DFRSPEN_BIT ((uint16_t)0x00000100) +#define EM_BLE_DFRSPEN_POS 8 +#define EM_BLE_DFSWCNTL_MASK ((uint16_t)0x000000C0) +#define EM_BLE_DFSWCNTL_LSB 6 +#define EM_BLE_DFSWCNTL_WIDTH ((uint16_t)0x00000002) +#define EM_BLE_DFSAMPCNTL_MASK ((uint16_t)0x00000030) +#define EM_BLE_DFSAMPCNTL_LSB 4 +#define EM_BLE_DFSAMPCNTL_WIDTH ((uint16_t)0x00000002) +#define EM_BLE_DFTYPE_MASK ((uint16_t)0x0000000C) +#define EM_BLE_DFTYPE_LSB 2 +#define EM_BLE_DFTYPE_WIDTH ((uint16_t)0x00000002) +#define EM_BLE_DFFILTEREN_BIT ((uint16_t)0x00000002) +#define EM_BLE_DFFILTEREN_POS 1 +#define EM_BLE_DFEN_BIT ((uint16_t)0x00000001) +#define EM_BLE_DFEN_POS 0 + +#define EM_BLE_DFRSPEN_RST 0x0 +#define EM_BLE_DFSWCNTL_RST 0x0 +#define EM_BLE_DFSAMPCNTL_RST 0x0 +#define EM_BLE_DFTYPE_RST 0x0 +#define EM_BLE_DFFILTEREN_RST 0x0 +#define EM_BLE_DFEN_RST 0x0 + +__INLINE void em_ble_rxdfcntl_pack(int elt_idx, uint8_t dfrspen, uint8_t dfswcntl, uint8_t dfsampcntl, uint8_t dftype, uint8_t dffilteren, uint8_t dfen) +{ + ASSERT_ERR((((uint16_t)dfrspen << 8) & ~((uint16_t)0x00000100)) == 0); + ASSERT_ERR((((uint16_t)dfswcntl << 6) & ~((uint16_t)0x000000C0)) == 0); + ASSERT_ERR((((uint16_t)dfsampcntl << 4) & ~((uint16_t)0x00000030)) == 0); + ASSERT_ERR((((uint16_t)dftype << 2) & ~((uint16_t)0x0000000C)) == 0); + ASSERT_ERR((((uint16_t)dffilteren << 1) & ~((uint16_t)0x00000002)) == 0); + ASSERT_ERR((((uint16_t)dfen << 0) & ~((uint16_t)0x00000001)) == 0); + EM_BLE_WR(EM_BLE_RXDFCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, ((uint16_t)dfrspen << 8) | ((uint16_t)dfswcntl << 6) | ((uint16_t)dfsampcntl << 4) | ((uint16_t)dftype << 2) | ((uint16_t)dffilteren << 1) | ((uint16_t)dfen << 0)); +} + +__INLINE void em_ble_rxdfcntl_unpack(int elt_idx, uint8_t* dfrspen, uint8_t* dfswcntl, uint8_t* dfsampcntl, uint8_t* dftype, uint8_t* dffilteren, uint8_t* dfen) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXDFCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + + *dfrspen = (localVal & ((uint16_t)0x00000100)) >> 8; + *dfswcntl = (localVal & ((uint16_t)0x000000C0)) >> 6; + *dfsampcntl = (localVal & ((uint16_t)0x00000030)) >> 4; + *dftype = (localVal & ((uint16_t)0x0000000C)) >> 2; + *dffilteren = (localVal & ((uint16_t)0x00000002)) >> 1; + *dfen = (localVal & ((uint16_t)0x00000001)) >> 0; +} + +__INLINE uint8_t em_ble_rxdfcntl_dfrspen_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXDFCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00000100)) >> 8); +} + +__INLINE void em_ble_rxdfcntl_dfrspen_setf(int elt_idx, uint8_t dfrspen) +{ + ASSERT_ERR((((uint16_t)dfrspen << 8) & ~((uint16_t)0x00000100)) == 0); + EM_BLE_WR(EM_BLE_RXDFCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_RXDFCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00000100)) | ((uint16_t)dfrspen << 8)); +} + +__INLINE uint8_t em_ble_rxdfcntl_dfswcntl_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXDFCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x000000C0)) >> 6); +} + +__INLINE void em_ble_rxdfcntl_dfswcntl_setf(int elt_idx, uint8_t dfswcntl) +{ + ASSERT_ERR((((uint16_t)dfswcntl << 6) & ~((uint16_t)0x000000C0)) == 0); + EM_BLE_WR(EM_BLE_RXDFCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_RXDFCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x000000C0)) | ((uint16_t)dfswcntl << 6)); +} + +__INLINE uint8_t em_ble_rxdfcntl_dfsampcntl_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXDFCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00000030)) >> 4); +} + +__INLINE void em_ble_rxdfcntl_dfsampcntl_setf(int elt_idx, uint8_t dfsampcntl) +{ + ASSERT_ERR((((uint16_t)dfsampcntl << 4) & ~((uint16_t)0x00000030)) == 0); + EM_BLE_WR(EM_BLE_RXDFCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_RXDFCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00000030)) | ((uint16_t)dfsampcntl << 4)); +} + +__INLINE uint8_t em_ble_rxdfcntl_dftype_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXDFCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x0000000C)) >> 2); +} + +__INLINE void em_ble_rxdfcntl_dftype_setf(int elt_idx, uint8_t dftype) +{ + ASSERT_ERR((((uint16_t)dftype << 2) & ~((uint16_t)0x0000000C)) == 0); + EM_BLE_WR(EM_BLE_RXDFCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_RXDFCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x0000000C)) | ((uint16_t)dftype << 2)); +} + +__INLINE uint8_t em_ble_rxdfcntl_dffilteren_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXDFCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00000002)) >> 1); +} + +__INLINE void em_ble_rxdfcntl_dffilteren_setf(int elt_idx, uint8_t dffilteren) +{ + ASSERT_ERR((((uint16_t)dffilteren << 1) & ~((uint16_t)0x00000002)) == 0); + EM_BLE_WR(EM_BLE_RXDFCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_RXDFCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00000002)) | ((uint16_t)dffilteren << 1)); +} + +__INLINE uint8_t em_ble_rxdfcntl_dfen_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXDFCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00000001)) >> 0); +} + +__INLINE void em_ble_rxdfcntl_dfen_setf(int elt_idx, uint8_t dfen) +{ + ASSERT_ERR((((uint16_t)dfen << 0) & ~((uint16_t)0x00000001)) == 0); + EM_BLE_WR(EM_BLE_RXDFCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_RXDFCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00000001)) | ((uint16_t)dfen << 0)); +} + +/** + * @brief RXWINCNTL register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15 RXWIDE 0 + * 14:00 RXWINSZ 0x0 + *+ */ +#define EM_BLE_RXWINCNTL_ADDR (EXCHANGE_MEM_BASE+0x1E + EM_BLE_CS_OFFSET) +#define EM_BLE_RXWINCNTL_INDEX 0x0000000F +#define EM_BLE_RXWINCNTL_RESET 0x00000000 + +__INLINE uint16_t em_ble_rxwincntl_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_RXWINCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); +} + +__INLINE void em_ble_rxwincntl_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_RXWINCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, value); +} + +// field definitions +#define EM_BLE_RXWIDE_BIT ((uint16_t)0x00008000) +#define EM_BLE_RXWIDE_POS 15 +#define EM_BLE_RXWINSZ_MASK ((uint16_t)0x00007FFF) +#define EM_BLE_RXWINSZ_LSB 0 +#define EM_BLE_RXWINSZ_WIDTH ((uint16_t)0x0000000F) + +#define EM_BLE_RXWIDE_RST 0x0 +#define EM_BLE_RXWINSZ_RST 0x0 + +__INLINE void em_ble_rxwincntl_pack(int elt_idx, uint8_t rxwide, uint16_t rxwinsz) +{ + ASSERT_ERR((((uint16_t)rxwide << 15) & ~((uint16_t)0x00008000)) == 0); + ASSERT_ERR((((uint16_t)rxwinsz << 0) & ~((uint16_t)0x00007FFF)) == 0); + EM_BLE_WR(EM_BLE_RXWINCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, ((uint16_t)rxwide << 15) | ((uint16_t)rxwinsz << 0)); +} + +__INLINE void em_ble_rxwincntl_unpack(int elt_idx, uint8_t* rxwide, uint16_t* rxwinsz) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXWINCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + + *rxwide = (localVal & ((uint16_t)0x00008000)) >> 15; + *rxwinsz = (localVal & ((uint16_t)0x00007FFF)) >> 0; +} + +__INLINE uint8_t em_ble_rxwincntl_rxwide_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXWINCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00008000)) >> 15); +} + +__INLINE void em_ble_rxwincntl_rxwide_setf(int elt_idx, uint8_t rxwide) +{ + ASSERT_ERR((((uint16_t)rxwide << 15) & ~((uint16_t)0x00008000)) == 0); + EM_BLE_WR(EM_BLE_RXWINCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_RXWINCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00008000)) | ((uint16_t)rxwide << 15)); +} + +__INLINE uint16_t em_ble_rxwincntl_rxwinsz_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXWINCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00007FFF)) >> 0); +} + +__INLINE void em_ble_rxwincntl_rxwinsz_setf(int elt_idx, uint16_t rxwinsz) +{ + ASSERT_ERR((((uint16_t)rxwinsz << 0) & ~((uint16_t)0x00007FFF)) == 0); + EM_BLE_WR(EM_BLE_RXWINCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_RXWINCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00007FFF)) | ((uint16_t)rxwinsz << 0)); +} + +/** + * @brief ISOTXDESCPTR register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 13:00 ISOTXDESCPTR 0x0 + *+ */ +#define EM_BLE_ISOTXDESCPTR_ADDR (EXCHANGE_MEM_BASE+0x20 + EM_BLE_CS_OFFSET) +#define EM_BLE_ISOTXDESCPTR_INDEX 0x00000010 +#define EM_BLE_ISOTXDESCPTR_RESET 0x00000000 + +__INLINE uint16_t em_ble_isotxdescptr_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_ISOTXDESCPTR_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); +} + +__INLINE void em_ble_isotxdescptr_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_ISOTXDESCPTR_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, value); +} + +// field definitions +#define EM_BLE_ISOTXDESCPTR_MASK ((uint16_t)0x00003FFF) +#define EM_BLE_ISOTXDESCPTR_LSB 0 +#define EM_BLE_ISOTXDESCPTR_WIDTH ((uint16_t)0x0000000E) + +#define EM_BLE_ISOTXDESCPTR_RST 0x0 + +__INLINE uint16_t em_ble_isotxdescptr_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_ISOTXDESCPTR_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + ASSERT_ERR((localVal & ~((uint16_t)0x00003FFF)) == 0); + return (localVal >> 0); +} + +__INLINE void em_ble_isotxdescptr_setf(int elt_idx, uint16_t isotxdescptr) +{ + ASSERT_ERR((((uint16_t)isotxdescptr << 0) & ~((uint16_t)0x00003FFF)) == 0); + EM_BLE_WR(EM_BLE_ISOTXDESCPTR_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (uint16_t)isotxdescptr << 0); +} + +/** + * @brief ISORXDESCPTR register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 13:00 ISORXDESCPTR 0x0 + *+ */ +#define EM_BLE_ISORXDESCPTR_ADDR (EXCHANGE_MEM_BASE+0x22 + EM_BLE_CS_OFFSET) +#define EM_BLE_ISORXDESCPTR_INDEX 0x00000011 +#define EM_BLE_ISORXDESCPTR_RESET 0x00000000 + +__INLINE uint16_t em_ble_isorxdescptr_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_ISORXDESCPTR_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); +} + +__INLINE void em_ble_isorxdescptr_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_ISORXDESCPTR_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, value); +} + +// field definitions +#define EM_BLE_ISORXDESCPTR_MASK ((uint16_t)0x00003FFF) +#define EM_BLE_ISORXDESCPTR_LSB 0 +#define EM_BLE_ISORXDESCPTR_WIDTH ((uint16_t)0x0000000E) + +#define EM_BLE_ISORXDESCPTR_RST 0x0 + +__INLINE uint16_t em_ble_isorxdescptr_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_ISORXDESCPTR_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + ASSERT_ERR((localVal & ~((uint16_t)0x00003FFF)) == 0); + return (localVal >> 0); +} + +__INLINE void em_ble_isorxdescptr_setf(int elt_idx, uint16_t isorxdescptr) +{ + ASSERT_ERR((((uint16_t)isorxdescptr << 0) & ~((uint16_t)0x00003FFF)) == 0); + EM_BLE_WR(EM_BLE_ISORXDESCPTR_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (uint16_t)isorxdescptr << 0); +} + +/** + * @brief ACLTXDESCPTR register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 13:00 ACLTXDESCPTR 0x0 + *+ */ +#define EM_BLE_ACLTXDESCPTR_ADDR (EXCHANGE_MEM_BASE+0x24 + EM_BLE_CS_OFFSET) +#define EM_BLE_ACLTXDESCPTR_INDEX 0x00000012 +#define EM_BLE_ACLTXDESCPTR_RESET 0x00000000 + +__INLINE uint16_t em_ble_acltxdescptr_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_ACLTXDESCPTR_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); +} + +__INLINE void em_ble_acltxdescptr_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_ACLTXDESCPTR_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, value); +} + +// field definitions +#define EM_BLE_ACLTXDESCPTR_MASK ((uint16_t)0x00003FFF) +#define EM_BLE_ACLTXDESCPTR_LSB 0 +#define EM_BLE_ACLTXDESCPTR_WIDTH ((uint16_t)0x0000000E) + +#define EM_BLE_ACLTXDESCPTR_RST 0x0 + +__INLINE uint16_t em_ble_acltxdescptr_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_ACLTXDESCPTR_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + ASSERT_ERR((localVal & ~((uint16_t)0x00003FFF)) == 0); + return (localVal >> 0); +} + +__INLINE void em_ble_acltxdescptr_setf(int elt_idx, uint16_t acltxdescptr) +{ + ASSERT_ERR((((uint16_t)acltxdescptr << 0) & ~((uint16_t)0x00003FFF)) == 0); + EM_BLE_WR(EM_BLE_ACLTXDESCPTR_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (uint16_t)acltxdescptr << 0); +} + +/** + * @brief RXDFANTPATTCNTL register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15 DFRSP 0 + * 12:08 MAX_SAMP_CTE 0x0 + * 06:00 RX_ANT_PATT_LENGTH 0x0 + *+ */ +#define EM_BLE_RXDFANTPATTCNTL_ADDR (EXCHANGE_MEM_BASE+0x26 + EM_BLE_CS_OFFSET) +#define EM_BLE_RXDFANTPATTCNTL_INDEX 0x00000013 +#define EM_BLE_RXDFANTPATTCNTL_RESET 0x00000000 + +__INLINE uint16_t em_ble_rxdfantpattcntl_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_RXDFANTPATTCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); +} + +__INLINE void em_ble_rxdfantpattcntl_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_RXDFANTPATTCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, value); +} + +// field definitions +#define EM_BLE_DFRSP_BIT ((uint16_t)0x00008000) +#define EM_BLE_DFRSP_POS 15 +#define EM_BLE_MAX_SAMP_CTE_MASK ((uint16_t)0x00001F00) +#define EM_BLE_MAX_SAMP_CTE_LSB 8 +#define EM_BLE_MAX_SAMP_CTE_WIDTH ((uint16_t)0x00000005) +#define EM_BLE_RX_ANT_PATT_LENGTH_MASK ((uint16_t)0x0000007F) +#define EM_BLE_RX_ANT_PATT_LENGTH_LSB 0 +#define EM_BLE_RX_ANT_PATT_LENGTH_WIDTH ((uint16_t)0x00000007) + +#define EM_BLE_DFRSP_RST 0x0 +#define EM_BLE_MAX_SAMP_CTE_RST 0x0 +#define EM_BLE_RX_ANT_PATT_LENGTH_RST 0x0 + +__INLINE void em_ble_rxdfantpattcntl_pack(int elt_idx, uint8_t dfrsp, uint8_t maxsampcte, uint8_t rxantpattlength) +{ + ASSERT_ERR((((uint16_t)dfrsp << 15) & ~((uint16_t)0x00008000)) == 0); + ASSERT_ERR((((uint16_t)maxsampcte << 8) & ~((uint16_t)0x00001F00)) == 0); + ASSERT_ERR((((uint16_t)rxantpattlength << 0) & ~((uint16_t)0x0000007F)) == 0); + EM_BLE_WR(EM_BLE_RXDFANTPATTCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, ((uint16_t)dfrsp << 15) | ((uint16_t)maxsampcte << 8) | ((uint16_t)rxantpattlength << 0)); +} + +__INLINE void em_ble_rxdfantpattcntl_unpack(int elt_idx, uint8_t* dfrsp, uint8_t* maxsampcte, uint8_t* rxantpattlength) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXDFANTPATTCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + + *dfrsp = (localVal & ((uint16_t)0x00008000)) >> 15; + *maxsampcte = (localVal & ((uint16_t)0x00001F00)) >> 8; + *rxantpattlength = (localVal & ((uint16_t)0x0000007F)) >> 0; +} + +__INLINE uint8_t em_ble_rxdfantpattcntl_dfrsp_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXDFANTPATTCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00008000)) >> 15); +} + +__INLINE void em_ble_rxdfantpattcntl_dfrsp_setf(int elt_idx, uint8_t dfrsp) +{ + ASSERT_ERR((((uint16_t)dfrsp << 15) & ~((uint16_t)0x00008000)) == 0); + EM_BLE_WR(EM_BLE_RXDFANTPATTCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_RXDFANTPATTCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00008000)) | ((uint16_t)dfrsp << 15)); +} + +__INLINE uint8_t em_ble_rxdfantpattcntl_max_samp_cte_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXDFANTPATTCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00001F00)) >> 8); +} + +__INLINE void em_ble_rxdfantpattcntl_max_samp_cte_setf(int elt_idx, uint8_t maxsampcte) +{ + ASSERT_ERR((((uint16_t)maxsampcte << 8) & ~((uint16_t)0x00001F00)) == 0); + EM_BLE_WR(EM_BLE_RXDFANTPATTCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_RXDFANTPATTCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00001F00)) | ((uint16_t)maxsampcte << 8)); +} + +__INLINE uint8_t em_ble_rxdfantpattcntl_rx_ant_patt_length_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXDFANTPATTCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x0000007F)) >> 0); +} + +__INLINE void em_ble_rxdfantpattcntl_rx_ant_patt_length_setf(int elt_idx, uint8_t rxantpattlength) +{ + ASSERT_ERR((((uint16_t)rxantpattlength << 0) & ~((uint16_t)0x0000007F)) == 0); + EM_BLE_WR(EM_BLE_RXDFANTPATTCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_RXDFANTPATTCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x0000007F)) | ((uint16_t)rxantpattlength << 0)); +} + +/** + * @brief RXDFANTSWPTR register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 13:00 RX_ANTENNA_ID_PTR 0x0 + *+ */ +#define EM_BLE_RXDFANTSWPTR_ADDR (EXCHANGE_MEM_BASE+0x28 + EM_BLE_CS_OFFSET) +#define EM_BLE_RXDFANTSWPTR_INDEX 0x00000014 +#define EM_BLE_RXDFANTSWPTR_RESET 0x00000000 + +__INLINE uint16_t em_ble_rxdfantswptr_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_RXDFANTSWPTR_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); +} + +__INLINE void em_ble_rxdfantswptr_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_RXDFANTSWPTR_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, value); +} + +// field definitions +#define EM_BLE_RX_ANTENNA_ID_PTR_MASK ((uint16_t)0x00003FFF) +#define EM_BLE_RX_ANTENNA_ID_PTR_LSB 0 +#define EM_BLE_RX_ANTENNA_ID_PTR_WIDTH ((uint16_t)0x0000000E) + +#define EM_BLE_RX_ANTENNA_ID_PTR_RST 0x0 + +__INLINE uint16_t em_ble_rxdfantswptr_rx_antenna_id_ptr_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXDFANTSWPTR_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + ASSERT_ERR((localVal & ~((uint16_t)0x00003FFF)) == 0); + return (localVal >> 0); +} + +__INLINE void em_ble_rxdfantswptr_rx_antenna_id_ptr_setf(int elt_idx, uint16_t rxantennaidptr) +{ + ASSERT_ERR((((uint16_t)rxantennaidptr << 0) & ~((uint16_t)0x00003FFF)) == 0); + EM_BLE_WR(EM_BLE_RXDFANTSWPTR_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (uint16_t)rxantennaidptr << 0); +} + +/** + * @brief TXDFANTPATTCNTL register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 06:00 TX_ANT_PATT_LENGTH 0x0 + *+ */ +#define EM_BLE_TXDFANTPATTCNTL_ADDR (EXCHANGE_MEM_BASE+0x2A + EM_BLE_CS_OFFSET) +#define EM_BLE_TXDFANTPATTCNTL_INDEX 0x00000015 +#define EM_BLE_TXDFANTPATTCNTL_RESET 0x00000000 + +__INLINE uint16_t em_ble_txdfantpattcntl_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_TXDFANTPATTCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); +} + +__INLINE void em_ble_txdfantpattcntl_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_TXDFANTPATTCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, value); +} + +// field definitions +#define EM_BLE_TX_ANT_PATT_LENGTH_MASK ((uint16_t)0x0000007F) +#define EM_BLE_TX_ANT_PATT_LENGTH_LSB 0 +#define EM_BLE_TX_ANT_PATT_LENGTH_WIDTH ((uint16_t)0x00000007) + +#define EM_BLE_TX_ANT_PATT_LENGTH_RST 0x0 + +__INLINE uint8_t em_ble_txdfantpattcntl_tx_ant_patt_length_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXDFANTPATTCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + ASSERT_ERR((localVal & ~((uint16_t)0x0000007F)) == 0); + return (localVal >> 0); +} + +__INLINE void em_ble_txdfantpattcntl_tx_ant_patt_length_setf(int elt_idx, uint8_t txantpattlength) +{ + ASSERT_ERR((((uint16_t)txantpattlength << 0) & ~((uint16_t)0x0000007F)) == 0); + EM_BLE_WR(EM_BLE_TXDFANTPATTCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (uint16_t)txantpattlength << 0); +} + +/** + * @brief TXDFANTSWPTR register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 13:00 TX_ANTENNA_ID_PTR 0x0 + *+ */ +#define EM_BLE_TXDFANTSWPTR_ADDR (EXCHANGE_MEM_BASE+0x2C + EM_BLE_CS_OFFSET) +#define EM_BLE_TXDFANTSWPTR_INDEX 0x00000016 +#define EM_BLE_TXDFANTSWPTR_RESET 0x00000000 + +__INLINE uint16_t em_ble_txdfantswptr_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_TXDFANTSWPTR_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); +} + +__INLINE void em_ble_txdfantswptr_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_TXDFANTSWPTR_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, value); +} + +// field definitions +#define EM_BLE_TX_ANTENNA_ID_PTR_MASK ((uint16_t)0x00003FFF) +#define EM_BLE_TX_ANTENNA_ID_PTR_LSB 0 +#define EM_BLE_TX_ANTENNA_ID_PTR_WIDTH ((uint16_t)0x0000000E) + +#define EM_BLE_TX_ANTENNA_ID_PTR_RST 0x0 + +__INLINE uint16_t em_ble_txdfantswptr_tx_antenna_id_ptr_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXDFANTSWPTR_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + ASSERT_ERR((localVal & ~((uint16_t)0x00003FFF)) == 0); + return (localVal >> 0); +} + +__INLINE void em_ble_txdfantswptr_tx_antenna_id_ptr_setf(int elt_idx, uint16_t txantennaidptr) +{ + ASSERT_ERR((((uint16_t)txantennaidptr << 0) & ~((uint16_t)0x00003FFF)) == 0); + EM_BLE_WR(EM_BLE_TXDFANTSWPTR_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (uint16_t)txantennaidptr << 0); +} + +/** + * @brief WINOFFSET register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:00 WINOFFSET 0x0 + *+ */ +#define EM_BLE_WINOFFSET_ADDR (EXCHANGE_MEM_BASE+0x2E + EM_BLE_CS_OFFSET) +#define EM_BLE_WINOFFSET_INDEX 0x00000017 +#define EM_BLE_WINOFFSET_RESET 0x00000000 + +__INLINE uint16_t em_ble_winoffset_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_WINOFFSET_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); +} + +__INLINE void em_ble_winoffset_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_WINOFFSET_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, value); +} + +// field definitions +#define EM_BLE_WINOFFSET_MASK ((uint16_t)0x0000FFFF) +#define EM_BLE_WINOFFSET_LSB 0 +#define EM_BLE_WINOFFSET_WIDTH ((uint16_t)0x00000010) + +#define EM_BLE_WINOFFSET_RST 0x0 + +__INLINE uint16_t em_ble_winoffset_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_WINOFFSET_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + ASSERT_ERR((localVal & ~((uint16_t)0x0000FFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void em_ble_winoffset_setf(int elt_idx, uint16_t winoffset) +{ + ASSERT_ERR((((uint16_t)winoffset << 0) & ~((uint16_t)0x0000FFFF)) == 0); + EM_BLE_WR(EM_BLE_WINOFFSET_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (uint16_t)winoffset << 0); +} + +/** + * @brief MINEVTIME register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:00 MINEVTIME 0x0 + *+ */ +#define EM_BLE_MINEVTIME_ADDR (EXCHANGE_MEM_BASE+0x2E + EM_BLE_CS_OFFSET) +#define EM_BLE_MINEVTIME_INDEX 0x00000017 +#define EM_BLE_MINEVTIME_RESET 0x00000000 + +__INLINE uint16_t em_ble_minevtime_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_MINEVTIME_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); +} + +__INLINE void em_ble_minevtime_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_MINEVTIME_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, value); +} + +// field definitions +#define EM_BLE_MINEVTIME_MASK ((uint16_t)0x0000FFFF) +#define EM_BLE_MINEVTIME_LSB 0 +#define EM_BLE_MINEVTIME_WIDTH ((uint16_t)0x00000010) + +#define EM_BLE_MINEVTIME_RST 0x0 + +__INLINE uint16_t em_ble_minevtime_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_MINEVTIME_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + ASSERT_ERR((localVal & ~((uint16_t)0x0000FFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void em_ble_minevtime_setf(int elt_idx, uint16_t minevtime) +{ + ASSERT_ERR((((uint16_t)minevtime << 0) & ~((uint16_t)0x0000FFFF)) == 0); + EM_BLE_WR(EM_BLE_MINEVTIME_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (uint16_t)minevtime << 0); +} + +/** + * @brief MAXEVTIME register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:00 MAXEVTIME 0x0 + *+ */ +#define EM_BLE_MAXEVTIME_ADDR (EXCHANGE_MEM_BASE+0x30 + EM_BLE_CS_OFFSET) +#define EM_BLE_MAXEVTIME_INDEX 0x00000018 +#define EM_BLE_MAXEVTIME_RESET 0x00000000 + +__INLINE uint16_t em_ble_maxevtime_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_MAXEVTIME_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); +} + +__INLINE void em_ble_maxevtime_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_MAXEVTIME_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, value); +} + +// field definitions +#define EM_BLE_MAXEVTIME_MASK ((uint16_t)0x0000FFFF) +#define EM_BLE_MAXEVTIME_LSB 0 +#define EM_BLE_MAXEVTIME_WIDTH ((uint16_t)0x00000010) + +#define EM_BLE_MAXEVTIME_RST 0x0 + +__INLINE uint16_t em_ble_maxevtime_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_MAXEVTIME_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + ASSERT_ERR((localVal & ~((uint16_t)0x0000FFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void em_ble_maxevtime_setf(int elt_idx, uint16_t maxevtime) +{ + ASSERT_ERR((((uint16_t)maxevtime << 0) & ~((uint16_t)0x0000FFFF)) == 0); + EM_BLE_WR(EM_BLE_MAXEVTIME_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (uint16_t)maxevtime << 0); +} + +/** + * @brief CONNINTERVAL register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:00 CONNINTERVAL 0x0 + *+ */ +#define EM_BLE_CONNINTERVAL_ADDR (EXCHANGE_MEM_BASE+0x32 + EM_BLE_CS_OFFSET) +#define EM_BLE_CONNINTERVAL_INDEX 0x00000019 +#define EM_BLE_CONNINTERVAL_RESET 0x00000000 + +__INLINE uint16_t em_ble_conninterval_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_CONNINTERVAL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); +} + +__INLINE void em_ble_conninterval_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_CONNINTERVAL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, value); +} + +// field definitions +#define EM_BLE_CONNINTERVAL_MASK ((uint16_t)0x0000FFFF) +#define EM_BLE_CONNINTERVAL_LSB 0 +#define EM_BLE_CONNINTERVAL_WIDTH ((uint16_t)0x00000010) + +#define EM_BLE_CONNINTERVAL_RST 0x0 + +__INLINE uint16_t em_ble_conninterval_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_CONNINTERVAL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + ASSERT_ERR((localVal & ~((uint16_t)0x0000FFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void em_ble_conninterval_setf(int elt_idx, uint16_t conninterval) +{ + ASSERT_ERR((((uint16_t)conninterval << 0) & ~((uint16_t)0x0000FFFF)) == 0); + EM_BLE_WR(EM_BLE_CONNINTERVAL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (uint16_t)conninterval << 0); +} + +/** + * @brief CHMAP0 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:00 LLCHMAP0 0xFFFF + *+ */ +#define EM_BLE_CHMAP0_ADDR (EXCHANGE_MEM_BASE+0x32 + EM_BLE_CS_OFFSET) +#define EM_BLE_CHMAP0_INDEX 0x00000019 +#define EM_BLE_CHMAP0_RESET 0x0000FFFF + +__INLINE uint16_t em_ble_chmap0_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_CHMAP0_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); +} + +__INLINE void em_ble_chmap0_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_CHMAP0_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, value); +} + +// field definitions +#define EM_BLE_LLCHMAP0_MASK ((uint16_t)0x0000FFFF) +#define EM_BLE_LLCHMAP0_LSB 0 +#define EM_BLE_LLCHMAP0_WIDTH ((uint16_t)0x00000010) + +#define EM_BLE_LLCHMAP0_RST 0xFFFF + +__INLINE uint16_t em_ble_chmap0_llchmap0_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_CHMAP0_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + ASSERT_ERR((localVal & ~((uint16_t)0x0000FFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void em_ble_chmap0_llchmap0_setf(int elt_idx, uint16_t llchmap0) +{ + ASSERT_ERR((((uint16_t)llchmap0 << 0) & ~((uint16_t)0x0000FFFF)) == 0); + EM_BLE_WR(EM_BLE_CHMAP0_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (uint16_t)llchmap0 << 0); +} + +/** + * @brief CHMAP1 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:00 LLCHMAP1 0xFFFF + *+ */ +#define EM_BLE_CHMAP1_ADDR (EXCHANGE_MEM_BASE+0x34 + EM_BLE_CS_OFFSET) +#define EM_BLE_CHMAP1_INDEX 0x0000001A +#define EM_BLE_CHMAP1_RESET 0x0000FFFF + +__INLINE uint16_t em_ble_chmap1_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_CHMAP1_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); +} + +__INLINE void em_ble_chmap1_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_CHMAP1_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, value); +} + +// field definitions +#define EM_BLE_LLCHMAP1_MASK ((uint16_t)0x0000FFFF) +#define EM_BLE_LLCHMAP1_LSB 0 +#define EM_BLE_LLCHMAP1_WIDTH ((uint16_t)0x00000010) + +#define EM_BLE_LLCHMAP1_RST 0xFFFF + +__INLINE uint16_t em_ble_chmap1_llchmap1_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_CHMAP1_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + ASSERT_ERR((localVal & ~((uint16_t)0x0000FFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void em_ble_chmap1_llchmap1_setf(int elt_idx, uint16_t llchmap1) +{ + ASSERT_ERR((((uint16_t)llchmap1 << 0) & ~((uint16_t)0x0000FFFF)) == 0); + EM_BLE_WR(EM_BLE_CHMAP1_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (uint16_t)llchmap1 << 0); +} + +/** + * @brief CHMAP2 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:10 CH_AUX 0x0 + * 07:05 ADVCHMAP 0x7 + * 04:00 LLCHMAP2 0x1F + *+ */ +#define EM_BLE_CHMAP2_ADDR (EXCHANGE_MEM_BASE+0x36 + EM_BLE_CS_OFFSET) +#define EM_BLE_CHMAP2_INDEX 0x0000001B +#define EM_BLE_CHMAP2_RESET 0x000000FF + +__INLINE uint16_t em_ble_chmap2_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_CHMAP2_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); +} + +__INLINE void em_ble_chmap2_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_CHMAP2_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, value); +} + +// field definitions +#define EM_BLE_CH_AUX_MASK ((uint16_t)0x0000FC00) +#define EM_BLE_CH_AUX_LSB 10 +#define EM_BLE_CH_AUX_WIDTH ((uint16_t)0x00000006) +#define EM_BLE_ADVCHMAP_MASK ((uint16_t)0x000000E0) +#define EM_BLE_ADVCHMAP_LSB 5 +#define EM_BLE_ADVCHMAP_WIDTH ((uint16_t)0x00000003) +#define EM_BLE_LLCHMAP2_MASK ((uint16_t)0x0000001F) +#define EM_BLE_LLCHMAP2_LSB 0 +#define EM_BLE_LLCHMAP2_WIDTH ((uint16_t)0x00000005) + +#define EM_BLE_CH_AUX_RST 0x0 +#define EM_BLE_ADVCHMAP_RST 0x7 +#define EM_BLE_LLCHMAP2_RST 0x1F + +__INLINE void em_ble_chmap2_pack(int elt_idx, uint8_t chaux, uint8_t advchmap, uint8_t llchmap2) +{ + ASSERT_ERR((((uint16_t)chaux << 10) & ~((uint16_t)0x0000FC00)) == 0); + ASSERT_ERR((((uint16_t)advchmap << 5) & ~((uint16_t)0x000000E0)) == 0); + ASSERT_ERR((((uint16_t)llchmap2 << 0) & ~((uint16_t)0x0000001F)) == 0); + EM_BLE_WR(EM_BLE_CHMAP2_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, ((uint16_t)chaux << 10) | ((uint16_t)advchmap << 5) | ((uint16_t)llchmap2 << 0)); +} + +__INLINE void em_ble_chmap2_unpack(int elt_idx, uint8_t* chaux, uint8_t* advchmap, uint8_t* llchmap2) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_CHMAP2_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + + *chaux = (localVal & ((uint16_t)0x0000FC00)) >> 10; + *advchmap = (localVal & ((uint16_t)0x000000E0)) >> 5; + *llchmap2 = (localVal & ((uint16_t)0x0000001F)) >> 0; +} + +__INLINE uint8_t em_ble_chmap2_ch_aux_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_CHMAP2_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x0000FC00)) >> 10); +} + +__INLINE void em_ble_chmap2_ch_aux_setf(int elt_idx, uint8_t chaux) +{ + ASSERT_ERR((((uint16_t)chaux << 10) & ~((uint16_t)0x0000FC00)) == 0); + EM_BLE_WR(EM_BLE_CHMAP2_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_CHMAP2_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x0000FC00)) | ((uint16_t)chaux << 10)); +} + +__INLINE uint8_t em_ble_chmap2_advchmap_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_CHMAP2_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x000000E0)) >> 5); +} + +__INLINE void em_ble_chmap2_advchmap_setf(int elt_idx, uint8_t advchmap) +{ + ASSERT_ERR((((uint16_t)advchmap << 5) & ~((uint16_t)0x000000E0)) == 0); + EM_BLE_WR(EM_BLE_CHMAP2_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_CHMAP2_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x000000E0)) | ((uint16_t)advchmap << 5)); +} + +__INLINE uint8_t em_ble_chmap2_llchmap2_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_CHMAP2_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x0000001F)) >> 0); +} + +__INLINE void em_ble_chmap2_llchmap2_setf(int elt_idx, uint8_t llchmap2) +{ + ASSERT_ERR((((uint16_t)llchmap2 << 0) & ~((uint16_t)0x0000001F)) == 0); + EM_BLE_WR(EM_BLE_CHMAP2_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_CHMAP2_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x0000001F)) | ((uint16_t)llchmap2 << 0)); +} + +/** + * @brief RXMAXAUXCHAIN register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:11 MAXRXCHDESC 0x0 + * 10:00 MAXRXCHBYTE 0x0 + *+ */ +#define EM_BLE_RXMAXAUXCHAIN_ADDR (EXCHANGE_MEM_BASE+0x38 + EM_BLE_CS_OFFSET) +#define EM_BLE_RXMAXAUXCHAIN_INDEX 0x0000001C +#define EM_BLE_RXMAXAUXCHAIN_RESET 0x00000000 + +__INLINE uint16_t em_ble_rxmaxauxchain_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_RXMAXAUXCHAIN_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); +} + +__INLINE void em_ble_rxmaxauxchain_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_RXMAXAUXCHAIN_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, value); +} + +// field definitions +#define EM_BLE_MAXRXCHDESC_MASK ((uint16_t)0x0000F800) +#define EM_BLE_MAXRXCHDESC_LSB 11 +#define EM_BLE_MAXRXCHDESC_WIDTH ((uint16_t)0x00000005) +#define EM_BLE_MAXRXCHBYTE_MASK ((uint16_t)0x000007FF) +#define EM_BLE_MAXRXCHBYTE_LSB 0 +#define EM_BLE_MAXRXCHBYTE_WIDTH ((uint16_t)0x0000000B) + +#define EM_BLE_MAXRXCHDESC_RST 0x0 +#define EM_BLE_MAXRXCHBYTE_RST 0x0 + +__INLINE void em_ble_rxmaxauxchain_pack(int elt_idx, uint8_t maxrxchdesc, uint16_t maxrxchbyte) +{ + ASSERT_ERR((((uint16_t)maxrxchdesc << 11) & ~((uint16_t)0x0000F800)) == 0); + ASSERT_ERR((((uint16_t)maxrxchbyte << 0) & ~((uint16_t)0x000007FF)) == 0); + EM_BLE_WR(EM_BLE_RXMAXAUXCHAIN_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, ((uint16_t)maxrxchdesc << 11) | ((uint16_t)maxrxchbyte << 0)); +} + +__INLINE void em_ble_rxmaxauxchain_unpack(int elt_idx, uint8_t* maxrxchdesc, uint16_t* maxrxchbyte) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXMAXAUXCHAIN_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + + *maxrxchdesc = (localVal & ((uint16_t)0x0000F800)) >> 11; + *maxrxchbyte = (localVal & ((uint16_t)0x000007FF)) >> 0; +} + +__INLINE uint8_t em_ble_rxmaxauxchain_maxrxchdesc_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXMAXAUXCHAIN_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x0000F800)) >> 11); +} + +__INLINE void em_ble_rxmaxauxchain_maxrxchdesc_setf(int elt_idx, uint8_t maxrxchdesc) +{ + ASSERT_ERR((((uint16_t)maxrxchdesc << 11) & ~((uint16_t)0x0000F800)) == 0); + EM_BLE_WR(EM_BLE_RXMAXAUXCHAIN_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_RXMAXAUXCHAIN_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x0000F800)) | ((uint16_t)maxrxchdesc << 11)); +} + +__INLINE uint16_t em_ble_rxmaxauxchain_maxrxchbyte_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXMAXAUXCHAIN_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x000007FF)) >> 0); +} + +__INLINE void em_ble_rxmaxauxchain_maxrxchbyte_setf(int elt_idx, uint16_t maxrxchbyte) +{ + ASSERT_ERR((((uint16_t)maxrxchbyte << 0) & ~((uint16_t)0x000007FF)) == 0); + EM_BLE_WR(EM_BLE_RXMAXAUXCHAIN_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_RXMAXAUXCHAIN_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x000007FF)) | ((uint16_t)maxrxchbyte << 0)); +} + +/** + * @brief RXMAXBUF register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:08 ISORXMAXBUF 0x0 + * 07:00 ACLRXMAXBUF 0x0 + *+ */ +#define EM_BLE_RXMAXBUF_ADDR (EXCHANGE_MEM_BASE+0x38 + EM_BLE_CS_OFFSET) +#define EM_BLE_RXMAXBUF_INDEX 0x0000001C +#define EM_BLE_RXMAXBUF_RESET 0x00000000 + +__INLINE uint16_t em_ble_rxmaxbuf_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_RXMAXBUF_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); +} + +__INLINE void em_ble_rxmaxbuf_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_RXMAXBUF_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, value); +} + +// field definitions +#define EM_BLE_ISORXMAXBUF_MASK ((uint16_t)0x0000FF00) +#define EM_BLE_ISORXMAXBUF_LSB 8 +#define EM_BLE_ISORXMAXBUF_WIDTH ((uint16_t)0x00000008) +#define EM_BLE_ACLRXMAXBUF_MASK ((uint16_t)0x000000FF) +#define EM_BLE_ACLRXMAXBUF_LSB 0 +#define EM_BLE_ACLRXMAXBUF_WIDTH ((uint16_t)0x00000008) + +#define EM_BLE_ISORXMAXBUF_RST 0x0 +#define EM_BLE_ACLRXMAXBUF_RST 0x0 + +__INLINE void em_ble_rxmaxbuf_pack(int elt_idx, uint8_t isorxmaxbuf, uint8_t aclrxmaxbuf) +{ + ASSERT_ERR((((uint16_t)isorxmaxbuf << 8) & ~((uint16_t)0x0000FF00)) == 0); + ASSERT_ERR((((uint16_t)aclrxmaxbuf << 0) & ~((uint16_t)0x000000FF)) == 0); + EM_BLE_WR(EM_BLE_RXMAXBUF_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, ((uint16_t)isorxmaxbuf << 8) | ((uint16_t)aclrxmaxbuf << 0)); +} + +__INLINE void em_ble_rxmaxbuf_unpack(int elt_idx, uint8_t* isorxmaxbuf, uint8_t* aclrxmaxbuf) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXMAXBUF_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + + *isorxmaxbuf = (localVal & ((uint16_t)0x0000FF00)) >> 8; + *aclrxmaxbuf = (localVal & ((uint16_t)0x000000FF)) >> 0; +} + +__INLINE uint8_t em_ble_rxmaxbuf_isorxmaxbuf_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXMAXBUF_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x0000FF00)) >> 8); +} + +__INLINE void em_ble_rxmaxbuf_isorxmaxbuf_setf(int elt_idx, uint8_t isorxmaxbuf) +{ + ASSERT_ERR((((uint16_t)isorxmaxbuf << 8) & ~((uint16_t)0x0000FF00)) == 0); + EM_BLE_WR(EM_BLE_RXMAXBUF_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_RXMAXBUF_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x0000FF00)) | ((uint16_t)isorxmaxbuf << 8)); +} + +__INLINE uint8_t em_ble_rxmaxbuf_aclrxmaxbuf_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXMAXBUF_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x000000FF)) >> 0); +} + +__INLINE void em_ble_rxmaxbuf_aclrxmaxbuf_setf(int elt_idx, uint8_t aclrxmaxbuf) +{ + ASSERT_ERR((((uint16_t)aclrxmaxbuf << 0) & ~((uint16_t)0x000000FF)) == 0); + EM_BLE_WR(EM_BLE_RXMAXBUF_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_RXMAXBUF_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x000000FF)) | ((uint16_t)aclrxmaxbuf << 0)); +} + +/** + * @brief RXMAXTIME register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 12:00 RXMAXTIME 0x0 + *+ */ +#define EM_BLE_RXMAXTIME_ADDR (EXCHANGE_MEM_BASE+0x3A + EM_BLE_CS_OFFSET) +#define EM_BLE_RXMAXTIME_INDEX 0x0000001D +#define EM_BLE_RXMAXTIME_RESET 0x00000000 + +__INLINE uint16_t em_ble_rxmaxtime_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_RXMAXTIME_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); +} + +__INLINE void em_ble_rxmaxtime_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_RXMAXTIME_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, value); +} + +// field definitions +#define EM_BLE_RXMAXTIME_MASK ((uint16_t)0x00001FFF) +#define EM_BLE_RXMAXTIME_LSB 0 +#define EM_BLE_RXMAXTIME_WIDTH ((uint16_t)0x0000000D) + +#define EM_BLE_RXMAXTIME_RST 0x0 + +__INLINE uint16_t em_ble_rxmaxtime_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXMAXTIME_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + ASSERT_ERR((localVal & ~((uint16_t)0x00001FFF)) == 0); + return (localVal >> 0); +} + +__INLINE void em_ble_rxmaxtime_setf(int elt_idx, uint16_t rxmaxtime) +{ + ASSERT_ERR((((uint16_t)rxmaxtime << 0) & ~((uint16_t)0x00001FFF)) == 0); + EM_BLE_WR(EM_BLE_RXMAXTIME_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (uint16_t)rxmaxtime << 0); +} + +/** + * @brief SK register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:00 SK 0x0 + *+ */ +#define EM_BLE_SK_ADDR (EXCHANGE_MEM_BASE+0x3C + EM_BLE_CS_OFFSET) +#define EM_BLE_SK_INDEX 0x0000001E +#define EM_BLE_SK_RESET 0x00000000 +#define EM_BLE_SK_COUNT 8 + +__INLINE uint16_t em_ble_sk_get(int elt_idx, int reg_idx) +{ + ASSERT_ERR(reg_idx <= 7); + return EM_BLE_RD(EM_BLE_SK_ADDR + elt_idx * REG_EM_BLE_CS_SIZE + reg_idx * 2); +} + +__INLINE void em_ble_sk_set(int elt_idx, int reg_idx, uint16_t value) +{ + ASSERT_ERR(reg_idx <= 7); + EM_BLE_WR(EM_BLE_SK_ADDR + elt_idx * REG_EM_BLE_CS_SIZE + reg_idx * 2, value); +} + +// field definitions +#define EM_BLE_SK_MASK ((uint16_t)0x0000FFFF) +#define EM_BLE_SK_LSB 0 +#define EM_BLE_SK_WIDTH ((uint16_t)0x00000010) + +#define EM_BLE_SK_RST 0x0 + +__INLINE uint16_t em_ble_sk_getf(int elt_idx, int reg_idx) +{ + ASSERT_ERR(reg_idx <= 7); + uint16_t localVal = EM_BLE_RD(EM_BLE_SK_ADDR + elt_idx * REG_EM_BLE_CS_SIZE + reg_idx * 2); + ASSERT_ERR((localVal & ~((uint16_t)0x0000FFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void em_ble_sk_setf(int elt_idx, int reg_idx, uint16_t sk) +{ + ASSERT_ERR(reg_idx <= 7); + ASSERT_ERR((((uint16_t)sk << 0) & ~((uint16_t)0x0000FFFF)) == 0); + EM_BLE_WR(EM_BLE_SK_ADDR + elt_idx * REG_EM_BLE_CS_SIZE + reg_idx * 2, (uint16_t)sk << 0); +} + +/** + * @brief ADV_BD_ADDR register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:00 ADV_BD_ADDR 0x0 + *+ */ +#define EM_BLE_ADV_BD_ADDR_ADDR (EXCHANGE_MEM_BASE+0x3C + EM_BLE_CS_OFFSET) +#define EM_BLE_ADV_BD_ADDR_INDEX 0x0000001E +#define EM_BLE_ADV_BD_ADDR_RESET 0x00000000 +#define EM_BLE_ADV_BD_ADDR_COUNT 3 + +__INLINE uint16_t em_ble_adv_bd_addr_get(int elt_idx, int reg_idx) +{ + ASSERT_ERR(reg_idx <= 2); + return EM_BLE_RD(EM_BLE_ADV_BD_ADDR_ADDR + elt_idx * REG_EM_BLE_CS_SIZE + reg_idx * 2); +} + +__INLINE void em_ble_adv_bd_addr_set(int elt_idx, int reg_idx, uint16_t value) +{ + ASSERT_ERR(reg_idx <= 2); + EM_BLE_WR(EM_BLE_ADV_BD_ADDR_ADDR + elt_idx * REG_EM_BLE_CS_SIZE + reg_idx * 2, value); +} + +// field definitions +#define EM_BLE_ADV_BD_ADDR_MASK ((uint16_t)0x0000FFFF) +#define EM_BLE_ADV_BD_ADDR_LSB 0 +#define EM_BLE_ADV_BD_ADDR_WIDTH ((uint16_t)0x00000010) + +#define EM_BLE_ADV_BD_ADDR_RST 0x0 + +__INLINE uint16_t em_ble_adv_bd_addr_getf(int elt_idx, int reg_idx) +{ + ASSERT_ERR(reg_idx <= 2); + uint16_t localVal = EM_BLE_RD(EM_BLE_ADV_BD_ADDR_ADDR + elt_idx * REG_EM_BLE_CS_SIZE + reg_idx * 2); + ASSERT_ERR((localVal & ~((uint16_t)0x0000FFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void em_ble_adv_bd_addr_setf(int elt_idx, int reg_idx, uint16_t advbdaddr) +{ + ASSERT_ERR(reg_idx <= 2); + ASSERT_ERR((((uint16_t)advbdaddr << 0) & ~((uint16_t)0x0000FFFF)) == 0); + EM_BLE_WR(EM_BLE_ADV_BD_ADDR_ADDR + elt_idx * REG_EM_BLE_CS_SIZE + reg_idx * 2, (uint16_t)advbdaddr << 0); +} + +/** + * @brief PEER_RALPTR register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 13:00 PEER_RALPTR 0x0 + *+ */ +#define EM_BLE_PEER_RALPTR_ADDR (EXCHANGE_MEM_BASE+0x3C + EM_BLE_CS_OFFSET) +#define EM_BLE_PEER_RALPTR_INDEX 0x0000001E +#define EM_BLE_PEER_RALPTR_RESET 0x00000000 + +__INLINE uint16_t em_ble_peer_ralptr_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_PEER_RALPTR_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); +} + +__INLINE void em_ble_peer_ralptr_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_PEER_RALPTR_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, value); +} + +// field definitions +#define EM_BLE_PEER_RALPTR_MASK ((uint16_t)0x00003FFF) +#define EM_BLE_PEER_RALPTR_LSB 0 +#define EM_BLE_PEER_RALPTR_WIDTH ((uint16_t)0x0000000E) + +#define EM_BLE_PEER_RALPTR_RST 0x0 + +__INLINE uint16_t em_ble_peer_ralptr_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_PEER_RALPTR_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + ASSERT_ERR((localVal & ~((uint16_t)0x00003FFF)) == 0); + return (localVal >> 0); +} + +__INLINE void em_ble_peer_ralptr_setf(int elt_idx, uint16_t peerralptr) +{ + ASSERT_ERR((((uint16_t)peerralptr << 0) & ~((uint16_t)0x00003FFF)) == 0); + EM_BLE_WR(EM_BLE_PEER_RALPTR_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (uint16_t)peerralptr << 0); +} + +/** + * @brief ADV_BD_ADDR_TYPE register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 00 ADV_BD_ADDR_TYPE 0 + *+ */ +#define EM_BLE_ADV_BD_ADDR_TYPE_ADDR (EXCHANGE_MEM_BASE+0x42 + EM_BLE_CS_OFFSET) +#define EM_BLE_ADV_BD_ADDR_TYPE_INDEX 0x00000021 +#define EM_BLE_ADV_BD_ADDR_TYPE_RESET 0x00000000 + +__INLINE uint16_t em_ble_adv_bd_addr_type_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_ADV_BD_ADDR_TYPE_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); +} + +__INLINE void em_ble_adv_bd_addr_type_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_ADV_BD_ADDR_TYPE_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, value); +} + +// field definitions +#define EM_BLE_ADV_BD_ADDR_TYPE_BIT ((uint16_t)0x00000001) +#define EM_BLE_ADV_BD_ADDR_TYPE_POS 0 + +#define EM_BLE_ADV_BD_ADDR_TYPE_RST 0x0 + +__INLINE uint8_t em_ble_adv_bd_addr_type_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_ADV_BD_ADDR_TYPE_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + ASSERT_ERR((localVal & ~((uint16_t)0x00000001)) == 0); + return (localVal >> 0); +} + +__INLINE void em_ble_adv_bd_addr_type_setf(int elt_idx, uint8_t advbdaddrtype) +{ + ASSERT_ERR((((uint16_t)advbdaddrtype << 0) & ~((uint16_t)0x00000001)) == 0); + EM_BLE_WR(EM_BLE_ADV_BD_ADDR_TYPE_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (uint16_t)advbdaddrtype << 0); +} + +/** + * @brief AUXTXDESCPTR register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 13:00 AUXTXDESCPTR 0x0 + *+ */ +#define EM_BLE_AUXTXDESCPTR_ADDR (EXCHANGE_MEM_BASE+0x44 + EM_BLE_CS_OFFSET) +#define EM_BLE_AUXTXDESCPTR_INDEX 0x00000022 +#define EM_BLE_AUXTXDESCPTR_RESET 0x00000000 + +__INLINE uint16_t em_ble_auxtxdescptr_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_AUXTXDESCPTR_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); +} + +__INLINE void em_ble_auxtxdescptr_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_AUXTXDESCPTR_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, value); +} + +// field definitions +#define EM_BLE_AUXTXDESCPTR_MASK ((uint16_t)0x00003FFF) +#define EM_BLE_AUXTXDESCPTR_LSB 0 +#define EM_BLE_AUXTXDESCPTR_WIDTH ((uint16_t)0x0000000E) + +#define EM_BLE_AUXTXDESCPTR_RST 0x0 + +__INLINE uint16_t em_ble_auxtxdescptr_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_AUXTXDESCPTR_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + ASSERT_ERR((localVal & ~((uint16_t)0x00003FFF)) == 0); + return (localVal >> 0); +} + +__INLINE void em_ble_auxtxdescptr_setf(int elt_idx, uint16_t auxtxdescptr) +{ + ASSERT_ERR((((uint16_t)auxtxdescptr << 0) & ~((uint16_t)0x00003FFF)) == 0); + EM_BLE_WR(EM_BLE_AUXTXDESCPTR_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (uint16_t)auxtxdescptr << 0); +} + +/** + * @brief IV register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:00 IV 0x0 + *+ */ +#define EM_BLE_IV_ADDR (EXCHANGE_MEM_BASE+0x4C + EM_BLE_CS_OFFSET) +#define EM_BLE_IV_INDEX 0x00000026 +#define EM_BLE_IV_RESET 0x00000000 +#define EM_BLE_IV_COUNT 4 + +__INLINE uint16_t em_ble_iv_get(int elt_idx, int reg_idx) +{ + ASSERT_ERR(reg_idx <= 3); + return EM_BLE_RD(EM_BLE_IV_ADDR + elt_idx * REG_EM_BLE_CS_SIZE + reg_idx * 2); +} + +__INLINE void em_ble_iv_set(int elt_idx, int reg_idx, uint16_t value) +{ + ASSERT_ERR(reg_idx <= 3); + EM_BLE_WR(EM_BLE_IV_ADDR + elt_idx * REG_EM_BLE_CS_SIZE + reg_idx * 2, value); +} + +// field definitions +#define EM_BLE_IV_MASK ((uint16_t)0x0000FFFF) +#define EM_BLE_IV_LSB 0 +#define EM_BLE_IV_WIDTH ((uint16_t)0x00000010) + +#define EM_BLE_IV_RST 0x0 + +__INLINE uint16_t em_ble_iv_getf(int elt_idx, int reg_idx) +{ + ASSERT_ERR(reg_idx <= 3); + uint16_t localVal = EM_BLE_RD(EM_BLE_IV_ADDR + elt_idx * REG_EM_BLE_CS_SIZE + reg_idx * 2); + ASSERT_ERR((localVal & ~((uint16_t)0x0000FFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void em_ble_iv_setf(int elt_idx, int reg_idx, uint16_t iv) +{ + ASSERT_ERR(reg_idx <= 3); + ASSERT_ERR((((uint16_t)iv << 0) & ~((uint16_t)0x0000FFFF)) == 0); + EM_BLE_WR(EM_BLE_IV_ADDR + elt_idx * REG_EM_BLE_CS_SIZE + reg_idx * 2, (uint16_t)iv << 0); +} + +/** + * @brief WINOFFSET_2M register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:00 WINOFFSET_2M 0x0 + *+ */ +#define EM_BLE_WINOFFSET_2M_ADDR (EXCHANGE_MEM_BASE+0x46 + EM_BLE_CS_OFFSET) +#define EM_BLE_WINOFFSET_2M_INDEX 0x00000023 +#define EM_BLE_WINOFFSET_2M_RESET 0x00000000 + +__INLINE uint16_t em_ble_winoffset_2m_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_WINOFFSET_2M_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); +} + +__INLINE void em_ble_winoffset_2m_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_WINOFFSET_2M_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, value); +} + +// field definitions +#define EM_BLE_WINOFFSET_2M_MASK ((uint16_t)0x0000FFFF) +#define EM_BLE_WINOFFSET_2M_LSB 0 +#define EM_BLE_WINOFFSET_2M_WIDTH ((uint16_t)0x00000010) + +#define EM_BLE_WINOFFSET_2M_RST 0x0 + +__INLINE uint16_t em_ble_winoffset_2m_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_WINOFFSET_2M_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + ASSERT_ERR((localVal & ~((uint16_t)0x0000FFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void em_ble_winoffset_2m_setf(int elt_idx, uint16_t winoffset2m) +{ + ASSERT_ERR((((uint16_t)winoffset2m << 0) & ~((uint16_t)0x0000FFFF)) == 0); + EM_BLE_WR(EM_BLE_WINOFFSET_2M_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (uint16_t)winoffset2m << 0); +} + +/** + * @brief CONNINTERVAL_2M register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:00 CONNINTERVAL_2M 0x0 + *+ */ +#define EM_BLE_CONNINTERVAL_2M_ADDR (EXCHANGE_MEM_BASE+0x48 + EM_BLE_CS_OFFSET) +#define EM_BLE_CONNINTERVAL_2M_INDEX 0x00000024 +#define EM_BLE_CONNINTERVAL_2M_RESET 0x00000000 + +__INLINE uint16_t em_ble_conninterval_2m_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_CONNINTERVAL_2M_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); +} + +__INLINE void em_ble_conninterval_2m_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_CONNINTERVAL_2M_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, value); +} + +// field definitions +#define EM_BLE_CONNINTERVAL_2M_MASK ((uint16_t)0x0000FFFF) +#define EM_BLE_CONNINTERVAL_2M_LSB 0 +#define EM_BLE_CONNINTERVAL_2M_WIDTH ((uint16_t)0x00000010) + +#define EM_BLE_CONNINTERVAL_2M_RST 0x0 + +__INLINE uint16_t em_ble_conninterval_2m_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_CONNINTERVAL_2M_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + ASSERT_ERR((localVal & ~((uint16_t)0x0000FFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void em_ble_conninterval_2m_setf(int elt_idx, uint16_t conninterval2m) +{ + ASSERT_ERR((((uint16_t)conninterval2m << 0) & ~((uint16_t)0x0000FFFF)) == 0); + EM_BLE_WR(EM_BLE_CONNINTERVAL_2M_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (uint16_t)conninterval2m << 0); +} + +/** + * @brief WINOFFSET_LR register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:00 WINOFFSET_LR 0x0 + *+ */ +#define EM_BLE_WINOFFSET_LR_ADDR (EXCHANGE_MEM_BASE+0x4A + EM_BLE_CS_OFFSET) +#define EM_BLE_WINOFFSET_LR_INDEX 0x00000025 +#define EM_BLE_WINOFFSET_LR_RESET 0x00000000 + +__INLINE uint16_t em_ble_winoffset_lr_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_WINOFFSET_LR_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); +} + +__INLINE void em_ble_winoffset_lr_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_WINOFFSET_LR_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, value); +} + +// field definitions +#define EM_BLE_WINOFFSET_LR_MASK ((uint16_t)0x0000FFFF) +#define EM_BLE_WINOFFSET_LR_LSB 0 +#define EM_BLE_WINOFFSET_LR_WIDTH ((uint16_t)0x00000010) + +#define EM_BLE_WINOFFSET_LR_RST 0x0 + +__INLINE uint16_t em_ble_winoffset_lr_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_WINOFFSET_LR_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + ASSERT_ERR((localVal & ~((uint16_t)0x0000FFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void em_ble_winoffset_lr_setf(int elt_idx, uint16_t winoffsetlr) +{ + ASSERT_ERR((((uint16_t)winoffsetlr << 0) & ~((uint16_t)0x0000FFFF)) == 0); + EM_BLE_WR(EM_BLE_WINOFFSET_LR_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (uint16_t)winoffsetlr << 0); +} + +/** + * @brief CONNINTERVAL_LR register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:00 CONNINTERVAL_LR 0x0 + *+ */ +#define EM_BLE_CONNINTERVAL_LR_ADDR (EXCHANGE_MEM_BASE+0x4C + EM_BLE_CS_OFFSET) +#define EM_BLE_CONNINTERVAL_LR_INDEX 0x00000026 +#define EM_BLE_CONNINTERVAL_LR_RESET 0x00000000 + +__INLINE uint16_t em_ble_conninterval_lr_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_CONNINTERVAL_LR_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); +} + +__INLINE void em_ble_conninterval_lr_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_CONNINTERVAL_LR_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, value); +} + +// field definitions +#define EM_BLE_CONNINTERVAL_LR_MASK ((uint16_t)0x0000FFFF) +#define EM_BLE_CONNINTERVAL_LR_LSB 0 +#define EM_BLE_CONNINTERVAL_LR_WIDTH ((uint16_t)0x00000010) + +#define EM_BLE_CONNINTERVAL_LR_RST 0x0 + +__INLINE uint16_t em_ble_conninterval_lr_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_CONNINTERVAL_LR_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + ASSERT_ERR((localVal & ~((uint16_t)0x0000FFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void em_ble_conninterval_lr_setf(int elt_idx, uint16_t connintervallr) +{ + ASSERT_ERR((((uint16_t)connintervallr << 0) & ~((uint16_t)0x0000FFFF)) == 0); + EM_BLE_WR(EM_BLE_CONNINTERVAL_LR_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (uint16_t)connintervallr << 0); +} + +/** + * @brief TXWINOFFSET register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:00 TXWINOFFSET 0x0 + *+ */ +#define EM_BLE_TXWINOFFSET_ADDR (EXCHANGE_MEM_BASE+0x54 + EM_BLE_CS_OFFSET) +#define EM_BLE_TXWINOFFSET_INDEX 0x0000002A +#define EM_BLE_TXWINOFFSET_RESET 0x00000000 + +__INLINE uint16_t em_ble_txwinoffset_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_TXWINOFFSET_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); +} + +__INLINE void em_ble_txwinoffset_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_TXWINOFFSET_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, value); +} + +// field definitions +#define EM_BLE_TXWINOFFSET_MASK ((uint16_t)0x0000FFFF) +#define EM_BLE_TXWINOFFSET_LSB 0 +#define EM_BLE_TXWINOFFSET_WIDTH ((uint16_t)0x00000010) + +#define EM_BLE_TXWINOFFSET_RST 0x0 + +__INLINE uint16_t em_ble_txwinoffset_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXWINOFFSET_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + ASSERT_ERR((localVal & ~((uint16_t)0x0000FFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void em_ble_txwinoffset_setf(int elt_idx, uint16_t txwinoffset) +{ + ASSERT_ERR((((uint16_t)txwinoffset << 0) & ~((uint16_t)0x0000FFFF)) == 0); + EM_BLE_WR(EM_BLE_TXWINOFFSET_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (uint16_t)txwinoffset << 0); +} + +/** + * @brief TXCCMPKTCNT0 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:00 TXCCMPKTCNT0 0x0 + *+ */ +#define EM_BLE_TXCCMPKTCNT0_ADDR (EXCHANGE_MEM_BASE+0x54 + EM_BLE_CS_OFFSET) +#define EM_BLE_TXCCMPKTCNT0_INDEX 0x0000002A +#define EM_BLE_TXCCMPKTCNT0_RESET 0x00000000 + +__INLINE uint16_t em_ble_txccmpktcnt0_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_TXCCMPKTCNT0_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); +} + +__INLINE void em_ble_txccmpktcnt0_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_TXCCMPKTCNT0_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, value); +} + +// field definitions +#define EM_BLE_TXCCMPKTCNT0_MASK ((uint16_t)0x0000FFFF) +#define EM_BLE_TXCCMPKTCNT0_LSB 0 +#define EM_BLE_TXCCMPKTCNT0_WIDTH ((uint16_t)0x00000010) + +#define EM_BLE_TXCCMPKTCNT0_RST 0x0 + +__INLINE uint16_t em_ble_txccmpktcnt0_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXCCMPKTCNT0_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + ASSERT_ERR((localVal & ~((uint16_t)0x0000FFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void em_ble_txccmpktcnt0_setf(int elt_idx, uint16_t txccmpktcnt0) +{ + ASSERT_ERR((((uint16_t)txccmpktcnt0 << 0) & ~((uint16_t)0x0000FFFF)) == 0); + EM_BLE_WR(EM_BLE_TXCCMPKTCNT0_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (uint16_t)txccmpktcnt0 << 0); +} + +/** + * @brief EXTADVSTAT register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 07 PREV_CTE 0 + * 06 PREV_PAM 0 + * 05 PREV_LAM 0 + * 04:03 PREV_ADV_MODE 0x0 + * 02:00 PREV_ADV_PKT_TYPE 0x0 + *+ */ +#define EM_BLE_EXTADVSTAT_ADDR (EXCHANGE_MEM_BASE+0x56 + EM_BLE_CS_OFFSET) +#define EM_BLE_EXTADVSTAT_INDEX 0x0000002B +#define EM_BLE_EXTADVSTAT_RESET 0x00000000 + +__INLINE uint16_t em_ble_extadvstat_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_EXTADVSTAT_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); +} + +__INLINE void em_ble_extadvstat_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_EXTADVSTAT_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, value); +} + +// field definitions +#define EM_BLE_PREV_CTE_BIT ((uint16_t)0x00000080) +#define EM_BLE_PREV_CTE_POS 7 +#define EM_BLE_PREV_PAM_BIT ((uint16_t)0x00000040) +#define EM_BLE_PREV_PAM_POS 6 +#define EM_BLE_PREV_LAM_BIT ((uint16_t)0x00000020) +#define EM_BLE_PREV_LAM_POS 5 +#define EM_BLE_PREV_ADV_MODE_MASK ((uint16_t)0x00000018) +#define EM_BLE_PREV_ADV_MODE_LSB 3 +#define EM_BLE_PREV_ADV_MODE_WIDTH ((uint16_t)0x00000002) +#define EM_BLE_PREV_ADV_PKT_TYPE_MASK ((uint16_t)0x00000007) +#define EM_BLE_PREV_ADV_PKT_TYPE_LSB 0 +#define EM_BLE_PREV_ADV_PKT_TYPE_WIDTH ((uint16_t)0x00000003) + +#define EM_BLE_PREV_CTE_RST 0x0 +#define EM_BLE_PREV_PAM_RST 0x0 +#define EM_BLE_PREV_LAM_RST 0x0 +#define EM_BLE_PREV_ADV_MODE_RST 0x0 +#define EM_BLE_PREV_ADV_PKT_TYPE_RST 0x0 + +__INLINE void em_ble_extadvstat_pack(int elt_idx, uint8_t prevcte, uint8_t prevpam, uint8_t prevlam, uint8_t prevadvmode, uint8_t prevadvpkttype) +{ + ASSERT_ERR((((uint16_t)prevcte << 7) & ~((uint16_t)0x00000080)) == 0); + ASSERT_ERR((((uint16_t)prevpam << 6) & ~((uint16_t)0x00000040)) == 0); + ASSERT_ERR((((uint16_t)prevlam << 5) & ~((uint16_t)0x00000020)) == 0); + ASSERT_ERR((((uint16_t)prevadvmode << 3) & ~((uint16_t)0x00000018)) == 0); + ASSERT_ERR((((uint16_t)prevadvpkttype << 0) & ~((uint16_t)0x00000007)) == 0); + EM_BLE_WR(EM_BLE_EXTADVSTAT_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, ((uint16_t)prevcte << 7) | ((uint16_t)prevpam << 6) | ((uint16_t)prevlam << 5) | ((uint16_t)prevadvmode << 3) | ((uint16_t)prevadvpkttype << 0)); +} + +__INLINE void em_ble_extadvstat_unpack(int elt_idx, uint8_t* prevcte, uint8_t* prevpam, uint8_t* prevlam, uint8_t* prevadvmode, uint8_t* prevadvpkttype) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_EXTADVSTAT_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + + *prevcte = (localVal & ((uint16_t)0x00000080)) >> 7; + *prevpam = (localVal & ((uint16_t)0x00000040)) >> 6; + *prevlam = (localVal & ((uint16_t)0x00000020)) >> 5; + *prevadvmode = (localVal & ((uint16_t)0x00000018)) >> 3; + *prevadvpkttype = (localVal & ((uint16_t)0x00000007)) >> 0; +} + +__INLINE uint8_t em_ble_extadvstat_prev_cte_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_EXTADVSTAT_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00000080)) >> 7); +} + +__INLINE void em_ble_extadvstat_prev_cte_setf(int elt_idx, uint8_t prevcte) +{ + ASSERT_ERR((((uint16_t)prevcte << 7) & ~((uint16_t)0x00000080)) == 0); + EM_BLE_WR(EM_BLE_EXTADVSTAT_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_EXTADVSTAT_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00000080)) | ((uint16_t)prevcte << 7)); +} + +__INLINE uint8_t em_ble_extadvstat_prev_pam_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_EXTADVSTAT_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00000040)) >> 6); +} + +__INLINE void em_ble_extadvstat_prev_pam_setf(int elt_idx, uint8_t prevpam) +{ + ASSERT_ERR((((uint16_t)prevpam << 6) & ~((uint16_t)0x00000040)) == 0); + EM_BLE_WR(EM_BLE_EXTADVSTAT_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_EXTADVSTAT_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00000040)) | ((uint16_t)prevpam << 6)); +} + +__INLINE uint8_t em_ble_extadvstat_prev_lam_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_EXTADVSTAT_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00000020)) >> 5); +} + +__INLINE void em_ble_extadvstat_prev_lam_setf(int elt_idx, uint8_t prevlam) +{ + ASSERT_ERR((((uint16_t)prevlam << 5) & ~((uint16_t)0x00000020)) == 0); + EM_BLE_WR(EM_BLE_EXTADVSTAT_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_EXTADVSTAT_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00000020)) | ((uint16_t)prevlam << 5)); +} + +__INLINE uint8_t em_ble_extadvstat_prev_adv_mode_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_EXTADVSTAT_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00000018)) >> 3); +} + +__INLINE void em_ble_extadvstat_prev_adv_mode_setf(int elt_idx, uint8_t prevadvmode) +{ + ASSERT_ERR((((uint16_t)prevadvmode << 3) & ~((uint16_t)0x00000018)) == 0); + EM_BLE_WR(EM_BLE_EXTADVSTAT_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_EXTADVSTAT_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00000018)) | ((uint16_t)prevadvmode << 3)); +} + +__INLINE uint8_t em_ble_extadvstat_prev_adv_pkt_type_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_EXTADVSTAT_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00000007)) >> 0); +} + +__INLINE void em_ble_extadvstat_prev_adv_pkt_type_setf(int elt_idx, uint8_t prevadvpkttype) +{ + ASSERT_ERR((((uint16_t)prevadvpkttype << 0) & ~((uint16_t)0x00000007)) == 0); + EM_BLE_WR(EM_BLE_EXTADVSTAT_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_EXTADVSTAT_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00000007)) | ((uint16_t)prevadvpkttype << 0)); +} + +/** + * @brief TXCCMPKTCNT1 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:00 TXCCMPKTCNT1 0x0 + *+ */ +#define EM_BLE_TXCCMPKTCNT1_ADDR (EXCHANGE_MEM_BASE+0x56 + EM_BLE_CS_OFFSET) +#define EM_BLE_TXCCMPKTCNT1_INDEX 0x0000002B +#define EM_BLE_TXCCMPKTCNT1_RESET 0x00000000 + +__INLINE uint16_t em_ble_txccmpktcnt1_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_TXCCMPKTCNT1_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); +} + +__INLINE void em_ble_txccmpktcnt1_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_TXCCMPKTCNT1_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, value); +} + +// field definitions +#define EM_BLE_TXCCMPKTCNT1_MASK ((uint16_t)0x0000FFFF) +#define EM_BLE_TXCCMPKTCNT1_LSB 0 +#define EM_BLE_TXCCMPKTCNT1_WIDTH ((uint16_t)0x00000010) + +#define EM_BLE_TXCCMPKTCNT1_RST 0x0 + +__INLINE uint16_t em_ble_txccmpktcnt1_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXCCMPKTCNT1_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + ASSERT_ERR((localVal & ~((uint16_t)0x0000FFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void em_ble_txccmpktcnt1_setf(int elt_idx, uint16_t txccmpktcnt1) +{ + ASSERT_ERR((((uint16_t)txccmpktcnt1 << 0) & ~((uint16_t)0x0000FFFF)) == 0); + EM_BLE_WR(EM_BLE_TXCCMPKTCNT1_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (uint16_t)txccmpktcnt1 << 0); +} + +/** + * @brief TXCCMPKTCNT2 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 06:00 TXCCMPKTCNT2 0x0 + *+ */ +#define EM_BLE_TXCCMPKTCNT2_ADDR (EXCHANGE_MEM_BASE+0x58 + EM_BLE_CS_OFFSET) +#define EM_BLE_TXCCMPKTCNT2_INDEX 0x0000002C +#define EM_BLE_TXCCMPKTCNT2_RESET 0x00000000 + +__INLINE uint16_t em_ble_txccmpktcnt2_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_TXCCMPKTCNT2_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); +} + +__INLINE void em_ble_txccmpktcnt2_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_TXCCMPKTCNT2_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, value); +} + +// field definitions +#define EM_BLE_TXCCMPKTCNT2_MASK ((uint16_t)0x0000007F) +#define EM_BLE_TXCCMPKTCNT2_LSB 0 +#define EM_BLE_TXCCMPKTCNT2_WIDTH ((uint16_t)0x00000007) + +#define EM_BLE_TXCCMPKTCNT2_RST 0x0 + +__INLINE uint8_t em_ble_txccmpktcnt2_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXCCMPKTCNT2_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + ASSERT_ERR((localVal & ~((uint16_t)0x0000007F)) == 0); + return (localVal >> 0); +} + +__INLINE void em_ble_txccmpktcnt2_setf(int elt_idx, uint8_t txccmpktcnt2) +{ + ASSERT_ERR((((uint16_t)txccmpktcnt2 << 0) & ~((uint16_t)0x0000007F)) == 0); + EM_BLE_WR(EM_BLE_TXCCMPKTCNT2_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (uint16_t)txccmpktcnt2 << 0); +} + +/** + * @brief RXCCMPKTCNT0 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:00 RXCCMPKTCNT0 0x0 + *+ */ +#define EM_BLE_RXCCMPKTCNT0_ADDR (EXCHANGE_MEM_BASE+0x5A + EM_BLE_CS_OFFSET) +#define EM_BLE_RXCCMPKTCNT0_INDEX 0x0000002D +#define EM_BLE_RXCCMPKTCNT0_RESET 0x00000000 + +__INLINE uint16_t em_ble_rxccmpktcnt0_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_RXCCMPKTCNT0_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); +} + +__INLINE void em_ble_rxccmpktcnt0_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_RXCCMPKTCNT0_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, value); +} + +// field definitions +#define EM_BLE_RXCCMPKTCNT0_MASK ((uint16_t)0x0000FFFF) +#define EM_BLE_RXCCMPKTCNT0_LSB 0 +#define EM_BLE_RXCCMPKTCNT0_WIDTH ((uint16_t)0x00000010) + +#define EM_BLE_RXCCMPKTCNT0_RST 0x0 + +__INLINE uint16_t em_ble_rxccmpktcnt0_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXCCMPKTCNT0_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + ASSERT_ERR((localVal & ~((uint16_t)0x0000FFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void em_ble_rxccmpktcnt0_setf(int elt_idx, uint16_t rxccmpktcnt0) +{ + ASSERT_ERR((((uint16_t)rxccmpktcnt0 << 0) & ~((uint16_t)0x0000FFFF)) == 0); + EM_BLE_WR(EM_BLE_RXCCMPKTCNT0_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (uint16_t)rxccmpktcnt0 << 0); +} + +/** + * @brief RXCCMPKTCNT1 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:00 RXCCMPKTCNT1 0x0 + *+ */ +#define EM_BLE_RXCCMPKTCNT1_ADDR (EXCHANGE_MEM_BASE+0x5C + EM_BLE_CS_OFFSET) +#define EM_BLE_RXCCMPKTCNT1_INDEX 0x0000002E +#define EM_BLE_RXCCMPKTCNT1_RESET 0x00000000 + +__INLINE uint16_t em_ble_rxccmpktcnt1_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_RXCCMPKTCNT1_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); +} + +__INLINE void em_ble_rxccmpktcnt1_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_RXCCMPKTCNT1_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, value); +} + +// field definitions +#define EM_BLE_RXCCMPKTCNT1_MASK ((uint16_t)0x0000FFFF) +#define EM_BLE_RXCCMPKTCNT1_LSB 0 +#define EM_BLE_RXCCMPKTCNT1_WIDTH ((uint16_t)0x00000010) + +#define EM_BLE_RXCCMPKTCNT1_RST 0x0 + +__INLINE uint16_t em_ble_rxccmpktcnt1_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXCCMPKTCNT1_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + ASSERT_ERR((localVal & ~((uint16_t)0x0000FFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void em_ble_rxccmpktcnt1_setf(int elt_idx, uint16_t rxccmpktcnt1) +{ + ASSERT_ERR((((uint16_t)rxccmpktcnt1 << 0) & ~((uint16_t)0x0000FFFF)) == 0); + EM_BLE_WR(EM_BLE_RXCCMPKTCNT1_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (uint16_t)rxccmpktcnt1 << 0); +} + +/** + * @brief RXCCMPKTCNT2 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 06:00 RXCCMPKTCNT2 0x0 + *+ */ +#define EM_BLE_RXCCMPKTCNT2_ADDR (EXCHANGE_MEM_BASE+0x5E + EM_BLE_CS_OFFSET) +#define EM_BLE_RXCCMPKTCNT2_INDEX 0x0000002F +#define EM_BLE_RXCCMPKTCNT2_RESET 0x00000000 + +__INLINE uint16_t em_ble_rxccmpktcnt2_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_RXCCMPKTCNT2_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); +} + +__INLINE void em_ble_rxccmpktcnt2_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_RXCCMPKTCNT2_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, value); +} + +// field definitions +#define EM_BLE_RXCCMPKTCNT2_MASK ((uint16_t)0x0000007F) +#define EM_BLE_RXCCMPKTCNT2_LSB 0 +#define EM_BLE_RXCCMPKTCNT2_WIDTH ((uint16_t)0x00000007) + +#define EM_BLE_RXCCMPKTCNT2_RST 0x0 + +__INLINE uint8_t em_ble_rxccmpktcnt2_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXCCMPKTCNT2_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + ASSERT_ERR((localVal & ~((uint16_t)0x0000007F)) == 0); + return (localVal >> 0); +} + +__INLINE void em_ble_rxccmpktcnt2_setf(int elt_idx, uint8_t rxccmpktcnt2) +{ + ASSERT_ERR((((uint16_t)rxccmpktcnt2 << 0) & ~((uint16_t)0x0000007F)) == 0); + EM_BLE_WR(EM_BLE_RXCCMPKTCNT2_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (uint16_t)rxccmpktcnt2 << 0); +} + +/** + * @brief EVTCNT register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:00 EVTCNT 0x0 + *+ */ +#define EM_BLE_EVTCNT_ADDR (EXCHANGE_MEM_BASE+0x60 + EM_BLE_CS_OFFSET) +#define EM_BLE_EVTCNT_INDEX 0x00000030 +#define EM_BLE_EVTCNT_RESET 0x00000000 + +__INLINE uint16_t em_ble_evtcnt_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_EVTCNT_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); +} + +__INLINE void em_ble_evtcnt_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_EVTCNT_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, value); +} + +// field definitions +#define EM_BLE_EVTCNT_MASK ((uint16_t)0x0000FFFF) +#define EM_BLE_EVTCNT_LSB 0 +#define EM_BLE_EVTCNT_WIDTH ((uint16_t)0x00000010) + +#define EM_BLE_EVTCNT_RST 0x0 + +__INLINE uint16_t em_ble_evtcnt_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_EVTCNT_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + ASSERT_ERR((localVal & ~((uint16_t)0x0000FFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void em_ble_evtcnt_setf(int elt_idx, uint16_t evtcnt) +{ + ASSERT_ERR((((uint16_t)evtcnt << 0) & ~((uint16_t)0x0000FFFF)) == 0); + EM_BLE_WR(EM_BLE_EVTCNT_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (uint16_t)evtcnt << 0); +} + +/** + * @brief EVTCNT_OFFSET0 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:00 EVTCNT_OFFSET0 0x0 + *+ */ +#define EM_BLE_EVTCNT_OFFSET0_ADDR (EXCHANGE_MEM_BASE+0x62 + EM_BLE_CS_OFFSET) +#define EM_BLE_EVTCNT_OFFSET0_INDEX 0x00000031 +#define EM_BLE_EVTCNT_OFFSET0_RESET 0x00000000 + +__INLINE uint16_t em_ble_evtcnt_offset0_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_EVTCNT_OFFSET0_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); +} + +__INLINE void em_ble_evtcnt_offset0_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_EVTCNT_OFFSET0_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, value); +} + +// field definitions +#define EM_BLE_EVTCNT_OFFSET0_MASK ((uint16_t)0x0000FFFF) +#define EM_BLE_EVTCNT_OFFSET0_LSB 0 +#define EM_BLE_EVTCNT_OFFSET0_WIDTH ((uint16_t)0x00000010) + +#define EM_BLE_EVTCNT_OFFSET0_RST 0x0 + +__INLINE uint16_t em_ble_evtcnt_offset0_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_EVTCNT_OFFSET0_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + ASSERT_ERR((localVal & ~((uint16_t)0x0000FFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void em_ble_evtcnt_offset0_setf(int elt_idx, uint16_t evtcntoffset0) +{ + ASSERT_ERR((((uint16_t)evtcntoffset0 << 0) & ~((uint16_t)0x0000FFFF)) == 0); + EM_BLE_WR(EM_BLE_EVTCNT_OFFSET0_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (uint16_t)evtcntoffset0 << 0); +} + +/** + * @brief EVTCNT_OFFSET1 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:00 EVTCNT_OFFSET1 0x0 + *+ */ +#define EM_BLE_EVTCNT_OFFSET1_ADDR (EXCHANGE_MEM_BASE+0x64 + EM_BLE_CS_OFFSET) +#define EM_BLE_EVTCNT_OFFSET1_INDEX 0x00000032 +#define EM_BLE_EVTCNT_OFFSET1_RESET 0x00000000 + +__INLINE uint16_t em_ble_evtcnt_offset1_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_EVTCNT_OFFSET1_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); +} + +__INLINE void em_ble_evtcnt_offset1_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_EVTCNT_OFFSET1_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, value); +} + +// field definitions +#define EM_BLE_EVTCNT_OFFSET1_MASK ((uint16_t)0x0000FFFF) +#define EM_BLE_EVTCNT_OFFSET1_LSB 0 +#define EM_BLE_EVTCNT_OFFSET1_WIDTH ((uint16_t)0x00000010) + +#define EM_BLE_EVTCNT_OFFSET1_RST 0x0 + +__INLINE uint16_t em_ble_evtcnt_offset1_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_EVTCNT_OFFSET1_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + ASSERT_ERR((localVal & ~((uint16_t)0x0000FFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void em_ble_evtcnt_offset1_setf(int elt_idx, uint16_t evtcntoffset1) +{ + ASSERT_ERR((((uint16_t)evtcntoffset1 << 0) & ~((uint16_t)0x0000FFFF)) == 0); + EM_BLE_WR(EM_BLE_EVTCNT_OFFSET1_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (uint16_t)evtcntoffset1 << 0); +} + +/** + * @brief EVTCNT_OFFSET2 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 06:00 EVTCNT_OFFSET2 0x0 + *+ */ +#define EM_BLE_EVTCNT_OFFSET2_ADDR (EXCHANGE_MEM_BASE+0x66 + EM_BLE_CS_OFFSET) +#define EM_BLE_EVTCNT_OFFSET2_INDEX 0x00000033 +#define EM_BLE_EVTCNT_OFFSET2_RESET 0x00000000 + +__INLINE uint16_t em_ble_evtcnt_offset2_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_EVTCNT_OFFSET2_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); +} + +__INLINE void em_ble_evtcnt_offset2_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_EVTCNT_OFFSET2_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, value); +} + +// field definitions +#define EM_BLE_EVTCNT_OFFSET2_MASK ((uint16_t)0x0000007F) +#define EM_BLE_EVTCNT_OFFSET2_LSB 0 +#define EM_BLE_EVTCNT_OFFSET2_WIDTH ((uint16_t)0x00000007) + +#define EM_BLE_EVTCNT_OFFSET2_RST 0x0 + +__INLINE uint8_t em_ble_evtcnt_offset2_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_EVTCNT_OFFSET2_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + ASSERT_ERR((localVal & ~((uint16_t)0x0000007F)) == 0); + return (localVal >> 0); +} + +__INLINE void em_ble_evtcnt_offset2_setf(int elt_idx, uint8_t evtcntoffset2) +{ + ASSERT_ERR((((uint16_t)evtcntoffset2 << 0) & ~((uint16_t)0x0000007F)) == 0); + EM_BLE_WR(EM_BLE_EVTCNT_OFFSET2_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (uint16_t)evtcntoffset2 << 0); +} + +/** + * @brief ISOEVTCNTL register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:08 FLUSHCNT 0x0 + * 07:00 SUBEVTCNT 0x0 + *+ */ +#define EM_BLE_ISOEVTCNTL_ADDR (EXCHANGE_MEM_BASE+0x68 + EM_BLE_CS_OFFSET) +#define EM_BLE_ISOEVTCNTL_INDEX 0x00000034 +#define EM_BLE_ISOEVTCNTL_RESET 0x00000000 + +__INLINE uint16_t em_ble_isoevtcntl_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_ISOEVTCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); +} + +__INLINE void em_ble_isoevtcntl_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_ISOEVTCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, value); +} + +// field definitions +#define EM_BLE_FLUSHCNT_MASK ((uint16_t)0x0000FF00) +#define EM_BLE_FLUSHCNT_LSB 8 +#define EM_BLE_FLUSHCNT_WIDTH ((uint16_t)0x00000008) +#define EM_BLE_SUBEVTCNT_MASK ((uint16_t)0x000000FF) +#define EM_BLE_SUBEVTCNT_LSB 0 +#define EM_BLE_SUBEVTCNT_WIDTH ((uint16_t)0x00000008) + +#define EM_BLE_FLUSHCNT_RST 0x0 +#define EM_BLE_SUBEVTCNT_RST 0x0 + +__INLINE void em_ble_isoevtcntl_pack(int elt_idx, uint8_t flushcnt, uint8_t subevtcnt) +{ + ASSERT_ERR((((uint16_t)flushcnt << 8) & ~((uint16_t)0x0000FF00)) == 0); + ASSERT_ERR((((uint16_t)subevtcnt << 0) & ~((uint16_t)0x000000FF)) == 0); + EM_BLE_WR(EM_BLE_ISOEVTCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, ((uint16_t)flushcnt << 8) | ((uint16_t)subevtcnt << 0)); +} + +__INLINE void em_ble_isoevtcntl_unpack(int elt_idx, uint8_t* flushcnt, uint8_t* subevtcnt) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_ISOEVTCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + + *flushcnt = (localVal & ((uint16_t)0x0000FF00)) >> 8; + *subevtcnt = (localVal & ((uint16_t)0x000000FF)) >> 0; +} + +__INLINE uint8_t em_ble_isoevtcntl_flushcnt_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_ISOEVTCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x0000FF00)) >> 8); +} + +__INLINE void em_ble_isoevtcntl_flushcnt_setf(int elt_idx, uint8_t flushcnt) +{ + ASSERT_ERR((((uint16_t)flushcnt << 8) & ~((uint16_t)0x0000FF00)) == 0); + EM_BLE_WR(EM_BLE_ISOEVTCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_ISOEVTCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x0000FF00)) | ((uint16_t)flushcnt << 8)); +} + +__INLINE uint8_t em_ble_isoevtcntl_subevtcnt_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_ISOEVTCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x000000FF)) >> 0); +} + +__INLINE void em_ble_isoevtcntl_subevtcnt_setf(int elt_idx, uint8_t subevtcnt) +{ + ASSERT_ERR((((uint16_t)subevtcnt << 0) & ~((uint16_t)0x000000FF)) == 0); + EM_BLE_WR(EM_BLE_ISOEVTCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_ISOEVTCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x000000FF)) | ((uint16_t)subevtcnt << 0)); +} + +/** + * @brief ISOTXRXCNTL register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15 ISORXBUFF_FULL 0 + * 14 ISOLASTEMPTY 0 + * 13 ISOMD 0 + * 12 ISOSN 0 + * 11 ISONESN 0 + * 09 ISORETX 0 + * 08 ISORSVD 0 + * 03 ISOWAITACK 0 + * 02 ISOLASTMD 0 + * 01 ISOLASTNESN 0 + * 00 ISOLASTSN 0 + *+ */ +#define EM_BLE_ISOTXRXCNTL_ADDR (EXCHANGE_MEM_BASE+0x6A + EM_BLE_CS_OFFSET) +#define EM_BLE_ISOTXRXCNTL_INDEX 0x00000035 +#define EM_BLE_ISOTXRXCNTL_RESET 0x00000000 + +__INLINE uint16_t em_ble_isotxrxcntl_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_ISOTXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); +} + +__INLINE void em_ble_isotxrxcntl_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_ISOTXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, value); +} + +// field definitions +#define EM_BLE_ISORXBUFF_FULL_BIT ((uint16_t)0x00008000) +#define EM_BLE_ISORXBUFF_FULL_POS 15 +#define EM_BLE_ISOLASTEMPTY_BIT ((uint16_t)0x00004000) +#define EM_BLE_ISOLASTEMPTY_POS 14 +#define EM_BLE_ISOMD_BIT ((uint16_t)0x00002000) +#define EM_BLE_ISOMD_POS 13 +#define EM_BLE_ISOSN_BIT ((uint16_t)0x00001000) +#define EM_BLE_ISOSN_POS 12 +#define EM_BLE_ISONESN_BIT ((uint16_t)0x00000800) +#define EM_BLE_ISONESN_POS 11 +#define EM_BLE_ISORETX_BIT ((uint16_t)0x00000200) +#define EM_BLE_ISORETX_POS 9 +#define EM_BLE_ISORSVD_BIT ((uint16_t)0x00000100) +#define EM_BLE_ISORSVD_POS 8 +#define EM_BLE_ISOWAITACK_BIT ((uint16_t)0x00000008) +#define EM_BLE_ISOWAITACK_POS 3 +#define EM_BLE_ISOLASTMD_BIT ((uint16_t)0x00000004) +#define EM_BLE_ISOLASTMD_POS 2 +#define EM_BLE_ISOLASTNESN_BIT ((uint16_t)0x00000002) +#define EM_BLE_ISOLASTNESN_POS 1 +#define EM_BLE_ISOLASTSN_BIT ((uint16_t)0x00000001) +#define EM_BLE_ISOLASTSN_POS 0 + +#define EM_BLE_ISORXBUFF_FULL_RST 0x0 +#define EM_BLE_ISOLASTEMPTY_RST 0x0 +#define EM_BLE_ISOMD_RST 0x0 +#define EM_BLE_ISOSN_RST 0x0 +#define EM_BLE_ISONESN_RST 0x0 +#define EM_BLE_ISORETX_RST 0x0 +#define EM_BLE_ISORSVD_RST 0x0 +#define EM_BLE_ISOWAITACK_RST 0x0 +#define EM_BLE_ISOLASTMD_RST 0x0 +#define EM_BLE_ISOLASTNESN_RST 0x0 +#define EM_BLE_ISOLASTSN_RST 0x0 + +__INLINE void em_ble_isotxrxcntl_pack(int elt_idx, uint8_t isorxbufffull, uint8_t isolastempty, uint8_t isomd, uint8_t isosn, uint8_t isonesn, uint8_t isoretx, uint8_t isorsvd, uint8_t isowaitack, uint8_t isolastmd, uint8_t isolastnesn, uint8_t isolastsn) +{ + ASSERT_ERR((((uint16_t)isorxbufffull << 15) & ~((uint16_t)0x00008000)) == 0); + ASSERT_ERR((((uint16_t)isolastempty << 14) & ~((uint16_t)0x00004000)) == 0); + ASSERT_ERR((((uint16_t)isomd << 13) & ~((uint16_t)0x00002000)) == 0); + ASSERT_ERR((((uint16_t)isosn << 12) & ~((uint16_t)0x00001000)) == 0); + ASSERT_ERR((((uint16_t)isonesn << 11) & ~((uint16_t)0x00000800)) == 0); + ASSERT_ERR((((uint16_t)isoretx << 9) & ~((uint16_t)0x00000200)) == 0); + ASSERT_ERR((((uint16_t)isorsvd << 8) & ~((uint16_t)0x00000100)) == 0); + ASSERT_ERR((((uint16_t)isowaitack << 3) & ~((uint16_t)0x00000008)) == 0); + ASSERT_ERR((((uint16_t)isolastmd << 2) & ~((uint16_t)0x00000004)) == 0); + ASSERT_ERR((((uint16_t)isolastnesn << 1) & ~((uint16_t)0x00000002)) == 0); + ASSERT_ERR((((uint16_t)isolastsn << 0) & ~((uint16_t)0x00000001)) == 0); + EM_BLE_WR(EM_BLE_ISOTXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, ((uint16_t)isorxbufffull << 15) | ((uint16_t)isolastempty << 14) | ((uint16_t)isomd << 13) | ((uint16_t)isosn << 12) | ((uint16_t)isonesn << 11) | ((uint16_t)isoretx << 9) | ((uint16_t)isorsvd << 8) | ((uint16_t)isowaitack << 3) | ((uint16_t)isolastmd << 2) | ((uint16_t)isolastnesn << 1) | ((uint16_t)isolastsn << 0)); +} + +__INLINE void em_ble_isotxrxcntl_unpack(int elt_idx, uint8_t* isorxbufffull, uint8_t* isolastempty, uint8_t* isomd, uint8_t* isosn, uint8_t* isonesn, uint8_t* isoretx, uint8_t* isorsvd, uint8_t* isowaitack, uint8_t* isolastmd, uint8_t* isolastnesn, uint8_t* isolastsn) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_ISOTXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + + *isorxbufffull = (localVal & ((uint16_t)0x00008000)) >> 15; + *isolastempty = (localVal & ((uint16_t)0x00004000)) >> 14; + *isomd = (localVal & ((uint16_t)0x00002000)) >> 13; + *isosn = (localVal & ((uint16_t)0x00001000)) >> 12; + *isonesn = (localVal & ((uint16_t)0x00000800)) >> 11; + *isoretx = (localVal & ((uint16_t)0x00000200)) >> 9; + *isorsvd = (localVal & ((uint16_t)0x00000100)) >> 8; + *isowaitack = (localVal & ((uint16_t)0x00000008)) >> 3; + *isolastmd = (localVal & ((uint16_t)0x00000004)) >> 2; + *isolastnesn = (localVal & ((uint16_t)0x00000002)) >> 1; + *isolastsn = (localVal & ((uint16_t)0x00000001)) >> 0; +} + +__INLINE uint8_t em_ble_isotxrxcntl_isorxbuff_full_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_ISOTXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00008000)) >> 15); +} + +__INLINE void em_ble_isotxrxcntl_isorxbuff_full_setf(int elt_idx, uint8_t isorxbufffull) +{ + ASSERT_ERR((((uint16_t)isorxbufffull << 15) & ~((uint16_t)0x00008000)) == 0); + EM_BLE_WR(EM_BLE_ISOTXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_ISOTXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00008000)) | ((uint16_t)isorxbufffull << 15)); +} + +__INLINE uint8_t em_ble_isotxrxcntl_isolastempty_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_ISOTXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00004000)) >> 14); +} + +__INLINE void em_ble_isotxrxcntl_isolastempty_setf(int elt_idx, uint8_t isolastempty) +{ + ASSERT_ERR((((uint16_t)isolastempty << 14) & ~((uint16_t)0x00004000)) == 0); + EM_BLE_WR(EM_BLE_ISOTXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_ISOTXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00004000)) | ((uint16_t)isolastempty << 14)); +} + +__INLINE uint8_t em_ble_isotxrxcntl_isomd_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_ISOTXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00002000)) >> 13); +} + +__INLINE void em_ble_isotxrxcntl_isomd_setf(int elt_idx, uint8_t isomd) +{ + ASSERT_ERR((((uint16_t)isomd << 13) & ~((uint16_t)0x00002000)) == 0); + EM_BLE_WR(EM_BLE_ISOTXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_ISOTXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00002000)) | ((uint16_t)isomd << 13)); +} + +__INLINE uint8_t em_ble_isotxrxcntl_isosn_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_ISOTXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00001000)) >> 12); +} + +__INLINE void em_ble_isotxrxcntl_isosn_setf(int elt_idx, uint8_t isosn) +{ + ASSERT_ERR((((uint16_t)isosn << 12) & ~((uint16_t)0x00001000)) == 0); + EM_BLE_WR(EM_BLE_ISOTXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_ISOTXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00001000)) | ((uint16_t)isosn << 12)); +} + +__INLINE uint8_t em_ble_isotxrxcntl_isonesn_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_ISOTXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00000800)) >> 11); +} + +__INLINE void em_ble_isotxrxcntl_isonesn_setf(int elt_idx, uint8_t isonesn) +{ + ASSERT_ERR((((uint16_t)isonesn << 11) & ~((uint16_t)0x00000800)) == 0); + EM_BLE_WR(EM_BLE_ISOTXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_ISOTXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00000800)) | ((uint16_t)isonesn << 11)); +} + +__INLINE uint8_t em_ble_isotxrxcntl_isoretx_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_ISOTXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00000200)) >> 9); +} + +__INLINE void em_ble_isotxrxcntl_isoretx_setf(int elt_idx, uint8_t isoretx) +{ + ASSERT_ERR((((uint16_t)isoretx << 9) & ~((uint16_t)0x00000200)) == 0); + EM_BLE_WR(EM_BLE_ISOTXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_ISOTXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00000200)) | ((uint16_t)isoretx << 9)); +} + +__INLINE uint8_t em_ble_isotxrxcntl_isorsvd_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_ISOTXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00000100)) >> 8); +} + +__INLINE void em_ble_isotxrxcntl_isorsvd_setf(int elt_idx, uint8_t isorsvd) +{ + ASSERT_ERR((((uint16_t)isorsvd << 8) & ~((uint16_t)0x00000100)) == 0); + EM_BLE_WR(EM_BLE_ISOTXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_ISOTXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00000100)) | ((uint16_t)isorsvd << 8)); +} + +__INLINE uint8_t em_ble_isotxrxcntl_isowaitack_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_ISOTXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00000008)) >> 3); +} + +__INLINE void em_ble_isotxrxcntl_isowaitack_setf(int elt_idx, uint8_t isowaitack) +{ + ASSERT_ERR((((uint16_t)isowaitack << 3) & ~((uint16_t)0x00000008)) == 0); + EM_BLE_WR(EM_BLE_ISOTXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_ISOTXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00000008)) | ((uint16_t)isowaitack << 3)); +} + +__INLINE uint8_t em_ble_isotxrxcntl_isolastmd_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_ISOTXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00000004)) >> 2); +} + +__INLINE void em_ble_isotxrxcntl_isolastmd_setf(int elt_idx, uint8_t isolastmd) +{ + ASSERT_ERR((((uint16_t)isolastmd << 2) & ~((uint16_t)0x00000004)) == 0); + EM_BLE_WR(EM_BLE_ISOTXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_ISOTXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00000004)) | ((uint16_t)isolastmd << 2)); +} + +__INLINE uint8_t em_ble_isotxrxcntl_isolastnesn_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_ISOTXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00000002)) >> 1); +} + +__INLINE void em_ble_isotxrxcntl_isolastnesn_setf(int elt_idx, uint8_t isolastnesn) +{ + ASSERT_ERR((((uint16_t)isolastnesn << 1) & ~((uint16_t)0x00000002)) == 0); + EM_BLE_WR(EM_BLE_ISOTXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_ISOTXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00000002)) | ((uint16_t)isolastnesn << 1)); +} + +__INLINE uint8_t em_ble_isotxrxcntl_isolastsn_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_ISOTXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x00000001)) >> 0); +} + +__INLINE void em_ble_isotxrxcntl_isolastsn_setf(int elt_idx, uint8_t isolastsn) +{ + ASSERT_ERR((((uint16_t)isolastsn << 0) & ~((uint16_t)0x00000001)) == 0); + EM_BLE_WR(EM_BLE_ISOTXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE, (EM_BLE_RD(EM_BLE_ISOTXRXCNTL_ADDR + elt_idx * REG_EM_BLE_CS_SIZE) & ~((uint16_t)0x00000001)) | ((uint16_t)isolastsn << 0)); +} + +/** + * @brief TXRXDESCCNT register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:08 ACLRXDESCCNT 0x0 + * 07:00 ACLTXDESCCNT 0x0 + *+ */ +#define EM_BLE_TXRXDESCCNT_ADDR (EXCHANGE_MEM_BASE+0x6C + EM_BLE_CS_OFFSET) +#define EM_BLE_TXRXDESCCNT_INDEX 0x00000036 +#define EM_BLE_TXRXDESCCNT_RESET 0x00000000 + +__INLINE uint16_t em_ble_txrxdesccnt_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_TXRXDESCCNT_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); +} + +// field definitions +#define EM_BLE_ACLRXDESCCNT_MASK ((uint16_t)0x0000FF00) +#define EM_BLE_ACLRXDESCCNT_LSB 8 +#define EM_BLE_ACLRXDESCCNT_WIDTH ((uint16_t)0x00000008) +#define EM_BLE_ACLTXDESCCNT_MASK ((uint16_t)0x000000FF) +#define EM_BLE_ACLTXDESCCNT_LSB 0 +#define EM_BLE_ACLTXDESCCNT_WIDTH ((uint16_t)0x00000008) + +#define EM_BLE_ACLRXDESCCNT_RST 0x0 +#define EM_BLE_ACLTXDESCCNT_RST 0x0 + +__INLINE void em_ble_txrxdesccnt_unpack(int elt_idx, uint8_t* aclrxdesccnt, uint8_t* acltxdesccnt) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXRXDESCCNT_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + + *aclrxdesccnt = (localVal & ((uint16_t)0x0000FF00)) >> 8; + *acltxdesccnt = (localVal & ((uint16_t)0x000000FF)) >> 0; +} + +__INLINE uint8_t em_ble_txrxdesccnt_aclrxdesccnt_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXRXDESCCNT_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x0000FF00)) >> 8); +} + +__INLINE uint8_t em_ble_txrxdesccnt_acltxdesccnt_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXRXDESCCNT_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x000000FF)) >> 0); +} + +/** + * @brief ISOTXRXPKTCNT register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:08 ISORXPKTCNTL 0x0 + * 07:00 ISOTXPKTCNTL 0x0 + *+ */ +#define EM_BLE_ISOTXRXPKTCNT_ADDR (EXCHANGE_MEM_BASE+0x6E + EM_BLE_CS_OFFSET) +#define EM_BLE_ISOTXRXPKTCNT_INDEX 0x00000037 +#define EM_BLE_ISOTXRXPKTCNT_RESET 0x00000000 + +__INLINE uint16_t em_ble_isotxrxpktcnt_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_ISOTXRXPKTCNT_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); +} + +// field definitions +#define EM_BLE_ISORXPKTCNTL_MASK ((uint16_t)0x0000FF00) +#define EM_BLE_ISORXPKTCNTL_LSB 8 +#define EM_BLE_ISORXPKTCNTL_WIDTH ((uint16_t)0x00000008) +#define EM_BLE_ISOTXPKTCNTL_MASK ((uint16_t)0x000000FF) +#define EM_BLE_ISOTXPKTCNTL_LSB 0 +#define EM_BLE_ISOTXPKTCNTL_WIDTH ((uint16_t)0x00000008) + +#define EM_BLE_ISORXPKTCNTL_RST 0x0 +#define EM_BLE_ISOTXPKTCNTL_RST 0x0 + +__INLINE void em_ble_isotxrxpktcnt_unpack(int elt_idx, uint8_t* isorxpktcntl, uint8_t* isotxpktcntl) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_ISOTXRXPKTCNT_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + + *isorxpktcntl = (localVal & ((uint16_t)0x0000FF00)) >> 8; + *isotxpktcntl = (localVal & ((uint16_t)0x000000FF)) >> 0; +} + +__INLINE uint8_t em_ble_isotxrxpktcnt_isorxpktcntl_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_ISOTXRXPKTCNT_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x0000FF00)) >> 8); +} + +__INLINE uint8_t em_ble_isotxrxpktcnt_isotxpktcntl_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_ISOTXRXPKTCNT_ADDR + elt_idx * REG_EM_BLE_CS_SIZE); + return ((localVal & ((uint16_t)0x000000FF)) >> 0); +} + + +#endif // _REG_EM_BLE_CS_H_ + diff --git a/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Nationstech/ble_library/ns_ble_stack/rfinit/api/reg_em_ble_ral.h b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Nationstech/ble_library/ns_ble_stack/rfinit/api/reg_em_ble_ral.h new file mode 100644 index 0000000..4a7c0c6 --- /dev/null +++ b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Nationstech/ble_library/ns_ble_stack/rfinit/api/reg_em_ble_ral.h @@ -0,0 +1,547 @@ +#ifndef _REG_EM_BLE_RAL_H_ +#define _REG_EM_BLE_RAL_H_ + +#include
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15 ENTRY_VALID 0 + * 14 CONNECTED 0 + * 13 IN_WHLIST 0 + * 12 IN_PERADV_LIST 0 + * 11 PEF 0 + * 07 LOCAL_RPA_VALID 0 + * 06 LOCAL_RPA_RENEW 0 + * 05 LOCAL_IRK_VALID 0 + * 03 PEER_RPA_VALID 0 + * 02 PEER_RPA_RENEW 0 + * 01 PEER_IRK_VALID 0 + * 00 PEER_ID_TYPE 0 + *+ */ +#define EM_BLE_RAL_INFO_ADDR (EXCHANGE_MEM_BASE + EM_BLE_RAL_OFFSET) +#define EM_BLE_RAL_INFO_INDEX 0x00000000 +#define EM_BLE_RAL_INFO_RESET 0x00000000 + +__INLINE uint16_t em_ble_ral_info_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_RAL_INFO_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE); +} + +__INLINE void em_ble_ral_info_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_RAL_INFO_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE, value); +} + +// field definitions +#define EM_BLE_ENTRY_VALID_BIT ((uint16_t)0x00008000) +#define EM_BLE_ENTRY_VALID_POS 15 +#define EM_BLE_CONNECTED_BIT ((uint16_t)0x00004000) +#define EM_BLE_CONNECTED_POS 14 +#define EM_BLE_IN_WHLIST_BIT ((uint16_t)0x00002000) +#define EM_BLE_IN_WHLIST_POS 13 +#define EM_BLE_IN_PERADV_LIST_BIT ((uint16_t)0x00001000) +#define EM_BLE_IN_PERADV_LIST_POS 12 +#define EM_BLE_PEF_BIT ((uint16_t)0x00000800) +#define EM_BLE_PEF_POS 11 +#define EM_BLE_LOCAL_RPA_VALID_BIT ((uint16_t)0x00000080) +#define EM_BLE_LOCAL_RPA_VALID_POS 7 +#define EM_BLE_LOCAL_RPA_RENEW_BIT ((uint16_t)0x00000040) +#define EM_BLE_LOCAL_RPA_RENEW_POS 6 +#define EM_BLE_LOCAL_IRK_VALID_BIT ((uint16_t)0x00000020) +#define EM_BLE_LOCAL_IRK_VALID_POS 5 +#define EM_BLE_PEER_RPA_VALID_BIT ((uint16_t)0x00000008) +#define EM_BLE_PEER_RPA_VALID_POS 3 +#define EM_BLE_PEER_RPA_RENEW_BIT ((uint16_t)0x00000004) +#define EM_BLE_PEER_RPA_RENEW_POS 2 +#define EM_BLE_PEER_IRK_VALID_BIT ((uint16_t)0x00000002) +#define EM_BLE_PEER_IRK_VALID_POS 1 +#define EM_BLE_PEER_ID_TYPE_BIT ((uint16_t)0x00000001) +#define EM_BLE_PEER_ID_TYPE_POS 0 + +#define EM_BLE_ENTRY_VALID_RST 0x0 +#define EM_BLE_CONNECTED_RST 0x0 +#define EM_BLE_IN_WHLIST_RST 0x0 +#define EM_BLE_IN_PERADV_LIST_RST 0x0 +#define EM_BLE_PEF_RST 0x0 +#define EM_BLE_LOCAL_RPA_VALID_RST 0x0 +#define EM_BLE_LOCAL_RPA_RENEW_RST 0x0 +#define EM_BLE_LOCAL_IRK_VALID_RST 0x0 +#define EM_BLE_PEER_RPA_VALID_RST 0x0 +#define EM_BLE_PEER_RPA_RENEW_RST 0x0 +#define EM_BLE_PEER_IRK_VALID_RST 0x0 +#define EM_BLE_PEER_ID_TYPE_RST 0x0 + +__INLINE void em_ble_ral_info_pack(int elt_idx, uint8_t entryvalid, uint8_t connected, uint8_t inwhlist, uint8_t inperadvlist, uint8_t pef, uint8_t localrpavalid, uint8_t localrparenew, uint8_t localirkvalid, uint8_t peerrpavalid, uint8_t peerrparenew, uint8_t peerirkvalid, uint8_t peeridtype) +{ + ASSERT_ERR((((uint16_t)entryvalid << 15) & ~((uint16_t)0x00008000)) == 0); + ASSERT_ERR((((uint16_t)connected << 14) & ~((uint16_t)0x00004000)) == 0); + ASSERT_ERR((((uint16_t)inwhlist << 13) & ~((uint16_t)0x00002000)) == 0); + ASSERT_ERR((((uint16_t)inperadvlist << 12) & ~((uint16_t)0x00001000)) == 0); + ASSERT_ERR((((uint16_t)pef << 11) & ~((uint16_t)0x00000800)) == 0); + ASSERT_ERR((((uint16_t)localrpavalid << 7) & ~((uint16_t)0x00000080)) == 0); + ASSERT_ERR((((uint16_t)localrparenew << 6) & ~((uint16_t)0x00000040)) == 0); + ASSERT_ERR((((uint16_t)localirkvalid << 5) & ~((uint16_t)0x00000020)) == 0); + ASSERT_ERR((((uint16_t)peerrpavalid << 3) & ~((uint16_t)0x00000008)) == 0); + ASSERT_ERR((((uint16_t)peerrparenew << 2) & ~((uint16_t)0x00000004)) == 0); + ASSERT_ERR((((uint16_t)peerirkvalid << 1) & ~((uint16_t)0x00000002)) == 0); + ASSERT_ERR((((uint16_t)peeridtype << 0) & ~((uint16_t)0x00000001)) == 0); + EM_BLE_WR(EM_BLE_RAL_INFO_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE, ((uint16_t)entryvalid << 15) | ((uint16_t)connected << 14) | ((uint16_t)inwhlist << 13) | ((uint16_t)inperadvlist << 12) | ((uint16_t)pef << 11) | ((uint16_t)localrpavalid << 7) | ((uint16_t)localrparenew << 6) | ((uint16_t)localirkvalid << 5) | ((uint16_t)peerrpavalid << 3) | ((uint16_t)peerrparenew << 2) | ((uint16_t)peerirkvalid << 1) | ((uint16_t)peeridtype << 0)); +} + +__INLINE void em_ble_ral_info_unpack(int elt_idx, uint8_t* entryvalid, uint8_t* connected, uint8_t* inwhlist, uint8_t* inperadvlist, uint8_t* pef, uint8_t* localrpavalid, uint8_t* localrparenew, uint8_t* localirkvalid, uint8_t* peerrpavalid, uint8_t* peerrparenew, uint8_t* peerirkvalid, uint8_t* peeridtype) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RAL_INFO_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE); + + *entryvalid = (localVal & ((uint16_t)0x00008000)) >> 15; + *connected = (localVal & ((uint16_t)0x00004000)) >> 14; + *inwhlist = (localVal & ((uint16_t)0x00002000)) >> 13; + *inperadvlist = (localVal & ((uint16_t)0x00001000)) >> 12; + *pef = (localVal & ((uint16_t)0x00000800)) >> 11; + *localrpavalid = (localVal & ((uint16_t)0x00000080)) >> 7; + *localrparenew = (localVal & ((uint16_t)0x00000040)) >> 6; + *localirkvalid = (localVal & ((uint16_t)0x00000020)) >> 5; + *peerrpavalid = (localVal & ((uint16_t)0x00000008)) >> 3; + *peerrparenew = (localVal & ((uint16_t)0x00000004)) >> 2; + *peerirkvalid = (localVal & ((uint16_t)0x00000002)) >> 1; + *peeridtype = (localVal & ((uint16_t)0x00000001)) >> 0; +} + +__INLINE uint8_t em_ble_ral_info_entry_valid_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RAL_INFO_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE); + return ((localVal & ((uint16_t)0x00008000)) >> 15); +} + +__INLINE void em_ble_ral_info_entry_valid_setf(int elt_idx, uint8_t entryvalid) +{ + ASSERT_ERR((((uint16_t)entryvalid << 15) & ~((uint16_t)0x00008000)) == 0); + EM_BLE_WR(EM_BLE_RAL_INFO_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE, (EM_BLE_RD(EM_BLE_RAL_INFO_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE) & ~((uint16_t)0x00008000)) | ((uint16_t)entryvalid << 15)); +} + +__INLINE uint8_t em_ble_ral_info_connected_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RAL_INFO_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE); + return ((localVal & ((uint16_t)0x00004000)) >> 14); +} + +__INLINE void em_ble_ral_info_connected_setf(int elt_idx, uint8_t connected) +{ + ASSERT_ERR((((uint16_t)connected << 14) & ~((uint16_t)0x00004000)) == 0); + EM_BLE_WR(EM_BLE_RAL_INFO_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE, (EM_BLE_RD(EM_BLE_RAL_INFO_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE) & ~((uint16_t)0x00004000)) | ((uint16_t)connected << 14)); +} + +__INLINE uint8_t em_ble_ral_info_in_whlist_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RAL_INFO_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE); + return ((localVal & ((uint16_t)0x00002000)) >> 13); +} + +__INLINE void em_ble_ral_info_in_whlist_setf(int elt_idx, uint8_t inwhlist) +{ + ASSERT_ERR((((uint16_t)inwhlist << 13) & ~((uint16_t)0x00002000)) == 0); + EM_BLE_WR(EM_BLE_RAL_INFO_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE, (EM_BLE_RD(EM_BLE_RAL_INFO_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE) & ~((uint16_t)0x00002000)) | ((uint16_t)inwhlist << 13)); +} + +__INLINE uint8_t em_ble_ral_info_in_peradv_list_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RAL_INFO_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE); + return ((localVal & ((uint16_t)0x00001000)) >> 12); +} + +__INLINE void em_ble_ral_info_in_peradv_list_setf(int elt_idx, uint8_t inperadvlist) +{ + ASSERT_ERR((((uint16_t)inperadvlist << 12) & ~((uint16_t)0x00001000)) == 0); + EM_BLE_WR(EM_BLE_RAL_INFO_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE, (EM_BLE_RD(EM_BLE_RAL_INFO_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE) & ~((uint16_t)0x00001000)) | ((uint16_t)inperadvlist << 12)); +} + +__INLINE uint8_t em_ble_ral_info_pef_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RAL_INFO_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE); + return ((localVal & ((uint16_t)0x00000800)) >> 11); +} + +__INLINE void em_ble_ral_info_pef_setf(int elt_idx, uint8_t pef) +{ + ASSERT_ERR((((uint16_t)pef << 11) & ~((uint16_t)0x00000800)) == 0); + EM_BLE_WR(EM_BLE_RAL_INFO_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE, (EM_BLE_RD(EM_BLE_RAL_INFO_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE) & ~((uint16_t)0x00000800)) | ((uint16_t)pef << 11)); +} + +__INLINE uint8_t em_ble_ral_info_local_rpa_valid_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RAL_INFO_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE); + return ((localVal & ((uint16_t)0x00000080)) >> 7); +} + +__INLINE void em_ble_ral_info_local_rpa_valid_setf(int elt_idx, uint8_t localrpavalid) +{ + ASSERT_ERR((((uint16_t)localrpavalid << 7) & ~((uint16_t)0x00000080)) == 0); + EM_BLE_WR(EM_BLE_RAL_INFO_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE, (EM_BLE_RD(EM_BLE_RAL_INFO_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE) & ~((uint16_t)0x00000080)) | ((uint16_t)localrpavalid << 7)); +} + +__INLINE uint8_t em_ble_ral_info_local_rpa_renew_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RAL_INFO_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE); + return ((localVal & ((uint16_t)0x00000040)) >> 6); +} + +__INLINE void em_ble_ral_info_local_rpa_renew_setf(int elt_idx, uint8_t localrparenew) +{ + ASSERT_ERR((((uint16_t)localrparenew << 6) & ~((uint16_t)0x00000040)) == 0); + EM_BLE_WR(EM_BLE_RAL_INFO_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE, (EM_BLE_RD(EM_BLE_RAL_INFO_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE) & ~((uint16_t)0x00000040)) | ((uint16_t)localrparenew << 6)); +} + +__INLINE uint8_t em_ble_ral_info_local_irk_valid_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RAL_INFO_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE); + return ((localVal & ((uint16_t)0x00000020)) >> 5); +} + +__INLINE void em_ble_ral_info_local_irk_valid_setf(int elt_idx, uint8_t localirkvalid) +{ + ASSERT_ERR((((uint16_t)localirkvalid << 5) & ~((uint16_t)0x00000020)) == 0); + EM_BLE_WR(EM_BLE_RAL_INFO_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE, (EM_BLE_RD(EM_BLE_RAL_INFO_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE) & ~((uint16_t)0x00000020)) | ((uint16_t)localirkvalid << 5)); +} + +__INLINE uint8_t em_ble_ral_info_peer_rpa_valid_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RAL_INFO_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE); + return ((localVal & ((uint16_t)0x00000008)) >> 3); +} + +__INLINE void em_ble_ral_info_peer_rpa_valid_setf(int elt_idx, uint8_t peerrpavalid) +{ + ASSERT_ERR((((uint16_t)peerrpavalid << 3) & ~((uint16_t)0x00000008)) == 0); + EM_BLE_WR(EM_BLE_RAL_INFO_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE, (EM_BLE_RD(EM_BLE_RAL_INFO_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE) & ~((uint16_t)0x00000008)) | ((uint16_t)peerrpavalid << 3)); +} + +__INLINE uint8_t em_ble_ral_info_peer_rpa_renew_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RAL_INFO_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE); + return ((localVal & ((uint16_t)0x00000004)) >> 2); +} + +__INLINE void em_ble_ral_info_peer_rpa_renew_setf(int elt_idx, uint8_t peerrparenew) +{ + ASSERT_ERR((((uint16_t)peerrparenew << 2) & ~((uint16_t)0x00000004)) == 0); + EM_BLE_WR(EM_BLE_RAL_INFO_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE, (EM_BLE_RD(EM_BLE_RAL_INFO_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE) & ~((uint16_t)0x00000004)) | ((uint16_t)peerrparenew << 2)); +} + +__INLINE uint8_t em_ble_ral_info_peer_irk_valid_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RAL_INFO_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE); + return ((localVal & ((uint16_t)0x00000002)) >> 1); +} + +__INLINE void em_ble_ral_info_peer_irk_valid_setf(int elt_idx, uint8_t peerirkvalid) +{ + ASSERT_ERR((((uint16_t)peerirkvalid << 1) & ~((uint16_t)0x00000002)) == 0); + EM_BLE_WR(EM_BLE_RAL_INFO_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE, (EM_BLE_RD(EM_BLE_RAL_INFO_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE) & ~((uint16_t)0x00000002)) | ((uint16_t)peerirkvalid << 1)); +} + +__INLINE uint8_t em_ble_ral_info_peer_id_type_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RAL_INFO_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE); + return ((localVal & ((uint16_t)0x00000001)) >> 0); +} + +__INLINE void em_ble_ral_info_peer_id_type_setf(int elt_idx, uint8_t peeridtype) +{ + ASSERT_ERR((((uint16_t)peeridtype << 0) & ~((uint16_t)0x00000001)) == 0); + EM_BLE_WR(EM_BLE_RAL_INFO_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE, (EM_BLE_RD(EM_BLE_RAL_INFO_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE) & ~((uint16_t)0x00000001)) | ((uint16_t)peeridtype << 0)); +} + +/** + * @brief RAL_PEER_SID register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:00 RAL_PEER_SID 0x0 + *+ */ +#define EM_BLE_RAL_PEER_SID_ADDR (EXCHANGE_MEM_BASE+0x02 + EM_BLE_RAL_OFFSET) +#define EM_BLE_RAL_PEER_SID_INDEX 0x00000001 +#define EM_BLE_RAL_PEER_SID_RESET 0x00000000 + +__INLINE uint16_t em_ble_ral_peer_sid_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_RAL_PEER_SID_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE); +} + +__INLINE void em_ble_ral_peer_sid_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_RAL_PEER_SID_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE, value); +} + +// field definitions +#define EM_BLE_RAL_PEER_SID_MASK ((uint16_t)0x0000FFFF) +#define EM_BLE_RAL_PEER_SID_LSB 0 +#define EM_BLE_RAL_PEER_SID_WIDTH ((uint16_t)0x00000010) + +#define EM_BLE_RAL_PEER_SID_RST 0x0 + +__INLINE uint16_t em_ble_ral_peer_sid_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RAL_PEER_SID_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE); + ASSERT_ERR((localVal & ~((uint16_t)0x0000FFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void em_ble_ral_peer_sid_setf(int elt_idx, uint16_t ralpeersid) +{ + ASSERT_ERR((((uint16_t)ralpeersid << 0) & ~((uint16_t)0x0000FFFF)) == 0); + EM_BLE_WR(EM_BLE_RAL_PEER_SID_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE, (uint16_t)ralpeersid << 0); +} + +/** + * @brief RAL_PEER_IRK register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:00 PEER_IRK 0x0 + *+ */ +#define EM_BLE_RAL_PEER_IRK_ADDR (EXCHANGE_MEM_BASE+0x04 + EM_BLE_RAL_OFFSET) +#define EM_BLE_RAL_PEER_IRK_INDEX 0x00000002 +#define EM_BLE_RAL_PEER_IRK_RESET 0x00000000 +#define EM_BLE_RAL_PEER_IRK_COUNT 8 + +__INLINE uint16_t em_ble_ral_peer_irk_get(int elt_idx, int reg_idx) +{ + ASSERT_ERR(reg_idx <= 7); + return EM_BLE_RD(EM_BLE_RAL_PEER_IRK_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE + reg_idx * 2); +} + +__INLINE void em_ble_ral_peer_irk_set(int elt_idx, int reg_idx, uint16_t value) +{ + ASSERT_ERR(reg_idx <= 7); + EM_BLE_WR(EM_BLE_RAL_PEER_IRK_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE + reg_idx * 2, value); +} + +// field definitions +#define EM_BLE_PEER_IRK_MASK ((uint16_t)0x0000FFFF) +#define EM_BLE_PEER_IRK_LSB 0 +#define EM_BLE_PEER_IRK_WIDTH ((uint16_t)0x00000010) + +#define EM_BLE_PEER_IRK_RST 0x0 + +__INLINE uint16_t em_ble_ral_peer_irk_peer_irk_getf(int elt_idx, int reg_idx) +{ + ASSERT_ERR(reg_idx <= 7); + uint16_t localVal = EM_BLE_RD(EM_BLE_RAL_PEER_IRK_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE + reg_idx * 2); + ASSERT_ERR((localVal & ~((uint16_t)0x0000FFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void em_ble_ral_peer_irk_peer_irk_setf(int elt_idx, int reg_idx, uint16_t peerirk) +{ + ASSERT_ERR(reg_idx <= 7); + ASSERT_ERR((((uint16_t)peerirk << 0) & ~((uint16_t)0x0000FFFF)) == 0); + EM_BLE_WR(EM_BLE_RAL_PEER_IRK_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE + reg_idx * 2, (uint16_t)peerirk << 0); +} + +/** + * @brief RAL_PEER_RPA register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:00 PEER_RPA 0x0 + *+ */ +#define EM_BLE_RAL_PEER_RPA_ADDR (EXCHANGE_MEM_BASE+0x14 + EM_BLE_RAL_OFFSET) +#define EM_BLE_RAL_PEER_RPA_INDEX 0x0000000A +#define EM_BLE_RAL_PEER_RPA_RESET 0x00000000 +#define EM_BLE_RAL_PEER_RPA_COUNT 3 + +__INLINE uint16_t em_ble_ral_peer_rpa_get(int elt_idx, int reg_idx) +{ + ASSERT_ERR(reg_idx <= 2); + return EM_BLE_RD(EM_BLE_RAL_PEER_RPA_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE + reg_idx * 2); +} + +__INLINE void em_ble_ral_peer_rpa_set(int elt_idx, int reg_idx, uint16_t value) +{ + ASSERT_ERR(reg_idx <= 2); + EM_BLE_WR(EM_BLE_RAL_PEER_RPA_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE + reg_idx * 2, value); +} + +// field definitions +#define EM_BLE_PEER_RPA_MASK ((uint16_t)0x0000FFFF) +#define EM_BLE_PEER_RPA_LSB 0 +#define EM_BLE_PEER_RPA_WIDTH ((uint16_t)0x00000010) + +#define EM_BLE_PEER_RPA_RST 0x0 + +__INLINE uint16_t em_ble_ral_peer_rpa_peer_rpa_getf(int elt_idx, int reg_idx) +{ + ASSERT_ERR(reg_idx <= 2); + uint16_t localVal = EM_BLE_RD(EM_BLE_RAL_PEER_RPA_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE + reg_idx * 2); + ASSERT_ERR((localVal & ~((uint16_t)0x0000FFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void em_ble_ral_peer_rpa_peer_rpa_setf(int elt_idx, int reg_idx, uint16_t peerrpa) +{ + ASSERT_ERR(reg_idx <= 2); + ASSERT_ERR((((uint16_t)peerrpa << 0) & ~((uint16_t)0x0000FFFF)) == 0); + EM_BLE_WR(EM_BLE_RAL_PEER_RPA_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE + reg_idx * 2, (uint16_t)peerrpa << 0); +} + +/** + * @brief RAL_PEER_ID register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:00 PEER_ID 0x0 + *+ */ +#define EM_BLE_RAL_PEER_ID_ADDR (EXCHANGE_MEM_BASE+0x1A + EM_BLE_RAL_OFFSET) +#define EM_BLE_RAL_PEER_ID_INDEX 0x0000000D +#define EM_BLE_RAL_PEER_ID_RESET 0x00000000 +#define EM_BLE_RAL_PEER_ID_COUNT 3 + +__INLINE uint16_t em_ble_ral_peer_id_get(int elt_idx, int reg_idx) +{ + ASSERT_ERR(reg_idx <= 2); + return EM_BLE_RD(EM_BLE_RAL_PEER_ID_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE + reg_idx * 2); +} + +__INLINE void em_ble_ral_peer_id_set(int elt_idx, int reg_idx, uint16_t value) +{ + ASSERT_ERR(reg_idx <= 2); + EM_BLE_WR(EM_BLE_RAL_PEER_ID_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE + reg_idx * 2, value); +} + +// field definitions +#define EM_BLE_PEER_ID_MASK ((uint16_t)0x0000FFFF) +#define EM_BLE_PEER_ID_LSB 0 +#define EM_BLE_PEER_ID_WIDTH ((uint16_t)0x00000010) + +#define EM_BLE_PEER_ID_RST 0x0 + +__INLINE uint16_t em_ble_ral_peer_id_peer_id_getf(int elt_idx, int reg_idx) +{ + ASSERT_ERR(reg_idx <= 2); + uint16_t localVal = EM_BLE_RD(EM_BLE_RAL_PEER_ID_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE + reg_idx * 2); + ASSERT_ERR((localVal & ~((uint16_t)0x0000FFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void em_ble_ral_peer_id_peer_id_setf(int elt_idx, int reg_idx, uint16_t peerid) +{ + ASSERT_ERR(reg_idx <= 2); + ASSERT_ERR((((uint16_t)peerid << 0) & ~((uint16_t)0x0000FFFF)) == 0); + EM_BLE_WR(EM_BLE_RAL_PEER_ID_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE + reg_idx * 2, (uint16_t)peerid << 0); +} + +/** + * @brief RAL_LOCAL_IRK register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:00 LOCAL_IRK 0x0 + *+ */ +#define EM_BLE_RAL_LOCAL_IRK_ADDR (EXCHANGE_MEM_BASE+0x20 + EM_BLE_RAL_OFFSET) +#define EM_BLE_RAL_LOCAL_IRK_INDEX 0x00000010 +#define EM_BLE_RAL_LOCAL_IRK_RESET 0x00000000 +#define EM_BLE_RAL_LOCAL_IRK_COUNT 8 + +__INLINE uint16_t em_ble_ral_local_irk_get(int elt_idx, int reg_idx) +{ + ASSERT_ERR(reg_idx <= 7); + return EM_BLE_RD(EM_BLE_RAL_LOCAL_IRK_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE + reg_idx * 2); +} + +__INLINE void em_ble_ral_local_irk_set(int elt_idx, int reg_idx, uint16_t value) +{ + ASSERT_ERR(reg_idx <= 7); + EM_BLE_WR(EM_BLE_RAL_LOCAL_IRK_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE + reg_idx * 2, value); +} + +// field definitions +#define EM_BLE_LOCAL_IRK_MASK ((uint16_t)0x0000FFFF) +#define EM_BLE_LOCAL_IRK_LSB 0 +#define EM_BLE_LOCAL_IRK_WIDTH ((uint16_t)0x00000010) + +#define EM_BLE_LOCAL_IRK_RST 0x0 + +__INLINE uint16_t em_ble_ral_local_irk_local_irk_getf(int elt_idx, int reg_idx) +{ + ASSERT_ERR(reg_idx <= 7); + uint16_t localVal = EM_BLE_RD(EM_BLE_RAL_LOCAL_IRK_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE + reg_idx * 2); + ASSERT_ERR((localVal & ~((uint16_t)0x0000FFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void em_ble_ral_local_irk_local_irk_setf(int elt_idx, int reg_idx, uint16_t localirk) +{ + ASSERT_ERR(reg_idx <= 7); + ASSERT_ERR((((uint16_t)localirk << 0) & ~((uint16_t)0x0000FFFF)) == 0); + EM_BLE_WR(EM_BLE_RAL_LOCAL_IRK_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE + reg_idx * 2, (uint16_t)localirk << 0); +} + +/** + * @brief RAL_LOCAL_RPA register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:00 LOCAL_RPA 0x0 + *+ */ +#define EM_BLE_RAL_LOCAL_RPA_ADDR (EXCHANGE_MEM_BASE+0x30 + EM_BLE_RAL_OFFSET) +#define EM_BLE_RAL_LOCAL_RPA_INDEX 0x00000018 +#define EM_BLE_RAL_LOCAL_RPA_RESET 0x00000000 +#define EM_BLE_RAL_LOCAL_RPA_COUNT 3 + +__INLINE uint16_t em_ble_ral_local_rpa_get(int elt_idx, int reg_idx) +{ + ASSERT_ERR(reg_idx <= 2); + return EM_BLE_RD(EM_BLE_RAL_LOCAL_RPA_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE + reg_idx * 2); +} + +__INLINE void em_ble_ral_local_rpa_set(int elt_idx, int reg_idx, uint16_t value) +{ + ASSERT_ERR(reg_idx <= 2); + EM_BLE_WR(EM_BLE_RAL_LOCAL_RPA_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE + reg_idx * 2, value); +} + +// field definitions +#define EM_BLE_LOCAL_RPA_MASK ((uint16_t)0x0000FFFF) +#define EM_BLE_LOCAL_RPA_LSB 0 +#define EM_BLE_LOCAL_RPA_WIDTH ((uint16_t)0x00000010) + +#define EM_BLE_LOCAL_RPA_RST 0x0 + +__INLINE uint16_t em_ble_ral_local_rpa_local_rpa_getf(int elt_idx, int reg_idx) +{ + ASSERT_ERR(reg_idx <= 2); + uint16_t localVal = EM_BLE_RD(EM_BLE_RAL_LOCAL_RPA_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE + reg_idx * 2); + ASSERT_ERR((localVal & ~((uint16_t)0x0000FFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void em_ble_ral_local_rpa_local_rpa_setf(int elt_idx, int reg_idx, uint16_t localrpa) +{ + ASSERT_ERR(reg_idx <= 2); + ASSERT_ERR((((uint16_t)localrpa << 0) & ~((uint16_t)0x0000FFFF)) == 0); + EM_BLE_WR(EM_BLE_RAL_LOCAL_RPA_ADDR + elt_idx * REG_EM_BLE_RAL_SIZE + reg_idx * 2, (uint16_t)localrpa << 0); +} + + +#endif // _REG_EM_BLE_RAL_H_ + diff --git a/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Nationstech/ble_library/ns_ble_stack/rfinit/api/reg_em_ble_rx_cte_desc.h b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Nationstech/ble_library/ns_ble_stack/rfinit/api/reg_em_ble_rx_cte_desc.h new file mode 100644 index 0000000..d8d64d2 --- /dev/null +++ b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Nationstech/ble_library/ns_ble_stack/rfinit/api/reg_em_ble_rx_cte_desc.h @@ -0,0 +1,173 @@ +#ifndef _REG_EM_BLE_RX_CTE_DESC_H_ +#define _REG_EM_BLE_RX_CTE_DESC_H_ + +#include
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15 RXDONE 0 + * 13:00 RXNEXTPTR 0x0 + *+ */ +#define EM_BLE_RXCTECNTL_ADDR (EXCHANGE_MEM_BASE + EM_BLE_RX_CTE_DESC_OFFSET) +#define EM_BLE_RXCTECNTL_INDEX 0x00000000 +#define EM_BLE_RXCTECNTL_RESET 0x00000000 + +__INLINE uint16_t em_ble_rxctecntl_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_RXCTECNTL_ADDR + elt_idx * REG_EM_BLE_RX_CTE_DESC_SIZE); +} + +__INLINE void em_ble_rxctecntl_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_RXCTECNTL_ADDR + elt_idx * REG_EM_BLE_RX_CTE_DESC_SIZE, value); +} + +// field definitions +#define EM_BLE_RXDONE_BIT ((uint16_t)0x00008000) +#define EM_BLE_RXDONE_POS 15 +#define EM_BLE_RXNEXTPTR_MASK ((uint16_t)0x00003FFF) +#define EM_BLE_RXNEXTPTR_LSB 0 +#define EM_BLE_RXNEXTPTR_WIDTH ((uint16_t)0x0000000E) + +#define EM_BLE_RXDONE_RST 0x0 +#define EM_BLE_RXNEXTPTR_RST 0x0 + +__INLINE void em_ble_rxctecntl_pack(int elt_idx, uint8_t rxdone, uint16_t rxnextptr) +{ + ASSERT_ERR((((uint16_t)rxdone << 15) & ~((uint16_t)0x00008000)) == 0); + ASSERT_ERR((((uint16_t)rxnextptr << 0) & ~((uint16_t)0x00003FFF)) == 0); + EM_BLE_WR(EM_BLE_RXCTECNTL_ADDR + elt_idx * REG_EM_BLE_RX_CTE_DESC_SIZE, ((uint16_t)rxdone << 15) | ((uint16_t)rxnextptr << 0)); +} + +__INLINE void em_ble_rxctecntl_unpack(int elt_idx, uint8_t* rxdone, uint16_t* rxnextptr) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXCTECNTL_ADDR + elt_idx * REG_EM_BLE_RX_CTE_DESC_SIZE); + + *rxdone = (localVal & ((uint16_t)0x00008000)) >> 15; + *rxnextptr = (localVal & ((uint16_t)0x00003FFF)) >> 0; +} + +__INLINE uint8_t em_ble_rxctecntl_rxdone_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXCTECNTL_ADDR + elt_idx * REG_EM_BLE_RX_CTE_DESC_SIZE); + return ((localVal & ((uint16_t)0x00008000)) >> 15); +} + +__INLINE void em_ble_rxctecntl_rxdone_setf(int elt_idx, uint8_t rxdone) +{ + ASSERT_ERR((((uint16_t)rxdone << 15) & ~((uint16_t)0x00008000)) == 0); + EM_BLE_WR(EM_BLE_RXCTECNTL_ADDR + elt_idx * REG_EM_BLE_RX_CTE_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXCTECNTL_ADDR + elt_idx * REG_EM_BLE_RX_CTE_DESC_SIZE) & ~((uint16_t)0x00008000)) | ((uint16_t)rxdone << 15)); +} + +__INLINE uint16_t em_ble_rxctecntl_rxnextptr_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXCTECNTL_ADDR + elt_idx * REG_EM_BLE_RX_CTE_DESC_SIZE); + return ((localVal & ((uint16_t)0x00003FFF)) >> 0); +} + +__INLINE void em_ble_rxctecntl_rxnextptr_setf(int elt_idx, uint16_t rxnextptr) +{ + ASSERT_ERR((((uint16_t)rxnextptr << 0) & ~((uint16_t)0x00003FFF)) == 0); + EM_BLE_WR(EM_BLE_RXCTECNTL_ADDR + elt_idx * REG_EM_BLE_RX_CTE_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXCTECNTL_ADDR + elt_idx * REG_EM_BLE_RX_CTE_DESC_SIZE) & ~((uint16_t)0x00003FFF)) | ((uint16_t)rxnextptr << 0)); +} + +/** + * @brief RXCTESAMPBUF register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:08 RX_Q 0x0 + * 07:00 RX_I 0x0 + *+ */ +#define EM_BLE_RXCTESAMPBUF_ADDR (EXCHANGE_MEM_BASE+0x04 + EM_BLE_RX_CTE_DESC_OFFSET) +#define EM_BLE_RXCTESAMPBUF_INDEX 0x00000002 +#define EM_BLE_RXCTESAMPBUF_RESET 0x00000000 +#define EM_BLE_RXCTESAMPBUF_COUNT 82 + +__INLINE uint16_t em_ble_rxctesampbuf_get(int elt_idx, int reg_idx) +{ + ASSERT_ERR(reg_idx <= 81); + return EM_BLE_RD(EM_BLE_RXCTESAMPBUF_ADDR + elt_idx * REG_EM_BLE_RX_CTE_DESC_SIZE + reg_idx * 2); +} + +__INLINE void em_ble_rxctesampbuf_set(int elt_idx, int reg_idx, uint16_t value) +{ + ASSERT_ERR(reg_idx <= 81); + EM_BLE_WR(EM_BLE_RXCTESAMPBUF_ADDR + elt_idx * REG_EM_BLE_RX_CTE_DESC_SIZE + reg_idx * 2, value); +} + +// field definitions +#define EM_BLE_RX_Q_MASK ((uint16_t)0x0000FF00) +#define EM_BLE_RX_Q_LSB 8 +#define EM_BLE_RX_Q_WIDTH ((uint16_t)0x00000008) +#define EM_BLE_RX_I_MASK ((uint16_t)0x000000FF) +#define EM_BLE_RX_I_LSB 0 +#define EM_BLE_RX_I_WIDTH ((uint16_t)0x00000008) + +#define EM_BLE_RX_Q_RST 0x0 +#define EM_BLE_RX_I_RST 0x0 + +__INLINE void em_ble_rxctesampbuf_pack(int elt_idx, int reg_idx, uint8_t rxq, uint8_t rxi) +{ + ASSERT_ERR(reg_idx <= 81); + ASSERT_ERR((((uint16_t)rxq << 8) & ~((uint16_t)0x0000FF00)) == 0); + ASSERT_ERR((((uint16_t)rxi << 0) & ~((uint16_t)0x000000FF)) == 0); + EM_BLE_WR(EM_BLE_RXCTESAMPBUF_ADDR + elt_idx * REG_EM_BLE_RX_CTE_DESC_SIZE + reg_idx * 2, ((uint16_t)rxq << 8) | ((uint16_t)rxi << 0)); +} + +__INLINE void em_ble_rxctesampbuf_unpack(int elt_idx, int reg_idx, uint8_t* rxq, uint8_t* rxi) +{ + ASSERT_ERR(reg_idx <= 81); + uint16_t localVal = EM_BLE_RD(EM_BLE_RXCTESAMPBUF_ADDR + elt_idx * REG_EM_BLE_RX_CTE_DESC_SIZE + reg_idx * 2); + + *rxq = (localVal & ((uint16_t)0x0000FF00)) >> 8; + *rxi = (localVal & ((uint16_t)0x000000FF)) >> 0; +} + +__INLINE uint8_t em_ble_rxctesampbuf_rx_q_getf(int elt_idx, int reg_idx) +{ + ASSERT_ERR(reg_idx <= 81); + uint16_t localVal = EM_BLE_RD(EM_BLE_RXCTESAMPBUF_ADDR + elt_idx * REG_EM_BLE_RX_CTE_DESC_SIZE + reg_idx * 2); + return ((localVal & ((uint16_t)0x0000FF00)) >> 8); +} + +__INLINE void em_ble_rxctesampbuf_rx_q_setf(int elt_idx, int reg_idx, uint8_t rxq) +{ + ASSERT_ERR(reg_idx <= 81); + ASSERT_ERR((((uint16_t)rxq << 8) & ~((uint16_t)0x0000FF00)) == 0); + EM_BLE_WR(EM_BLE_RXCTESAMPBUF_ADDR + elt_idx * REG_EM_BLE_RX_CTE_DESC_SIZE + reg_idx * 2, (EM_BLE_RD(EM_BLE_RXCTESAMPBUF_ADDR + elt_idx * REG_EM_BLE_RX_CTE_DESC_SIZE + reg_idx * 2) & ~((uint16_t)0x0000FF00)) | ((uint16_t)rxq << 8)); +} + +__INLINE uint8_t em_ble_rxctesampbuf_rx_i_getf(int elt_idx, int reg_idx) +{ + ASSERT_ERR(reg_idx <= 81); + uint16_t localVal = EM_BLE_RD(EM_BLE_RXCTESAMPBUF_ADDR + elt_idx * REG_EM_BLE_RX_CTE_DESC_SIZE + reg_idx * 2); + return ((localVal & ((uint16_t)0x000000FF)) >> 0); +} + +__INLINE void em_ble_rxctesampbuf_rx_i_setf(int elt_idx, int reg_idx, uint8_t rxi) +{ + ASSERT_ERR(reg_idx <= 81); + ASSERT_ERR((((uint16_t)rxi << 0) & ~((uint16_t)0x000000FF)) == 0); + EM_BLE_WR(EM_BLE_RXCTESAMPBUF_ADDR + elt_idx * REG_EM_BLE_RX_CTE_DESC_SIZE + reg_idx * 2, (EM_BLE_RD(EM_BLE_RXCTESAMPBUF_ADDR + elt_idx * REG_EM_BLE_RX_CTE_DESC_SIZE + reg_idx * 2) & ~((uint16_t)0x000000FF)) | ((uint16_t)rxi << 0)); +} + + +#endif // _REG_EM_BLE_RX_CTE_DESC_H_ + diff --git a/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Nationstech/ble_library/ns_ble_stack/rfinit/api/reg_em_ble_rx_desc.h b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Nationstech/ble_library/ns_ble_stack/rfinit/api/reg_em_ble_rx_desc.h new file mode 100644 index 0000000..1cf8894 --- /dev/null +++ b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Nationstech/ble_library/ns_ble_stack/rfinit/api/reg_em_ble_rx_desc.h @@ -0,0 +1,1969 @@ +#ifndef _REG_EM_BLE_RX_DESC_H_ +#define _REG_EM_BLE_RX_DESC_H_ + +#include
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15 RXDONE 0 + * 13:00 RXNEXTPTR 0x0 + *+ */ +#define EM_BLE_RXCNTL_ADDR (EXCHANGE_MEM_BASE + EM_BLE_RX_DESC_OFFSET) +#define EM_BLE_RXCNTL_INDEX 0x00000000 +#define EM_BLE_RXCNTL_RESET 0x00000000 + +__INLINE uint16_t em_ble_rxcntl_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_RXCNTL_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); +} + +__INLINE void em_ble_rxcntl_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_RXCNTL_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, value); +} + +// field definitions +#define EM_BLE_RXDONE_BIT ((uint16_t)0x00008000) +#define EM_BLE_RXDONE_POS 15 +#define EM_BLE_RXNEXTPTR_MASK ((uint16_t)0x00003FFF) +#define EM_BLE_RXNEXTPTR_LSB 0 +#define EM_BLE_RXNEXTPTR_WIDTH ((uint16_t)0x0000000E) + +#define EM_BLE_RXDONE_RST 0x0 +#define EM_BLE_RXNEXTPTR_RST 0x0 + +__INLINE void em_ble_rxcntl_pack(int elt_idx, uint8_t rxdone, uint16_t rxnextptr) +{ + ASSERT_ERR((((uint16_t)rxdone << 15) & ~((uint16_t)0x00008000)) == 0); + ASSERT_ERR((((uint16_t)rxnextptr << 0) & ~((uint16_t)0x00003FFF)) == 0); + EM_BLE_WR(EM_BLE_RXCNTL_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, ((uint16_t)rxdone << 15) | ((uint16_t)rxnextptr << 0)); +} + +__INLINE void em_ble_rxcntl_unpack(int elt_idx, uint8_t* rxdone, uint16_t* rxnextptr) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXCNTL_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + + *rxdone = (localVal & ((uint16_t)0x00008000)) >> 15; + *rxnextptr = (localVal & ((uint16_t)0x00003FFF)) >> 0; +} + +__INLINE uint8_t em_ble_rxcntl_rxdone_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXCNTL_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00008000)) >> 15); +} + +__INLINE void em_ble_rxcntl_rxdone_setf(int elt_idx, uint8_t rxdone) +{ + ASSERT_ERR((((uint16_t)rxdone << 15) & ~((uint16_t)0x00008000)) == 0); + EM_BLE_WR(EM_BLE_RXCNTL_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXCNTL_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00008000)) | ((uint16_t)rxdone << 15)); +} + +__INLINE uint16_t em_ble_rxcntl_rxnextptr_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXCNTL_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00003FFF)) >> 0); +} + +__INLINE void em_ble_rxcntl_rxnextptr_setf(int elt_idx, uint16_t rxnextptr) +{ + ASSERT_ERR((((uint16_t)rxnextptr << 0) & ~((uint16_t)0x00003FFF)) == 0); + EM_BLE_WR(EM_BLE_RXCNTL_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXCNTL_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00003FFF)) | ((uint16_t)rxnextptr << 0)); +} + +/** + * @brief RXSTATCE register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15 RXCTEERR 0 + * 07 NESN_ERR 0 + * 06 SN_ERR 0 + * 05 LLID_ERR 0 + * 04 MIC_ERR 0 + * 03 CRC_ERR 0 + * 02 LEN_ERR 0 + * 01 RXTIME_ERR 0 + * 00 SYNC_ERR 0 + *+ */ +#define EM_BLE_RXSTATCE_ADDR (EXCHANGE_MEM_BASE+0x02 + EM_BLE_RX_DESC_OFFSET) +#define EM_BLE_RXSTATCE_INDEX 0x00000001 +#define EM_BLE_RXSTATCE_RESET 0x00000000 + +__INLINE uint16_t em_ble_rxstatce_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_RXSTATCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); +} + +__INLINE void em_ble_rxstatce_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_RXSTATCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, value); +} + +// field definitions +#define EM_BLE_RXCTEERR_BIT ((uint16_t)0x00008000) +#define EM_BLE_RXCTEERR_POS 15 +#define EM_BLE_NESN_ERR_BIT ((uint16_t)0x00000080) +#define EM_BLE_NESN_ERR_POS 7 +#define EM_BLE_SN_ERR_BIT ((uint16_t)0x00000040) +#define EM_BLE_SN_ERR_POS 6 +#define EM_BLE_LLID_ERR_BIT ((uint16_t)0x00000020) +#define EM_BLE_LLID_ERR_POS 5 +#define EM_BLE_MIC_ERR_BIT ((uint16_t)0x00000010) +#define EM_BLE_MIC_ERR_POS 4 +#define EM_BLE_CRC_ERR_BIT ((uint16_t)0x00000008) +#define EM_BLE_CRC_ERR_POS 3 +#define EM_BLE_LEN_ERR_BIT ((uint16_t)0x00000004) +#define EM_BLE_LEN_ERR_POS 2 +#define EM_BLE_RXTIME_ERR_BIT ((uint16_t)0x00000002) +#define EM_BLE_RXTIME_ERR_POS 1 +#define EM_BLE_SYNC_ERR_BIT ((uint16_t)0x00000001) +#define EM_BLE_SYNC_ERR_POS 0 + +#define EM_BLE_RXCTEERR_RST 0x0 +#define EM_BLE_NESN_ERR_RST 0x0 +#define EM_BLE_SN_ERR_RST 0x0 +#define EM_BLE_LLID_ERR_RST 0x0 +#define EM_BLE_MIC_ERR_RST 0x0 +#define EM_BLE_CRC_ERR_RST 0x0 +#define EM_BLE_LEN_ERR_RST 0x0 +#define EM_BLE_RXTIME_ERR_RST 0x0 +#define EM_BLE_SYNC_ERR_RST 0x0 + +__INLINE void em_ble_rxstatce_pack(int elt_idx, uint8_t rxcteerr, uint8_t nesnerr, uint8_t snerr, uint8_t lliderr, uint8_t micerr, uint8_t crcerr, uint8_t lenerr, uint8_t rxtimeerr, uint8_t syncerr) +{ + ASSERT_ERR((((uint16_t)rxcteerr << 15) & ~((uint16_t)0x00008000)) == 0); + ASSERT_ERR((((uint16_t)nesnerr << 7) & ~((uint16_t)0x00000080)) == 0); + ASSERT_ERR((((uint16_t)snerr << 6) & ~((uint16_t)0x00000040)) == 0); + ASSERT_ERR((((uint16_t)lliderr << 5) & ~((uint16_t)0x00000020)) == 0); + ASSERT_ERR((((uint16_t)micerr << 4) & ~((uint16_t)0x00000010)) == 0); + ASSERT_ERR((((uint16_t)crcerr << 3) & ~((uint16_t)0x00000008)) == 0); + ASSERT_ERR((((uint16_t)lenerr << 2) & ~((uint16_t)0x00000004)) == 0); + ASSERT_ERR((((uint16_t)rxtimeerr << 1) & ~((uint16_t)0x00000002)) == 0); + ASSERT_ERR((((uint16_t)syncerr << 0) & ~((uint16_t)0x00000001)) == 0); + EM_BLE_WR(EM_BLE_RXSTATCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, ((uint16_t)rxcteerr << 15) | ((uint16_t)nesnerr << 7) | ((uint16_t)snerr << 6) | ((uint16_t)lliderr << 5) | ((uint16_t)micerr << 4) | ((uint16_t)crcerr << 3) | ((uint16_t)lenerr << 2) | ((uint16_t)rxtimeerr << 1) | ((uint16_t)syncerr << 0)); +} + +__INLINE void em_ble_rxstatce_unpack(int elt_idx, uint8_t* rxcteerr, uint8_t* nesnerr, uint8_t* snerr, uint8_t* lliderr, uint8_t* micerr, uint8_t* crcerr, uint8_t* lenerr, uint8_t* rxtimeerr, uint8_t* syncerr) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXSTATCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + + *rxcteerr = (localVal & ((uint16_t)0x00008000)) >> 15; + *nesnerr = (localVal & ((uint16_t)0x00000080)) >> 7; + *snerr = (localVal & ((uint16_t)0x00000040)) >> 6; + *lliderr = (localVal & ((uint16_t)0x00000020)) >> 5; + *micerr = (localVal & ((uint16_t)0x00000010)) >> 4; + *crcerr = (localVal & ((uint16_t)0x00000008)) >> 3; + *lenerr = (localVal & ((uint16_t)0x00000004)) >> 2; + *rxtimeerr = (localVal & ((uint16_t)0x00000002)) >> 1; + *syncerr = (localVal & ((uint16_t)0x00000001)) >> 0; +} + +__INLINE uint8_t em_ble_rxstatce_rxcteerr_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXSTATCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00008000)) >> 15); +} + +__INLINE void em_ble_rxstatce_rxcteerr_setf(int elt_idx, uint8_t rxcteerr) +{ + ASSERT_ERR((((uint16_t)rxcteerr << 15) & ~((uint16_t)0x00008000)) == 0); + EM_BLE_WR(EM_BLE_RXSTATCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXSTATCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00008000)) | ((uint16_t)rxcteerr << 15)); +} + +__INLINE uint8_t em_ble_rxstatce_nesn_err_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXSTATCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000080)) >> 7); +} + +__INLINE void em_ble_rxstatce_nesn_err_setf(int elt_idx, uint8_t nesnerr) +{ + ASSERT_ERR((((uint16_t)nesnerr << 7) & ~((uint16_t)0x00000080)) == 0); + EM_BLE_WR(EM_BLE_RXSTATCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXSTATCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00000080)) | ((uint16_t)nesnerr << 7)); +} + +__INLINE uint8_t em_ble_rxstatce_sn_err_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXSTATCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000040)) >> 6); +} + +__INLINE void em_ble_rxstatce_sn_err_setf(int elt_idx, uint8_t snerr) +{ + ASSERT_ERR((((uint16_t)snerr << 6) & ~((uint16_t)0x00000040)) == 0); + EM_BLE_WR(EM_BLE_RXSTATCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXSTATCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00000040)) | ((uint16_t)snerr << 6)); +} + +__INLINE uint8_t em_ble_rxstatce_llid_err_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXSTATCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000020)) >> 5); +} + +__INLINE void em_ble_rxstatce_llid_err_setf(int elt_idx, uint8_t lliderr) +{ + ASSERT_ERR((((uint16_t)lliderr << 5) & ~((uint16_t)0x00000020)) == 0); + EM_BLE_WR(EM_BLE_RXSTATCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXSTATCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00000020)) | ((uint16_t)lliderr << 5)); +} + +__INLINE uint8_t em_ble_rxstatce_mic_err_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXSTATCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000010)) >> 4); +} + +__INLINE void em_ble_rxstatce_mic_err_setf(int elt_idx, uint8_t micerr) +{ + ASSERT_ERR((((uint16_t)micerr << 4) & ~((uint16_t)0x00000010)) == 0); + EM_BLE_WR(EM_BLE_RXSTATCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXSTATCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00000010)) | ((uint16_t)micerr << 4)); +} + +__INLINE uint8_t em_ble_rxstatce_crc_err_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXSTATCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000008)) >> 3); +} + +__INLINE void em_ble_rxstatce_crc_err_setf(int elt_idx, uint8_t crcerr) +{ + ASSERT_ERR((((uint16_t)crcerr << 3) & ~((uint16_t)0x00000008)) == 0); + EM_BLE_WR(EM_BLE_RXSTATCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXSTATCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00000008)) | ((uint16_t)crcerr << 3)); +} + +__INLINE uint8_t em_ble_rxstatce_len_err_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXSTATCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000004)) >> 2); +} + +__INLINE void em_ble_rxstatce_len_err_setf(int elt_idx, uint8_t lenerr) +{ + ASSERT_ERR((((uint16_t)lenerr << 2) & ~((uint16_t)0x00000004)) == 0); + EM_BLE_WR(EM_BLE_RXSTATCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXSTATCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00000004)) | ((uint16_t)lenerr << 2)); +} + +__INLINE uint8_t em_ble_rxstatce_rxtime_err_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXSTATCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000002)) >> 1); +} + +__INLINE void em_ble_rxstatce_rxtime_err_setf(int elt_idx, uint8_t rxtimeerr) +{ + ASSERT_ERR((((uint16_t)rxtimeerr << 1) & ~((uint16_t)0x00000002)) == 0); + EM_BLE_WR(EM_BLE_RXSTATCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXSTATCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00000002)) | ((uint16_t)rxtimeerr << 1)); +} + +__INLINE uint8_t em_ble_rxstatce_sync_err_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXSTATCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000001)) >> 0); +} + +__INLINE void em_ble_rxstatce_sync_err_setf(int elt_idx, uint8_t syncerr) +{ + ASSERT_ERR((((uint16_t)syncerr << 0) & ~((uint16_t)0x00000001)) == 0); + EM_BLE_WR(EM_BLE_RXSTATCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXSTATCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00000001)) | ((uint16_t)syncerr << 0)); +} + +/** + * @brief RXSTATADV register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15 RXCTEERR 0 + * 11 FOLLOWAUXPTR 0 + * 10 DEV_FILTERING_OK 0 + * 09 IN_WHL 0 + * 08 IN_PERADVAL 0 + * 07 PEER_ADD_MATCH 0 + * 06 BDADDR_MATCH 0 + * 05 TYPE_ERR 0 + * 04 PRIV_ERR 0 + * 03 CRC_ERR 0 + * 02 LEN_ERR 0 + * 01 RXTIME_ERR 0 + * 00 SYNC_ERR 0 + *+ */ +#define EM_BLE_RXSTATADV_ADDR (EXCHANGE_MEM_BASE+0x02 + EM_BLE_RX_DESC_OFFSET) +#define EM_BLE_RXSTATADV_INDEX 0x00000001 +#define EM_BLE_RXSTATADV_RESET 0x00000000 + +__INLINE uint16_t em_ble_rxstatadv_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_RXSTATADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); +} + +__INLINE void em_ble_rxstatadv_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_RXSTATADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, value); +} + +// field definitions +#define EM_BLE_RXCTEERR_BIT ((uint16_t)0x00008000) +#define EM_BLE_RXCTEERR_POS 15 +#define EM_BLE_FOLLOWAUXPTR_BIT ((uint16_t)0x00000800) +#define EM_BLE_FOLLOWAUXPTR_POS 11 +#define EM_BLE_DEV_FILTERING_OK_BIT ((uint16_t)0x00000400) +#define EM_BLE_DEV_FILTERING_OK_POS 10 +#define EM_BLE_IN_WHL_BIT ((uint16_t)0x00000200) +#define EM_BLE_IN_WHL_POS 9 +#define EM_BLE_IN_PERADVAL_BIT ((uint16_t)0x00000100) +#define EM_BLE_IN_PERADVAL_POS 8 +#define EM_BLE_PEER_ADD_MATCH_BIT ((uint16_t)0x00000080) +#define EM_BLE_PEER_ADD_MATCH_POS 7 +#define EM_BLE_BDADDR_MATCH_BIT ((uint16_t)0x00000040) +#define EM_BLE_BDADDR_MATCH_POS 6 +#define EM_BLE_TYPE_ERR_BIT ((uint16_t)0x00000020) +#define EM_BLE_TYPE_ERR_POS 5 +#define EM_BLE_PRIV_ERR_BIT ((uint16_t)0x00000010) +#define EM_BLE_PRIV_ERR_POS 4 +#define EM_BLE_CRC_ERR_BIT ((uint16_t)0x00000008) +#define EM_BLE_CRC_ERR_POS 3 +#define EM_BLE_LEN_ERR_BIT ((uint16_t)0x00000004) +#define EM_BLE_LEN_ERR_POS 2 +#define EM_BLE_RXTIME_ERR_BIT ((uint16_t)0x00000002) +#define EM_BLE_RXTIME_ERR_POS 1 +#define EM_BLE_SYNC_ERR_BIT ((uint16_t)0x00000001) +#define EM_BLE_SYNC_ERR_POS 0 + +#define EM_BLE_RXCTEERR_RST 0x0 +#define EM_BLE_FOLLOWAUXPTR_RST 0x0 +#define EM_BLE_DEV_FILTERING_OK_RST 0x0 +#define EM_BLE_IN_WHL_RST 0x0 +#define EM_BLE_IN_PERADVAL_RST 0x0 +#define EM_BLE_PEER_ADD_MATCH_RST 0x0 +#define EM_BLE_BDADDR_MATCH_RST 0x0 +#define EM_BLE_TYPE_ERR_RST 0x0 +#define EM_BLE_PRIV_ERR_RST 0x0 +#define EM_BLE_CRC_ERR_RST 0x0 +#define EM_BLE_LEN_ERR_RST 0x0 +#define EM_BLE_RXTIME_ERR_RST 0x0 +#define EM_BLE_SYNC_ERR_RST 0x0 + +__INLINE void em_ble_rxstatadv_pack(int elt_idx, uint8_t rxcteerr, uint8_t followauxptr, uint8_t devfilteringok, uint8_t inwhl, uint8_t inperadval, uint8_t peeraddmatch, uint8_t bdaddrmatch, uint8_t typeerr, uint8_t priverr, uint8_t crcerr, uint8_t lenerr, uint8_t rxtimeerr, uint8_t syncerr) +{ + ASSERT_ERR((((uint16_t)rxcteerr << 15) & ~((uint16_t)0x00008000)) == 0); + ASSERT_ERR((((uint16_t)followauxptr << 11) & ~((uint16_t)0x00000800)) == 0); + ASSERT_ERR((((uint16_t)devfilteringok << 10) & ~((uint16_t)0x00000400)) == 0); + ASSERT_ERR((((uint16_t)inwhl << 9) & ~((uint16_t)0x00000200)) == 0); + ASSERT_ERR((((uint16_t)inperadval << 8) & ~((uint16_t)0x00000100)) == 0); + ASSERT_ERR((((uint16_t)peeraddmatch << 7) & ~((uint16_t)0x00000080)) == 0); + ASSERT_ERR((((uint16_t)bdaddrmatch << 6) & ~((uint16_t)0x00000040)) == 0); + ASSERT_ERR((((uint16_t)typeerr << 5) & ~((uint16_t)0x00000020)) == 0); + ASSERT_ERR((((uint16_t)priverr << 4) & ~((uint16_t)0x00000010)) == 0); + ASSERT_ERR((((uint16_t)crcerr << 3) & ~((uint16_t)0x00000008)) == 0); + ASSERT_ERR((((uint16_t)lenerr << 2) & ~((uint16_t)0x00000004)) == 0); + ASSERT_ERR((((uint16_t)rxtimeerr << 1) & ~((uint16_t)0x00000002)) == 0); + ASSERT_ERR((((uint16_t)syncerr << 0) & ~((uint16_t)0x00000001)) == 0); + EM_BLE_WR(EM_BLE_RXSTATADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, ((uint16_t)rxcteerr << 15) | ((uint16_t)followauxptr << 11) | ((uint16_t)devfilteringok << 10) | ((uint16_t)inwhl << 9) | ((uint16_t)inperadval << 8) | ((uint16_t)peeraddmatch << 7) | ((uint16_t)bdaddrmatch << 6) | ((uint16_t)typeerr << 5) | ((uint16_t)priverr << 4) | ((uint16_t)crcerr << 3) | ((uint16_t)lenerr << 2) | ((uint16_t)rxtimeerr << 1) | ((uint16_t)syncerr << 0)); +} + +__INLINE void em_ble_rxstatadv_unpack(int elt_idx, uint8_t* rxcteerr, uint8_t* followauxptr, uint8_t* devfilteringok, uint8_t* inwhl, uint8_t* inperadval, uint8_t* peeraddmatch, uint8_t* bdaddrmatch, uint8_t* typeerr, uint8_t* priverr, uint8_t* crcerr, uint8_t* lenerr, uint8_t* rxtimeerr, uint8_t* syncerr) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXSTATADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + + *rxcteerr = (localVal & ((uint16_t)0x00008000)) >> 15; + *followauxptr = (localVal & ((uint16_t)0x00000800)) >> 11; + *devfilteringok = (localVal & ((uint16_t)0x00000400)) >> 10; + *inwhl = (localVal & ((uint16_t)0x00000200)) >> 9; + *inperadval = (localVal & ((uint16_t)0x00000100)) >> 8; + *peeraddmatch = (localVal & ((uint16_t)0x00000080)) >> 7; + *bdaddrmatch = (localVal & ((uint16_t)0x00000040)) >> 6; + *typeerr = (localVal & ((uint16_t)0x00000020)) >> 5; + *priverr = (localVal & ((uint16_t)0x00000010)) >> 4; + *crcerr = (localVal & ((uint16_t)0x00000008)) >> 3; + *lenerr = (localVal & ((uint16_t)0x00000004)) >> 2; + *rxtimeerr = (localVal & ((uint16_t)0x00000002)) >> 1; + *syncerr = (localVal & ((uint16_t)0x00000001)) >> 0; +} + +__INLINE uint8_t em_ble_rxstatadv_rxcteerr_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXSTATADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00008000)) >> 15); +} + +__INLINE void em_ble_rxstatadv_rxcteerr_setf(int elt_idx, uint8_t rxcteerr) +{ + ASSERT_ERR((((uint16_t)rxcteerr << 15) & ~((uint16_t)0x00008000)) == 0); + EM_BLE_WR(EM_BLE_RXSTATADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXSTATADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00008000)) | ((uint16_t)rxcteerr << 15)); +} + +__INLINE uint8_t em_ble_rxstatadv_followauxptr_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXSTATADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000800)) >> 11); +} + +__INLINE void em_ble_rxstatadv_followauxptr_setf(int elt_idx, uint8_t followauxptr) +{ + ASSERT_ERR((((uint16_t)followauxptr << 11) & ~((uint16_t)0x00000800)) == 0); + EM_BLE_WR(EM_BLE_RXSTATADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXSTATADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00000800)) | ((uint16_t)followauxptr << 11)); +} + +__INLINE uint8_t em_ble_rxstatadv_dev_filtering_ok_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXSTATADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000400)) >> 10); +} + +__INLINE void em_ble_rxstatadv_dev_filtering_ok_setf(int elt_idx, uint8_t devfilteringok) +{ + ASSERT_ERR((((uint16_t)devfilteringok << 10) & ~((uint16_t)0x00000400)) == 0); + EM_BLE_WR(EM_BLE_RXSTATADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXSTATADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00000400)) | ((uint16_t)devfilteringok << 10)); +} + +__INLINE uint8_t em_ble_rxstatadv_in_whl_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXSTATADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000200)) >> 9); +} + +__INLINE void em_ble_rxstatadv_in_whl_setf(int elt_idx, uint8_t inwhl) +{ + ASSERT_ERR((((uint16_t)inwhl << 9) & ~((uint16_t)0x00000200)) == 0); + EM_BLE_WR(EM_BLE_RXSTATADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXSTATADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00000200)) | ((uint16_t)inwhl << 9)); +} + +__INLINE uint8_t em_ble_rxstatadv_in_peradval_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXSTATADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000100)) >> 8); +} + +__INLINE void em_ble_rxstatadv_in_peradval_setf(int elt_idx, uint8_t inperadval) +{ + ASSERT_ERR((((uint16_t)inperadval << 8) & ~((uint16_t)0x00000100)) == 0); + EM_BLE_WR(EM_BLE_RXSTATADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXSTATADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00000100)) | ((uint16_t)inperadval << 8)); +} + +__INLINE uint8_t em_ble_rxstatadv_peer_add_match_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXSTATADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000080)) >> 7); +} + +__INLINE void em_ble_rxstatadv_peer_add_match_setf(int elt_idx, uint8_t peeraddmatch) +{ + ASSERT_ERR((((uint16_t)peeraddmatch << 7) & ~((uint16_t)0x00000080)) == 0); + EM_BLE_WR(EM_BLE_RXSTATADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXSTATADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00000080)) | ((uint16_t)peeraddmatch << 7)); +} + +__INLINE uint8_t em_ble_rxstatadv_bdaddr_match_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXSTATADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000040)) >> 6); +} + +__INLINE void em_ble_rxstatadv_bdaddr_match_setf(int elt_idx, uint8_t bdaddrmatch) +{ + ASSERT_ERR((((uint16_t)bdaddrmatch << 6) & ~((uint16_t)0x00000040)) == 0); + EM_BLE_WR(EM_BLE_RXSTATADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXSTATADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00000040)) | ((uint16_t)bdaddrmatch << 6)); +} + +__INLINE uint8_t em_ble_rxstatadv_type_err_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXSTATADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000020)) >> 5); +} + +__INLINE void em_ble_rxstatadv_type_err_setf(int elt_idx, uint8_t typeerr) +{ + ASSERT_ERR((((uint16_t)typeerr << 5) & ~((uint16_t)0x00000020)) == 0); + EM_BLE_WR(EM_BLE_RXSTATADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXSTATADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00000020)) | ((uint16_t)typeerr << 5)); +} + +__INLINE uint8_t em_ble_rxstatadv_priv_err_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXSTATADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000010)) >> 4); +} + +__INLINE void em_ble_rxstatadv_priv_err_setf(int elt_idx, uint8_t priverr) +{ + ASSERT_ERR((((uint16_t)priverr << 4) & ~((uint16_t)0x00000010)) == 0); + EM_BLE_WR(EM_BLE_RXSTATADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXSTATADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00000010)) | ((uint16_t)priverr << 4)); +} + +__INLINE uint8_t em_ble_rxstatadv_crc_err_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXSTATADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000008)) >> 3); +} + +__INLINE void em_ble_rxstatadv_crc_err_setf(int elt_idx, uint8_t crcerr) +{ + ASSERT_ERR((((uint16_t)crcerr << 3) & ~((uint16_t)0x00000008)) == 0); + EM_BLE_WR(EM_BLE_RXSTATADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXSTATADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00000008)) | ((uint16_t)crcerr << 3)); +} + +__INLINE uint8_t em_ble_rxstatadv_len_err_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXSTATADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000004)) >> 2); +} + +__INLINE void em_ble_rxstatadv_len_err_setf(int elt_idx, uint8_t lenerr) +{ + ASSERT_ERR((((uint16_t)lenerr << 2) & ~((uint16_t)0x00000004)) == 0); + EM_BLE_WR(EM_BLE_RXSTATADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXSTATADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00000004)) | ((uint16_t)lenerr << 2)); +} + +__INLINE uint8_t em_ble_rxstatadv_rxtime_err_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXSTATADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000002)) >> 1); +} + +__INLINE void em_ble_rxstatadv_rxtime_err_setf(int elt_idx, uint8_t rxtimeerr) +{ + ASSERT_ERR((((uint16_t)rxtimeerr << 1) & ~((uint16_t)0x00000002)) == 0); + EM_BLE_WR(EM_BLE_RXSTATADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXSTATADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00000002)) | ((uint16_t)rxtimeerr << 1)); +} + +__INLINE uint8_t em_ble_rxstatadv_sync_err_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXSTATADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000001)) >> 0); +} + +__INLINE void em_ble_rxstatadv_sync_err_setf(int elt_idx, uint8_t syncerr) +{ + ASSERT_ERR((((uint16_t)syncerr << 0) & ~((uint16_t)0x00000001)) == 0); + EM_BLE_WR(EM_BLE_RXSTATADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXSTATADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00000001)) | ((uint16_t)syncerr << 0)); +} + +/** + * @brief RXSTATISOM0 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:11 RXSTREAM_LBL 0x0 + * 10:08 RXGROUP_LBL 0x0 + * 07 NESN_ERR 0 + * 06 SN_ERR 0 + * 05 LLID_ERR 0 + * 04 MIC_ERR 0 + * 03 CRC_ERR 0 + * 02 LEN_ERR 0 + * 01 RXTIME_ERR 0 + * 00 SYNC_ERR 0 + *+ */ +#define EM_BLE_RXSTATISOM0_ADDR (EXCHANGE_MEM_BASE+0x02 + EM_BLE_RX_DESC_OFFSET) +#define EM_BLE_RXSTATISOM0_INDEX 0x00000001 +#define EM_BLE_RXSTATISOM0_RESET 0x00000000 + +__INLINE uint16_t em_ble_rxstatisom0_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_RXSTATISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); +} + +__INLINE void em_ble_rxstatisom0_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_RXSTATISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, value); +} + +// field definitions +#define EM_BLE_RXSTREAM_LBL_MASK ((uint16_t)0x0000F800) +#define EM_BLE_RXSTREAM_LBL_LSB 11 +#define EM_BLE_RXSTREAM_LBL_WIDTH ((uint16_t)0x00000005) +#define EM_BLE_RXGROUP_LBL_MASK ((uint16_t)0x00000700) +#define EM_BLE_RXGROUP_LBL_LSB 8 +#define EM_BLE_RXGROUP_LBL_WIDTH ((uint16_t)0x00000003) +#define EM_BLE_NESN_ERR_BIT ((uint16_t)0x00000080) +#define EM_BLE_NESN_ERR_POS 7 +#define EM_BLE_SN_ERR_BIT ((uint16_t)0x00000040) +#define EM_BLE_SN_ERR_POS 6 +#define EM_BLE_LLID_ERR_BIT ((uint16_t)0x00000020) +#define EM_BLE_LLID_ERR_POS 5 +#define EM_BLE_MIC_ERR_BIT ((uint16_t)0x00000010) +#define EM_BLE_MIC_ERR_POS 4 +#define EM_BLE_CRC_ERR_BIT ((uint16_t)0x00000008) +#define EM_BLE_CRC_ERR_POS 3 +#define EM_BLE_LEN_ERR_BIT ((uint16_t)0x00000004) +#define EM_BLE_LEN_ERR_POS 2 +#define EM_BLE_RXTIME_ERR_BIT ((uint16_t)0x00000002) +#define EM_BLE_RXTIME_ERR_POS 1 +#define EM_BLE_SYNC_ERR_BIT ((uint16_t)0x00000001) +#define EM_BLE_SYNC_ERR_POS 0 + +#define EM_BLE_RXSTREAM_LBL_RST 0x0 +#define EM_BLE_RXGROUP_LBL_RST 0x0 +#define EM_BLE_NESN_ERR_RST 0x0 +#define EM_BLE_SN_ERR_RST 0x0 +#define EM_BLE_LLID_ERR_RST 0x0 +#define EM_BLE_MIC_ERR_RST 0x0 +#define EM_BLE_CRC_ERR_RST 0x0 +#define EM_BLE_LEN_ERR_RST 0x0 +#define EM_BLE_RXTIME_ERR_RST 0x0 +#define EM_BLE_SYNC_ERR_RST 0x0 + +__INLINE void em_ble_rxstatisom0_pack(int elt_idx, uint8_t rxstreamlbl, uint8_t rxgrouplbl, uint8_t nesnerr, uint8_t snerr, uint8_t lliderr, uint8_t micerr, uint8_t crcerr, uint8_t lenerr, uint8_t rxtimeerr, uint8_t syncerr) +{ + ASSERT_ERR((((uint16_t)rxstreamlbl << 11) & ~((uint16_t)0x0000F800)) == 0); + ASSERT_ERR((((uint16_t)rxgrouplbl << 8) & ~((uint16_t)0x00000700)) == 0); + ASSERT_ERR((((uint16_t)nesnerr << 7) & ~((uint16_t)0x00000080)) == 0); + ASSERT_ERR((((uint16_t)snerr << 6) & ~((uint16_t)0x00000040)) == 0); + ASSERT_ERR((((uint16_t)lliderr << 5) & ~((uint16_t)0x00000020)) == 0); + ASSERT_ERR((((uint16_t)micerr << 4) & ~((uint16_t)0x00000010)) == 0); + ASSERT_ERR((((uint16_t)crcerr << 3) & ~((uint16_t)0x00000008)) == 0); + ASSERT_ERR((((uint16_t)lenerr << 2) & ~((uint16_t)0x00000004)) == 0); + ASSERT_ERR((((uint16_t)rxtimeerr << 1) & ~((uint16_t)0x00000002)) == 0); + ASSERT_ERR((((uint16_t)syncerr << 0) & ~((uint16_t)0x00000001)) == 0); + EM_BLE_WR(EM_BLE_RXSTATISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, ((uint16_t)rxstreamlbl << 11) | ((uint16_t)rxgrouplbl << 8) | ((uint16_t)nesnerr << 7) | ((uint16_t)snerr << 6) | ((uint16_t)lliderr << 5) | ((uint16_t)micerr << 4) | ((uint16_t)crcerr << 3) | ((uint16_t)lenerr << 2) | ((uint16_t)rxtimeerr << 1) | ((uint16_t)syncerr << 0)); +} + +__INLINE void em_ble_rxstatisom0_unpack(int elt_idx, uint8_t* rxstreamlbl, uint8_t* rxgrouplbl, uint8_t* nesnerr, uint8_t* snerr, uint8_t* lliderr, uint8_t* micerr, uint8_t* crcerr, uint8_t* lenerr, uint8_t* rxtimeerr, uint8_t* syncerr) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXSTATISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + + *rxstreamlbl = (localVal & ((uint16_t)0x0000F800)) >> 11; + *rxgrouplbl = (localVal & ((uint16_t)0x00000700)) >> 8; + *nesnerr = (localVal & ((uint16_t)0x00000080)) >> 7; + *snerr = (localVal & ((uint16_t)0x00000040)) >> 6; + *lliderr = (localVal & ((uint16_t)0x00000020)) >> 5; + *micerr = (localVal & ((uint16_t)0x00000010)) >> 4; + *crcerr = (localVal & ((uint16_t)0x00000008)) >> 3; + *lenerr = (localVal & ((uint16_t)0x00000004)) >> 2; + *rxtimeerr = (localVal & ((uint16_t)0x00000002)) >> 1; + *syncerr = (localVal & ((uint16_t)0x00000001)) >> 0; +} + +__INLINE uint8_t em_ble_rxstatisom0_rxstream_lbl_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXSTATISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x0000F800)) >> 11); +} + +__INLINE void em_ble_rxstatisom0_rxstream_lbl_setf(int elt_idx, uint8_t rxstreamlbl) +{ + ASSERT_ERR((((uint16_t)rxstreamlbl << 11) & ~((uint16_t)0x0000F800)) == 0); + EM_BLE_WR(EM_BLE_RXSTATISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXSTATISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x0000F800)) | ((uint16_t)rxstreamlbl << 11)); +} + +__INLINE uint8_t em_ble_rxstatisom0_rxgroup_lbl_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXSTATISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000700)) >> 8); +} + +__INLINE void em_ble_rxstatisom0_rxgroup_lbl_setf(int elt_idx, uint8_t rxgrouplbl) +{ + ASSERT_ERR((((uint16_t)rxgrouplbl << 8) & ~((uint16_t)0x00000700)) == 0); + EM_BLE_WR(EM_BLE_RXSTATISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXSTATISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00000700)) | ((uint16_t)rxgrouplbl << 8)); +} + +__INLINE uint8_t em_ble_rxstatisom0_nesn_err_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXSTATISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000080)) >> 7); +} + +__INLINE void em_ble_rxstatisom0_nesn_err_setf(int elt_idx, uint8_t nesnerr) +{ + ASSERT_ERR((((uint16_t)nesnerr << 7) & ~((uint16_t)0x00000080)) == 0); + EM_BLE_WR(EM_BLE_RXSTATISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXSTATISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00000080)) | ((uint16_t)nesnerr << 7)); +} + +__INLINE uint8_t em_ble_rxstatisom0_sn_err_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXSTATISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000040)) >> 6); +} + +__INLINE void em_ble_rxstatisom0_sn_err_setf(int elt_idx, uint8_t snerr) +{ + ASSERT_ERR((((uint16_t)snerr << 6) & ~((uint16_t)0x00000040)) == 0); + EM_BLE_WR(EM_BLE_RXSTATISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXSTATISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00000040)) | ((uint16_t)snerr << 6)); +} + +__INLINE uint8_t em_ble_rxstatisom0_llid_err_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXSTATISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000020)) >> 5); +} + +__INLINE void em_ble_rxstatisom0_llid_err_setf(int elt_idx, uint8_t lliderr) +{ + ASSERT_ERR((((uint16_t)lliderr << 5) & ~((uint16_t)0x00000020)) == 0); + EM_BLE_WR(EM_BLE_RXSTATISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXSTATISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00000020)) | ((uint16_t)lliderr << 5)); +} + +__INLINE uint8_t em_ble_rxstatisom0_mic_err_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXSTATISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000010)) >> 4); +} + +__INLINE void em_ble_rxstatisom0_mic_err_setf(int elt_idx, uint8_t micerr) +{ + ASSERT_ERR((((uint16_t)micerr << 4) & ~((uint16_t)0x00000010)) == 0); + EM_BLE_WR(EM_BLE_RXSTATISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXSTATISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00000010)) | ((uint16_t)micerr << 4)); +} + +__INLINE uint8_t em_ble_rxstatisom0_crc_err_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXSTATISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000008)) >> 3); +} + +__INLINE void em_ble_rxstatisom0_crc_err_setf(int elt_idx, uint8_t crcerr) +{ + ASSERT_ERR((((uint16_t)crcerr << 3) & ~((uint16_t)0x00000008)) == 0); + EM_BLE_WR(EM_BLE_RXSTATISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXSTATISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00000008)) | ((uint16_t)crcerr << 3)); +} + +__INLINE uint8_t em_ble_rxstatisom0_len_err_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXSTATISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000004)) >> 2); +} + +__INLINE void em_ble_rxstatisom0_len_err_setf(int elt_idx, uint8_t lenerr) +{ + ASSERT_ERR((((uint16_t)lenerr << 2) & ~((uint16_t)0x00000004)) == 0); + EM_BLE_WR(EM_BLE_RXSTATISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXSTATISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00000004)) | ((uint16_t)lenerr << 2)); +} + +__INLINE uint8_t em_ble_rxstatisom0_rxtime_err_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXSTATISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000002)) >> 1); +} + +__INLINE void em_ble_rxstatisom0_rxtime_err_setf(int elt_idx, uint8_t rxtimeerr) +{ + ASSERT_ERR((((uint16_t)rxtimeerr << 1) & ~((uint16_t)0x00000002)) == 0); + EM_BLE_WR(EM_BLE_RXSTATISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXSTATISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00000002)) | ((uint16_t)rxtimeerr << 1)); +} + +__INLINE uint8_t em_ble_rxstatisom0_sync_err_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXSTATISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000001)) >> 0); +} + +__INLINE void em_ble_rxstatisom0_sync_err_setf(int elt_idx, uint8_t syncerr) +{ + ASSERT_ERR((((uint16_t)syncerr << 0) & ~((uint16_t)0x00000001)) == 0); + EM_BLE_WR(EM_BLE_RXSTATISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXSTATISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00000001)) | ((uint16_t)syncerr << 0)); +} + +/** + * @brief RXPHCE register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:08 RXLEN 0x0 + * 07:06 RXACLRFU 0x0 + * 05 RXCP 0 + * 04 RXMD 0 + * 03 RXSN 0 + * 02 RXNESN 0 + * 01:00 RXLLID 0x0 + *+ */ +#define EM_BLE_RXPHCE_ADDR (EXCHANGE_MEM_BASE+0x04 + EM_BLE_RX_DESC_OFFSET) +#define EM_BLE_RXPHCE_INDEX 0x00000002 +#define EM_BLE_RXPHCE_RESET 0x00000000 + +__INLINE uint16_t em_ble_rxphce_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_RXPHCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); +} + +__INLINE void em_ble_rxphce_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_RXPHCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, value); +} + +// field definitions +#define EM_BLE_RXLEN_MASK ((uint16_t)0x0000FF00) +#define EM_BLE_RXLEN_LSB 8 +#define EM_BLE_RXLEN_WIDTH ((uint16_t)0x00000008) +#define EM_BLE_RXACLRFU_MASK ((uint16_t)0x000000C0) +#define EM_BLE_RXACLRFU_LSB 6 +#define EM_BLE_RXACLRFU_WIDTH ((uint16_t)0x00000002) +#define EM_BLE_RXCP_BIT ((uint16_t)0x00000020) +#define EM_BLE_RXCP_POS 5 +#define EM_BLE_RXMD_BIT ((uint16_t)0x00000010) +#define EM_BLE_RXMD_POS 4 +#define EM_BLE_RXSN_BIT ((uint16_t)0x00000008) +#define EM_BLE_RXSN_POS 3 +#define EM_BLE_RXNESN_BIT ((uint16_t)0x00000004) +#define EM_BLE_RXNESN_POS 2 +#define EM_BLE_RXLLID_MASK ((uint16_t)0x00000003) +#define EM_BLE_RXLLID_LSB 0 +#define EM_BLE_RXLLID_WIDTH ((uint16_t)0x00000002) + +#define EM_BLE_RXLEN_RST 0x0 +#define EM_BLE_RXACLRFU_RST 0x0 +#define EM_BLE_RXCP_RST 0x0 +#define EM_BLE_RXMD_RST 0x0 +#define EM_BLE_RXSN_RST 0x0 +#define EM_BLE_RXNESN_RST 0x0 +#define EM_BLE_RXLLID_RST 0x0 + +__INLINE void em_ble_rxphce_pack(int elt_idx, uint8_t rxlen, uint8_t rxaclrfu, uint8_t rxcp, uint8_t rxmd, uint8_t rxsn, uint8_t rxnesn, uint8_t rxllid) +{ + ASSERT_ERR((((uint16_t)rxlen << 8) & ~((uint16_t)0x0000FF00)) == 0); + ASSERT_ERR((((uint16_t)rxaclrfu << 6) & ~((uint16_t)0x000000C0)) == 0); + ASSERT_ERR((((uint16_t)rxcp << 5) & ~((uint16_t)0x00000020)) == 0); + ASSERT_ERR((((uint16_t)rxmd << 4) & ~((uint16_t)0x00000010)) == 0); + ASSERT_ERR((((uint16_t)rxsn << 3) & ~((uint16_t)0x00000008)) == 0); + ASSERT_ERR((((uint16_t)rxnesn << 2) & ~((uint16_t)0x00000004)) == 0); + ASSERT_ERR((((uint16_t)rxllid << 0) & ~((uint16_t)0x00000003)) == 0); + EM_BLE_WR(EM_BLE_RXPHCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, ((uint16_t)rxlen << 8) | ((uint16_t)rxaclrfu << 6) | ((uint16_t)rxcp << 5) | ((uint16_t)rxmd << 4) | ((uint16_t)rxsn << 3) | ((uint16_t)rxnesn << 2) | ((uint16_t)rxllid << 0)); +} + +__INLINE void em_ble_rxphce_unpack(int elt_idx, uint8_t* rxlen, uint8_t* rxaclrfu, uint8_t* rxcp, uint8_t* rxmd, uint8_t* rxsn, uint8_t* rxnesn, uint8_t* rxllid) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXPHCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + + *rxlen = (localVal & ((uint16_t)0x0000FF00)) >> 8; + *rxaclrfu = (localVal & ((uint16_t)0x000000C0)) >> 6; + *rxcp = (localVal & ((uint16_t)0x00000020)) >> 5; + *rxmd = (localVal & ((uint16_t)0x00000010)) >> 4; + *rxsn = (localVal & ((uint16_t)0x00000008)) >> 3; + *rxnesn = (localVal & ((uint16_t)0x00000004)) >> 2; + *rxllid = (localVal & ((uint16_t)0x00000003)) >> 0; +} + +__INLINE uint8_t em_ble_rxphce_rxlen_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXPHCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x0000FF00)) >> 8); +} + +__INLINE void em_ble_rxphce_rxlen_setf(int elt_idx, uint8_t rxlen) +{ + ASSERT_ERR((((uint16_t)rxlen << 8) & ~((uint16_t)0x0000FF00)) == 0); + EM_BLE_WR(EM_BLE_RXPHCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXPHCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x0000FF00)) | ((uint16_t)rxlen << 8)); +} + +__INLINE uint8_t em_ble_rxphce_rxaclrfu_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXPHCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x000000C0)) >> 6); +} + +__INLINE void em_ble_rxphce_rxaclrfu_setf(int elt_idx, uint8_t rxaclrfu) +{ + ASSERT_ERR((((uint16_t)rxaclrfu << 6) & ~((uint16_t)0x000000C0)) == 0); + EM_BLE_WR(EM_BLE_RXPHCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXPHCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x000000C0)) | ((uint16_t)rxaclrfu << 6)); +} + +__INLINE uint8_t em_ble_rxphce_rxcp_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXPHCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000020)) >> 5); +} + +__INLINE void em_ble_rxphce_rxcp_setf(int elt_idx, uint8_t rxcp) +{ + ASSERT_ERR((((uint16_t)rxcp << 5) & ~((uint16_t)0x00000020)) == 0); + EM_BLE_WR(EM_BLE_RXPHCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXPHCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00000020)) | ((uint16_t)rxcp << 5)); +} + +__INLINE uint8_t em_ble_rxphce_rxmd_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXPHCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000010)) >> 4); +} + +__INLINE void em_ble_rxphce_rxmd_setf(int elt_idx, uint8_t rxmd) +{ + ASSERT_ERR((((uint16_t)rxmd << 4) & ~((uint16_t)0x00000010)) == 0); + EM_BLE_WR(EM_BLE_RXPHCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXPHCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00000010)) | ((uint16_t)rxmd << 4)); +} + +__INLINE uint8_t em_ble_rxphce_rxsn_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXPHCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000008)) >> 3); +} + +__INLINE void em_ble_rxphce_rxsn_setf(int elt_idx, uint8_t rxsn) +{ + ASSERT_ERR((((uint16_t)rxsn << 3) & ~((uint16_t)0x00000008)) == 0); + EM_BLE_WR(EM_BLE_RXPHCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXPHCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00000008)) | ((uint16_t)rxsn << 3)); +} + +__INLINE uint8_t em_ble_rxphce_rxnesn_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXPHCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000004)) >> 2); +} + +__INLINE void em_ble_rxphce_rxnesn_setf(int elt_idx, uint8_t rxnesn) +{ + ASSERT_ERR((((uint16_t)rxnesn << 2) & ~((uint16_t)0x00000004)) == 0); + EM_BLE_WR(EM_BLE_RXPHCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXPHCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00000004)) | ((uint16_t)rxnesn << 2)); +} + +__INLINE uint8_t em_ble_rxphce_rxllid_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXPHCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000003)) >> 0); +} + +__INLINE void em_ble_rxphce_rxllid_setf(int elt_idx, uint8_t rxllid) +{ + ASSERT_ERR((((uint16_t)rxllid << 0) & ~((uint16_t)0x00000003)) == 0); + EM_BLE_WR(EM_BLE_RXPHCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXPHCE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00000003)) | ((uint16_t)rxllid << 0)); +} + +/** + * @brief RXPHADV register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:08 RXADVLEN 0x0 + * 07 RXRXADD 0 + * 06 RXTXADD 0 + * 05 RXCHSEL2 0 + * 04 RXADVRFU 0 + * 03:00 RXTYPE 0x0 + *+ */ +#define EM_BLE_RXPHADV_ADDR (EXCHANGE_MEM_BASE+0x04 + EM_BLE_RX_DESC_OFFSET) +#define EM_BLE_RXPHADV_INDEX 0x00000002 +#define EM_BLE_RXPHADV_RESET 0x00000000 + +__INLINE uint16_t em_ble_rxphadv_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_RXPHADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); +} + +__INLINE void em_ble_rxphadv_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_RXPHADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, value); +} + +// field definitions +#define EM_BLE_RXADVLEN_MASK ((uint16_t)0x0000FF00) +#define EM_BLE_RXADVLEN_LSB 8 +#define EM_BLE_RXADVLEN_WIDTH ((uint16_t)0x00000008) +#define EM_BLE_RXRXADD_BIT ((uint16_t)0x00000080) +#define EM_BLE_RXRXADD_POS 7 +#define EM_BLE_RXTXADD_BIT ((uint16_t)0x00000040) +#define EM_BLE_RXTXADD_POS 6 +#define EM_BLE_RXCHSEL2_BIT ((uint16_t)0x00000020) +#define EM_BLE_RXCHSEL2_POS 5 +#define EM_BLE_RXADVRFU_BIT ((uint16_t)0x00000010) +#define EM_BLE_RXADVRFU_POS 4 +#define EM_BLE_RXTYPE_MASK ((uint16_t)0x0000000F) +#define EM_BLE_RXTYPE_LSB 0 +#define EM_BLE_RXTYPE_WIDTH ((uint16_t)0x00000004) + +#define EM_BLE_RXADVLEN_RST 0x0 +#define EM_BLE_RXRXADD_RST 0x0 +#define EM_BLE_RXTXADD_RST 0x0 +#define EM_BLE_RXCHSEL2_RST 0x0 +#define EM_BLE_RXADVRFU_RST 0x0 +#define EM_BLE_RXTYPE_RST 0x0 + +__INLINE void em_ble_rxphadv_pack(int elt_idx, uint8_t rxadvlen, uint8_t rxrxadd, uint8_t rxtxadd, uint8_t rxchsel2, uint8_t rxadvrfu, uint8_t rxtype) +{ + ASSERT_ERR((((uint16_t)rxadvlen << 8) & ~((uint16_t)0x0000FF00)) == 0); + ASSERT_ERR((((uint16_t)rxrxadd << 7) & ~((uint16_t)0x00000080)) == 0); + ASSERT_ERR((((uint16_t)rxtxadd << 6) & ~((uint16_t)0x00000040)) == 0); + ASSERT_ERR((((uint16_t)rxchsel2 << 5) & ~((uint16_t)0x00000020)) == 0); + ASSERT_ERR((((uint16_t)rxadvrfu << 4) & ~((uint16_t)0x00000010)) == 0); + ASSERT_ERR((((uint16_t)rxtype << 0) & ~((uint16_t)0x0000000F)) == 0); + EM_BLE_WR(EM_BLE_RXPHADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, ((uint16_t)rxadvlen << 8) | ((uint16_t)rxrxadd << 7) | ((uint16_t)rxtxadd << 6) | ((uint16_t)rxchsel2 << 5) | ((uint16_t)rxadvrfu << 4) | ((uint16_t)rxtype << 0)); +} + +__INLINE void em_ble_rxphadv_unpack(int elt_idx, uint8_t* rxadvlen, uint8_t* rxrxadd, uint8_t* rxtxadd, uint8_t* rxchsel2, uint8_t* rxadvrfu, uint8_t* rxtype) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXPHADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + + *rxadvlen = (localVal & ((uint16_t)0x0000FF00)) >> 8; + *rxrxadd = (localVal & ((uint16_t)0x00000080)) >> 7; + *rxtxadd = (localVal & ((uint16_t)0x00000040)) >> 6; + *rxchsel2 = (localVal & ((uint16_t)0x00000020)) >> 5; + *rxadvrfu = (localVal & ((uint16_t)0x00000010)) >> 4; + *rxtype = (localVal & ((uint16_t)0x0000000F)) >> 0; +} + +__INLINE uint8_t em_ble_rxphadv_rxadvlen_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXPHADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x0000FF00)) >> 8); +} + +__INLINE void em_ble_rxphadv_rxadvlen_setf(int elt_idx, uint8_t rxadvlen) +{ + ASSERT_ERR((((uint16_t)rxadvlen << 8) & ~((uint16_t)0x0000FF00)) == 0); + EM_BLE_WR(EM_BLE_RXPHADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXPHADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x0000FF00)) | ((uint16_t)rxadvlen << 8)); +} + +__INLINE uint8_t em_ble_rxphadv_rxrxadd_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXPHADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000080)) >> 7); +} + +__INLINE void em_ble_rxphadv_rxrxadd_setf(int elt_idx, uint8_t rxrxadd) +{ + ASSERT_ERR((((uint16_t)rxrxadd << 7) & ~((uint16_t)0x00000080)) == 0); + EM_BLE_WR(EM_BLE_RXPHADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXPHADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00000080)) | ((uint16_t)rxrxadd << 7)); +} + +__INLINE uint8_t em_ble_rxphadv_rxtxadd_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXPHADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000040)) >> 6); +} + +__INLINE void em_ble_rxphadv_rxtxadd_setf(int elt_idx, uint8_t rxtxadd) +{ + ASSERT_ERR((((uint16_t)rxtxadd << 6) & ~((uint16_t)0x00000040)) == 0); + EM_BLE_WR(EM_BLE_RXPHADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXPHADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00000040)) | ((uint16_t)rxtxadd << 6)); +} + +__INLINE uint8_t em_ble_rxphadv_rxchsel2_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXPHADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000020)) >> 5); +} + +__INLINE void em_ble_rxphadv_rxchsel2_setf(int elt_idx, uint8_t rxchsel2) +{ + ASSERT_ERR((((uint16_t)rxchsel2 << 5) & ~((uint16_t)0x00000020)) == 0); + EM_BLE_WR(EM_BLE_RXPHADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXPHADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00000020)) | ((uint16_t)rxchsel2 << 5)); +} + +__INLINE uint8_t em_ble_rxphadv_rxadvrfu_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXPHADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000010)) >> 4); +} + +__INLINE void em_ble_rxphadv_rxadvrfu_setf(int elt_idx, uint8_t rxadvrfu) +{ + ASSERT_ERR((((uint16_t)rxadvrfu << 4) & ~((uint16_t)0x00000010)) == 0); + EM_BLE_WR(EM_BLE_RXPHADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXPHADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00000010)) | ((uint16_t)rxadvrfu << 4)); +} + +__INLINE uint8_t em_ble_rxphadv_rxtype_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXPHADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x0000000F)) >> 0); +} + +__INLINE void em_ble_rxphadv_rxtype_setf(int elt_idx, uint8_t rxtype) +{ + ASSERT_ERR((((uint16_t)rxtype << 0) & ~((uint16_t)0x0000000F)) == 0); + EM_BLE_WR(EM_BLE_RXPHADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXPHADV_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x0000000F)) | ((uint16_t)rxtype << 0)); +} + +/** + * @brief RXPHISOM0 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:08 RXLEN 0x0 + * 07:05 RXISOM0RFU 0x0 + * 04 RXMD 0 + * 03 RXSN 0 + * 02 RXNESN 0 + * 01:00 RXLLID 0x0 + *+ */ +#define EM_BLE_RXPHISOM0_ADDR (EXCHANGE_MEM_BASE+0x04 + EM_BLE_RX_DESC_OFFSET) +#define EM_BLE_RXPHISOM0_INDEX 0x00000002 +#define EM_BLE_RXPHISOM0_RESET 0x00000000 + +__INLINE uint16_t em_ble_rxphisom0_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_RXPHISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); +} + +__INLINE void em_ble_rxphisom0_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_RXPHISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, value); +} + +// field definitions +#define EM_BLE_RXLEN_MASK ((uint16_t)0x0000FF00) +#define EM_BLE_RXLEN_LSB 8 +#define EM_BLE_RXLEN_WIDTH ((uint16_t)0x00000008) +#define EM_BLE_RXISOM0RFU_MASK ((uint16_t)0x000000E0) +#define EM_BLE_RXISOM0RFU_LSB 5 +#define EM_BLE_RXISOM0RFU_WIDTH ((uint16_t)0x00000003) +#define EM_BLE_RXMD_BIT ((uint16_t)0x00000010) +#define EM_BLE_RXMD_POS 4 +#define EM_BLE_RXSN_BIT ((uint16_t)0x00000008) +#define EM_BLE_RXSN_POS 3 +#define EM_BLE_RXNESN_BIT ((uint16_t)0x00000004) +#define EM_BLE_RXNESN_POS 2 +#define EM_BLE_RXLLID_MASK ((uint16_t)0x00000003) +#define EM_BLE_RXLLID_LSB 0 +#define EM_BLE_RXLLID_WIDTH ((uint16_t)0x00000002) + +#define EM_BLE_RXLEN_RST 0x0 +#define EM_BLE_RXISOM0RFU_RST 0x0 +#define EM_BLE_RXMD_RST 0x0 +#define EM_BLE_RXSN_RST 0x0 +#define EM_BLE_RXNESN_RST 0x0 +#define EM_BLE_RXLLID_RST 0x0 + +__INLINE void em_ble_rxphisom0_pack(int elt_idx, uint8_t rxlen, uint8_t rxisom0rfu, uint8_t rxmd, uint8_t rxsn, uint8_t rxnesn, uint8_t rxllid) +{ + ASSERT_ERR((((uint16_t)rxlen << 8) & ~((uint16_t)0x0000FF00)) == 0); + ASSERT_ERR((((uint16_t)rxisom0rfu << 5) & ~((uint16_t)0x000000E0)) == 0); + ASSERT_ERR((((uint16_t)rxmd << 4) & ~((uint16_t)0x00000010)) == 0); + ASSERT_ERR((((uint16_t)rxsn << 3) & ~((uint16_t)0x00000008)) == 0); + ASSERT_ERR((((uint16_t)rxnesn << 2) & ~((uint16_t)0x00000004)) == 0); + ASSERT_ERR((((uint16_t)rxllid << 0) & ~((uint16_t)0x00000003)) == 0); + EM_BLE_WR(EM_BLE_RXPHISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, ((uint16_t)rxlen << 8) | ((uint16_t)rxisom0rfu << 5) | ((uint16_t)rxmd << 4) | ((uint16_t)rxsn << 3) | ((uint16_t)rxnesn << 2) | ((uint16_t)rxllid << 0)); +} + +__INLINE void em_ble_rxphisom0_unpack(int elt_idx, uint8_t* rxlen, uint8_t* rxisom0rfu, uint8_t* rxmd, uint8_t* rxsn, uint8_t* rxnesn, uint8_t* rxllid) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXPHISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + + *rxlen = (localVal & ((uint16_t)0x0000FF00)) >> 8; + *rxisom0rfu = (localVal & ((uint16_t)0x000000E0)) >> 5; + *rxmd = (localVal & ((uint16_t)0x00000010)) >> 4; + *rxsn = (localVal & ((uint16_t)0x00000008)) >> 3; + *rxnesn = (localVal & ((uint16_t)0x00000004)) >> 2; + *rxllid = (localVal & ((uint16_t)0x00000003)) >> 0; +} + +__INLINE uint8_t em_ble_rxphisom0_rxlen_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXPHISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x0000FF00)) >> 8); +} + +__INLINE void em_ble_rxphisom0_rxlen_setf(int elt_idx, uint8_t rxlen) +{ + ASSERT_ERR((((uint16_t)rxlen << 8) & ~((uint16_t)0x0000FF00)) == 0); + EM_BLE_WR(EM_BLE_RXPHISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXPHISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x0000FF00)) | ((uint16_t)rxlen << 8)); +} + +__INLINE uint8_t em_ble_rxphisom0_rxisom0rfu_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXPHISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x000000E0)) >> 5); +} + +__INLINE void em_ble_rxphisom0_rxisom0rfu_setf(int elt_idx, uint8_t rxisom0rfu) +{ + ASSERT_ERR((((uint16_t)rxisom0rfu << 5) & ~((uint16_t)0x000000E0)) == 0); + EM_BLE_WR(EM_BLE_RXPHISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXPHISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x000000E0)) | ((uint16_t)rxisom0rfu << 5)); +} + +__INLINE uint8_t em_ble_rxphisom0_rxmd_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXPHISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000010)) >> 4); +} + +__INLINE void em_ble_rxphisom0_rxmd_setf(int elt_idx, uint8_t rxmd) +{ + ASSERT_ERR((((uint16_t)rxmd << 4) & ~((uint16_t)0x00000010)) == 0); + EM_BLE_WR(EM_BLE_RXPHISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXPHISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00000010)) | ((uint16_t)rxmd << 4)); +} + +__INLINE uint8_t em_ble_rxphisom0_rxsn_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXPHISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000008)) >> 3); +} + +__INLINE void em_ble_rxphisom0_rxsn_setf(int elt_idx, uint8_t rxsn) +{ + ASSERT_ERR((((uint16_t)rxsn << 3) & ~((uint16_t)0x00000008)) == 0); + EM_BLE_WR(EM_BLE_RXPHISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXPHISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00000008)) | ((uint16_t)rxsn << 3)); +} + +__INLINE uint8_t em_ble_rxphisom0_rxnesn_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXPHISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000004)) >> 2); +} + +__INLINE void em_ble_rxphisom0_rxnesn_setf(int elt_idx, uint8_t rxnesn) +{ + ASSERT_ERR((((uint16_t)rxnesn << 2) & ~((uint16_t)0x00000004)) == 0); + EM_BLE_WR(EM_BLE_RXPHISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXPHISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00000004)) | ((uint16_t)rxnesn << 2)); +} + +__INLINE uint8_t em_ble_rxphisom0_rxllid_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXPHISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000003)) >> 0); +} + +__INLINE void em_ble_rxphisom0_rxllid_setf(int elt_idx, uint8_t rxllid) +{ + ASSERT_ERR((((uint16_t)rxllid << 0) & ~((uint16_t)0x00000003)) == 0); + EM_BLE_WR(EM_BLE_RXPHISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXPHISOM0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00000003)) | ((uint16_t)rxllid << 0)); +} + +/** + * @brief RXCHASS register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:14 RATE 0x0 + * 13:08 USED_CH_IDX 0x0 + * 07:00 RSSI 0x0 + *+ */ +#define EM_BLE_RXCHASS_ADDR (EXCHANGE_MEM_BASE+0x06 + EM_BLE_RX_DESC_OFFSET) +#define EM_BLE_RXCHASS_INDEX 0x00000003 +#define EM_BLE_RXCHASS_RESET 0x00000000 + +__INLINE uint16_t em_ble_rxchass_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_RXCHASS_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); +} + +__INLINE void em_ble_rxchass_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_RXCHASS_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, value); +} + +// field definitions +#define EM_BLE_RATE_MASK ((uint16_t)0x0000C000) +#define EM_BLE_RATE_LSB 14 +#define EM_BLE_RATE_WIDTH ((uint16_t)0x00000002) +#define EM_BLE_USED_CH_IDX_MASK ((uint16_t)0x00003F00) +#define EM_BLE_USED_CH_IDX_LSB 8 +#define EM_BLE_USED_CH_IDX_WIDTH ((uint16_t)0x00000006) +#define EM_BLE_RSSI_MASK ((uint16_t)0x000000FF) +#define EM_BLE_RSSI_LSB 0 +#define EM_BLE_RSSI_WIDTH ((uint16_t)0x00000008) + +#define EM_BLE_RATE_RST 0x0 +#define EM_BLE_USED_CH_IDX_RST 0x0 +#define EM_BLE_RSSI_RST 0x0 + +__INLINE void em_ble_rxchass_pack(int elt_idx, uint8_t rate, uint8_t usedchidx, uint8_t rssi) +{ + ASSERT_ERR((((uint16_t)rate << 14) & ~((uint16_t)0x0000C000)) == 0); + ASSERT_ERR((((uint16_t)usedchidx << 8) & ~((uint16_t)0x00003F00)) == 0); + ASSERT_ERR((((uint16_t)rssi << 0) & ~((uint16_t)0x000000FF)) == 0); + EM_BLE_WR(EM_BLE_RXCHASS_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, ((uint16_t)rate << 14) | ((uint16_t)usedchidx << 8) | ((uint16_t)rssi << 0)); +} + +__INLINE void em_ble_rxchass_unpack(int elt_idx, uint8_t* rate, uint8_t* usedchidx, uint8_t* rssi) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXCHASS_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + + *rate = (localVal & ((uint16_t)0x0000C000)) >> 14; + *usedchidx = (localVal & ((uint16_t)0x00003F00)) >> 8; + *rssi = (localVal & ((uint16_t)0x000000FF)) >> 0; +} + +__INLINE uint8_t em_ble_rxchass_rate_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXCHASS_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x0000C000)) >> 14); +} + +__INLINE void em_ble_rxchass_rate_setf(int elt_idx, uint8_t rate) +{ + ASSERT_ERR((((uint16_t)rate << 14) & ~((uint16_t)0x0000C000)) == 0); + EM_BLE_WR(EM_BLE_RXCHASS_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXCHASS_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x0000C000)) | ((uint16_t)rate << 14)); +} + +__INLINE uint8_t em_ble_rxchass_used_ch_idx_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXCHASS_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00003F00)) >> 8); +} + +__INLINE void em_ble_rxchass_used_ch_idx_setf(int elt_idx, uint8_t usedchidx) +{ + ASSERT_ERR((((uint16_t)usedchidx << 8) & ~((uint16_t)0x00003F00)) == 0); + EM_BLE_WR(EM_BLE_RXCHASS_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXCHASS_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00003F00)) | ((uint16_t)usedchidx << 8)); +} + +__INLINE uint8_t em_ble_rxchass_rssi_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXCHASS_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x000000FF)) >> 0); +} + +__INLINE void em_ble_rxchass_rssi_setf(int elt_idx, uint8_t rssi) +{ + ASSERT_ERR((((uint16_t)rssi << 0) & ~((uint16_t)0x000000FF)) == 0); + EM_BLE_WR(EM_BLE_RXCHASS_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXCHASS_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x000000FF)) | ((uint16_t)rssi << 0)); +} + +/** + * @brief RXCLKNSYNC0 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:00 CLKNRXSYNC0 0x0 + *+ */ +#define EM_BLE_RXCLKNSYNC0_ADDR (EXCHANGE_MEM_BASE+0x08 + EM_BLE_RX_DESC_OFFSET) +#define EM_BLE_RXCLKNSYNC0_INDEX 0x00000004 +#define EM_BLE_RXCLKNSYNC0_RESET 0x00000000 + +__INLINE uint16_t em_ble_rxclknsync0_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_RXCLKNSYNC0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); +} + +// field definitions +#define EM_BLE_CLKNRXSYNC0_MASK ((uint16_t)0x0000FFFF) +#define EM_BLE_CLKNRXSYNC0_LSB 0 +#define EM_BLE_CLKNRXSYNC0_WIDTH ((uint16_t)0x00000010) + +#define EM_BLE_CLKNRXSYNC0_RST 0x0 + +__INLINE uint16_t em_ble_rxclknsync0_clknrxsync0_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXCLKNSYNC0_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + ASSERT_ERR((localVal & ~((uint16_t)0x0000FFFF)) == 0); + return (localVal >> 0); +} + +/** + * @brief RXCLKNSYNC1 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 11:00 CLKNRXSYNC1 0x0 + *+ */ +#define EM_BLE_RXCLKNSYNC1_ADDR (EXCHANGE_MEM_BASE+0x0A + EM_BLE_RX_DESC_OFFSET) +#define EM_BLE_RXCLKNSYNC1_INDEX 0x00000005 +#define EM_BLE_RXCLKNSYNC1_RESET 0x00000000 + +__INLINE uint16_t em_ble_rxclknsync1_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_RXCLKNSYNC1_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); +} + +// field definitions +#define EM_BLE_CLKNRXSYNC1_MASK ((uint16_t)0x00000FFF) +#define EM_BLE_CLKNRXSYNC1_LSB 0 +#define EM_BLE_CLKNRXSYNC1_WIDTH ((uint16_t)0x0000000C) + +#define EM_BLE_CLKNRXSYNC1_RST 0x0 + +__INLINE uint16_t em_ble_rxclknsync1_clknrxsync1_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXCLKNSYNC1_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + ASSERT_ERR((localVal & ~((uint16_t)0x00000FFF)) == 0); + return (localVal >> 0); +} + +/** + * @brief RXFCNTSYNC register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:11 RXLINKLBL 0x0 + * 09:00 FCNTRXSYNC 0x0 + *+ */ +#define EM_BLE_RXFCNTSYNC_ADDR (EXCHANGE_MEM_BASE+0x0C + EM_BLE_RX_DESC_OFFSET) +#define EM_BLE_RXFCNTSYNC_INDEX 0x00000006 +#define EM_BLE_RXFCNTSYNC_RESET 0x00000000 + +__INLINE uint16_t em_ble_rxfcntsync_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_RXFCNTSYNC_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); +} + +// field definitions +#define EM_BLE_RXLINKLBL_MASK ((uint16_t)0x0000F800) +#define EM_BLE_RXLINKLBL_LSB 11 +#define EM_BLE_RXLINKLBL_WIDTH ((uint16_t)0x00000005) +#define EM_BLE_FCNTRXSYNC_MASK ((uint16_t)0x000003FF) +#define EM_BLE_FCNTRXSYNC_LSB 0 +#define EM_BLE_FCNTRXSYNC_WIDTH ((uint16_t)0x0000000A) + +#define EM_BLE_RXLINKLBL_RST 0x0 +#define EM_BLE_FCNTRXSYNC_RST 0x0 + +__INLINE void em_ble_rxfcntsync_unpack(int elt_idx, uint8_t* rxlinklbl, uint16_t* fcntrxsync) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXFCNTSYNC_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + + *rxlinklbl = (localVal & ((uint16_t)0x0000F800)) >> 11; + *fcntrxsync = (localVal & ((uint16_t)0x000003FF)) >> 0; +} + +__INLINE uint8_t em_ble_rxfcntsync_rxlinklbl_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXFCNTSYNC_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x0000F800)) >> 11); +} + +__INLINE uint16_t em_ble_rxfcntsync_fcntrxsync_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXFCNTSYNC_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x000003FF)) >> 0); +} + +/** + * @brief RXWPALPTR register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:00 RXWPALPTR 0x0 + *+ */ +#define EM_BLE_RXWPALPTR_ADDR (EXCHANGE_MEM_BASE+0x0E + EM_BLE_RX_DESC_OFFSET) +#define EM_BLE_RXWPALPTR_INDEX 0x00000007 +#define EM_BLE_RXWPALPTR_RESET 0x00000000 + +__INLINE uint16_t em_ble_rxwpalptr_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_RXWPALPTR_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); +} + +__INLINE void em_ble_rxwpalptr_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_RXWPALPTR_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, value); +} + +// field definitions +#define EM_BLE_RXWPALPTR_MASK ((uint16_t)0x0000FFFF) +#define EM_BLE_RXWPALPTR_LSB 0 +#define EM_BLE_RXWPALPTR_WIDTH ((uint16_t)0x00000010) + +#define EM_BLE_RXWPALPTR_RST 0x0 + +__INLINE uint16_t em_ble_rxwpalptr_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXWPALPTR_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + ASSERT_ERR((localVal & ~((uint16_t)0x0000FFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void em_ble_rxwpalptr_setf(int elt_idx, uint16_t rxwpalptr) +{ + ASSERT_ERR((((uint16_t)rxwpalptr << 0) & ~((uint16_t)0x0000FFFF)) == 0); + EM_BLE_WR(EM_BLE_RXWPALPTR_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (uint16_t)rxwpalptr << 0); +} + +/** + * @brief RXRALPTR register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:00 RXRALPTR 0x0 + *+ */ +#define EM_BLE_RXRALPTR_ADDR (EXCHANGE_MEM_BASE+0x10 + EM_BLE_RX_DESC_OFFSET) +#define EM_BLE_RXRALPTR_INDEX 0x00000008 +#define EM_BLE_RXRALPTR_RESET 0x00000000 + +__INLINE uint16_t em_ble_rxralptr_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_RXRALPTR_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); +} + +__INLINE void em_ble_rxralptr_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_RXRALPTR_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, value); +} + +// field definitions +#define EM_BLE_RXRALPTR_MASK ((uint16_t)0x0000FFFF) +#define EM_BLE_RXRALPTR_LSB 0 +#define EM_BLE_RXRALPTR_WIDTH ((uint16_t)0x00000010) + +#define EM_BLE_RXRALPTR_RST 0x0 + +__INLINE uint16_t em_ble_rxralptr_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXRALPTR_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + ASSERT_ERR((localVal & ~((uint16_t)0x0000FFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void em_ble_rxralptr_setf(int elt_idx, uint16_t rxralptr) +{ + ASSERT_ERR((((uint16_t)rxralptr << 0) & ~((uint16_t)0x0000FFFF)) == 0); + EM_BLE_WR(EM_BLE_RXRALPTR_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (uint16_t)rxralptr << 0); +} + +/** + * @brief RXAEHEADER register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15 RXRSVD 0 + * 14 RXPOW 0 + * 13 RXSYNC 0 + * 12 RXAUXPTR 0 + * 11 RXADI 0 + * 10 RXCTE 0 + * 09 RXTGTA 0 + * 08 RXADVA 0 + * 07:06 RXAEMODE 0x0 + * 05:00 RXAELENGTH 0x0 + *+ */ +#define EM_BLE_RXAEHEADER_ADDR (EXCHANGE_MEM_BASE+0x12 + EM_BLE_RX_DESC_OFFSET) +#define EM_BLE_RXAEHEADER_INDEX 0x00000009 +#define EM_BLE_RXAEHEADER_RESET 0x00000000 + +__INLINE uint16_t em_ble_rxaeheader_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_RXAEHEADER_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); +} + +__INLINE void em_ble_rxaeheader_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_RXAEHEADER_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, value); +} + +// field definitions +#define EM_BLE_RXRSVD_BIT ((uint16_t)0x00008000) +#define EM_BLE_RXRSVD_POS 15 +#define EM_BLE_RXPOW_BIT ((uint16_t)0x00004000) +#define EM_BLE_RXPOW_POS 14 +#define EM_BLE_RXSYNC_BIT ((uint16_t)0x00002000) +#define EM_BLE_RXSYNC_POS 13 +#define EM_BLE_RXAUXPTR_BIT ((uint16_t)0x00001000) +#define EM_BLE_RXAUXPTR_POS 12 +#define EM_BLE_RXADI_BIT ((uint16_t)0x00000800) +#define EM_BLE_RXADI_POS 11 +#define EM_BLE_RXCTE_BIT ((uint16_t)0x00000400) +#define EM_BLE_RXCTE_POS 10 +#define EM_BLE_RXTGTA_BIT ((uint16_t)0x00000200) +#define EM_BLE_RXTGTA_POS 9 +#define EM_BLE_RXADVA_BIT ((uint16_t)0x00000100) +#define EM_BLE_RXADVA_POS 8 +#define EM_BLE_RXAEMODE_MASK ((uint16_t)0x000000C0) +#define EM_BLE_RXAEMODE_LSB 6 +#define EM_BLE_RXAEMODE_WIDTH ((uint16_t)0x00000002) +#define EM_BLE_RXAELENGTH_MASK ((uint16_t)0x0000003F) +#define EM_BLE_RXAELENGTH_LSB 0 +#define EM_BLE_RXAELENGTH_WIDTH ((uint16_t)0x00000006) + +#define EM_BLE_RXRSVD_RST 0x0 +#define EM_BLE_RXPOW_RST 0x0 +#define EM_BLE_RXSYNC_RST 0x0 +#define EM_BLE_RXAUXPTR_RST 0x0 +#define EM_BLE_RXADI_RST 0x0 +#define EM_BLE_RXCTE_RST 0x0 +#define EM_BLE_RXTGTA_RST 0x0 +#define EM_BLE_RXADVA_RST 0x0 +#define EM_BLE_RXAEMODE_RST 0x0 +#define EM_BLE_RXAELENGTH_RST 0x0 + +__INLINE void em_ble_rxaeheader_pack(int elt_idx, uint8_t rxrsvd, uint8_t rxpow, uint8_t rxsync, uint8_t rxauxptr, uint8_t rxadi, uint8_t rxcte, uint8_t rxtgta, uint8_t rxadva, uint8_t rxaemode, uint8_t rxaelength) +{ + ASSERT_ERR((((uint16_t)rxrsvd << 15) & ~((uint16_t)0x00008000)) == 0); + ASSERT_ERR((((uint16_t)rxpow << 14) & ~((uint16_t)0x00004000)) == 0); + ASSERT_ERR((((uint16_t)rxsync << 13) & ~((uint16_t)0x00002000)) == 0); + ASSERT_ERR((((uint16_t)rxauxptr << 12) & ~((uint16_t)0x00001000)) == 0); + ASSERT_ERR((((uint16_t)rxadi << 11) & ~((uint16_t)0x00000800)) == 0); + ASSERT_ERR((((uint16_t)rxcte << 10) & ~((uint16_t)0x00000400)) == 0); + ASSERT_ERR((((uint16_t)rxtgta << 9) & ~((uint16_t)0x00000200)) == 0); + ASSERT_ERR((((uint16_t)rxadva << 8) & ~((uint16_t)0x00000100)) == 0); + ASSERT_ERR((((uint16_t)rxaemode << 6) & ~((uint16_t)0x000000C0)) == 0); + ASSERT_ERR((((uint16_t)rxaelength << 0) & ~((uint16_t)0x0000003F)) == 0); + EM_BLE_WR(EM_BLE_RXAEHEADER_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, ((uint16_t)rxrsvd << 15) | ((uint16_t)rxpow << 14) | ((uint16_t)rxsync << 13) | ((uint16_t)rxauxptr << 12) | ((uint16_t)rxadi << 11) | ((uint16_t)rxcte << 10) | ((uint16_t)rxtgta << 9) | ((uint16_t)rxadva << 8) | ((uint16_t)rxaemode << 6) | ((uint16_t)rxaelength << 0)); +} + +__INLINE void em_ble_rxaeheader_unpack(int elt_idx, uint8_t* rxrsvd, uint8_t* rxpow, uint8_t* rxsync, uint8_t* rxauxptr, uint8_t* rxadi, uint8_t* rxcte, uint8_t* rxtgta, uint8_t* rxadva, uint8_t* rxaemode, uint8_t* rxaelength) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXAEHEADER_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + + *rxrsvd = (localVal & ((uint16_t)0x00008000)) >> 15; + *rxpow = (localVal & ((uint16_t)0x00004000)) >> 14; + *rxsync = (localVal & ((uint16_t)0x00002000)) >> 13; + *rxauxptr = (localVal & ((uint16_t)0x00001000)) >> 12; + *rxadi = (localVal & ((uint16_t)0x00000800)) >> 11; + *rxcte = (localVal & ((uint16_t)0x00000400)) >> 10; + *rxtgta = (localVal & ((uint16_t)0x00000200)) >> 9; + *rxadva = (localVal & ((uint16_t)0x00000100)) >> 8; + *rxaemode = (localVal & ((uint16_t)0x000000C0)) >> 6; + *rxaelength = (localVal & ((uint16_t)0x0000003F)) >> 0; +} + +__INLINE uint8_t em_ble_rxaeheader_rxrsvd_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXAEHEADER_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00008000)) >> 15); +} + +__INLINE void em_ble_rxaeheader_rxrsvd_setf(int elt_idx, uint8_t rxrsvd) +{ + ASSERT_ERR((((uint16_t)rxrsvd << 15) & ~((uint16_t)0x00008000)) == 0); + EM_BLE_WR(EM_BLE_RXAEHEADER_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXAEHEADER_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00008000)) | ((uint16_t)rxrsvd << 15)); +} + +__INLINE uint8_t em_ble_rxaeheader_rxpow_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXAEHEADER_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00004000)) >> 14); +} + +__INLINE void em_ble_rxaeheader_rxpow_setf(int elt_idx, uint8_t rxpow) +{ + ASSERT_ERR((((uint16_t)rxpow << 14) & ~((uint16_t)0x00004000)) == 0); + EM_BLE_WR(EM_BLE_RXAEHEADER_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXAEHEADER_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00004000)) | ((uint16_t)rxpow << 14)); +} + +__INLINE uint8_t em_ble_rxaeheader_rxsync_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXAEHEADER_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00002000)) >> 13); +} + +__INLINE void em_ble_rxaeheader_rxsync_setf(int elt_idx, uint8_t rxsync) +{ + ASSERT_ERR((((uint16_t)rxsync << 13) & ~((uint16_t)0x00002000)) == 0); + EM_BLE_WR(EM_BLE_RXAEHEADER_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXAEHEADER_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00002000)) | ((uint16_t)rxsync << 13)); +} + +__INLINE uint8_t em_ble_rxaeheader_rxauxptr_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXAEHEADER_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00001000)) >> 12); +} + +__INLINE void em_ble_rxaeheader_rxauxptr_setf(int elt_idx, uint8_t rxauxptr) +{ + ASSERT_ERR((((uint16_t)rxauxptr << 12) & ~((uint16_t)0x00001000)) == 0); + EM_BLE_WR(EM_BLE_RXAEHEADER_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXAEHEADER_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00001000)) | ((uint16_t)rxauxptr << 12)); +} + +__INLINE uint8_t em_ble_rxaeheader_rxadi_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXAEHEADER_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000800)) >> 11); +} + +__INLINE void em_ble_rxaeheader_rxadi_setf(int elt_idx, uint8_t rxadi) +{ + ASSERT_ERR((((uint16_t)rxadi << 11) & ~((uint16_t)0x00000800)) == 0); + EM_BLE_WR(EM_BLE_RXAEHEADER_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXAEHEADER_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00000800)) | ((uint16_t)rxadi << 11)); +} + +__INLINE uint8_t em_ble_rxaeheader_rxcte_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXAEHEADER_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000400)) >> 10); +} + +__INLINE void em_ble_rxaeheader_rxcte_setf(int elt_idx, uint8_t rxcte) +{ + ASSERT_ERR((((uint16_t)rxcte << 10) & ~((uint16_t)0x00000400)) == 0); + EM_BLE_WR(EM_BLE_RXAEHEADER_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXAEHEADER_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00000400)) | ((uint16_t)rxcte << 10)); +} + +__INLINE uint8_t em_ble_rxaeheader_rxtgta_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXAEHEADER_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000200)) >> 9); +} + +__INLINE void em_ble_rxaeheader_rxtgta_setf(int elt_idx, uint8_t rxtgta) +{ + ASSERT_ERR((((uint16_t)rxtgta << 9) & ~((uint16_t)0x00000200)) == 0); + EM_BLE_WR(EM_BLE_RXAEHEADER_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXAEHEADER_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00000200)) | ((uint16_t)rxtgta << 9)); +} + +__INLINE uint8_t em_ble_rxaeheader_rxadva_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXAEHEADER_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000100)) >> 8); +} + +__INLINE void em_ble_rxaeheader_rxadva_setf(int elt_idx, uint8_t rxadva) +{ + ASSERT_ERR((((uint16_t)rxadva << 8) & ~((uint16_t)0x00000100)) == 0); + EM_BLE_WR(EM_BLE_RXAEHEADER_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXAEHEADER_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00000100)) | ((uint16_t)rxadva << 8)); +} + +__INLINE uint8_t em_ble_rxaeheader_rxaemode_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXAEHEADER_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x000000C0)) >> 6); +} + +__INLINE void em_ble_rxaeheader_rxaemode_setf(int elt_idx, uint8_t rxaemode) +{ + ASSERT_ERR((((uint16_t)rxaemode << 6) & ~((uint16_t)0x000000C0)) == 0); + EM_BLE_WR(EM_BLE_RXAEHEADER_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXAEHEADER_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x000000C0)) | ((uint16_t)rxaemode << 6)); +} + +__INLINE uint8_t em_ble_rxaeheader_rxaelength_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXAEHEADER_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x0000003F)) >> 0); +} + +__INLINE void em_ble_rxaeheader_rxaelength_setf(int elt_idx, uint8_t rxaelength) +{ + ASSERT_ERR((((uint16_t)rxaelength << 0) & ~((uint16_t)0x0000003F)) == 0); + EM_BLE_WR(EM_BLE_RXAEHEADER_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXAEHEADER_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x0000003F)) | ((uint16_t)rxaelength << 0)); +} + +/** + * @brief RXDATAPTR register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:00 RXDATAPTR 0x0 + *+ */ +#define EM_BLE_RXDATAPTR_ADDR (EXCHANGE_MEM_BASE+0x14 + EM_BLE_RX_DESC_OFFSET) +#define EM_BLE_RXDATAPTR_INDEX 0x0000000A +#define EM_BLE_RXDATAPTR_RESET 0x00000000 + +__INLINE uint16_t em_ble_rxdataptr_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_RXDATAPTR_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); +} + +__INLINE void em_ble_rxdataptr_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_RXDATAPTR_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, value); +} + +// field definitions +#define EM_BLE_RXDATAPTR_MASK ((uint16_t)0x0000FFFF) +#define EM_BLE_RXDATAPTR_LSB 0 +#define EM_BLE_RXDATAPTR_WIDTH ((uint16_t)0x00000010) + +#define EM_BLE_RXDATAPTR_RST 0x0 + +__INLINE uint16_t em_ble_rxdataptr_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXDATAPTR_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + ASSERT_ERR((localVal & ~((uint16_t)0x0000FFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void em_ble_rxdataptr_setf(int elt_idx, uint16_t rxdataptr) +{ + ASSERT_ERR((((uint16_t)rxdataptr << 0) & ~((uint16_t)0x0000FFFF)) == 0); + EM_BLE_WR(EM_BLE_RXDATAPTR_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (uint16_t)rxdataptr << 0); +} + +/** + * @brief RXPHCTE register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:08 NBRXIQSAMP 0x0 + * 07:06 RXCTETYPE 0x0 + * 05 RXCTERFU 0 + * 04:00 RXCTETIME 0x0 + *+ */ +#define EM_BLE_RXPHCTE_ADDR (EXCHANGE_MEM_BASE+0x16 + EM_BLE_RX_DESC_OFFSET) +#define EM_BLE_RXPHCTE_INDEX 0x0000000B +#define EM_BLE_RXPHCTE_RESET 0x00000000 + +__INLINE uint16_t em_ble_rxphcte_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_RXPHCTE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); +} + +__INLINE void em_ble_rxphcte_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_RXPHCTE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, value); +} + +// field definitions +#define EM_BLE_NBRXIQSAMP_MASK ((uint16_t)0x0000FF00) +#define EM_BLE_NBRXIQSAMP_LSB 8 +#define EM_BLE_NBRXIQSAMP_WIDTH ((uint16_t)0x00000008) +#define EM_BLE_RXCTETYPE_MASK ((uint16_t)0x000000C0) +#define EM_BLE_RXCTETYPE_LSB 6 +#define EM_BLE_RXCTETYPE_WIDTH ((uint16_t)0x00000002) +#define EM_BLE_RXCTERFU_BIT ((uint16_t)0x00000020) +#define EM_BLE_RXCTERFU_POS 5 +#define EM_BLE_RXCTETIME_MASK ((uint16_t)0x0000001F) +#define EM_BLE_RXCTETIME_LSB 0 +#define EM_BLE_RXCTETIME_WIDTH ((uint16_t)0x00000005) + +#define EM_BLE_NBRXIQSAMP_RST 0x0 +#define EM_BLE_RXCTETYPE_RST 0x0 +#define EM_BLE_RXCTERFU_RST 0x0 +#define EM_BLE_RXCTETIME_RST 0x0 + +__INLINE void em_ble_rxphcte_pack(int elt_idx, uint8_t nbrxiqsamp, uint8_t rxctetype, uint8_t rxcterfu, uint8_t rxctetime) +{ + ASSERT_ERR((((uint16_t)nbrxiqsamp << 8) & ~((uint16_t)0x0000FF00)) == 0); + ASSERT_ERR((((uint16_t)rxctetype << 6) & ~((uint16_t)0x000000C0)) == 0); + ASSERT_ERR((((uint16_t)rxcterfu << 5) & ~((uint16_t)0x00000020)) == 0); + ASSERT_ERR((((uint16_t)rxctetime << 0) & ~((uint16_t)0x0000001F)) == 0); + EM_BLE_WR(EM_BLE_RXPHCTE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, ((uint16_t)nbrxiqsamp << 8) | ((uint16_t)rxctetype << 6) | ((uint16_t)rxcterfu << 5) | ((uint16_t)rxctetime << 0)); +} + +__INLINE void em_ble_rxphcte_unpack(int elt_idx, uint8_t* nbrxiqsamp, uint8_t* rxctetype, uint8_t* rxcterfu, uint8_t* rxctetime) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXPHCTE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + + *nbrxiqsamp = (localVal & ((uint16_t)0x0000FF00)) >> 8; + *rxctetype = (localVal & ((uint16_t)0x000000C0)) >> 6; + *rxcterfu = (localVal & ((uint16_t)0x00000020)) >> 5; + *rxctetime = (localVal & ((uint16_t)0x0000001F)) >> 0; +} + +__INLINE uint8_t em_ble_rxphcte_nbrxiqsamp_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXPHCTE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x0000FF00)) >> 8); +} + +__INLINE void em_ble_rxphcte_nbrxiqsamp_setf(int elt_idx, uint8_t nbrxiqsamp) +{ + ASSERT_ERR((((uint16_t)nbrxiqsamp << 8) & ~((uint16_t)0x0000FF00)) == 0); + EM_BLE_WR(EM_BLE_RXPHCTE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXPHCTE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x0000FF00)) | ((uint16_t)nbrxiqsamp << 8)); +} + +__INLINE uint8_t em_ble_rxphcte_rxctetype_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXPHCTE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x000000C0)) >> 6); +} + +__INLINE void em_ble_rxphcte_rxctetype_setf(int elt_idx, uint8_t rxctetype) +{ + ASSERT_ERR((((uint16_t)rxctetype << 6) & ~((uint16_t)0x000000C0)) == 0); + EM_BLE_WR(EM_BLE_RXPHCTE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXPHCTE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x000000C0)) | ((uint16_t)rxctetype << 6)); +} + +__INLINE uint8_t em_ble_rxphcte_rxcterfu_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXPHCTE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000020)) >> 5); +} + +__INLINE void em_ble_rxphcte_rxcterfu_setf(int elt_idx, uint8_t rxcterfu) +{ + ASSERT_ERR((((uint16_t)rxcterfu << 5) & ~((uint16_t)0x00000020)) == 0); + EM_BLE_WR(EM_BLE_RXPHCTE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXPHCTE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x00000020)) | ((uint16_t)rxcterfu << 5)); +} + +__INLINE uint8_t em_ble_rxphcte_rxctetime_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXPHCTE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + return ((localVal & ((uint16_t)0x0000001F)) >> 0); +} + +__INLINE void em_ble_rxphcte_rxctetime_setf(int elt_idx, uint8_t rxctetime) +{ + ASSERT_ERR((((uint16_t)rxctetime << 0) & ~((uint16_t)0x0000001F)) == 0); + EM_BLE_WR(EM_BLE_RXPHCTE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (EM_BLE_RD(EM_BLE_RXPHCTE_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE) & ~((uint16_t)0x0000001F)) | ((uint16_t)rxctetime << 0)); +} + +/** + * @brief RXCTEPTR register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:00 RXCTEPTR 0x0 + *+ */ +#define EM_BLE_RXCTEPTR_ADDR (EXCHANGE_MEM_BASE+0x18 + EM_BLE_RX_DESC_OFFSET) +#define EM_BLE_RXCTEPTR_INDEX 0x0000000C +#define EM_BLE_RXCTEPTR_RESET 0x00000000 + +__INLINE uint16_t em_ble_rxcteptr_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_RXCTEPTR_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); +} + +__INLINE void em_ble_rxcteptr_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_RXCTEPTR_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, value); +} + +// field definitions +#define EM_BLE_RXCTEPTR_MASK ((uint16_t)0x0000FFFF) +#define EM_BLE_RXCTEPTR_LSB 0 +#define EM_BLE_RXCTEPTR_WIDTH ((uint16_t)0x00000010) + +#define EM_BLE_RXCTEPTR_RST 0x0 + +__INLINE uint16_t em_ble_rxcteptr_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXCTEPTR_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + ASSERT_ERR((localVal & ~((uint16_t)0x0000FFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void em_ble_rxcteptr_setf(int elt_idx, uint16_t rxcteptr) +{ + ASSERT_ERR((((uint16_t)rxcteptr << 0) & ~((uint16_t)0x0000FFFF)) == 0); + EM_BLE_WR(EM_BLE_RXCTEPTR_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (uint16_t)rxcteptr << 0); +} + +/** + * @brief RXRESERVED register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:00 RSVD 0x0 + *+ */ +#define EM_BLE_RXRESERVED_ADDR (EXCHANGE_MEM_BASE+0x1A + EM_BLE_RX_DESC_OFFSET) +#define EM_BLE_RXRESERVED_INDEX 0x0000000D +#define EM_BLE_RXRESERVED_RESET 0x00000000 + +__INLINE uint16_t em_ble_rxreserved_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_RXRESERVED_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); +} + +__INLINE void em_ble_rxreserved_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_RXRESERVED_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, value); +} + +// field definitions +#define EM_BLE_RSVD_MASK ((uint16_t)0x0000FFFF) +#define EM_BLE_RSVD_LSB 0 +#define EM_BLE_RSVD_WIDTH ((uint16_t)0x00000010) + +#define EM_BLE_RSVD_RST 0x0 + +__INLINE uint16_t em_ble_rxreserved_rsvd_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_RXRESERVED_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE); + ASSERT_ERR((localVal & ~((uint16_t)0x0000FFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void em_ble_rxreserved_rsvd_setf(int elt_idx, uint16_t rsvd) +{ + ASSERT_ERR((((uint16_t)rsvd << 0) & ~((uint16_t)0x0000FFFF)) == 0); + EM_BLE_WR(EM_BLE_RXRESERVED_ADDR + elt_idx * REG_EM_BLE_RX_DESC_SIZE, (uint16_t)rsvd << 0); +} + + +#endif // _REG_EM_BLE_RX_DESC_H_ + diff --git a/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Nationstech/ble_library/ns_ble_stack/rfinit/api/reg_em_ble_tx_desc.h b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Nationstech/ble_library/ns_ble_stack/rfinit/api/reg_em_ble_tx_desc.h new file mode 100644 index 0000000..52341c0 --- /dev/null +++ b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Nationstech/ble_library/ns_ble_stack/rfinit/api/reg_em_ble_tx_desc.h @@ -0,0 +1,974 @@ +#ifndef _REG_EM_BLE_TX_DESC_H_ +#define _REG_EM_BLE_TX_DESC_H_ + +#include
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15 TXDONE 0 + * 13:00 NEXT_PTR 0x0 + *+ */ +#define EM_BLE_TXCNTL_ADDR (EXCHANGE_MEM_BASE + EM_BLE_TX_DESC_OFFSET) +#define EM_BLE_TXCNTL_INDEX 0x00000000 +#define EM_BLE_TXCNTL_RESET 0x00000000 + +__INLINE uint16_t em_ble_txcntl_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_TXCNTL_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE); +} + +__INLINE void em_ble_txcntl_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_TXCNTL_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE, value); +} + +// field definitions +#define EM_BLE_TXDONE_BIT ((uint16_t)0x00008000) +#define EM_BLE_TXDONE_POS 15 +#define EM_BLE_NEXT_PTR_MASK ((uint16_t)0x00003FFF) +#define EM_BLE_NEXT_PTR_LSB 0 +#define EM_BLE_NEXT_PTR_WIDTH ((uint16_t)0x0000000E) + +#define EM_BLE_TXDONE_RST 0x0 +#define EM_BLE_NEXT_PTR_RST 0x0 + +__INLINE void em_ble_txcntl_pack(int elt_idx, uint8_t txdone, uint16_t nextptr) +{ + ASSERT_ERR((((uint16_t)txdone << 15) & ~((uint16_t)0x00008000)) == 0); + ASSERT_ERR((((uint16_t)nextptr << 0) & ~((uint16_t)0x00003FFF)) == 0); + EM_BLE_WR(EM_BLE_TXCNTL_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE, ((uint16_t)txdone << 15) | ((uint16_t)nextptr << 0)); +} + +__INLINE void em_ble_txcntl_unpack(int elt_idx, uint8_t* txdone, uint16_t* nextptr) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXCNTL_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE); + + *txdone = (localVal & ((uint16_t)0x00008000)) >> 15; + *nextptr = (localVal & ((uint16_t)0x00003FFF)) >> 0; +} + +__INLINE uint8_t em_ble_txcntl_txdone_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXCNTL_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00008000)) >> 15); +} + +__INLINE void em_ble_txcntl_txdone_setf(int elt_idx, uint8_t txdone) +{ + ASSERT_ERR((((uint16_t)txdone << 15) & ~((uint16_t)0x00008000)) == 0); + EM_BLE_WR(EM_BLE_TXCNTL_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE, (EM_BLE_RD(EM_BLE_TXCNTL_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE) & ~((uint16_t)0x00008000)) | ((uint16_t)txdone << 15)); +} + +__INLINE uint16_t em_ble_txcntl_next_ptr_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXCNTL_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00003FFF)) >> 0); +} + +__INLINE void em_ble_txcntl_next_ptr_setf(int elt_idx, uint16_t nextptr) +{ + ASSERT_ERR((((uint16_t)nextptr << 0) & ~((uint16_t)0x00003FFF)) == 0); + EM_BLE_WR(EM_BLE_TXCNTL_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE, (EM_BLE_RD(EM_BLE_TXCNTL_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE) & ~((uint16_t)0x00003FFF)) | ((uint16_t)nextptr << 0)); +} + +/** + * @brief TXPHCE register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:08 TXLEN 0x0 + * 07:06 TXACLRFU 0x0 + * 05 TXCP 0 + * 04 TXMD 0 + * 03 TXSN 0 + * 02 TXNESN 0 + * 01:00 TXLLID 0x0 + *+ */ +#define EM_BLE_TXPHCE_ADDR (EXCHANGE_MEM_BASE+0x02 + EM_BLE_TX_DESC_OFFSET) +#define EM_BLE_TXPHCE_INDEX 0x00000001 +#define EM_BLE_TXPHCE_RESET 0x00000000 + +__INLINE uint16_t em_ble_txphce_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_TXPHCE_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE); +} + +__INLINE void em_ble_txphce_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_TXPHCE_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE, value); +} + +// field definitions +#define EM_BLE_TXLEN_MASK ((uint16_t)0x0000FF00) +#define EM_BLE_TXLEN_LSB 8 +#define EM_BLE_TXLEN_WIDTH ((uint16_t)0x00000008) +#define EM_BLE_TXACLRFU_MASK ((uint16_t)0x000000C0) +#define EM_BLE_TXACLRFU_LSB 6 +#define EM_BLE_TXACLRFU_WIDTH ((uint16_t)0x00000002) +#define EM_BLE_TXCP_BIT ((uint16_t)0x00000020) +#define EM_BLE_TXCP_POS 5 +#define EM_BLE_TXMD_BIT ((uint16_t)0x00000010) +#define EM_BLE_TXMD_POS 4 +#define EM_BLE_TXSN_BIT ((uint16_t)0x00000008) +#define EM_BLE_TXSN_POS 3 +#define EM_BLE_TXNESN_BIT ((uint16_t)0x00000004) +#define EM_BLE_TXNESN_POS 2 +#define EM_BLE_TXLLID_MASK ((uint16_t)0x00000003) +#define EM_BLE_TXLLID_LSB 0 +#define EM_BLE_TXLLID_WIDTH ((uint16_t)0x00000002) + +#define EM_BLE_TXLEN_RST 0x0 +#define EM_BLE_TXACLRFU_RST 0x0 +#define EM_BLE_TXCP_RST 0x0 +#define EM_BLE_TXMD_RST 0x0 +#define EM_BLE_TXSN_RST 0x0 +#define EM_BLE_TXNESN_RST 0x0 +#define EM_BLE_TXLLID_RST 0x0 + +__INLINE void em_ble_txphce_pack(int elt_idx, uint8_t txlen, uint8_t txaclrfu, uint8_t txcp, uint8_t txmd, uint8_t txsn, uint8_t txnesn, uint8_t txllid) +{ + ASSERT_ERR((((uint16_t)txlen << 8) & ~((uint16_t)0x0000FF00)) == 0); + ASSERT_ERR((((uint16_t)txaclrfu << 6) & ~((uint16_t)0x000000C0)) == 0); + ASSERT_ERR((((uint16_t)txcp << 5) & ~((uint16_t)0x00000020)) == 0); + ASSERT_ERR((((uint16_t)txmd << 4) & ~((uint16_t)0x00000010)) == 0); + ASSERT_ERR((((uint16_t)txsn << 3) & ~((uint16_t)0x00000008)) == 0); + ASSERT_ERR((((uint16_t)txnesn << 2) & ~((uint16_t)0x00000004)) == 0); + ASSERT_ERR((((uint16_t)txllid << 0) & ~((uint16_t)0x00000003)) == 0); + EM_BLE_WR(EM_BLE_TXPHCE_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE, ((uint16_t)txlen << 8) | ((uint16_t)txaclrfu << 6) | ((uint16_t)txcp << 5) | ((uint16_t)txmd << 4) | ((uint16_t)txsn << 3) | ((uint16_t)txnesn << 2) | ((uint16_t)txllid << 0)); +} + +__INLINE void em_ble_txphce_unpack(int elt_idx, uint8_t* txlen, uint8_t* txaclrfu, uint8_t* txcp, uint8_t* txmd, uint8_t* txsn, uint8_t* txnesn, uint8_t* txllid) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXPHCE_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE); + + *txlen = (localVal & ((uint16_t)0x0000FF00)) >> 8; + *txaclrfu = (localVal & ((uint16_t)0x000000C0)) >> 6; + *txcp = (localVal & ((uint16_t)0x00000020)) >> 5; + *txmd = (localVal & ((uint16_t)0x00000010)) >> 4; + *txsn = (localVal & ((uint16_t)0x00000008)) >> 3; + *txnesn = (localVal & ((uint16_t)0x00000004)) >> 2; + *txllid = (localVal & ((uint16_t)0x00000003)) >> 0; +} + +__INLINE uint8_t em_ble_txphce_txlen_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXPHCE_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE); + return ((localVal & ((uint16_t)0x0000FF00)) >> 8); +} + +__INLINE void em_ble_txphce_txlen_setf(int elt_idx, uint8_t txlen) +{ + ASSERT_ERR((((uint16_t)txlen << 8) & ~((uint16_t)0x0000FF00)) == 0); + EM_BLE_WR(EM_BLE_TXPHCE_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE, (EM_BLE_RD(EM_BLE_TXPHCE_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE) & ~((uint16_t)0x0000FF00)) | ((uint16_t)txlen << 8)); +} + +__INLINE uint8_t em_ble_txphce_txaclrfu_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXPHCE_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE); + return ((localVal & ((uint16_t)0x000000C0)) >> 6); +} + +__INLINE void em_ble_txphce_txaclrfu_setf(int elt_idx, uint8_t txaclrfu) +{ + ASSERT_ERR((((uint16_t)txaclrfu << 6) & ~((uint16_t)0x000000C0)) == 0); + EM_BLE_WR(EM_BLE_TXPHCE_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE, (EM_BLE_RD(EM_BLE_TXPHCE_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE) & ~((uint16_t)0x000000C0)) | ((uint16_t)txaclrfu << 6)); +} + +__INLINE uint8_t em_ble_txphce_txcp_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXPHCE_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000020)) >> 5); +} + +__INLINE void em_ble_txphce_txcp_setf(int elt_idx, uint8_t txcp) +{ + ASSERT_ERR((((uint16_t)txcp << 5) & ~((uint16_t)0x00000020)) == 0); + EM_BLE_WR(EM_BLE_TXPHCE_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE, (EM_BLE_RD(EM_BLE_TXPHCE_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE) & ~((uint16_t)0x00000020)) | ((uint16_t)txcp << 5)); +} + +__INLINE uint8_t em_ble_txphce_txmd_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXPHCE_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000010)) >> 4); +} + +__INLINE void em_ble_txphce_txmd_setf(int elt_idx, uint8_t txmd) +{ + ASSERT_ERR((((uint16_t)txmd << 4) & ~((uint16_t)0x00000010)) == 0); + EM_BLE_WR(EM_BLE_TXPHCE_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE, (EM_BLE_RD(EM_BLE_TXPHCE_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE) & ~((uint16_t)0x00000010)) | ((uint16_t)txmd << 4)); +} + +__INLINE uint8_t em_ble_txphce_txsn_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXPHCE_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000008)) >> 3); +} + +__INLINE void em_ble_txphce_txsn_setf(int elt_idx, uint8_t txsn) +{ + ASSERT_ERR((((uint16_t)txsn << 3) & ~((uint16_t)0x00000008)) == 0); + EM_BLE_WR(EM_BLE_TXPHCE_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE, (EM_BLE_RD(EM_BLE_TXPHCE_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE) & ~((uint16_t)0x00000008)) | ((uint16_t)txsn << 3)); +} + +__INLINE uint8_t em_ble_txphce_txnesn_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXPHCE_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000004)) >> 2); +} + +__INLINE void em_ble_txphce_txnesn_setf(int elt_idx, uint8_t txnesn) +{ + ASSERT_ERR((((uint16_t)txnesn << 2) & ~((uint16_t)0x00000004)) == 0); + EM_BLE_WR(EM_BLE_TXPHCE_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE, (EM_BLE_RD(EM_BLE_TXPHCE_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE) & ~((uint16_t)0x00000004)) | ((uint16_t)txnesn << 2)); +} + +__INLINE uint8_t em_ble_txphce_txllid_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXPHCE_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000003)) >> 0); +} + +__INLINE void em_ble_txphce_txllid_setf(int elt_idx, uint8_t txllid) +{ + ASSERT_ERR((((uint16_t)txllid << 0) & ~((uint16_t)0x00000003)) == 0); + EM_BLE_WR(EM_BLE_TXPHCE_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE, (EM_BLE_RD(EM_BLE_TXPHCE_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE) & ~((uint16_t)0x00000003)) | ((uint16_t)txllid << 0)); +} + +/** + * @brief TXPHADV register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:08 TXADVLEN 0x0 + * 07 TXRXADD 0 + * 06 TXTXADD 0 + * 05 TXCHSEL2 0 + * 04 TXADVRFU 0 + * 03:00 TXTYPE 0x0 + *+ */ +#define EM_BLE_TXPHADV_ADDR (EXCHANGE_MEM_BASE+0x02 + EM_BLE_TX_DESC_OFFSET) +#define EM_BLE_TXPHADV_INDEX 0x00000001 +#define EM_BLE_TXPHADV_RESET 0x00000000 + +__INLINE uint16_t em_ble_txphadv_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_TXPHADV_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE); +} + +__INLINE void em_ble_txphadv_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_TXPHADV_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE, value); +} + +// field definitions +#define EM_BLE_TXADVLEN_MASK ((uint16_t)0x0000FF00) +#define EM_BLE_TXADVLEN_LSB 8 +#define EM_BLE_TXADVLEN_WIDTH ((uint16_t)0x00000008) +#define EM_BLE_TXRXADD_BIT ((uint16_t)0x00000080) +#define EM_BLE_TXRXADD_POS 7 +#define EM_BLE_TXTXADD_BIT ((uint16_t)0x00000040) +#define EM_BLE_TXTXADD_POS 6 +#define EM_BLE_TXCHSEL2_BIT ((uint16_t)0x00000020) +#define EM_BLE_TXCHSEL2_POS 5 +#define EM_BLE_TXADVRFU_BIT ((uint16_t)0x00000010) +#define EM_BLE_TXADVRFU_POS 4 +#define EM_BLE_TXTYPE_MASK ((uint16_t)0x0000000F) +#define EM_BLE_TXTYPE_LSB 0 +#define EM_BLE_TXTYPE_WIDTH ((uint16_t)0x00000004) + +#define EM_BLE_TXADVLEN_RST 0x0 +#define EM_BLE_TXRXADD_RST 0x0 +#define EM_BLE_TXTXADD_RST 0x0 +#define EM_BLE_TXCHSEL2_RST 0x0 +#define EM_BLE_TXADVRFU_RST 0x0 +#define EM_BLE_TXTYPE_RST 0x0 + +__INLINE void em_ble_txphadv_pack(int elt_idx, uint8_t txadvlen, uint8_t txrxadd, uint8_t txtxadd, uint8_t txchsel2, uint8_t txadvrfu, uint8_t txtype) +{ + ASSERT_ERR((((uint16_t)txadvlen << 8) & ~((uint16_t)0x0000FF00)) == 0); + ASSERT_ERR((((uint16_t)txrxadd << 7) & ~((uint16_t)0x00000080)) == 0); + ASSERT_ERR((((uint16_t)txtxadd << 6) & ~((uint16_t)0x00000040)) == 0); + ASSERT_ERR((((uint16_t)txchsel2 << 5) & ~((uint16_t)0x00000020)) == 0); + ASSERT_ERR((((uint16_t)txadvrfu << 4) & ~((uint16_t)0x00000010)) == 0); + ASSERT_ERR((((uint16_t)txtype << 0) & ~((uint16_t)0x0000000F)) == 0); + EM_BLE_WR(EM_BLE_TXPHADV_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE, ((uint16_t)txadvlen << 8) | ((uint16_t)txrxadd << 7) | ((uint16_t)txtxadd << 6) | ((uint16_t)txchsel2 << 5) | ((uint16_t)txadvrfu << 4) | ((uint16_t)txtype << 0)); +} + +__INLINE void em_ble_txphadv_unpack(int elt_idx, uint8_t* txadvlen, uint8_t* txrxadd, uint8_t* txtxadd, uint8_t* txchsel2, uint8_t* txadvrfu, uint8_t* txtype) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXPHADV_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE); + + *txadvlen = (localVal & ((uint16_t)0x0000FF00)) >> 8; + *txrxadd = (localVal & ((uint16_t)0x00000080)) >> 7; + *txtxadd = (localVal & ((uint16_t)0x00000040)) >> 6; + *txchsel2 = (localVal & ((uint16_t)0x00000020)) >> 5; + *txadvrfu = (localVal & ((uint16_t)0x00000010)) >> 4; + *txtype = (localVal & ((uint16_t)0x0000000F)) >> 0; +} + +__INLINE uint8_t em_ble_txphadv_txadvlen_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXPHADV_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE); + return ((localVal & ((uint16_t)0x0000FF00)) >> 8); +} + +__INLINE void em_ble_txphadv_txadvlen_setf(int elt_idx, uint8_t txadvlen) +{ + ASSERT_ERR((((uint16_t)txadvlen << 8) & ~((uint16_t)0x0000FF00)) == 0); + EM_BLE_WR(EM_BLE_TXPHADV_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE, (EM_BLE_RD(EM_BLE_TXPHADV_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE) & ~((uint16_t)0x0000FF00)) | ((uint16_t)txadvlen << 8)); +} + +__INLINE uint8_t em_ble_txphadv_txrxadd_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXPHADV_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000080)) >> 7); +} + +__INLINE void em_ble_txphadv_txrxadd_setf(int elt_idx, uint8_t txrxadd) +{ + ASSERT_ERR((((uint16_t)txrxadd << 7) & ~((uint16_t)0x00000080)) == 0); + EM_BLE_WR(EM_BLE_TXPHADV_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE, (EM_BLE_RD(EM_BLE_TXPHADV_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE) & ~((uint16_t)0x00000080)) | ((uint16_t)txrxadd << 7)); +} + +__INLINE uint8_t em_ble_txphadv_txtxadd_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXPHADV_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000040)) >> 6); +} + +__INLINE void em_ble_txphadv_txtxadd_setf(int elt_idx, uint8_t txtxadd) +{ + ASSERT_ERR((((uint16_t)txtxadd << 6) & ~((uint16_t)0x00000040)) == 0); + EM_BLE_WR(EM_BLE_TXPHADV_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE, (EM_BLE_RD(EM_BLE_TXPHADV_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE) & ~((uint16_t)0x00000040)) | ((uint16_t)txtxadd << 6)); +} + +__INLINE uint8_t em_ble_txphadv_txchsel2_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXPHADV_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000020)) >> 5); +} + +__INLINE void em_ble_txphadv_txchsel2_setf(int elt_idx, uint8_t txchsel2) +{ + ASSERT_ERR((((uint16_t)txchsel2 << 5) & ~((uint16_t)0x00000020)) == 0); + EM_BLE_WR(EM_BLE_TXPHADV_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE, (EM_BLE_RD(EM_BLE_TXPHADV_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE) & ~((uint16_t)0x00000020)) | ((uint16_t)txchsel2 << 5)); +} + +__INLINE uint8_t em_ble_txphadv_txadvrfu_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXPHADV_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000010)) >> 4); +} + +__INLINE void em_ble_txphadv_txadvrfu_setf(int elt_idx, uint8_t txadvrfu) +{ + ASSERT_ERR((((uint16_t)txadvrfu << 4) & ~((uint16_t)0x00000010)) == 0); + EM_BLE_WR(EM_BLE_TXPHADV_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE, (EM_BLE_RD(EM_BLE_TXPHADV_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE) & ~((uint16_t)0x00000010)) | ((uint16_t)txadvrfu << 4)); +} + +__INLINE uint8_t em_ble_txphadv_txtype_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXPHADV_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE); + return ((localVal & ((uint16_t)0x0000000F)) >> 0); +} + +__INLINE void em_ble_txphadv_txtype_setf(int elt_idx, uint8_t txtype) +{ + ASSERT_ERR((((uint16_t)txtype << 0) & ~((uint16_t)0x0000000F)) == 0); + EM_BLE_WR(EM_BLE_TXPHADV_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE, (EM_BLE_RD(EM_BLE_TXPHADV_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE) & ~((uint16_t)0x0000000F)) | ((uint16_t)txtype << 0)); +} + +/** + * @brief TXDATAPTR register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:00 TXDATAPTR 0x0 + *+ */ +#define EM_BLE_TXDATAPTR_ADDR (EXCHANGE_MEM_BASE+0x04 + EM_BLE_TX_DESC_OFFSET) +#define EM_BLE_TXDATAPTR_INDEX 0x00000002 +#define EM_BLE_TXDATAPTR_RESET 0x00000000 + +__INLINE uint16_t em_ble_txdataptr_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_TXDATAPTR_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE); +} + +__INLINE void em_ble_txdataptr_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_TXDATAPTR_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE, value); +} + +// field definitions +#define EM_BLE_TXDATAPTR_MASK ((uint16_t)0x0000FFFF) +#define EM_BLE_TXDATAPTR_LSB 0 +#define EM_BLE_TXDATAPTR_WIDTH ((uint16_t)0x00000010) + +#define EM_BLE_TXDATAPTR_RST 0x0 + +__INLINE uint16_t em_ble_txdataptr_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXDATAPTR_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE); + ASSERT_ERR((localVal & ~((uint16_t)0x0000FFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void em_ble_txdataptr_setf(int elt_idx, uint16_t txdataptr) +{ + ASSERT_ERR((((uint16_t)txdataptr << 0) & ~((uint16_t)0x0000FFFF)) == 0); + EM_BLE_WR(EM_BLE_TXDATAPTR_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE, (uint16_t)txdataptr << 0); +} + +/** + * @brief TXAEHEADER register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15 TXRSVD 0 + * 14 TXPOW 0 + * 13 TXSYNC 0 + * 12 TXAUXPTR 0 + * 11 TXADI 0 + * 10 TXSUPP 0 + * 09 TXTGTA 0 + * 08 TXADVA 0 + * 07:06 TXAEMODE 0x0 + * 05:00 TXAELENGTH 0x0 + *+ */ +#define EM_BLE_TXAEHEADER_ADDR (EXCHANGE_MEM_BASE+0x06 + EM_BLE_TX_DESC_OFFSET) +#define EM_BLE_TXAEHEADER_INDEX 0x00000003 +#define EM_BLE_TXAEHEADER_RESET 0x00000000 + +__INLINE uint16_t em_ble_txaeheader_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_TXAEHEADER_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE); +} + +__INLINE void em_ble_txaeheader_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_TXAEHEADER_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE, value); +} + +// field definitions +#define EM_BLE_TXRSVD_BIT ((uint16_t)0x00008000) +#define EM_BLE_TXRSVD_POS 15 +#define EM_BLE_TXPOW_BIT ((uint16_t)0x00004000) +#define EM_BLE_TXPOW_POS 14 +#define EM_BLE_TXSYNC_BIT ((uint16_t)0x00002000) +#define EM_BLE_TXSYNC_POS 13 +#define EM_BLE_TXAUXPTR_BIT ((uint16_t)0x00001000) +#define EM_BLE_TXAUXPTR_POS 12 +#define EM_BLE_TXADI_BIT ((uint16_t)0x00000800) +#define EM_BLE_TXADI_POS 11 +#define EM_BLE_TXSUPP_BIT ((uint16_t)0x00000400) +#define EM_BLE_TXSUPP_POS 10 +#define EM_BLE_TXTGTA_BIT ((uint16_t)0x00000200) +#define EM_BLE_TXTGTA_POS 9 +#define EM_BLE_TXADVA_BIT ((uint16_t)0x00000100) +#define EM_BLE_TXADVA_POS 8 +#define EM_BLE_TXAEMODE_MASK ((uint16_t)0x000000C0) +#define EM_BLE_TXAEMODE_LSB 6 +#define EM_BLE_TXAEMODE_WIDTH ((uint16_t)0x00000002) +#define EM_BLE_TXAELENGTH_MASK ((uint16_t)0x0000003F) +#define EM_BLE_TXAELENGTH_LSB 0 +#define EM_BLE_TXAELENGTH_WIDTH ((uint16_t)0x00000006) + +#define EM_BLE_TXRSVD_RST 0x0 +#define EM_BLE_TXPOW_RST 0x0 +#define EM_BLE_TXSYNC_RST 0x0 +#define EM_BLE_TXAUXPTR_RST 0x0 +#define EM_BLE_TXADI_RST 0x0 +#define EM_BLE_TXSUPP_RST 0x0 +#define EM_BLE_TXTGTA_RST 0x0 +#define EM_BLE_TXADVA_RST 0x0 +#define EM_BLE_TXAEMODE_RST 0x0 +#define EM_BLE_TXAELENGTH_RST 0x0 + +__INLINE void em_ble_txaeheader_pack(int elt_idx, uint8_t txrsvd, uint8_t txpow, uint8_t txsync, uint8_t txauxptr, uint8_t txadi, uint8_t txsupp, uint8_t txtgta, uint8_t txadva, uint8_t txaemode, uint8_t txaelength) +{ + ASSERT_ERR((((uint16_t)txrsvd << 15) & ~((uint16_t)0x00008000)) == 0); + ASSERT_ERR((((uint16_t)txpow << 14) & ~((uint16_t)0x00004000)) == 0); + ASSERT_ERR((((uint16_t)txsync << 13) & ~((uint16_t)0x00002000)) == 0); + ASSERT_ERR((((uint16_t)txauxptr << 12) & ~((uint16_t)0x00001000)) == 0); + ASSERT_ERR((((uint16_t)txadi << 11) & ~((uint16_t)0x00000800)) == 0); + ASSERT_ERR((((uint16_t)txsupp << 10) & ~((uint16_t)0x00000400)) == 0); + ASSERT_ERR((((uint16_t)txtgta << 9) & ~((uint16_t)0x00000200)) == 0); + ASSERT_ERR((((uint16_t)txadva << 8) & ~((uint16_t)0x00000100)) == 0); + ASSERT_ERR((((uint16_t)txaemode << 6) & ~((uint16_t)0x000000C0)) == 0); + ASSERT_ERR((((uint16_t)txaelength << 0) & ~((uint16_t)0x0000003F)) == 0); + EM_BLE_WR(EM_BLE_TXAEHEADER_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE, ((uint16_t)txrsvd << 15) | ((uint16_t)txpow << 14) | ((uint16_t)txsync << 13) | ((uint16_t)txauxptr << 12) | ((uint16_t)txadi << 11) | ((uint16_t)txsupp << 10) | ((uint16_t)txtgta << 9) | ((uint16_t)txadva << 8) | ((uint16_t)txaemode << 6) | ((uint16_t)txaelength << 0)); +} + +__INLINE void em_ble_txaeheader_unpack(int elt_idx, uint8_t* txrsvd, uint8_t* txpow, uint8_t* txsync, uint8_t* txauxptr, uint8_t* txadi, uint8_t* txsupp, uint8_t* txtgta, uint8_t* txadva, uint8_t* txaemode, uint8_t* txaelength) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXAEHEADER_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE); + + *txrsvd = (localVal & ((uint16_t)0x00008000)) >> 15; + *txpow = (localVal & ((uint16_t)0x00004000)) >> 14; + *txsync = (localVal & ((uint16_t)0x00002000)) >> 13; + *txauxptr = (localVal & ((uint16_t)0x00001000)) >> 12; + *txadi = (localVal & ((uint16_t)0x00000800)) >> 11; + *txsupp = (localVal & ((uint16_t)0x00000400)) >> 10; + *txtgta = (localVal & ((uint16_t)0x00000200)) >> 9; + *txadva = (localVal & ((uint16_t)0x00000100)) >> 8; + *txaemode = (localVal & ((uint16_t)0x000000C0)) >> 6; + *txaelength = (localVal & ((uint16_t)0x0000003F)) >> 0; +} + +__INLINE uint8_t em_ble_txaeheader_txrsvd_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXAEHEADER_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00008000)) >> 15); +} + +__INLINE void em_ble_txaeheader_txrsvd_setf(int elt_idx, uint8_t txrsvd) +{ + ASSERT_ERR((((uint16_t)txrsvd << 15) & ~((uint16_t)0x00008000)) == 0); + EM_BLE_WR(EM_BLE_TXAEHEADER_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE, (EM_BLE_RD(EM_BLE_TXAEHEADER_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE) & ~((uint16_t)0x00008000)) | ((uint16_t)txrsvd << 15)); +} + +__INLINE uint8_t em_ble_txaeheader_txpow_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXAEHEADER_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00004000)) >> 14); +} + +__INLINE void em_ble_txaeheader_txpow_setf(int elt_idx, uint8_t txpow) +{ + ASSERT_ERR((((uint16_t)txpow << 14) & ~((uint16_t)0x00004000)) == 0); + EM_BLE_WR(EM_BLE_TXAEHEADER_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE, (EM_BLE_RD(EM_BLE_TXAEHEADER_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE) & ~((uint16_t)0x00004000)) | ((uint16_t)txpow << 14)); +} + +__INLINE uint8_t em_ble_txaeheader_txsync_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXAEHEADER_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00002000)) >> 13); +} + +__INLINE void em_ble_txaeheader_txsync_setf(int elt_idx, uint8_t txsync) +{ + ASSERT_ERR((((uint16_t)txsync << 13) & ~((uint16_t)0x00002000)) == 0); + EM_BLE_WR(EM_BLE_TXAEHEADER_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE, (EM_BLE_RD(EM_BLE_TXAEHEADER_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE) & ~((uint16_t)0x00002000)) | ((uint16_t)txsync << 13)); +} + +__INLINE uint8_t em_ble_txaeheader_txauxptr_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXAEHEADER_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00001000)) >> 12); +} + +__INLINE void em_ble_txaeheader_txauxptr_setf(int elt_idx, uint8_t txauxptr) +{ + ASSERT_ERR((((uint16_t)txauxptr << 12) & ~((uint16_t)0x00001000)) == 0); + EM_BLE_WR(EM_BLE_TXAEHEADER_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE, (EM_BLE_RD(EM_BLE_TXAEHEADER_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE) & ~((uint16_t)0x00001000)) | ((uint16_t)txauxptr << 12)); +} + +__INLINE uint8_t em_ble_txaeheader_txadi_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXAEHEADER_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000800)) >> 11); +} + +__INLINE void em_ble_txaeheader_txadi_setf(int elt_idx, uint8_t txadi) +{ + ASSERT_ERR((((uint16_t)txadi << 11) & ~((uint16_t)0x00000800)) == 0); + EM_BLE_WR(EM_BLE_TXAEHEADER_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE, (EM_BLE_RD(EM_BLE_TXAEHEADER_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE) & ~((uint16_t)0x00000800)) | ((uint16_t)txadi << 11)); +} + +__INLINE uint8_t em_ble_txaeheader_txsupp_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXAEHEADER_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000400)) >> 10); +} + +__INLINE void em_ble_txaeheader_txsupp_setf(int elt_idx, uint8_t txsupp) +{ + ASSERT_ERR((((uint16_t)txsupp << 10) & ~((uint16_t)0x00000400)) == 0); + EM_BLE_WR(EM_BLE_TXAEHEADER_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE, (EM_BLE_RD(EM_BLE_TXAEHEADER_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE) & ~((uint16_t)0x00000400)) | ((uint16_t)txsupp << 10)); +} + +__INLINE uint8_t em_ble_txaeheader_txtgta_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXAEHEADER_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000200)) >> 9); +} + +__INLINE void em_ble_txaeheader_txtgta_setf(int elt_idx, uint8_t txtgta) +{ + ASSERT_ERR((((uint16_t)txtgta << 9) & ~((uint16_t)0x00000200)) == 0); + EM_BLE_WR(EM_BLE_TXAEHEADER_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE, (EM_BLE_RD(EM_BLE_TXAEHEADER_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE) & ~((uint16_t)0x00000200)) | ((uint16_t)txtgta << 9)); +} + +__INLINE uint8_t em_ble_txaeheader_txadva_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXAEHEADER_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000100)) >> 8); +} + +__INLINE void em_ble_txaeheader_txadva_setf(int elt_idx, uint8_t txadva) +{ + ASSERT_ERR((((uint16_t)txadva << 8) & ~((uint16_t)0x00000100)) == 0); + EM_BLE_WR(EM_BLE_TXAEHEADER_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE, (EM_BLE_RD(EM_BLE_TXAEHEADER_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE) & ~((uint16_t)0x00000100)) | ((uint16_t)txadva << 8)); +} + +__INLINE uint8_t em_ble_txaeheader_txaemode_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXAEHEADER_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE); + return ((localVal & ((uint16_t)0x000000C0)) >> 6); +} + +__INLINE void em_ble_txaeheader_txaemode_setf(int elt_idx, uint8_t txaemode) +{ + ASSERT_ERR((((uint16_t)txaemode << 6) & ~((uint16_t)0x000000C0)) == 0); + EM_BLE_WR(EM_BLE_TXAEHEADER_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE, (EM_BLE_RD(EM_BLE_TXAEHEADER_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE) & ~((uint16_t)0x000000C0)) | ((uint16_t)txaemode << 6)); +} + +__INLINE uint8_t em_ble_txaeheader_txaelength_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXAEHEADER_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE); + return ((localVal & ((uint16_t)0x0000003F)) >> 0); +} + +__INLINE void em_ble_txaeheader_txaelength_setf(int elt_idx, uint8_t txaelength) +{ + ASSERT_ERR((((uint16_t)txaelength << 0) & ~((uint16_t)0x0000003F)) == 0); + EM_BLE_WR(EM_BLE_TXAEHEADER_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE, (EM_BLE_RD(EM_BLE_TXAEHEADER_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE) & ~((uint16_t)0x0000003F)) | ((uint16_t)txaelength << 0)); +} + +/** + * @brief TXAUXPTR0 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:08 TXAUXOFFSET_LSB 0x0 + * 07 TXAUXOFFSET_UNIT 0 + * 06 TXAUX_CA 0 + * 05:00 TX_LL_CH 0x0 + *+ */ +#define EM_BLE_TXAUXPTR0_ADDR (EXCHANGE_MEM_BASE+0x08 + EM_BLE_TX_DESC_OFFSET) +#define EM_BLE_TXAUXPTR0_INDEX 0x00000004 +#define EM_BLE_TXAUXPTR0_RESET 0x00000000 + +__INLINE uint16_t em_ble_txauxptr0_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_TXAUXPTR0_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE); +} + +__INLINE void em_ble_txauxptr0_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_TXAUXPTR0_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE, value); +} + +// field definitions +#define EM_BLE_TXAUXOFFSET_LSB_MASK ((uint16_t)0x0000FF00) +#define EM_BLE_TXAUXOFFSET_LSB_LSB 8 +#define EM_BLE_TXAUXOFFSET_LSB_WIDTH ((uint16_t)0x00000008) +#define EM_BLE_TXAUXOFFSET_UNIT_BIT ((uint16_t)0x00000080) +#define EM_BLE_TXAUXOFFSET_UNIT_POS 7 +#define EM_BLE_TXAUX_CA_BIT ((uint16_t)0x00000040) +#define EM_BLE_TXAUX_CA_POS 6 +#define EM_BLE_TX_LL_CH_MASK ((uint16_t)0x0000003F) +#define EM_BLE_TX_LL_CH_LSB 0 +#define EM_BLE_TX_LL_CH_WIDTH ((uint16_t)0x00000006) + +#define EM_BLE_TXAUXOFFSET_LSB_RST 0x0 +#define EM_BLE_TXAUXOFFSET_UNIT_RST 0x0 +#define EM_BLE_TXAUX_CA_RST 0x0 +#define EM_BLE_TX_LL_CH_RST 0x0 + +__INLINE void em_ble_txauxptr0_pack(int elt_idx, uint8_t txauxoffsetlsb, uint8_t txauxoffsetunit, uint8_t txauxca, uint8_t txllch) +{ + ASSERT_ERR((((uint16_t)txauxoffsetlsb << 8) & ~((uint16_t)0x0000FF00)) == 0); + ASSERT_ERR((((uint16_t)txauxoffsetunit << 7) & ~((uint16_t)0x00000080)) == 0); + ASSERT_ERR((((uint16_t)txauxca << 6) & ~((uint16_t)0x00000040)) == 0); + ASSERT_ERR((((uint16_t)txllch << 0) & ~((uint16_t)0x0000003F)) == 0); + EM_BLE_WR(EM_BLE_TXAUXPTR0_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE, ((uint16_t)txauxoffsetlsb << 8) | ((uint16_t)txauxoffsetunit << 7) | ((uint16_t)txauxca << 6) | ((uint16_t)txllch << 0)); +} + +__INLINE void em_ble_txauxptr0_unpack(int elt_idx, uint8_t* txauxoffsetlsb, uint8_t* txauxoffsetunit, uint8_t* txauxca, uint8_t* txllch) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXAUXPTR0_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE); + + *txauxoffsetlsb = (localVal & ((uint16_t)0x0000FF00)) >> 8; + *txauxoffsetunit = (localVal & ((uint16_t)0x00000080)) >> 7; + *txauxca = (localVal & ((uint16_t)0x00000040)) >> 6; + *txllch = (localVal & ((uint16_t)0x0000003F)) >> 0; +} + +__INLINE uint8_t em_ble_txauxptr0_txauxoffset_lsb_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXAUXPTR0_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE); + return ((localVal & ((uint16_t)0x0000FF00)) >> 8); +} + +__INLINE void em_ble_txauxptr0_txauxoffset_lsb_setf(int elt_idx, uint8_t txauxoffsetlsb) +{ + ASSERT_ERR((((uint16_t)txauxoffsetlsb << 8) & ~((uint16_t)0x0000FF00)) == 0); + EM_BLE_WR(EM_BLE_TXAUXPTR0_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE, (EM_BLE_RD(EM_BLE_TXAUXPTR0_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE) & ~((uint16_t)0x0000FF00)) | ((uint16_t)txauxoffsetlsb << 8)); +} + +__INLINE uint8_t em_ble_txauxptr0_txauxoffset_unit_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXAUXPTR0_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000080)) >> 7); +} + +__INLINE void em_ble_txauxptr0_txauxoffset_unit_setf(int elt_idx, uint8_t txauxoffsetunit) +{ + ASSERT_ERR((((uint16_t)txauxoffsetunit << 7) & ~((uint16_t)0x00000080)) == 0); + EM_BLE_WR(EM_BLE_TXAUXPTR0_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE, (EM_BLE_RD(EM_BLE_TXAUXPTR0_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE) & ~((uint16_t)0x00000080)) | ((uint16_t)txauxoffsetunit << 7)); +} + +__INLINE uint8_t em_ble_txauxptr0_txaux_ca_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXAUXPTR0_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000040)) >> 6); +} + +__INLINE void em_ble_txauxptr0_txaux_ca_setf(int elt_idx, uint8_t txauxca) +{ + ASSERT_ERR((((uint16_t)txauxca << 6) & ~((uint16_t)0x00000040)) == 0); + EM_BLE_WR(EM_BLE_TXAUXPTR0_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE, (EM_BLE_RD(EM_BLE_TXAUXPTR0_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE) & ~((uint16_t)0x00000040)) | ((uint16_t)txauxca << 6)); +} + +__INLINE uint8_t em_ble_txauxptr0_tx_ll_ch_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXAUXPTR0_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE); + return ((localVal & ((uint16_t)0x0000003F)) >> 0); +} + +__INLINE void em_ble_txauxptr0_tx_ll_ch_setf(int elt_idx, uint8_t txllch) +{ + ASSERT_ERR((((uint16_t)txllch << 0) & ~((uint16_t)0x0000003F)) == 0); + EM_BLE_WR(EM_BLE_TXAUXPTR0_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE, (EM_BLE_RD(EM_BLE_TXAUXPTR0_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE) & ~((uint16_t)0x0000003F)) | ((uint16_t)txllch << 0)); +} + +/** + * @brief TXAUXPTR1 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 07:05 TXAUX_PHY 0x0 + * 04:00 TXAUXOFFSET_MSB 0x0 + *+ */ +#define EM_BLE_TXAUXPTR1_ADDR (EXCHANGE_MEM_BASE+0x0A + EM_BLE_TX_DESC_OFFSET) +#define EM_BLE_TXAUXPTR1_INDEX 0x00000005 +#define EM_BLE_TXAUXPTR1_RESET 0x00000000 + +__INLINE uint16_t em_ble_txauxptr1_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_TXAUXPTR1_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE); +} + +__INLINE void em_ble_txauxptr1_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_TXAUXPTR1_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE, value); +} + +// field definitions +#define EM_BLE_TXAUX_PHY_MASK ((uint16_t)0x000000E0) +#define EM_BLE_TXAUX_PHY_LSB 5 +#define EM_BLE_TXAUX_PHY_WIDTH ((uint16_t)0x00000003) +#define EM_BLE_TXAUXOFFSET_MSB_MASK ((uint16_t)0x0000001F) +#define EM_BLE_TXAUXOFFSET_MSB_LSB 0 +#define EM_BLE_TXAUXOFFSET_MSB_WIDTH ((uint16_t)0x00000005) + +#define EM_BLE_TXAUX_PHY_RST 0x0 +#define EM_BLE_TXAUXOFFSET_MSB_RST 0x0 + +__INLINE void em_ble_txauxptr1_pack(int elt_idx, uint8_t txauxphy, uint8_t txauxoffsetmsb) +{ + ASSERT_ERR((((uint16_t)txauxphy << 5) & ~((uint16_t)0x000000E0)) == 0); + ASSERT_ERR((((uint16_t)txauxoffsetmsb << 0) & ~((uint16_t)0x0000001F)) == 0); + EM_BLE_WR(EM_BLE_TXAUXPTR1_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE, ((uint16_t)txauxphy << 5) | ((uint16_t)txauxoffsetmsb << 0)); +} + +__INLINE void em_ble_txauxptr1_unpack(int elt_idx, uint8_t* txauxphy, uint8_t* txauxoffsetmsb) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXAUXPTR1_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE); + + *txauxphy = (localVal & ((uint16_t)0x000000E0)) >> 5; + *txauxoffsetmsb = (localVal & ((uint16_t)0x0000001F)) >> 0; +} + +__INLINE uint8_t em_ble_txauxptr1_txaux_phy_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXAUXPTR1_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE); + return ((localVal & ((uint16_t)0x000000E0)) >> 5); +} + +__INLINE void em_ble_txauxptr1_txaux_phy_setf(int elt_idx, uint8_t txauxphy) +{ + ASSERT_ERR((((uint16_t)txauxphy << 5) & ~((uint16_t)0x000000E0)) == 0); + EM_BLE_WR(EM_BLE_TXAUXPTR1_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE, (EM_BLE_RD(EM_BLE_TXAUXPTR1_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE) & ~((uint16_t)0x000000E0)) | ((uint16_t)txauxphy << 5)); +} + +__INLINE uint8_t em_ble_txauxptr1_txauxoffset_msb_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXAUXPTR1_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE); + return ((localVal & ((uint16_t)0x0000001F)) >> 0); +} + +__INLINE void em_ble_txauxptr1_txauxoffset_msb_setf(int elt_idx, uint8_t txauxoffsetmsb) +{ + ASSERT_ERR((((uint16_t)txauxoffsetmsb << 0) & ~((uint16_t)0x0000001F)) == 0); + EM_BLE_WR(EM_BLE_TXAUXPTR1_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE, (EM_BLE_RD(EM_BLE_TXAUXPTR1_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE) & ~((uint16_t)0x0000001F)) | ((uint16_t)txauxoffsetmsb << 0)); +} + +/** + * @brief TXAEDATAPTR register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:00 TXAEDATAPTR 0x0 + *+ */ +#define EM_BLE_TXAEDATAPTR_ADDR (EXCHANGE_MEM_BASE+0x0C + EM_BLE_TX_DESC_OFFSET) +#define EM_BLE_TXAEDATAPTR_INDEX 0x00000006 +#define EM_BLE_TXAEDATAPTR_RESET 0x00000000 + +__INLINE uint16_t em_ble_txaedataptr_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_TXAEDATAPTR_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE); +} + +__INLINE void em_ble_txaedataptr_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_TXAEDATAPTR_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE, value); +} + +// field definitions +#define EM_BLE_TXAEDATAPTR_MASK ((uint16_t)0x0000FFFF) +#define EM_BLE_TXAEDATAPTR_LSB 0 +#define EM_BLE_TXAEDATAPTR_WIDTH ((uint16_t)0x00000010) + +#define EM_BLE_TXAEDATAPTR_RST 0x0 + +__INLINE uint16_t em_ble_txaedataptr_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXAEDATAPTR_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE); + ASSERT_ERR((localVal & ~((uint16_t)0x0000FFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void em_ble_txaedataptr_setf(int elt_idx, uint16_t txaedataptr) +{ + ASSERT_ERR((((uint16_t)txaedataptr << 0) & ~((uint16_t)0x0000FFFF)) == 0); + EM_BLE_WR(EM_BLE_TXAEDATAPTR_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE, (uint16_t)txaedataptr << 0); +} + +/** + * @brief TXPHCTE register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 07:06 TXCTETYPE 0x0 + * 05 TXCTERFU 0 + * 04:00 TXCTETIME 0x0 + *+ */ +#define EM_BLE_TXPHCTE_ADDR (EXCHANGE_MEM_BASE+0x0E + EM_BLE_TX_DESC_OFFSET) +#define EM_BLE_TXPHCTE_INDEX 0x00000007 +#define EM_BLE_TXPHCTE_RESET 0x00000000 + +__INLINE uint16_t em_ble_txphcte_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_TXPHCTE_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE); +} + +__INLINE void em_ble_txphcte_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_TXPHCTE_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE, value); +} + +// field definitions +#define EM_BLE_TXCTETYPE_MASK ((uint16_t)0x000000C0) +#define EM_BLE_TXCTETYPE_LSB 6 +#define EM_BLE_TXCTETYPE_WIDTH ((uint16_t)0x00000002) +#define EM_BLE_TXCTERFU_BIT ((uint16_t)0x00000020) +#define EM_BLE_TXCTERFU_POS 5 +#define EM_BLE_TXCTETIME_MASK ((uint16_t)0x0000001F) +#define EM_BLE_TXCTETIME_LSB 0 +#define EM_BLE_TXCTETIME_WIDTH ((uint16_t)0x00000005) + +#define EM_BLE_TXCTETYPE_RST 0x0 +#define EM_BLE_TXCTERFU_RST 0x0 +#define EM_BLE_TXCTETIME_RST 0x0 + +__INLINE void em_ble_txphcte_pack(int elt_idx, uint8_t txctetype, uint8_t txcterfu, uint8_t txctetime) +{ + ASSERT_ERR((((uint16_t)txctetype << 6) & ~((uint16_t)0x000000C0)) == 0); + ASSERT_ERR((((uint16_t)txcterfu << 5) & ~((uint16_t)0x00000020)) == 0); + ASSERT_ERR((((uint16_t)txctetime << 0) & ~((uint16_t)0x0000001F)) == 0); + EM_BLE_WR(EM_BLE_TXPHCTE_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE, ((uint16_t)txctetype << 6) | ((uint16_t)txcterfu << 5) | ((uint16_t)txctetime << 0)); +} + +__INLINE void em_ble_txphcte_unpack(int elt_idx, uint8_t* txctetype, uint8_t* txcterfu, uint8_t* txctetime) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXPHCTE_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE); + + *txctetype = (localVal & ((uint16_t)0x000000C0)) >> 6; + *txcterfu = (localVal & ((uint16_t)0x00000020)) >> 5; + *txctetime = (localVal & ((uint16_t)0x0000001F)) >> 0; +} + +__INLINE uint8_t em_ble_txphcte_txctetype_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXPHCTE_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE); + return ((localVal & ((uint16_t)0x000000C0)) >> 6); +} + +__INLINE void em_ble_txphcte_txctetype_setf(int elt_idx, uint8_t txctetype) +{ + ASSERT_ERR((((uint16_t)txctetype << 6) & ~((uint16_t)0x000000C0)) == 0); + EM_BLE_WR(EM_BLE_TXPHCTE_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE, (EM_BLE_RD(EM_BLE_TXPHCTE_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE) & ~((uint16_t)0x000000C0)) | ((uint16_t)txctetype << 6)); +} + +__INLINE uint8_t em_ble_txphcte_txcterfu_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXPHCTE_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE); + return ((localVal & ((uint16_t)0x00000020)) >> 5); +} + +__INLINE void em_ble_txphcte_txcterfu_setf(int elt_idx, uint8_t txcterfu) +{ + ASSERT_ERR((((uint16_t)txcterfu << 5) & ~((uint16_t)0x00000020)) == 0); + EM_BLE_WR(EM_BLE_TXPHCTE_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE, (EM_BLE_RD(EM_BLE_TXPHCTE_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE) & ~((uint16_t)0x00000020)) | ((uint16_t)txcterfu << 5)); +} + +__INLINE uint8_t em_ble_txphcte_txctetime_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_TXPHCTE_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE); + return ((localVal & ((uint16_t)0x0000001F)) >> 0); +} + +__INLINE void em_ble_txphcte_txctetime_setf(int elt_idx, uint8_t txctetime) +{ + ASSERT_ERR((((uint16_t)txctetime << 0) & ~((uint16_t)0x0000001F)) == 0); + EM_BLE_WR(EM_BLE_TXPHCTE_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE, (EM_BLE_RD(EM_BLE_TXPHCTE_ADDR + elt_idx * REG_EM_BLE_TX_DESC_SIZE) & ~((uint16_t)0x0000001F)) | ((uint16_t)txctetime << 0)); +} + + +#endif // _REG_EM_BLE_TX_DESC_H_ + diff --git a/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Nationstech/ble_library/ns_ble_stack/rfinit/api/reg_em_ble_wpal.h b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Nationstech/ble_library/ns_ble_stack/rfinit/api/reg_em_ble_wpal.h new file mode 100644 index 0000000..ce749f6 --- /dev/null +++ b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Nationstech/ble_library/ns_ble_stack/rfinit/api/reg_em_ble_wpal.h @@ -0,0 +1,215 @@ +#ifndef _REG_EM_BLE_WPAL_H_ +#define _REG_EM_BLE_WPAL_H_ + +#include
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15 ENTRY_VALID 0 + * 14 IDTYPE 0 + * 01 IN_WL 0 + * 00 IN_PERADVL 0 + *+ */ +#define EM_BLE_LIST_INFO_ADDR (EXCHANGE_MEM_BASE + EM_BLE_WPAL_OFFSET) +#define EM_BLE_LIST_INFO_INDEX 0x00000000 +#define EM_BLE_LIST_INFO_RESET 0x00000000 + +__INLINE uint16_t em_ble_list_info_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_LIST_INFO_ADDR + elt_idx * REG_EM_BLE_WPAL_SIZE); +} + +__INLINE void em_ble_list_info_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_LIST_INFO_ADDR + elt_idx * REG_EM_BLE_WPAL_SIZE, value); +} + +// field definitions +#define EM_BLE_ENTRY_VALID_BIT ((uint16_t)0x00008000) +#define EM_BLE_ENTRY_VALID_POS 15 +#define EM_BLE_IDTYPE_BIT ((uint16_t)0x00004000) +#define EM_BLE_IDTYPE_POS 14 +#define EM_BLE_IN_WL_BIT ((uint16_t)0x00000002) +#define EM_BLE_IN_WL_POS 1 +#define EM_BLE_IN_PERADVL_BIT ((uint16_t)0x00000001) +#define EM_BLE_IN_PERADVL_POS 0 + +#define EM_BLE_ENTRY_VALID_RST 0x0 +#define EM_BLE_IDTYPE_RST 0x0 +#define EM_BLE_IN_WL_RST 0x0 +#define EM_BLE_IN_PERADVL_RST 0x0 + +__INLINE void em_ble_list_info_pack(int elt_idx, uint8_t entryvalid, uint8_t idtype, uint8_t inwl, uint8_t inperadvl) +{ + ASSERT_ERR((((uint16_t)entryvalid << 15) & ~((uint16_t)0x00008000)) == 0); + ASSERT_ERR((((uint16_t)idtype << 14) & ~((uint16_t)0x00004000)) == 0); + ASSERT_ERR((((uint16_t)inwl << 1) & ~((uint16_t)0x00000002)) == 0); + ASSERT_ERR((((uint16_t)inperadvl << 0) & ~((uint16_t)0x00000001)) == 0); + EM_BLE_WR(EM_BLE_LIST_INFO_ADDR + elt_idx * REG_EM_BLE_WPAL_SIZE, ((uint16_t)entryvalid << 15) | ((uint16_t)idtype << 14) | ((uint16_t)inwl << 1) | ((uint16_t)inperadvl << 0)); +} + +__INLINE void em_ble_list_info_unpack(int elt_idx, uint8_t* entryvalid, uint8_t* idtype, uint8_t* inwl, uint8_t* inperadvl) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_LIST_INFO_ADDR + elt_idx * REG_EM_BLE_WPAL_SIZE); + + *entryvalid = (localVal & ((uint16_t)0x00008000)) >> 15; + *idtype = (localVal & ((uint16_t)0x00004000)) >> 14; + *inwl = (localVal & ((uint16_t)0x00000002)) >> 1; + *inperadvl = (localVal & ((uint16_t)0x00000001)) >> 0; +} + +__INLINE uint8_t em_ble_list_info_entry_valid_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_LIST_INFO_ADDR + elt_idx * REG_EM_BLE_WPAL_SIZE); + return ((localVal & ((uint16_t)0x00008000)) >> 15); +} + +__INLINE void em_ble_list_info_entry_valid_setf(int elt_idx, uint8_t entryvalid) +{ + ASSERT_ERR((((uint16_t)entryvalid << 15) & ~((uint16_t)0x00008000)) == 0); + EM_BLE_WR(EM_BLE_LIST_INFO_ADDR + elt_idx * REG_EM_BLE_WPAL_SIZE, (EM_BLE_RD(EM_BLE_LIST_INFO_ADDR + elt_idx * REG_EM_BLE_WPAL_SIZE) & ~((uint16_t)0x00008000)) | ((uint16_t)entryvalid << 15)); +} + +__INLINE uint8_t em_ble_list_info_idtype_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_LIST_INFO_ADDR + elt_idx * REG_EM_BLE_WPAL_SIZE); + return ((localVal & ((uint16_t)0x00004000)) >> 14); +} + +__INLINE void em_ble_list_info_idtype_setf(int elt_idx, uint8_t idtype) +{ + ASSERT_ERR((((uint16_t)idtype << 14) & ~((uint16_t)0x00004000)) == 0); + EM_BLE_WR(EM_BLE_LIST_INFO_ADDR + elt_idx * REG_EM_BLE_WPAL_SIZE, (EM_BLE_RD(EM_BLE_LIST_INFO_ADDR + elt_idx * REG_EM_BLE_WPAL_SIZE) & ~((uint16_t)0x00004000)) | ((uint16_t)idtype << 14)); +} + +__INLINE uint8_t em_ble_list_info_in_wl_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_LIST_INFO_ADDR + elt_idx * REG_EM_BLE_WPAL_SIZE); + return ((localVal & ((uint16_t)0x00000002)) >> 1); +} + +__INLINE void em_ble_list_info_in_wl_setf(int elt_idx, uint8_t inwl) +{ + ASSERT_ERR((((uint16_t)inwl << 1) & ~((uint16_t)0x00000002)) == 0); + EM_BLE_WR(EM_BLE_LIST_INFO_ADDR + elt_idx * REG_EM_BLE_WPAL_SIZE, (EM_BLE_RD(EM_BLE_LIST_INFO_ADDR + elt_idx * REG_EM_BLE_WPAL_SIZE) & ~((uint16_t)0x00000002)) | ((uint16_t)inwl << 1)); +} + +__INLINE uint8_t em_ble_list_info_in_peradvl_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_LIST_INFO_ADDR + elt_idx * REG_EM_BLE_WPAL_SIZE); + return ((localVal & ((uint16_t)0x00000001)) >> 0); +} + +__INLINE void em_ble_list_info_in_peradvl_setf(int elt_idx, uint8_t inperadvl) +{ + ASSERT_ERR((((uint16_t)inperadvl << 0) & ~((uint16_t)0x00000001)) == 0); + EM_BLE_WR(EM_BLE_LIST_INFO_ADDR + elt_idx * REG_EM_BLE_WPAL_SIZE, (EM_BLE_RD(EM_BLE_LIST_INFO_ADDR + elt_idx * REG_EM_BLE_WPAL_SIZE) & ~((uint16_t)0x00000001)) | ((uint16_t)inperadvl << 0)); +} + +/** + * @brief LIST_BDADDR register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:00 LBDADDR 0x0 + *+ */ +#define EM_BLE_LIST_BDADDR_ADDR (EXCHANGE_MEM_BASE+0x02 + EM_BLE_WPAL_OFFSET) +#define EM_BLE_LIST_BDADDR_INDEX 0x00000001 +#define EM_BLE_LIST_BDADDR_RESET 0x00000000 +#define EM_BLE_LIST_BDADDR_COUNT 3 + +__INLINE uint16_t em_ble_list_bdaddr_get(int elt_idx, int reg_idx) +{ + ASSERT_ERR(reg_idx <= 2); + return EM_BLE_RD(EM_BLE_LIST_BDADDR_ADDR + elt_idx * REG_EM_BLE_WPAL_SIZE + reg_idx * 2); +} + +__INLINE void em_ble_list_bdaddr_set(int elt_idx, int reg_idx, uint16_t value) +{ + ASSERT_ERR(reg_idx <= 2); + EM_BLE_WR(EM_BLE_LIST_BDADDR_ADDR + elt_idx * REG_EM_BLE_WPAL_SIZE + reg_idx * 2, value); +} + +// field definitions +#define EM_BLE_LBDADDR_MASK ((uint16_t)0x0000FFFF) +#define EM_BLE_LBDADDR_LSB 0 +#define EM_BLE_LBDADDR_WIDTH ((uint16_t)0x00000010) + +#define EM_BLE_LBDADDR_RST 0x0 + +__INLINE uint16_t em_ble_list_bdaddr_lbdaddr_getf(int elt_idx, int reg_idx) +{ + ASSERT_ERR(reg_idx <= 2); + uint16_t localVal = EM_BLE_RD(EM_BLE_LIST_BDADDR_ADDR + elt_idx * REG_EM_BLE_WPAL_SIZE + reg_idx * 2); + ASSERT_ERR((localVal & ~((uint16_t)0x0000FFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void em_ble_list_bdaddr_lbdaddr_setf(int elt_idx, int reg_idx, uint16_t lbdaddr) +{ + ASSERT_ERR(reg_idx <= 2); + ASSERT_ERR((((uint16_t)lbdaddr << 0) & ~((uint16_t)0x0000FFFF)) == 0); + EM_BLE_WR(EM_BLE_LIST_BDADDR_ADDR + elt_idx * REG_EM_BLE_WPAL_SIZE + reg_idx * 2, (uint16_t)lbdaddr << 0); +} + +/** + * @brief LIST_SID register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:00 LSID 0x0 + *+ */ +#define EM_BLE_LIST_SID_ADDR (EXCHANGE_MEM_BASE+0x08 + EM_BLE_WPAL_OFFSET) +#define EM_BLE_LIST_SID_INDEX 0x00000004 +#define EM_BLE_LIST_SID_RESET 0x00000000 + +__INLINE uint16_t em_ble_list_sid_get(int elt_idx) +{ + return EM_BLE_RD(EM_BLE_LIST_SID_ADDR + elt_idx * REG_EM_BLE_WPAL_SIZE); +} + +__INLINE void em_ble_list_sid_set(int elt_idx, uint16_t value) +{ + EM_BLE_WR(EM_BLE_LIST_SID_ADDR + elt_idx * REG_EM_BLE_WPAL_SIZE, value); +} + +// field definitions +#define EM_BLE_LSID_MASK ((uint16_t)0x0000FFFF) +#define EM_BLE_LSID_LSB 0 +#define EM_BLE_LSID_WIDTH ((uint16_t)0x00000010) + +#define EM_BLE_LSID_RST 0x0 + +__INLINE uint16_t em_ble_list_sid_lsid_getf(int elt_idx) +{ + uint16_t localVal = EM_BLE_RD(EM_BLE_LIST_SID_ADDR + elt_idx * REG_EM_BLE_WPAL_SIZE); + ASSERT_ERR((localVal & ~((uint16_t)0x0000FFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void em_ble_list_sid_lsid_setf(int elt_idx, uint16_t lsid) +{ + ASSERT_ERR((((uint16_t)lsid << 0) & ~((uint16_t)0x0000FFFF)) == 0); + EM_BLE_WR(EM_BLE_LIST_SID_ADDR + elt_idx * REG_EM_BLE_WPAL_SIZE, (uint16_t)lsid << 0); +} + + +#endif // _REG_EM_BLE_WPAL_H_ + diff --git a/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Nationstech/ble_library/ns_ble_stack/rfinit/api/reg_em_et.h b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Nationstech/ble_library/ns_ble_stack/rfinit/api/reg_em_et.h new file mode 100644 index 0000000..45c2d51 --- /dev/null +++ b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Nationstech/ble_library/ns_ble_stack/rfinit/api/reg_em_et.h @@ -0,0 +1,751 @@ +#ifndef _REG_EM_ET_H_ +#define _REG_EM_ET_H_ + +#include
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:11 SCH_PRIO1 0x0 + * 10 SPA 0 + * 09 CSB 0 + * 08 SNIFF 0 + * 07 RSVD 0 + * 06 eSCO 0 + * 05:03 STATUS 0x0 + * 02:00 MODE 0x0 + *+ */ +#define EM_BT_EXTAB_ADDR (EXCHANGE_MEM_BASE + EM_ET_OFFSET) +#define EM_BT_EXTAB_INDEX 0x00000000 +#define EM_BT_EXTAB_RESET 0x00000000 + +__INLINE uint16_t em_bt_extab_get(int elt_idx) +{ + return EM_RD(EM_BT_EXTAB_ADDR + elt_idx * REG_EM_ET_SIZE); +} + +__INLINE void em_bt_extab_set(int elt_idx, uint16_t value) +{ + EM_WR(EM_BT_EXTAB_ADDR + elt_idx * REG_EM_ET_SIZE, value); +} + +// field definitions +#define EM_SCH_PRIO1_MASK ((uint16_t)0x0000F800) +#define EM_SCH_PRIO1_LSB 11 +#define EM_SCH_PRIO1_WIDTH ((uint16_t)0x00000005) +#define EM_SPA_BIT ((uint16_t)0x00000400) +#define EM_SPA_POS 10 +#define EM_CSB_BIT ((uint16_t)0x00000200) +#define EM_CSB_POS 9 +#define EM_SNIFF_BIT ((uint16_t)0x00000100) +#define EM_SNIFF_POS 8 +#define EM_RSVD_BIT ((uint16_t)0x00000080) +#define EM_RSVD_POS 7 +#define EM_E_SCO_BIT ((uint16_t)0x00000040) +#define EM_E_SCO_POS 6 +#define EM_STATUS_MASK ((uint16_t)0x00000038) +#define EM_STATUS_LSB 3 +#define EM_STATUS_WIDTH ((uint16_t)0x00000003) +#define EM_MODE_MASK ((uint16_t)0x00000007) +#define EM_MODE_LSB 0 +#define EM_MODE_WIDTH ((uint16_t)0x00000003) + +#define EM_SCH_PRIO1_RST 0x0 +#define EM_SPA_RST 0x0 +#define EM_CSB_RST 0x0 +#define EM_SNIFF_RST 0x0 +#define EM_RSVD_RST 0x0 +#define EM_E_SCO_RST 0x0 +#define EM_STATUS_RST 0x0 +#define EM_MODE_RST 0x0 + +__INLINE void em_bt_extab_pack(int elt_idx, uint8_t schprio1, uint8_t spa, uint8_t csb, uint8_t sniff, uint8_t rsvd, uint8_t esco, uint8_t status, uint8_t mode) +{ + ASSERT_ERR((((uint16_t)schprio1 << 11) & ~((uint16_t)0x0000F800)) == 0); + ASSERT_ERR((((uint16_t)spa << 10) & ~((uint16_t)0x00000400)) == 0); + ASSERT_ERR((((uint16_t)csb << 9) & ~((uint16_t)0x00000200)) == 0); + ASSERT_ERR((((uint16_t)sniff << 8) & ~((uint16_t)0x00000100)) == 0); + ASSERT_ERR((((uint16_t)rsvd << 7) & ~((uint16_t)0x00000080)) == 0); + ASSERT_ERR((((uint16_t)esco << 6) & ~((uint16_t)0x00000040)) == 0); + ASSERT_ERR((((uint16_t)status << 3) & ~((uint16_t)0x00000038)) == 0); + ASSERT_ERR((((uint16_t)mode << 0) & ~((uint16_t)0x00000007)) == 0); + EM_WR(EM_BT_EXTAB_ADDR + elt_idx * REG_EM_ET_SIZE, ((uint16_t)schprio1 << 11) | ((uint16_t)spa << 10) | ((uint16_t)csb << 9) | ((uint16_t)sniff << 8) | ((uint16_t)rsvd << 7) | ((uint16_t)esco << 6) | ((uint16_t)status << 3) | ((uint16_t)mode << 0)); +} + +__INLINE void em_bt_extab_unpack(int elt_idx, uint8_t* schprio1, uint8_t* spa, uint8_t* csb, uint8_t* sniff, uint8_t* rsvd, uint8_t* esco, uint8_t* status, uint8_t* mode) +{ + uint16_t localVal = EM_RD(EM_BT_EXTAB_ADDR + elt_idx * REG_EM_ET_SIZE); + + *schprio1 = (localVal & ((uint16_t)0x0000F800)) >> 11; + *spa = (localVal & ((uint16_t)0x00000400)) >> 10; + *csb = (localVal & ((uint16_t)0x00000200)) >> 9; + *sniff = (localVal & ((uint16_t)0x00000100)) >> 8; + *rsvd = (localVal & ((uint16_t)0x00000080)) >> 7; + *esco = (localVal & ((uint16_t)0x00000040)) >> 6; + *status = (localVal & ((uint16_t)0x00000038)) >> 3; + *mode = (localVal & ((uint16_t)0x00000007)) >> 0; +} + +__INLINE uint8_t em_bt_extab_sch_prio1_getf(int elt_idx) +{ + uint16_t localVal = EM_RD(EM_BT_EXTAB_ADDR + elt_idx * REG_EM_ET_SIZE); + return ((localVal & ((uint16_t)0x0000F800)) >> 11); +} + +__INLINE void em_bt_extab_sch_prio1_setf(int elt_idx, uint8_t schprio1) +{ + ASSERT_ERR((((uint16_t)schprio1 << 11) & ~((uint16_t)0x0000F800)) == 0); + EM_WR(EM_BT_EXTAB_ADDR + elt_idx * REG_EM_ET_SIZE, (EM_RD(EM_BT_EXTAB_ADDR + elt_idx * REG_EM_ET_SIZE) & ~((uint16_t)0x0000F800)) | ((uint16_t)schprio1 << 11)); +} + +__INLINE uint8_t em_bt_extab_spa_getf(int elt_idx) +{ + uint16_t localVal = EM_RD(EM_BT_EXTAB_ADDR + elt_idx * REG_EM_ET_SIZE); + return ((localVal & ((uint16_t)0x00000400)) >> 10); +} + +__INLINE void em_bt_extab_spa_setf(int elt_idx, uint8_t spa) +{ + ASSERT_ERR((((uint16_t)spa << 10) & ~((uint16_t)0x00000400)) == 0); + EM_WR(EM_BT_EXTAB_ADDR + elt_idx * REG_EM_ET_SIZE, (EM_RD(EM_BT_EXTAB_ADDR + elt_idx * REG_EM_ET_SIZE) & ~((uint16_t)0x00000400)) | ((uint16_t)spa << 10)); +} + +__INLINE uint8_t em_bt_extab_csb_getf(int elt_idx) +{ + uint16_t localVal = EM_RD(EM_BT_EXTAB_ADDR + elt_idx * REG_EM_ET_SIZE); + return ((localVal & ((uint16_t)0x00000200)) >> 9); +} + +__INLINE void em_bt_extab_csb_setf(int elt_idx, uint8_t csb) +{ + ASSERT_ERR((((uint16_t)csb << 9) & ~((uint16_t)0x00000200)) == 0); + EM_WR(EM_BT_EXTAB_ADDR + elt_idx * REG_EM_ET_SIZE, (EM_RD(EM_BT_EXTAB_ADDR + elt_idx * REG_EM_ET_SIZE) & ~((uint16_t)0x00000200)) | ((uint16_t)csb << 9)); +} + +__INLINE uint8_t em_bt_extab_sniff_getf(int elt_idx) +{ + uint16_t localVal = EM_RD(EM_BT_EXTAB_ADDR + elt_idx * REG_EM_ET_SIZE); + return ((localVal & ((uint16_t)0x00000100)) >> 8); +} + +__INLINE void em_bt_extab_sniff_setf(int elt_idx, uint8_t sniff) +{ + ASSERT_ERR((((uint16_t)sniff << 8) & ~((uint16_t)0x00000100)) == 0); + EM_WR(EM_BT_EXTAB_ADDR + elt_idx * REG_EM_ET_SIZE, (EM_RD(EM_BT_EXTAB_ADDR + elt_idx * REG_EM_ET_SIZE) & ~((uint16_t)0x00000100)) | ((uint16_t)sniff << 8)); +} + +__INLINE uint8_t em_bt_extab_rsvd_getf(int elt_idx) +{ + uint16_t localVal = EM_RD(EM_BT_EXTAB_ADDR + elt_idx * REG_EM_ET_SIZE); + return ((localVal & ((uint16_t)0x00000080)) >> 7); +} + +__INLINE void em_bt_extab_rsvd_setf(int elt_idx, uint8_t rsvd) +{ + ASSERT_ERR((((uint16_t)rsvd << 7) & ~((uint16_t)0x00000080)) == 0); + EM_WR(EM_BT_EXTAB_ADDR + elt_idx * REG_EM_ET_SIZE, (EM_RD(EM_BT_EXTAB_ADDR + elt_idx * REG_EM_ET_SIZE) & ~((uint16_t)0x00000080)) | ((uint16_t)rsvd << 7)); +} + +__INLINE uint8_t em_bt_extab_e_sco_getf(int elt_idx) +{ + uint16_t localVal = EM_RD(EM_BT_EXTAB_ADDR + elt_idx * REG_EM_ET_SIZE); + return ((localVal & ((uint16_t)0x00000040)) >> 6); +} + +__INLINE void em_bt_extab_e_sco_setf(int elt_idx, uint8_t esco) +{ + ASSERT_ERR((((uint16_t)esco << 6) & ~((uint16_t)0x00000040)) == 0); + EM_WR(EM_BT_EXTAB_ADDR + elt_idx * REG_EM_ET_SIZE, (EM_RD(EM_BT_EXTAB_ADDR + elt_idx * REG_EM_ET_SIZE) & ~((uint16_t)0x00000040)) | ((uint16_t)esco << 6)); +} + +__INLINE uint8_t em_bt_extab_status_getf(int elt_idx) +{ + uint16_t localVal = EM_RD(EM_BT_EXTAB_ADDR + elt_idx * REG_EM_ET_SIZE); + return ((localVal & ((uint16_t)0x00000038)) >> 3); +} + +__INLINE void em_bt_extab_status_setf(int elt_idx, uint8_t status) +{ + ASSERT_ERR((((uint16_t)status << 3) & ~((uint16_t)0x00000038)) == 0); + EM_WR(EM_BT_EXTAB_ADDR + elt_idx * REG_EM_ET_SIZE, (EM_RD(EM_BT_EXTAB_ADDR + elt_idx * REG_EM_ET_SIZE) & ~((uint16_t)0x00000038)) | ((uint16_t)status << 3)); +} + +__INLINE uint8_t em_bt_extab_mode_getf(int elt_idx) +{ + uint16_t localVal = EM_RD(EM_BT_EXTAB_ADDR + elt_idx * REG_EM_ET_SIZE); + return ((localVal & ((uint16_t)0x00000007)) >> 0); +} + +__INLINE void em_bt_extab_mode_setf(int elt_idx, uint8_t mode) +{ + ASSERT_ERR((((uint16_t)mode << 0) & ~((uint16_t)0x00000007)) == 0); + EM_WR(EM_BT_EXTAB_ADDR + elt_idx * REG_EM_ET_SIZE, (EM_RD(EM_BT_EXTAB_ADDR + elt_idx * REG_EM_ET_SIZE) & ~((uint16_t)0x00000007)) | ((uint16_t)mode << 0)); +} + +/** + * @brief LE_EXTAB register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:11 SCH_PRIO1 0x0 + * 10 SPA 0 + * 08 AE_NPS 0 + * 07 RSVD 0 + * 06 ISO 0 + * 05:03 STATUS 0x0 + * 02:00 MODE 0x0 + *+ */ +#define EM_LE_EXTAB_ADDR (EXCHANGE_MEM_BASE + EM_ET_OFFSET) +#define EM_LE_EXTAB_INDEX 0x00000000 +#define EM_LE_EXTAB_RESET 0x00000000 + +__INLINE uint16_t em_le_extab_get(int elt_idx) +{ + return EM_RD(EM_LE_EXTAB_ADDR + elt_idx * REG_EM_ET_SIZE); +} + +__INLINE void em_le_extab_set(int elt_idx, uint16_t value) +{ + EM_WR(EM_LE_EXTAB_ADDR + elt_idx * REG_EM_ET_SIZE, value); +} + +// field definitions +#define EM_SCH_PRIO1_MASK ((uint16_t)0x0000F800) +#define EM_SCH_PRIO1_LSB 11 +#define EM_SCH_PRIO1_WIDTH ((uint16_t)0x00000005) +#define EM_SPA_BIT ((uint16_t)0x00000400) +#define EM_SPA_POS 10 +#define EM_AE_NPS_BIT ((uint16_t)0x00000100) +#define EM_AE_NPS_POS 8 +#define EM_RSVD_BIT ((uint16_t)0x00000080) +#define EM_RSVD_POS 7 +#define EM_ISO_BIT ((uint16_t)0x00000040) +#define EM_ISO_POS 6 +#define EM_STATUS_MASK ((uint16_t)0x00000038) +#define EM_STATUS_LSB 3 +#define EM_STATUS_WIDTH ((uint16_t)0x00000003) +#define EM_MODE_MASK ((uint16_t)0x00000007) +#define EM_MODE_LSB 0 +#define EM_MODE_WIDTH ((uint16_t)0x00000003) + +#define EM_SCH_PRIO1_RST 0x0 +#define EM_SPA_RST 0x0 +#define EM_AE_NPS_RST 0x0 +#define EM_RSVD_RST 0x0 +#define EM_ISO_RST 0x0 +#define EM_STATUS_RST 0x0 +#define EM_MODE_RST 0x0 + +__INLINE void em_le_extab_pack(int elt_idx, uint8_t schprio1, uint8_t spa, uint8_t aenps, uint8_t rsvd, uint8_t iso, uint8_t status, uint8_t mode) +{ + ASSERT_ERR((((uint16_t)schprio1 << 11) & ~((uint16_t)0x0000F800)) == 0); + ASSERT_ERR((((uint16_t)spa << 10) & ~((uint16_t)0x00000400)) == 0); + ASSERT_ERR((((uint16_t)aenps << 8) & ~((uint16_t)0x00000100)) == 0); + ASSERT_ERR((((uint16_t)rsvd << 7) & ~((uint16_t)0x00000080)) == 0); + ASSERT_ERR((((uint16_t)iso << 6) & ~((uint16_t)0x00000040)) == 0); + ASSERT_ERR((((uint16_t)status << 3) & ~((uint16_t)0x00000038)) == 0); + ASSERT_ERR((((uint16_t)mode << 0) & ~((uint16_t)0x00000007)) == 0); + EM_WR(EM_LE_EXTAB_ADDR + elt_idx * REG_EM_ET_SIZE, ((uint16_t)schprio1 << 11) | ((uint16_t)spa << 10) | ((uint16_t)aenps << 8) | ((uint16_t)rsvd << 7) | ((uint16_t)iso << 6) | ((uint16_t)status << 3) | ((uint16_t)mode << 0)); +} + +__INLINE void em_le_extab_unpack(int elt_idx, uint8_t* schprio1, uint8_t* spa, uint8_t* aenps, uint8_t* rsvd, uint8_t* iso, uint8_t* status, uint8_t* mode) +{ + uint16_t localVal = EM_RD(EM_LE_EXTAB_ADDR + elt_idx * REG_EM_ET_SIZE); + + *schprio1 = (localVal & ((uint16_t)0x0000F800)) >> 11; + *spa = (localVal & ((uint16_t)0x00000400)) >> 10; + *aenps = (localVal & ((uint16_t)0x00000100)) >> 8; + *rsvd = (localVal & ((uint16_t)0x00000080)) >> 7; + *iso = (localVal & ((uint16_t)0x00000040)) >> 6; + *status = (localVal & ((uint16_t)0x00000038)) >> 3; + *mode = (localVal & ((uint16_t)0x00000007)) >> 0; +} + +__INLINE uint8_t em_le_extab_sch_prio1_getf(int elt_idx) +{ + uint16_t localVal = EM_RD(EM_LE_EXTAB_ADDR + elt_idx * REG_EM_ET_SIZE); + return ((localVal & ((uint16_t)0x0000F800)) >> 11); +} + +__INLINE void em_le_extab_sch_prio1_setf(int elt_idx, uint8_t schprio1) +{ + ASSERT_ERR((((uint16_t)schprio1 << 11) & ~((uint16_t)0x0000F800)) == 0); + EM_WR(EM_LE_EXTAB_ADDR + elt_idx * REG_EM_ET_SIZE, (EM_RD(EM_LE_EXTAB_ADDR + elt_idx * REG_EM_ET_SIZE) & ~((uint16_t)0x0000F800)) | ((uint16_t)schprio1 << 11)); +} + +__INLINE uint8_t em_le_extab_spa_getf(int elt_idx) +{ + uint16_t localVal = EM_RD(EM_LE_EXTAB_ADDR + elt_idx * REG_EM_ET_SIZE); + return ((localVal & ((uint16_t)0x00000400)) >> 10); +} + +__INLINE void em_le_extab_spa_setf(int elt_idx, uint8_t spa) +{ + ASSERT_ERR((((uint16_t)spa << 10) & ~((uint16_t)0x00000400)) == 0); + EM_WR(EM_LE_EXTAB_ADDR + elt_idx * REG_EM_ET_SIZE, (EM_RD(EM_LE_EXTAB_ADDR + elt_idx * REG_EM_ET_SIZE) & ~((uint16_t)0x00000400)) | ((uint16_t)spa << 10)); +} + +__INLINE uint8_t em_le_extab_ae_nps_getf(int elt_idx) +{ + uint16_t localVal = EM_RD(EM_LE_EXTAB_ADDR + elt_idx * REG_EM_ET_SIZE); + return ((localVal & ((uint16_t)0x00000100)) >> 8); +} + +__INLINE void em_le_extab_ae_nps_setf(int elt_idx, uint8_t aenps) +{ + ASSERT_ERR((((uint16_t)aenps << 8) & ~((uint16_t)0x00000100)) == 0); + EM_WR(EM_LE_EXTAB_ADDR + elt_idx * REG_EM_ET_SIZE, (EM_RD(EM_LE_EXTAB_ADDR + elt_idx * REG_EM_ET_SIZE) & ~((uint16_t)0x00000100)) | ((uint16_t)aenps << 8)); +} + +__INLINE uint8_t em_le_extab_rsvd_getf(int elt_idx) +{ + uint16_t localVal = EM_RD(EM_LE_EXTAB_ADDR + elt_idx * REG_EM_ET_SIZE); + return ((localVal & ((uint16_t)0x00000080)) >> 7); +} + +__INLINE void em_le_extab_rsvd_setf(int elt_idx, uint8_t rsvd) +{ + ASSERT_ERR((((uint16_t)rsvd << 7) & ~((uint16_t)0x00000080)) == 0); + EM_WR(EM_LE_EXTAB_ADDR + elt_idx * REG_EM_ET_SIZE, (EM_RD(EM_LE_EXTAB_ADDR + elt_idx * REG_EM_ET_SIZE) & ~((uint16_t)0x00000080)) | ((uint16_t)rsvd << 7)); +} + +__INLINE uint8_t em_le_extab_iso_getf(int elt_idx) +{ + uint16_t localVal = EM_RD(EM_LE_EXTAB_ADDR + elt_idx * REG_EM_ET_SIZE); + return ((localVal & ((uint16_t)0x00000040)) >> 6); +} + +__INLINE void em_le_extab_iso_setf(int elt_idx, uint8_t iso) +{ + ASSERT_ERR((((uint16_t)iso << 6) & ~((uint16_t)0x00000040)) == 0); + EM_WR(EM_LE_EXTAB_ADDR + elt_idx * REG_EM_ET_SIZE, (EM_RD(EM_LE_EXTAB_ADDR + elt_idx * REG_EM_ET_SIZE) & ~((uint16_t)0x00000040)) | ((uint16_t)iso << 6)); +} + +__INLINE uint8_t em_le_extab_status_getf(int elt_idx) +{ + uint16_t localVal = EM_RD(EM_LE_EXTAB_ADDR + elt_idx * REG_EM_ET_SIZE); + return ((localVal & ((uint16_t)0x00000038)) >> 3); +} + +__INLINE void em_le_extab_status_setf(int elt_idx, uint8_t status) +{ + ASSERT_ERR((((uint16_t)status << 3) & ~((uint16_t)0x00000038)) == 0); + EM_WR(EM_LE_EXTAB_ADDR + elt_idx * REG_EM_ET_SIZE, (EM_RD(EM_LE_EXTAB_ADDR + elt_idx * REG_EM_ET_SIZE) & ~((uint16_t)0x00000038)) | ((uint16_t)status << 3)); +} + +__INLINE uint8_t em_le_extab_mode_getf(int elt_idx) +{ + uint16_t localVal = EM_RD(EM_LE_EXTAB_ADDR + elt_idx * REG_EM_ET_SIZE); + return ((localVal & ((uint16_t)0x00000007)) >> 0); +} + +__INLINE void em_le_extab_mode_setf(int elt_idx, uint8_t mode) +{ + ASSERT_ERR((((uint16_t)mode << 0) & ~((uint16_t)0x00000007)) == 0); + EM_WR(EM_LE_EXTAB_ADDR + elt_idx * REG_EM_ET_SIZE, (EM_RD(EM_LE_EXTAB_ADDR + elt_idx * REG_EM_ET_SIZE) & ~((uint16_t)0x00000007)) | ((uint16_t)mode << 0)); +} + +/** + * @brief RAWSTP0 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15:00 RAWSTP0 0x0 + *+ */ +#define EM_RAWSTP0_ADDR (EXCHANGE_MEM_BASE+0x02 + EM_ET_OFFSET) +#define EM_RAWSTP0_INDEX 0x00000001 +#define EM_RAWSTP0_RESET 0x00000000 + +__INLINE uint16_t em_rawstp0_get(int elt_idx) +{ + return EM_RD(EM_RAWSTP0_ADDR + elt_idx * REG_EM_ET_SIZE); +} + +__INLINE void em_rawstp0_set(int elt_idx, uint16_t value) +{ + EM_WR(EM_RAWSTP0_ADDR + elt_idx * REG_EM_ET_SIZE, value); +} + +// field definitions +#define EM_RAWSTP0_MASK ((uint16_t)0x0000FFFF) +#define EM_RAWSTP0_LSB 0 +#define EM_RAWSTP0_WIDTH ((uint16_t)0x00000010) + +#define EM_RAWSTP0_RST 0x0 + +__INLINE uint16_t em_rawstp0_getf(int elt_idx) +{ + uint16_t localVal = EM_RD(EM_RAWSTP0_ADDR + elt_idx * REG_EM_ET_SIZE); + ASSERT_ERR((localVal & ~((uint16_t)0x0000FFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void em_rawstp0_setf(int elt_idx, uint16_t rawstp0) +{ + ASSERT_ERR((((uint16_t)rawstp0 << 0) & ~((uint16_t)0x0000FFFF)) == 0); + EM_WR(EM_RAWSTP0_ADDR + elt_idx * REG_EM_ET_SIZE, (uint16_t)rawstp0 << 0); +} + +/** + * @brief RAWSTP1 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 11:00 RAWSTP1 0x0 + *+ */ +#define EM_RAWSTP1_ADDR (EXCHANGE_MEM_BASE+0x04 + EM_ET_OFFSET) +#define EM_RAWSTP1_INDEX 0x00000002 +#define EM_RAWSTP1_RESET 0x00000000 + +__INLINE uint16_t em_rawstp1_get(int elt_idx) +{ + return EM_RD(EM_RAWSTP1_ADDR + elt_idx * REG_EM_ET_SIZE); +} + +__INLINE void em_rawstp1_set(int elt_idx, uint16_t value) +{ + EM_WR(EM_RAWSTP1_ADDR + elt_idx * REG_EM_ET_SIZE, value); +} + +// field definitions +#define EM_RAWSTP1_MASK ((uint16_t)0x00000FFF) +#define EM_RAWSTP1_LSB 0 +#define EM_RAWSTP1_WIDTH ((uint16_t)0x0000000C) + +#define EM_RAWSTP1_RST 0x0 + +__INLINE uint16_t em_rawstp1_getf(int elt_idx) +{ + uint16_t localVal = EM_RD(EM_RAWSTP1_ADDR + elt_idx * REG_EM_ET_SIZE); + ASSERT_ERR((localVal & ~((uint16_t)0x00000FFF)) == 0); + return (localVal >> 0); +} + +__INLINE void em_rawstp1_setf(int elt_idx, uint16_t rawstp1) +{ + ASSERT_ERR((((uint16_t)rawstp1 << 0) & ~((uint16_t)0x00000FFF)) == 0); + EM_WR(EM_RAWSTP1_ADDR + elt_idx * REG_EM_ET_SIZE, (uint16_t)rawstp1 << 0); +} + +/** + * @brief FINESTP register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 09:00 FINESTP 0x0 + *+ */ +#define EM_FINESTP_ADDR (EXCHANGE_MEM_BASE+0x06 + EM_ET_OFFSET) +#define EM_FINESTP_INDEX 0x00000003 +#define EM_FINESTP_RESET 0x00000000 + +__INLINE uint16_t em_finestp_get(int elt_idx) +{ + return EM_RD(EM_FINESTP_ADDR + elt_idx * REG_EM_ET_SIZE); +} + +__INLINE void em_finestp_set(int elt_idx, uint16_t value) +{ + EM_WR(EM_FINESTP_ADDR + elt_idx * REG_EM_ET_SIZE, value); +} + +// field definitions +#define EM_FINESTP_MASK ((uint16_t)0x000003FF) +#define EM_FINESTP_LSB 0 +#define EM_FINESTP_WIDTH ((uint16_t)0x0000000A) + +#define EM_FINESTP_RST 0x0 + +__INLINE uint16_t em_finestp_getf(int elt_idx) +{ + uint16_t localVal = EM_RD(EM_FINESTP_ADDR + elt_idx * REG_EM_ET_SIZE); + ASSERT_ERR((localVal & ~((uint16_t)0x000003FF)) == 0); + return (localVal >> 0); +} + +__INLINE void em_finestp_setf(int elt_idx, uint16_t finestp) +{ + ASSERT_ERR((((uint16_t)finestp << 0) & ~((uint16_t)0x000003FF)) == 0); + EM_WR(EM_FINESTP_ADDR + elt_idx * REG_EM_ET_SIZE, (uint16_t)finestp << 0); +} + +/** + * @brief CSPTR register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 14:00 CSPTR 0x0 + *+ */ +#define EM_CSPTR_ADDR (EXCHANGE_MEM_BASE+0x08 + EM_ET_OFFSET) +#define EM_CSPTR_INDEX 0x00000004 +#define EM_CSPTR_RESET 0x00000000 + +__INLINE uint16_t em_csptr_get(int elt_idx) +{ + return EM_RD(EM_CSPTR_ADDR + elt_idx * REG_EM_ET_SIZE); +} + +__INLINE void em_csptr_set(int elt_idx, uint16_t value) +{ + EM_WR(EM_CSPTR_ADDR + elt_idx * REG_EM_ET_SIZE, value); +} + +// field definitions +#define EM_CSPTR_MASK ((uint16_t)0x00007FFF) +#define EM_CSPTR_LSB 0 +#define EM_CSPTR_WIDTH ((uint16_t)0x0000000F) + +#define EM_CSPTR_RST 0x0 + +__INLINE uint16_t em_csptr_getf(int elt_idx) +{ + uint16_t localVal = EM_RD(EM_CSPTR_ADDR + elt_idx * REG_EM_ET_SIZE); + ASSERT_ERR((localVal & ~((uint16_t)0x00007FFF)) == 0); + return (localVal >> 0); +} + +__INLINE void em_csptr_setf(int elt_idx, uint16_t csptr) +{ + ASSERT_ERR((((uint16_t)csptr << 0) & ~((uint16_t)0x00007FFF)) == 0); + EM_WR(EM_CSPTR_ADDR + elt_idx * REG_EM_ET_SIZE, (uint16_t)csptr << 0); +} + +/** + * @brief PRIOBW register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15 PRIOBW_UNIT 0 + * 14:00 PRIOBW 0x0 + *+ */ +#define EM_PRIOBW_ADDR (EXCHANGE_MEM_BASE+0x0A + EM_ET_OFFSET) +#define EM_PRIOBW_INDEX 0x00000005 +#define EM_PRIOBW_RESET 0x00000000 + +__INLINE uint16_t em_priobw_get(int elt_idx) +{ + return EM_RD(EM_PRIOBW_ADDR + elt_idx * REG_EM_ET_SIZE); +} + +__INLINE void em_priobw_set(int elt_idx, uint16_t value) +{ + EM_WR(EM_PRIOBW_ADDR + elt_idx * REG_EM_ET_SIZE, value); +} + +// field definitions +#define EM_PRIOBW_UNIT_BIT ((uint16_t)0x00008000) +#define EM_PRIOBW_UNIT_POS 15 +#define EM_PRIOBW_MASK ((uint16_t)0x00007FFF) +#define EM_PRIOBW_LSB 0 +#define EM_PRIOBW_WIDTH ((uint16_t)0x0000000F) + +#define EM_PRIOBW_UNIT_RST 0x0 +#define EM_PRIOBW_RST 0x0 + +__INLINE void em_priobw_pack(int elt_idx, uint8_t priobwunit, uint16_t priobw) +{ + ASSERT_ERR((((uint16_t)priobwunit << 15) & ~((uint16_t)0x00008000)) == 0); + ASSERT_ERR((((uint16_t)priobw << 0) & ~((uint16_t)0x00007FFF)) == 0); + EM_WR(EM_PRIOBW_ADDR + elt_idx * REG_EM_ET_SIZE, ((uint16_t)priobwunit << 15) | ((uint16_t)priobw << 0)); +} + +__INLINE void em_priobw_unpack(int elt_idx, uint8_t* priobwunit, uint16_t* priobw) +{ + uint16_t localVal = EM_RD(EM_PRIOBW_ADDR + elt_idx * REG_EM_ET_SIZE); + + *priobwunit = (localVal & ((uint16_t)0x00008000)) >> 15; + *priobw = (localVal & ((uint16_t)0x00007FFF)) >> 0; +} + +__INLINE uint8_t em_priobw_priobw_unit_getf(int elt_idx) +{ + uint16_t localVal = EM_RD(EM_PRIOBW_ADDR + elt_idx * REG_EM_ET_SIZE); + return ((localVal & ((uint16_t)0x00008000)) >> 15); +} + +__INLINE void em_priobw_priobw_unit_setf(int elt_idx, uint8_t priobwunit) +{ + ASSERT_ERR((((uint16_t)priobwunit << 15) & ~((uint16_t)0x00008000)) == 0); + EM_WR(EM_PRIOBW_ADDR + elt_idx * REG_EM_ET_SIZE, (EM_RD(EM_PRIOBW_ADDR + elt_idx * REG_EM_ET_SIZE) & ~((uint16_t)0x00008000)) | ((uint16_t)priobwunit << 15)); +} + +__INLINE uint16_t em_priobw_priobw_getf(int elt_idx) +{ + uint16_t localVal = EM_RD(EM_PRIOBW_ADDR + elt_idx * REG_EM_ET_SIZE); + return ((localVal & ((uint16_t)0x00007FFF)) >> 0); +} + +__INLINE void em_priobw_priobw_setf(int elt_idx, uint16_t priobw) +{ + ASSERT_ERR((((uint16_t)priobw << 0) & ~((uint16_t)0x00007FFF)) == 0); + EM_WR(EM_PRIOBW_ADDR + elt_idx * REG_EM_ET_SIZE, (EM_RD(EM_PRIOBW_ADDR + elt_idx * REG_EM_ET_SIZE) & ~((uint16_t)0x00007FFF)) | ((uint16_t)priobw << 0)); +} + +/** + * @brief PRIOLVL register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 12:08 SCH_PRIO3 0x0 + * 04:00 SCH_PRIO2 0x0 + *+ */ +#define EM_PRIOLVL_ADDR (EXCHANGE_MEM_BASE+0x0C + EM_ET_OFFSET) +#define EM_PRIOLVL_INDEX 0x00000006 +#define EM_PRIOLVL_RESET 0x00000000 + +__INLINE uint16_t em_priolvl_get(int elt_idx) +{ + return EM_RD(EM_PRIOLVL_ADDR + elt_idx * REG_EM_ET_SIZE); +} + +__INLINE void em_priolvl_set(int elt_idx, uint16_t value) +{ + EM_WR(EM_PRIOLVL_ADDR + elt_idx * REG_EM_ET_SIZE, value); +} + +// field definitions +#define EM_SCH_PRIO3_MASK ((uint16_t)0x00001F00) +#define EM_SCH_PRIO3_LSB 8 +#define EM_SCH_PRIO3_WIDTH ((uint16_t)0x00000005) +#define EM_SCH_PRIO2_MASK ((uint16_t)0x0000001F) +#define EM_SCH_PRIO2_LSB 0 +#define EM_SCH_PRIO2_WIDTH ((uint16_t)0x00000005) + +#define EM_SCH_PRIO3_RST 0x0 +#define EM_SCH_PRIO2_RST 0x0 + +__INLINE void em_priolvl_pack(int elt_idx, uint8_t schprio3, uint8_t schprio2) +{ + ASSERT_ERR((((uint16_t)schprio3 << 8) & ~((uint16_t)0x00001F00)) == 0); + ASSERT_ERR((((uint16_t)schprio2 << 0) & ~((uint16_t)0x0000001F)) == 0); + EM_WR(EM_PRIOLVL_ADDR + elt_idx * REG_EM_ET_SIZE, ((uint16_t)schprio3 << 8) | ((uint16_t)schprio2 << 0)); +} + +__INLINE void em_priolvl_unpack(int elt_idx, uint8_t* schprio3, uint8_t* schprio2) +{ + uint16_t localVal = EM_RD(EM_PRIOLVL_ADDR + elt_idx * REG_EM_ET_SIZE); + + *schprio3 = (localVal & ((uint16_t)0x00001F00)) >> 8; + *schprio2 = (localVal & ((uint16_t)0x0000001F)) >> 0; +} + +__INLINE uint8_t em_priolvl_sch_prio3_getf(int elt_idx) +{ + uint16_t localVal = EM_RD(EM_PRIOLVL_ADDR + elt_idx * REG_EM_ET_SIZE); + return ((localVal & ((uint16_t)0x00001F00)) >> 8); +} + +__INLINE void em_priolvl_sch_prio3_setf(int elt_idx, uint8_t schprio3) +{ + ASSERT_ERR((((uint16_t)schprio3 << 8) & ~((uint16_t)0x00001F00)) == 0); + EM_WR(EM_PRIOLVL_ADDR + elt_idx * REG_EM_ET_SIZE, (EM_RD(EM_PRIOLVL_ADDR + elt_idx * REG_EM_ET_SIZE) & ~((uint16_t)0x00001F00)) | ((uint16_t)schprio3 << 8)); +} + +__INLINE uint8_t em_priolvl_sch_prio2_getf(int elt_idx) +{ + uint16_t localVal = EM_RD(EM_PRIOLVL_ADDR + elt_idx * REG_EM_ET_SIZE); + return ((localVal & ((uint16_t)0x0000001F)) >> 0); +} + +__INLINE void em_priolvl_sch_prio2_setf(int elt_idx, uint8_t schprio2) +{ + ASSERT_ERR((((uint16_t)schprio2 << 0) & ~((uint16_t)0x0000001F)) == 0); + EM_WR(EM_PRIOLVL_ADDR + elt_idx * REG_EM_ET_SIZE, (EM_RD(EM_PRIOLVL_ADDR + elt_idx * REG_EM_ET_SIZE) & ~((uint16_t)0x0000001F)) | ((uint16_t)schprio2 << 0)); +} + +/** + * @brief PTI_VXCHAN register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 12:08 PTI_PRIO 0x0 + * 01:00 VXCHAN 0x0 + *+ */ +#define EM_PTI_VXCHAN_ADDR (EXCHANGE_MEM_BASE+0x0E + EM_ET_OFFSET) +#define EM_PTI_VXCHAN_INDEX 0x00000007 +#define EM_PTI_VXCHAN_RESET 0x00000000 + +__INLINE uint16_t em_pti_vxchan_get(int elt_idx) +{ + return EM_RD(EM_PTI_VXCHAN_ADDR + elt_idx * REG_EM_ET_SIZE); +} + +__INLINE void em_pti_vxchan_set(int elt_idx, uint16_t value) +{ + EM_WR(EM_PTI_VXCHAN_ADDR + elt_idx * REG_EM_ET_SIZE, value); +} + +// field definitions +#define EM_PTI_PRIO_MASK ((uint16_t)0x00001F00) +#define EM_PTI_PRIO_LSB 8 +#define EM_PTI_PRIO_WIDTH ((uint16_t)0x00000005) +#define EM_VXCHAN_MASK ((uint16_t)0x00000003) +#define EM_VXCHAN_LSB 0 +#define EM_VXCHAN_WIDTH ((uint16_t)0x00000002) + +#define EM_PTI_PRIO_RST 0x0 +#define EM_VXCHAN_RST 0x0 + +__INLINE void em_pti_vxchan_pack(int elt_idx, uint8_t ptiprio, uint8_t vxchan) +{ + ASSERT_ERR((((uint16_t)ptiprio << 8) & ~((uint16_t)0x00001F00)) == 0); + ASSERT_ERR((((uint16_t)vxchan << 0) & ~((uint16_t)0x00000003)) == 0); + EM_WR(EM_PTI_VXCHAN_ADDR + elt_idx * REG_EM_ET_SIZE, ((uint16_t)ptiprio << 8) | ((uint16_t)vxchan << 0)); +} + +__INLINE void em_pti_vxchan_unpack(int elt_idx, uint8_t* ptiprio, uint8_t* vxchan) +{ + uint16_t localVal = EM_RD(EM_PTI_VXCHAN_ADDR + elt_idx * REG_EM_ET_SIZE); + + *ptiprio = (localVal & ((uint16_t)0x00001F00)) >> 8; + *vxchan = (localVal & ((uint16_t)0x00000003)) >> 0; +} + +__INLINE uint8_t em_pti_vxchan_pti_prio_getf(int elt_idx) +{ + uint16_t localVal = EM_RD(EM_PTI_VXCHAN_ADDR + elt_idx * REG_EM_ET_SIZE); + return ((localVal & ((uint16_t)0x00001F00)) >> 8); +} + +__INLINE void em_pti_vxchan_pti_prio_setf(int elt_idx, uint8_t ptiprio) +{ + ASSERT_ERR((((uint16_t)ptiprio << 8) & ~((uint16_t)0x00001F00)) == 0); + EM_WR(EM_PTI_VXCHAN_ADDR + elt_idx * REG_EM_ET_SIZE, (EM_RD(EM_PTI_VXCHAN_ADDR + elt_idx * REG_EM_ET_SIZE) & ~((uint16_t)0x00001F00)) | ((uint16_t)ptiprio << 8)); +} + +__INLINE uint8_t em_pti_vxchan_vxchan_getf(int elt_idx) +{ + uint16_t localVal = EM_RD(EM_PTI_VXCHAN_ADDR + elt_idx * REG_EM_ET_SIZE); + return ((localVal & ((uint16_t)0x00000003)) >> 0); +} + +__INLINE void em_pti_vxchan_vxchan_setf(int elt_idx, uint8_t vxchan) +{ + ASSERT_ERR((((uint16_t)vxchan << 0) & ~((uint16_t)0x00000003)) == 0); + EM_WR(EM_PTI_VXCHAN_ADDR + elt_idx * REG_EM_ET_SIZE, (EM_RD(EM_PTI_VXCHAN_ADDR + elt_idx * REG_EM_ET_SIZE) & ~((uint16_t)0x00000003)) | ((uint16_t)vxchan << 0)); +} + + +#endif // _REG_EM_ET_H_ + diff --git a/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Nationstech/ble_library/ns_ble_stack/rfinit/api/reg_ipcore.h b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Nationstech/ble_library/ns_ble_stack/rfinit/api/reg_ipcore.h new file mode 100644 index 0000000..0c00eed --- /dev/null +++ b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Nationstech/ble_library/ns_ble_stack/rfinit/api/reg_ipcore.h @@ -0,0 +1,3911 @@ +#ifndef _REG_IPCORE_H_ +#define _REG_IPCORE_H_ + +#include
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31 MASTER_SOFT_RST 0 + * 30 MASTER_TGSOFT_RST 0 + * 29 REG_SOFT_RST 0 + * 28 RADIOCNTL_SOFT_RST 0 + * 27 SWINT_REQ 0 + *+ */ +#define IP_RWDMCNTL_ADDR BASEBAND_REG_BASE+0 //0x50800000 +#define IP_RWDMCNTL_OFFSET 0x00000000 +#define IP_RWDMCNTL_INDEX 0x00000000 +#define IP_RWDMCNTL_RESET 0x00000000 + +__INLINE uint32_t ip_rwdmcntl_get(void) +{ + return REG_IP_RD(IP_RWDMCNTL_ADDR); +} + +__INLINE void ip_rwdmcntl_set(uint32_t value) +{ + REG_IP_WR(IP_RWDMCNTL_ADDR, value); +} + +// field definitions +#define IP_MASTER_SOFT_RST_BIT ((uint32_t)0x80000000) +#define IP_MASTER_SOFT_RST_POS 31 +#define IP_MASTER_TGSOFT_RST_BIT ((uint32_t)0x40000000) +#define IP_MASTER_TGSOFT_RST_POS 30 +#define IP_REG_SOFT_RST_BIT ((uint32_t)0x20000000) +#define IP_REG_SOFT_RST_POS 29 +#define IP_RADIOCNTL_SOFT_RST_BIT ((uint32_t)0x10000000) +#define IP_RADIOCNTL_SOFT_RST_POS 28 +#define IP_SWINT_REQ_BIT ((uint32_t)0x08000000) +#define IP_SWINT_REQ_POS 27 + +#define IP_MASTER_SOFT_RST_RST 0x0 +#define IP_MASTER_TGSOFT_RST_RST 0x0 +#define IP_REG_SOFT_RST_RST 0x0 +#define IP_RADIOCNTL_SOFT_RST_RST 0x0 +#define IP_SWINT_REQ_RST 0x0 + +__INLINE void ip_rwdmcntl_pack(uint8_t mastersoftrst, uint8_t mastertgsoftrst, uint8_t regsoftrst, uint8_t radiocntlsoftrst, uint8_t swintreq) +{ + ASSERT_ERR((((uint32_t)mastersoftrst << 31) & ~((uint32_t)0x80000000)) == 0); + ASSERT_ERR((((uint32_t)mastertgsoftrst << 30) & ~((uint32_t)0x40000000)) == 0); + ASSERT_ERR((((uint32_t)regsoftrst << 29) & ~((uint32_t)0x20000000)) == 0); + ASSERT_ERR((((uint32_t)radiocntlsoftrst << 28) & ~((uint32_t)0x10000000)) == 0); + ASSERT_ERR((((uint32_t)swintreq << 27) & ~((uint32_t)0x08000000)) == 0); + REG_IP_WR(IP_RWDMCNTL_ADDR, ((uint32_t)mastersoftrst << 31) | ((uint32_t)mastertgsoftrst << 30) | ((uint32_t)regsoftrst << 29) | ((uint32_t)radiocntlsoftrst << 28) | ((uint32_t)swintreq << 27)); +} + +__INLINE void ip_rwdmcntl_unpack(uint8_t* mastersoftrst, uint8_t* mastertgsoftrst, uint8_t* regsoftrst, uint8_t* radiocntlsoftrst, uint8_t* swintreq) +{ + uint32_t localVal = REG_IP_RD(IP_RWDMCNTL_ADDR); + + *mastersoftrst = (localVal & ((uint32_t)0x80000000)) >> 31; + *mastertgsoftrst = (localVal & ((uint32_t)0x40000000)) >> 30; + *regsoftrst = (localVal & ((uint32_t)0x20000000)) >> 29; + *radiocntlsoftrst = (localVal & ((uint32_t)0x10000000)) >> 28; + *swintreq = (localVal & ((uint32_t)0x08000000)) >> 27; +} + +__INLINE uint8_t ip_rwdmcntl_master_soft_rst_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_RWDMCNTL_ADDR); + return ((localVal & ((uint32_t)0x80000000)) >> 31); +} + +__INLINE void ip_rwdmcntl_master_soft_rst_setf(uint8_t mastersoftrst) +{ + ASSERT_ERR((((uint32_t)mastersoftrst << 31) & ~((uint32_t)0x80000000)) == 0); + REG_IP_WR(IP_RWDMCNTL_ADDR, (REG_IP_RD(IP_RWDMCNTL_ADDR) & ~((uint32_t)0x80000000)) | ((uint32_t)mastersoftrst << 31)); +} + +__INLINE uint8_t ip_rwdmcntl_master_tgsoft_rst_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_RWDMCNTL_ADDR); + return ((localVal & ((uint32_t)0x40000000)) >> 30); +} + +__INLINE void ip_rwdmcntl_master_tgsoft_rst_setf(uint8_t mastertgsoftrst) +{ + ASSERT_ERR((((uint32_t)mastertgsoftrst << 30) & ~((uint32_t)0x40000000)) == 0); + REG_IP_WR(IP_RWDMCNTL_ADDR, (REG_IP_RD(IP_RWDMCNTL_ADDR) & ~((uint32_t)0x40000000)) | ((uint32_t)mastertgsoftrst << 30)); +} + +__INLINE uint8_t ip_rwdmcntl_reg_soft_rst_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_RWDMCNTL_ADDR); + return ((localVal & ((uint32_t)0x20000000)) >> 29); +} + +__INLINE void ip_rwdmcntl_reg_soft_rst_setf(uint8_t regsoftrst) +{ + ASSERT_ERR((((uint32_t)regsoftrst << 29) & ~((uint32_t)0x20000000)) == 0); + REG_IP_WR(IP_RWDMCNTL_ADDR, (REG_IP_RD(IP_RWDMCNTL_ADDR) & ~((uint32_t)0x20000000)) | ((uint32_t)regsoftrst << 29)); +} + +__INLINE uint8_t ip_rwdmcntl_radiocntl_soft_rst_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_RWDMCNTL_ADDR); + return ((localVal & ((uint32_t)0x10000000)) >> 28); +} + +__INLINE void ip_rwdmcntl_radiocntl_soft_rst_setf(uint8_t radiocntlsoftrst) +{ + ASSERT_ERR((((uint32_t)radiocntlsoftrst << 28) & ~((uint32_t)0x10000000)) == 0); + REG_IP_WR(IP_RWDMCNTL_ADDR, (REG_IP_RD(IP_RWDMCNTL_ADDR) & ~((uint32_t)0x10000000)) | ((uint32_t)radiocntlsoftrst << 28)); +} + +__INLINE uint8_t ip_rwdmcntl_swint_req_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_RWDMCNTL_ADDR); + return ((localVal & ((uint32_t)0x08000000)) >> 27); +} + +__INLINE void ip_rwdmcntl_swint_req_setf(uint8_t swintreq) +{ + ASSERT_ERR((((uint32_t)swintreq << 27) & ~((uint32_t)0x08000000)) == 0); + REG_IP_WR(IP_RWDMCNTL_ADDR, (REG_IP_RD(IP_RWDMCNTL_ADDR) & ~((uint32_t)0x08000000)) | ((uint32_t)swintreq << 27)); +} + +/** + * @brief VERSION register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31:24 TYP 0xA + * 23:16 REL 0x0 + * 15:08 UPG 0x7 + * 07:00 BUILD 0x0 + *+ */ +#define IP_VERSION_ADDR BASEBAND_REG_BASE +0x4 //0x50800004 +#define IP_VERSION_OFFSET 0x00000004 +#define IP_VERSION_INDEX 0x00000001 +#define IP_VERSION_RESET 0x0A000700 + +__INLINE uint32_t ip_version_get(void) +{ + return REG_IP_RD(IP_VERSION_ADDR); +} + +// field definitions +#define IP_TYP_MASK ((uint32_t)0xFF000000) +#define IP_TYP_LSB 24 +#define IP_TYP_WIDTH ((uint32_t)0x00000008) +#define IP_REL_MASK ((uint32_t)0x00FF0000) +#define IP_REL_LSB 16 +#define IP_REL_WIDTH ((uint32_t)0x00000008) +#define IP_UPG_MASK ((uint32_t)0x0000FF00) +#define IP_UPG_LSB 8 +#define IP_UPG_WIDTH ((uint32_t)0x00000008) +#define IP_BUILD_MASK ((uint32_t)0x000000FF) +#define IP_BUILD_LSB 0 +#define IP_BUILD_WIDTH ((uint32_t)0x00000008) + +#define IP_TYP_RST 0xA +#define IP_REL_RST 0x0 +#define IP_UPG_RST 0x7 +#define IP_BUILD_RST 0x0 + +__INLINE void ip_version_unpack(uint8_t* typ, uint8_t* rel, uint8_t* upg, uint8_t* build) +{ + uint32_t localVal = REG_IP_RD(IP_VERSION_ADDR); + + *typ = (localVal & ((uint32_t)0xFF000000)) >> 24; + *rel = (localVal & ((uint32_t)0x00FF0000)) >> 16; + *upg = (localVal & ((uint32_t)0x0000FF00)) >> 8; + *build = (localVal & ((uint32_t)0x000000FF)) >> 0; +} + +__INLINE uint8_t ip_version_typ_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_VERSION_ADDR); + return ((localVal & ((uint32_t)0xFF000000)) >> 24); +} + +__INLINE uint8_t ip_version_rel_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_VERSION_ADDR); + return ((localVal & ((uint32_t)0x00FF0000)) >> 16); +} + +__INLINE uint8_t ip_version_upg_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_VERSION_ADDR); + return ((localVal & ((uint32_t)0x0000FF00)) >> 8); +} + +__INLINE uint8_t ip_version_build_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_VERSION_ADDR); + return ((localVal & ((uint32_t)0x000000FF)) >> 0); +} + +/** + * @brief INTCNTL0 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 16 ERRORINTMSK 0 + *+ */ +#define IP_INTCNTL0_ADDR BASEBAND_REG_BASE +0xC //0x5080000C +#define IP_INTCNTL0_OFFSET 0x0000000C +#define IP_INTCNTL0_INDEX 0x00000003 +#define IP_INTCNTL0_RESET 0x00000000 + +__INLINE uint32_t ip_intcntl0_get(void) +{ + return REG_IP_RD(IP_INTCNTL0_ADDR); +} + +__INLINE void ip_intcntl0_set(uint32_t value) +{ + REG_IP_WR(IP_INTCNTL0_ADDR, value); +} + +// field definitions +#define IP_ERRORINTMSK_BIT ((uint32_t)0x00010000) +#define IP_ERRORINTMSK_POS 16 + +#define IP_ERRORINTMSK_RST 0x0 + +__INLINE uint8_t ip_intcntl0_errorintmsk_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_INTCNTL0_ADDR); + ASSERT_ERR((localVal & ~((uint32_t)0x00010000)) == 0); + return (localVal >> 16); +} + +__INLINE void ip_intcntl0_errorintmsk_setf(uint8_t errorintmsk) +{ + ASSERT_ERR((((uint32_t)errorintmsk << 16) & ~((uint32_t)0x00010000)) == 0); + REG_IP_WR(IP_INTCNTL0_ADDR, (uint32_t)errorintmsk << 16); +} + +/** + * @brief INTSTAT0 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 16 ERRORINTSTAT 0 + *+ */ +#define IP_INTSTAT0_ADDR BASEBAND_REG_BASE +0x10 // 0x50800010 +#define IP_INTSTAT0_OFFSET 0x00000010 +#define IP_INTSTAT0_INDEX 0x00000004 +#define IP_INTSTAT0_RESET 0x00000000 + +__INLINE uint32_t ip_intstat0_get(void) +{ + return REG_IP_RD(IP_INTSTAT0_ADDR); +} + +// field definitions +#define IP_ERRORINTSTAT_BIT ((uint32_t)0x00010000) +#define IP_ERRORINTSTAT_POS 16 + +#define IP_ERRORINTSTAT_RST 0x0 + +__INLINE uint8_t ip_intstat0_errorintstat_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_INTSTAT0_ADDR); + ASSERT_ERR((localVal & ~((uint32_t)0x00010000)) == 0); + return (localVal >> 16); +} + +/** + * @brief INTACK0 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 16 ERRORINTACK 0 + *+ */ +#define IP_INTACK0_ADDR BASEBAND_REG_BASE +0x14 // 0x50800014 +#define IP_INTACK0_OFFSET 0x00000014 +#define IP_INTACK0_INDEX 0x00000005 +#define IP_INTACK0_RESET 0x00000000 + +__INLINE uint32_t ip_intack0_get(void) +{ + return REG_IP_RD(IP_INTACK0_ADDR); +} + +__INLINE void ip_intack0_clear(uint32_t value) +{ + REG_IP_WR(IP_INTACK0_ADDR, value); +} + +// field definitions +#define IP_ERRORINTACK_BIT ((uint32_t)0x00010000) +#define IP_ERRORINTACK_POS 16 + +#define IP_ERRORINTACK_RST 0x0 + +__INLINE uint8_t ip_intack0_errorintack_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_INTACK0_ADDR); + ASSERT_ERR((localVal & ~((uint32_t)0x00010000)) == 0); + return (localVal >> 16); +} + +__INLINE void ip_intack0_errorintack_clearf(uint8_t errorintack) +{ + ASSERT_ERR((((uint32_t)errorintack << 16) & ~((uint32_t)0x00010000)) == 0); + REG_IP_WR(IP_INTACK0_ADDR, (uint32_t)errorintack << 16); +} + +/** + * @brief INTCNTL1 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 30:28 CLKNINTSRMSK 0x0 + * 27:24 CLKNINTSRVAL 0x0 + * 15 FIFOINTMSK 1 + * 06 TIMESTAMPTGT2INTMSK 0 + * 05 TIMESTAMPTGT1INTMSK 0 + * 04 FINETGTINTMSK 0 + * 03 SWINTMSK 0 + * 02 CRYPTINTMSK 0 + * 01 SLPINTMSK 1 + * 00 CLKNINTMSK 1 + *+ */ +#define IP_INTCNTL1_ADDR BASEBAND_REG_BASE +0x18 // 0x50800018 +#define IP_INTCNTL1_OFFSET 0x00000018 +#define IP_INTCNTL1_INDEX 0x00000006 +#define IP_INTCNTL1_RESET 0x00008003 + +__INLINE uint32_t ip_intcntl1_get(void) +{ + return REG_IP_RD(IP_INTCNTL1_ADDR); +} + +__INLINE void ip_intcntl1_set(uint32_t value) +{ + REG_IP_WR(IP_INTCNTL1_ADDR, value); +} + +// field definitions +#define IP_CLKNINTSRMSK_MASK ((uint32_t)0x70000000) +#define IP_CLKNINTSRMSK_LSB 28 +#define IP_CLKNINTSRMSK_WIDTH ((uint32_t)0x00000003) +#define IP_CLKNINTSRVAL_MASK ((uint32_t)0x0F000000) +#define IP_CLKNINTSRVAL_LSB 24 +#define IP_CLKNINTSRVAL_WIDTH ((uint32_t)0x00000004) +#define IP_FIFOINTMSK_BIT ((uint32_t)0x00008000) +#define IP_FIFOINTMSK_POS 15 +#define IP_TIMESTAMPTGT2INTMSK_BIT ((uint32_t)0x00000040) +#define IP_TIMESTAMPTGT2INTMSK_POS 6 +#define IP_TIMESTAMPTGT1INTMSK_BIT ((uint32_t)0x00000020) +#define IP_TIMESTAMPTGT1INTMSK_POS 5 +#define IP_FINETGTINTMSK_BIT ((uint32_t)0x00000010) +#define IP_FINETGTINTMSK_POS 4 +#define IP_SWINTMSK_BIT ((uint32_t)0x00000008) +#define IP_SWINTMSK_POS 3 +#define IP_CRYPTINTMSK_BIT ((uint32_t)0x00000004) +#define IP_CRYPTINTMSK_POS 2 +#define IP_SLPINTMSK_BIT ((uint32_t)0x00000002) +#define IP_SLPINTMSK_POS 1 +#define IP_CLKNINTMSK_BIT ((uint32_t)0x00000001) +#define IP_CLKNINTMSK_POS 0 + +#define IP_CLKNINTSRMSK_RST 0x0 +#define IP_CLKNINTSRVAL_RST 0x0 +#define IP_FIFOINTMSK_RST 0x1 +#define IP_TIMESTAMPTGT2INTMSK_RST 0x0 +#define IP_TIMESTAMPTGT1INTMSK_RST 0x0 +#define IP_FINETGTINTMSK_RST 0x0 +#define IP_SWINTMSK_RST 0x0 +#define IP_CRYPTINTMSK_RST 0x0 +#define IP_SLPINTMSK_RST 0x1 +#define IP_CLKNINTMSK_RST 0x1 + +__INLINE void ip_intcntl1_pack(uint8_t clknintsrmsk, uint8_t clknintsrval, uint8_t fifointmsk, uint8_t timestamptgt2intmsk, uint8_t timestamptgt1intmsk, uint8_t finetgtintmsk, uint8_t swintmsk, uint8_t cryptintmsk, uint8_t slpintmsk, uint8_t clknintmsk) +{ + ASSERT_ERR((((uint32_t)clknintsrmsk << 28) & ~((uint32_t)0x70000000)) == 0); + ASSERT_ERR((((uint32_t)clknintsrval << 24) & ~((uint32_t)0x0F000000)) == 0); + ASSERT_ERR((((uint32_t)fifointmsk << 15) & ~((uint32_t)0x00008000)) == 0); + ASSERT_ERR((((uint32_t)timestamptgt2intmsk << 6) & ~((uint32_t)0x00000040)) == 0); + ASSERT_ERR((((uint32_t)timestamptgt1intmsk << 5) & ~((uint32_t)0x00000020)) == 0); + ASSERT_ERR((((uint32_t)finetgtintmsk << 4) & ~((uint32_t)0x00000010)) == 0); + ASSERT_ERR((((uint32_t)swintmsk << 3) & ~((uint32_t)0x00000008)) == 0); + ASSERT_ERR((((uint32_t)cryptintmsk << 2) & ~((uint32_t)0x00000004)) == 0); + ASSERT_ERR((((uint32_t)slpintmsk << 1) & ~((uint32_t)0x00000002)) == 0); + ASSERT_ERR((((uint32_t)clknintmsk << 0) & ~((uint32_t)0x00000001)) == 0); + REG_IP_WR(IP_INTCNTL1_ADDR, ((uint32_t)clknintsrmsk << 28) | ((uint32_t)clknintsrval << 24) | ((uint32_t)fifointmsk << 15) | ((uint32_t)timestamptgt2intmsk << 6) | ((uint32_t)timestamptgt1intmsk << 5) | ((uint32_t)finetgtintmsk << 4) | ((uint32_t)swintmsk << 3) | ((uint32_t)cryptintmsk << 2) | ((uint32_t)slpintmsk << 1) | ((uint32_t)clknintmsk << 0)); +} + +__INLINE void ip_intcntl1_unpack(uint8_t* clknintsrmsk, uint8_t* clknintsrval, uint8_t* fifointmsk, uint8_t* timestamptgt2intmsk, uint8_t* timestamptgt1intmsk, uint8_t* finetgtintmsk, uint8_t* swintmsk, uint8_t* cryptintmsk, uint8_t* slpintmsk, uint8_t* clknintmsk) +{ + uint32_t localVal = REG_IP_RD(IP_INTCNTL1_ADDR); + + *clknintsrmsk = (localVal & ((uint32_t)0x70000000)) >> 28; + *clknintsrval = (localVal & ((uint32_t)0x0F000000)) >> 24; + *fifointmsk = (localVal & ((uint32_t)0x00008000)) >> 15; + *timestamptgt2intmsk = (localVal & ((uint32_t)0x00000040)) >> 6; + *timestamptgt1intmsk = (localVal & ((uint32_t)0x00000020)) >> 5; + *finetgtintmsk = (localVal & ((uint32_t)0x00000010)) >> 4; + *swintmsk = (localVal & ((uint32_t)0x00000008)) >> 3; + *cryptintmsk = (localVal & ((uint32_t)0x00000004)) >> 2; + *slpintmsk = (localVal & ((uint32_t)0x00000002)) >> 1; + *clknintmsk = (localVal & ((uint32_t)0x00000001)) >> 0; +} + +__INLINE uint8_t ip_intcntl1_clknintsrmsk_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_INTCNTL1_ADDR); + return ((localVal & ((uint32_t)0x70000000)) >> 28); +} + +__INLINE void ip_intcntl1_clknintsrmsk_setf(uint8_t clknintsrmsk) +{ + ASSERT_ERR((((uint32_t)clknintsrmsk << 28) & ~((uint32_t)0x70000000)) == 0); + REG_IP_WR(IP_INTCNTL1_ADDR, (REG_IP_RD(IP_INTCNTL1_ADDR) & ~((uint32_t)0x70000000)) | ((uint32_t)clknintsrmsk << 28)); +} + +__INLINE uint8_t ip_intcntl1_clknintsrval_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_INTCNTL1_ADDR); + return ((localVal & ((uint32_t)0x0F000000)) >> 24); +} + +__INLINE void ip_intcntl1_clknintsrval_setf(uint8_t clknintsrval) +{ + ASSERT_ERR((((uint32_t)clknintsrval << 24) & ~((uint32_t)0x0F000000)) == 0); + REG_IP_WR(IP_INTCNTL1_ADDR, (REG_IP_RD(IP_INTCNTL1_ADDR) & ~((uint32_t)0x0F000000)) | ((uint32_t)clknintsrval << 24)); +} + +__INLINE uint8_t ip_intcntl1_fifointmsk_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_INTCNTL1_ADDR); + return ((localVal & ((uint32_t)0x00008000)) >> 15); +} + +__INLINE void ip_intcntl1_fifointmsk_setf(uint8_t fifointmsk) +{ + ASSERT_ERR((((uint32_t)fifointmsk << 15) & ~((uint32_t)0x00008000)) == 0); + REG_IP_WR(IP_INTCNTL1_ADDR, (REG_IP_RD(IP_INTCNTL1_ADDR) & ~((uint32_t)0x00008000)) | ((uint32_t)fifointmsk << 15)); +} + +__INLINE uint8_t ip_intcntl1_timestamptgt2intmsk_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_INTCNTL1_ADDR); + return ((localVal & ((uint32_t)0x00000040)) >> 6); +} + +__INLINE void ip_intcntl1_timestamptgt2intmsk_setf(uint8_t timestamptgt2intmsk) +{ + ASSERT_ERR((((uint32_t)timestamptgt2intmsk << 6) & ~((uint32_t)0x00000040)) == 0); + REG_IP_WR(IP_INTCNTL1_ADDR, (REG_IP_RD(IP_INTCNTL1_ADDR) & ~((uint32_t)0x00000040)) | ((uint32_t)timestamptgt2intmsk << 6)); +} + +__INLINE uint8_t ip_intcntl1_timestamptgt1intmsk_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_INTCNTL1_ADDR); + return ((localVal & ((uint32_t)0x00000020)) >> 5); +} + +__INLINE void ip_intcntl1_timestamptgt1intmsk_setf(uint8_t timestamptgt1intmsk) +{ + ASSERT_ERR((((uint32_t)timestamptgt1intmsk << 5) & ~((uint32_t)0x00000020)) == 0); + REG_IP_WR(IP_INTCNTL1_ADDR, (REG_IP_RD(IP_INTCNTL1_ADDR) & ~((uint32_t)0x00000020)) | ((uint32_t)timestamptgt1intmsk << 5)); +} + +__INLINE uint8_t ip_intcntl1_finetgtintmsk_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_INTCNTL1_ADDR); + return ((localVal & ((uint32_t)0x00000010)) >> 4); +} + +__INLINE void ip_intcntl1_finetgtintmsk_setf(uint8_t finetgtintmsk) +{ + ASSERT_ERR((((uint32_t)finetgtintmsk << 4) & ~((uint32_t)0x00000010)) == 0); + REG_IP_WR(IP_INTCNTL1_ADDR, (REG_IP_RD(IP_INTCNTL1_ADDR) & ~((uint32_t)0x00000010)) | ((uint32_t)finetgtintmsk << 4)); +} + +__INLINE uint8_t ip_intcntl1_swintmsk_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_INTCNTL1_ADDR); + return ((localVal & ((uint32_t)0x00000008)) >> 3); +} + +__INLINE void ip_intcntl1_swintmsk_setf(uint8_t swintmsk) +{ + ASSERT_ERR((((uint32_t)swintmsk << 3) & ~((uint32_t)0x00000008)) == 0); + REG_IP_WR(IP_INTCNTL1_ADDR, (REG_IP_RD(IP_INTCNTL1_ADDR) & ~((uint32_t)0x00000008)) | ((uint32_t)swintmsk << 3)); +} + +__INLINE uint8_t ip_intcntl1_cryptintmsk_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_INTCNTL1_ADDR); + return ((localVal & ((uint32_t)0x00000004)) >> 2); +} + +__INLINE void ip_intcntl1_cryptintmsk_setf(uint8_t cryptintmsk) +{ + ASSERT_ERR((((uint32_t)cryptintmsk << 2) & ~((uint32_t)0x00000004)) == 0); + REG_IP_WR(IP_INTCNTL1_ADDR, (REG_IP_RD(IP_INTCNTL1_ADDR) & ~((uint32_t)0x00000004)) | ((uint32_t)cryptintmsk << 2)); +} + +__INLINE uint8_t ip_intcntl1_slpintmsk_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_INTCNTL1_ADDR); + return ((localVal & ((uint32_t)0x00000002)) >> 1); +} + +__INLINE void ip_intcntl1_slpintmsk_setf(uint8_t slpintmsk) +{ + ASSERT_ERR((((uint32_t)slpintmsk << 1) & ~((uint32_t)0x00000002)) == 0); + REG_IP_WR(IP_INTCNTL1_ADDR, (REG_IP_RD(IP_INTCNTL1_ADDR) & ~((uint32_t)0x00000002)) | ((uint32_t)slpintmsk << 1)); +} + +__INLINE uint8_t ip_intcntl1_clknintmsk_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_INTCNTL1_ADDR); + return ((localVal & ((uint32_t)0x00000001)) >> 0); +} + +__INLINE void ip_intcntl1_clknintmsk_setf(uint8_t clknintmsk) +{ + ASSERT_ERR((((uint32_t)clknintmsk << 0) & ~((uint32_t)0x00000001)) == 0); + REG_IP_WR(IP_INTCNTL1_ADDR, (REG_IP_RD(IP_INTCNTL1_ADDR) & ~((uint32_t)0x00000001)) | ((uint32_t)clknintmsk << 0)); +} + +/** + * @brief INTSTAT1 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15 FIFOINTSTAT 0 + * 06 TIMESTAMPTGT2INTSTAT 0 + * 05 TIMESTAMPTGT1INTSTAT 0 + * 04 FINETGTINTSTAT 0 + * 03 SWINTSTAT 0 + * 02 CRYPTINTSTAT 0 + * 01 SLPINTSTAT 0 + * 00 CLKNINTSTAT 0 + *+ */ +#define IP_INTSTAT1_ADDR BASEBAND_REG_BASE +0x1C // 0x5080001C +#define IP_INTSTAT1_OFFSET 0x0000001C +#define IP_INTSTAT1_INDEX 0x00000007 +#define IP_INTSTAT1_RESET 0x00000000 + +__INLINE uint32_t ip_intstat1_get(void) +{ + return REG_IP_RD(IP_INTSTAT1_ADDR); +} + +// field definitions +#define IP_FIFOINTSTAT_BIT ((uint32_t)0x00008000) +#define IP_FIFOINTSTAT_POS 15 +#define IP_TIMESTAMPTGT2INTSTAT_BIT ((uint32_t)0x00000040) +#define IP_TIMESTAMPTGT2INTSTAT_POS 6 +#define IP_TIMESTAMPTGT1INTSTAT_BIT ((uint32_t)0x00000020) +#define IP_TIMESTAMPTGT1INTSTAT_POS 5 +#define IP_FINETGTINTSTAT_BIT ((uint32_t)0x00000010) +#define IP_FINETGTINTSTAT_POS 4 +#define IP_SWINTSTAT_BIT ((uint32_t)0x00000008) +#define IP_SWINTSTAT_POS 3 +#define IP_CRYPTINTSTAT_BIT ((uint32_t)0x00000004) +#define IP_CRYPTINTSTAT_POS 2 +#define IP_SLPINTSTAT_BIT ((uint32_t)0x00000002) +#define IP_SLPINTSTAT_POS 1 +#define IP_CLKNINTSTAT_BIT ((uint32_t)0x00000001) +#define IP_CLKNINTSTAT_POS 0 + +#define IP_FIFOINTSTAT_RST 0x0 +#define IP_TIMESTAMPTGT2INTSTAT_RST 0x0 +#define IP_TIMESTAMPTGT1INTSTAT_RST 0x0 +#define IP_FINETGTINTSTAT_RST 0x0 +#define IP_SWINTSTAT_RST 0x0 +#define IP_CRYPTINTSTAT_RST 0x0 +#define IP_SLPINTSTAT_RST 0x0 +#define IP_CLKNINTSTAT_RST 0x0 + +__INLINE void ip_intstat1_unpack(uint8_t* fifointstat, uint8_t* timestamptgt2intstat, uint8_t* timestamptgt1intstat, uint8_t* finetgtintstat, uint8_t* swintstat, uint8_t* cryptintstat, uint8_t* slpintstat, uint8_t* clknintstat) +{ + uint32_t localVal = REG_IP_RD(IP_INTSTAT1_ADDR); + + *fifointstat = (localVal & ((uint32_t)0x00008000)) >> 15; + *timestamptgt2intstat = (localVal & ((uint32_t)0x00000040)) >> 6; + *timestamptgt1intstat = (localVal & ((uint32_t)0x00000020)) >> 5; + *finetgtintstat = (localVal & ((uint32_t)0x00000010)) >> 4; + *swintstat = (localVal & ((uint32_t)0x00000008)) >> 3; + *cryptintstat = (localVal & ((uint32_t)0x00000004)) >> 2; + *slpintstat = (localVal & ((uint32_t)0x00000002)) >> 1; + *clknintstat = (localVal & ((uint32_t)0x00000001)) >> 0; +} + +__INLINE uint8_t ip_intstat1_fifointstat_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_INTSTAT1_ADDR); + return ((localVal & ((uint32_t)0x00008000)) >> 15); +} + +__INLINE uint8_t ip_intstat1_timestamptgt2intstat_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_INTSTAT1_ADDR); + return ((localVal & ((uint32_t)0x00000040)) >> 6); +} + +__INLINE uint8_t ip_intstat1_timestamptgt1intstat_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_INTSTAT1_ADDR); + return ((localVal & ((uint32_t)0x00000020)) >> 5); +} + +__INLINE uint8_t ip_intstat1_finetgtintstat_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_INTSTAT1_ADDR); + return ((localVal & ((uint32_t)0x00000010)) >> 4); +} + +__INLINE uint8_t ip_intstat1_swintstat_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_INTSTAT1_ADDR); + return ((localVal & ((uint32_t)0x00000008)) >> 3); +} + +__INLINE uint8_t ip_intstat1_cryptintstat_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_INTSTAT1_ADDR); + return ((localVal & ((uint32_t)0x00000004)) >> 2); +} + +__INLINE uint8_t ip_intstat1_slpintstat_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_INTSTAT1_ADDR); + return ((localVal & ((uint32_t)0x00000002)) >> 1); +} + +__INLINE uint8_t ip_intstat1_clknintstat_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_INTSTAT1_ADDR); + return ((localVal & ((uint32_t)0x00000001)) >> 0); +} + +/** + * @brief INTACK1 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 15 FIFOINTACK 0 + * 06 TIMESTAMPTGT2INTACK 0 + * 05 TIMESTAMPTGT1INTACK 0 + * 04 FINETGTINTACK 0 + * 03 SWINTACK 0 + * 02 CRYPTINTACK 0 + * 01 SLPINTACK 0 + * 00 CLKNINTACK 0 + *+ */ +#define IP_INTACK1_ADDR BASEBAND_REG_BASE +0x20 // 0x50800020 +#define IP_INTACK1_OFFSET 0x00000020 +#define IP_INTACK1_INDEX 0x00000008 +#define IP_INTACK1_RESET 0x00000000 + +__INLINE uint32_t ip_intack1_get(void) +{ + return REG_IP_RD(IP_INTACK1_ADDR); +} + +__INLINE void ip_intack1_clear(uint32_t value) +{ + REG_IP_WR(IP_INTACK1_ADDR, value); +} + +// field definitions +#define IP_FIFOINTACK_BIT ((uint32_t)0x00008000) +#define IP_FIFOINTACK_POS 15 +#define IP_TIMESTAMPTGT2INTACK_BIT ((uint32_t)0x00000040) +#define IP_TIMESTAMPTGT2INTACK_POS 6 +#define IP_TIMESTAMPTGT1INTACK_BIT ((uint32_t)0x00000020) +#define IP_TIMESTAMPTGT1INTACK_POS 5 +#define IP_FINETGTINTACK_BIT ((uint32_t)0x00000010) +#define IP_FINETGTINTACK_POS 4 +#define IP_SWINTACK_BIT ((uint32_t)0x00000008) +#define IP_SWINTACK_POS 3 +#define IP_CRYPTINTACK_BIT ((uint32_t)0x00000004) +#define IP_CRYPTINTACK_POS 2 +#define IP_SLPINTACK_BIT ((uint32_t)0x00000002) +#define IP_SLPINTACK_POS 1 +#define IP_CLKNINTACK_BIT ((uint32_t)0x00000001) +#define IP_CLKNINTACK_POS 0 + +#define IP_FIFOINTACK_RST 0x0 +#define IP_TIMESTAMPTGT2INTACK_RST 0x0 +#define IP_TIMESTAMPTGT1INTACK_RST 0x0 +#define IP_FINETGTINTACK_RST 0x0 +#define IP_SWINTACK_RST 0x0 +#define IP_CRYPTINTACK_RST 0x0 +#define IP_SLPINTACK_RST 0x0 +#define IP_CLKNINTACK_RST 0x0 + +__INLINE void ip_intack1_pack(uint8_t fifointack, uint8_t timestamptgt2intack, uint8_t timestamptgt1intack, uint8_t finetgtintack, uint8_t swintack, uint8_t cryptintack, uint8_t slpintack, uint8_t clknintack) +{ + ASSERT_ERR((((uint32_t)fifointack << 15) & ~((uint32_t)0x00008000)) == 0); + ASSERT_ERR((((uint32_t)timestamptgt2intack << 6) & ~((uint32_t)0x00000040)) == 0); + ASSERT_ERR((((uint32_t)timestamptgt1intack << 5) & ~((uint32_t)0x00000020)) == 0); + ASSERT_ERR((((uint32_t)finetgtintack << 4) & ~((uint32_t)0x00000010)) == 0); + ASSERT_ERR((((uint32_t)swintack << 3) & ~((uint32_t)0x00000008)) == 0); + ASSERT_ERR((((uint32_t)cryptintack << 2) & ~((uint32_t)0x00000004)) == 0); + ASSERT_ERR((((uint32_t)slpintack << 1) & ~((uint32_t)0x00000002)) == 0); + ASSERT_ERR((((uint32_t)clknintack << 0) & ~((uint32_t)0x00000001)) == 0); + REG_IP_WR(IP_INTACK1_ADDR, ((uint32_t)fifointack << 15) | ((uint32_t)timestamptgt2intack << 6) | ((uint32_t)timestamptgt1intack << 5) | ((uint32_t)finetgtintack << 4) | ((uint32_t)swintack << 3) | ((uint32_t)cryptintack << 2) | ((uint32_t)slpintack << 1) | ((uint32_t)clknintack << 0)); +} + +__INLINE void ip_intack1_unpack(uint8_t* fifointack, uint8_t* timestamptgt2intack, uint8_t* timestamptgt1intack, uint8_t* finetgtintack, uint8_t* swintack, uint8_t* cryptintack, uint8_t* slpintack, uint8_t* clknintack) +{ + uint32_t localVal = REG_IP_RD(IP_INTACK1_ADDR); + + *fifointack = (localVal & ((uint32_t)0x00008000)) >> 15; + *timestamptgt2intack = (localVal & ((uint32_t)0x00000040)) >> 6; + *timestamptgt1intack = (localVal & ((uint32_t)0x00000020)) >> 5; + *finetgtintack = (localVal & ((uint32_t)0x00000010)) >> 4; + *swintack = (localVal & ((uint32_t)0x00000008)) >> 3; + *cryptintack = (localVal & ((uint32_t)0x00000004)) >> 2; + *slpintack = (localVal & ((uint32_t)0x00000002)) >> 1; + *clknintack = (localVal & ((uint32_t)0x00000001)) >> 0; +} + +__INLINE uint8_t ip_intack1_fifointack_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_INTACK1_ADDR); + return ((localVal & ((uint32_t)0x00008000)) >> 15); +} + +__INLINE void ip_intack1_fifointack_clearf(uint8_t fifointack) +{ + ASSERT_ERR((((uint32_t)fifointack << 15) & ~((uint32_t)0x00008000)) == 0); + REG_IP_WR(IP_INTACK1_ADDR, (uint32_t)fifointack << 15); +} + +__INLINE uint8_t ip_intack1_timestamptgt2intack_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_INTACK1_ADDR); + return ((localVal & ((uint32_t)0x00000040)) >> 6); +} + +__INLINE void ip_intack1_timestamptgt2intack_clearf(uint8_t timestamptgt2intack) +{ + ASSERT_ERR((((uint32_t)timestamptgt2intack << 6) & ~((uint32_t)0x00000040)) == 0); + REG_IP_WR(IP_INTACK1_ADDR, (uint32_t)timestamptgt2intack << 6); +} + +__INLINE uint8_t ip_intack1_timestamptgt1intack_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_INTACK1_ADDR); + return ((localVal & ((uint32_t)0x00000020)) >> 5); +} + +__INLINE void ip_intack1_timestamptgt1intack_clearf(uint8_t timestamptgt1intack) +{ + ASSERT_ERR((((uint32_t)timestamptgt1intack << 5) & ~((uint32_t)0x00000020)) == 0); + REG_IP_WR(IP_INTACK1_ADDR, (uint32_t)timestamptgt1intack << 5); +} + +__INLINE uint8_t ip_intack1_finetgtintack_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_INTACK1_ADDR); + return ((localVal & ((uint32_t)0x00000010)) >> 4); +} + +__INLINE void ip_intack1_finetgtintack_clearf(uint8_t finetgtintack) +{ + ASSERT_ERR((((uint32_t)finetgtintack << 4) & ~((uint32_t)0x00000010)) == 0); + REG_IP_WR(IP_INTACK1_ADDR, (uint32_t)finetgtintack << 4); +} + +__INLINE uint8_t ip_intack1_swintack_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_INTACK1_ADDR); + return ((localVal & ((uint32_t)0x00000008)) >> 3); +} + +__INLINE void ip_intack1_swintack_clearf(uint8_t swintack) +{ + ASSERT_ERR((((uint32_t)swintack << 3) & ~((uint32_t)0x00000008)) == 0); + REG_IP_WR(IP_INTACK1_ADDR, (uint32_t)swintack << 3); +} + +__INLINE uint8_t ip_intack1_cryptintack_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_INTACK1_ADDR); + return ((localVal & ((uint32_t)0x00000004)) >> 2); +} + +__INLINE void ip_intack1_cryptintack_clearf(uint8_t cryptintack) +{ + ASSERT_ERR((((uint32_t)cryptintack << 2) & ~((uint32_t)0x00000004)) == 0); + REG_IP_WR(IP_INTACK1_ADDR, (uint32_t)cryptintack << 2); +} + +__INLINE uint8_t ip_intack1_slpintack_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_INTACK1_ADDR); + return ((localVal & ((uint32_t)0x00000002)) >> 1); +} + +__INLINE void ip_intack1_slpintack_clearf(uint8_t slpintack) +{ + ASSERT_ERR((((uint32_t)slpintack << 1) & ~((uint32_t)0x00000002)) == 0); + REG_IP_WR(IP_INTACK1_ADDR, (uint32_t)slpintack << 1); +} + +__INLINE uint8_t ip_intack1_clknintack_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_INTACK1_ADDR); + return ((localVal & ((uint32_t)0x00000001)) >> 0); +} + +__INLINE void ip_intack1_clknintack_clearf(uint8_t clknintack) +{ + ASSERT_ERR((((uint32_t)clknintack << 0) & ~((uint32_t)0x00000001)) == 0); + REG_IP_WR(IP_INTACK1_ADDR, (uint32_t)clknintack << 0); +} + +/** + * @brief ACTFIFOSTAT register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31:28 SKIP_ET_IDX 0x0 + * 27:24 CURRENT_ET_IDX 0x0 + * 15 ACTFLAG 0 + * 06 ISORXINTSTAT 0 + * 05 ISOTXINTSTAT 0 + * 04 RXINTSTAT 0 + * 03 TXINTSTAT 0 + * 02 SKIPACTINTSTAT 0 + * 01 ENDACTINTSTAT 0 + * 00 STARTACTINTSTAT 0 + *+ */ +#define IP_ACTFIFOSTAT_ADDR BASEBAND_REG_BASE +0x24 //0x50800024 +#define IP_ACTFIFOSTAT_OFFSET 0x00000024 +#define IP_ACTFIFOSTAT_INDEX 0x00000009 +#define IP_ACTFIFOSTAT_RESET 0x00000000 + +__INLINE uint32_t ip_actfifostat_get(void) +{ + return REG_IP_RD(IP_ACTFIFOSTAT_ADDR); +} + +// field definitions +#define IP_SKIP_ET_IDX_MASK ((uint32_t)0xF0000000) +#define IP_SKIP_ET_IDX_LSB 28 +#define IP_SKIP_ET_IDX_WIDTH ((uint32_t)0x00000004) +#define IP_CURRENT_ET_IDX_MASK ((uint32_t)0x0F000000) +#define IP_CURRENT_ET_IDX_LSB 24 +#define IP_CURRENT_ET_IDX_WIDTH ((uint32_t)0x00000004) +#define IP_ACTFLAG_BIT ((uint32_t)0x00008000) +#define IP_ACTFLAG_POS 15 +#define IP_ISORXINTSTAT_BIT ((uint32_t)0x00000040) +#define IP_ISORXINTSTAT_POS 6 +#define IP_ISOTXINTSTAT_BIT ((uint32_t)0x00000020) +#define IP_ISOTXINTSTAT_POS 5 +#define IP_RXINTSTAT_BIT ((uint32_t)0x00000010) +#define IP_RXINTSTAT_POS 4 +#define IP_TXINTSTAT_BIT ((uint32_t)0x00000008) +#define IP_TXINTSTAT_POS 3 +#define IP_SKIPACTINTSTAT_BIT ((uint32_t)0x00000004) +#define IP_SKIPACTINTSTAT_POS 2 +#define IP_ENDACTINTSTAT_BIT ((uint32_t)0x00000002) +#define IP_ENDACTINTSTAT_POS 1 +#define IP_STARTACTINTSTAT_BIT ((uint32_t)0x00000001) +#define IP_STARTACTINTSTAT_POS 0 + +#define IP_SKIP_ET_IDX_RST 0x0 +#define IP_CURRENT_ET_IDX_RST 0x0 +#define IP_ACTFLAG_RST 0x0 +#define IP_ISORXINTSTAT_RST 0x0 +#define IP_ISOTXINTSTAT_RST 0x0 +#define IP_RXINTSTAT_RST 0x0 +#define IP_TXINTSTAT_RST 0x0 +#define IP_SKIPACTINTSTAT_RST 0x0 +#define IP_ENDACTINTSTAT_RST 0x0 +#define IP_STARTACTINTSTAT_RST 0x0 + +__INLINE void ip_actfifostat_unpack(uint8_t* skipetidx, uint8_t* currentetidx, uint8_t* actflag, uint8_t* isorxintstat, uint8_t* isotxintstat, uint8_t* rxintstat, uint8_t* txintstat, uint8_t* skipactintstat, uint8_t* endactintstat, uint8_t* startactintstat) +{ + uint32_t localVal = REG_IP_RD(IP_ACTFIFOSTAT_ADDR); + + *skipetidx = (localVal & ((uint32_t)0xF0000000)) >> 28; + *currentetidx = (localVal & ((uint32_t)0x0F000000)) >> 24; + *actflag = (localVal & ((uint32_t)0x00008000)) >> 15; + *isorxintstat = (localVal & ((uint32_t)0x00000040)) >> 6; + *isotxintstat = (localVal & ((uint32_t)0x00000020)) >> 5; + *rxintstat = (localVal & ((uint32_t)0x00000010)) >> 4; + *txintstat = (localVal & ((uint32_t)0x00000008)) >> 3; + *skipactintstat = (localVal & ((uint32_t)0x00000004)) >> 2; + *endactintstat = (localVal & ((uint32_t)0x00000002)) >> 1; + *startactintstat = (localVal & ((uint32_t)0x00000001)) >> 0; +} + +__INLINE uint8_t ip_actfifostat_skip_et_idx_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_ACTFIFOSTAT_ADDR); + return ((localVal & ((uint32_t)0xF0000000)) >> 28); +} + +__INLINE uint8_t ip_actfifostat_current_et_idx_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_ACTFIFOSTAT_ADDR); + return ((localVal & ((uint32_t)0x0F000000)) >> 24); +} + +__INLINE uint8_t ip_actfifostat_actflag_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_ACTFIFOSTAT_ADDR); + return ((localVal & ((uint32_t)0x00008000)) >> 15); +} + +__INLINE uint8_t ip_actfifostat_isorxintstat_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_ACTFIFOSTAT_ADDR); + return ((localVal & ((uint32_t)0x00000040)) >> 6); +} + +__INLINE uint8_t ip_actfifostat_isotxintstat_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_ACTFIFOSTAT_ADDR); + return ((localVal & ((uint32_t)0x00000020)) >> 5); +} + +__INLINE uint8_t ip_actfifostat_rxintstat_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_ACTFIFOSTAT_ADDR); + return ((localVal & ((uint32_t)0x00000010)) >> 4); +} + +__INLINE uint8_t ip_actfifostat_txintstat_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_ACTFIFOSTAT_ADDR); + return ((localVal & ((uint32_t)0x00000008)) >> 3); +} + +__INLINE uint8_t ip_actfifostat_skipactintstat_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_ACTFIFOSTAT_ADDR); + return ((localVal & ((uint32_t)0x00000004)) >> 2); +} + +__INLINE uint8_t ip_actfifostat_endactintstat_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_ACTFIFOSTAT_ADDR); + return ((localVal & ((uint32_t)0x00000002)) >> 1); +} + +__INLINE uint8_t ip_actfifostat_startactintstat_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_ACTFIFOSTAT_ADDR); + return ((localVal & ((uint32_t)0x00000001)) >> 0); +} + +/** + * @brief ETPTR register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 13:00 ETPTR 0x0 + *+ */ +#define IP_ETPTR_ADDR BASEBAND_REG_BASE +0x2C //0x5080002C +#define IP_ETPTR_OFFSET 0x0000002C +#define IP_ETPTR_INDEX 0x0000000B +#define IP_ETPTR_RESET 0x00000000 + +__INLINE uint32_t ip_etptr_get(void) +{ + return REG_IP_RD(IP_ETPTR_ADDR); +} + +__INLINE void ip_etptr_set(uint32_t value) +{ + REG_IP_WR(IP_ETPTR_ADDR, value); +} + +// field definitions +#define IP_ETPTR_MASK ((uint32_t)0x00003FFF) +#define IP_ETPTR_LSB 0 +#define IP_ETPTR_WIDTH ((uint32_t)0x0000000E) + +#define IP_ETPTR_RST 0x0 + +__INLINE uint16_t ip_etptr_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_ETPTR_ADDR); + ASSERT_ERR((localVal & ~((uint32_t)0x00003FFF)) == 0); + return (localVal >> 0); +} + +__INLINE void ip_etptr_setf(uint16_t etptr) +{ + ASSERT_ERR((((uint32_t)etptr << 0) & ~((uint32_t)0x00003FFF)) == 0); + REG_IP_WR(IP_ETPTR_ADDR, (uint32_t)etptr << 0); +} + +/** + * @brief DEEPSLCNTL register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31 EXTWKUPDSB 0 + * 15 DEEP_SLEEP_STAT 0 + * 03 DEEP_SLEEP_CORR_EN 0 + * 02 DEEP_SLEEP_ON 0 + * 01 RADIO_SLEEP_EN 0 + * 00 OSC_SLEEP_EN 0 + *+ */ +#define IP_DEEPSLCNTL_ADDR BASEBAND_REG_BASE +0x30 //0x50800030 +#define IP_DEEPSLCNTL_OFFSET 0x00000030 +#define IP_DEEPSLCNTL_INDEX 0x0000000C +#define IP_DEEPSLCNTL_RESET 0x00000000 + +__INLINE uint32_t ip_deepslcntl_get(void) +{ + return REG_IP_RD(IP_DEEPSLCNTL_ADDR); +} + +__INLINE void ip_deepslcntl_set(uint32_t value) +{ + REG_IP_WR(IP_DEEPSLCNTL_ADDR, value); +} + +// field definitions +#define IP_EXTWKUPDSB_BIT ((uint32_t)0x80000000) +#define IP_EXTWKUPDSB_POS 31 +#define IP_DEEP_SLEEP_STAT_BIT ((uint32_t)0x00008000) +#define IP_DEEP_SLEEP_STAT_POS 15 +#define IP_DEEP_SLEEP_CORR_EN_BIT ((uint32_t)0x00000008) +#define IP_DEEP_SLEEP_CORR_EN_POS 3 +#define IP_DEEP_SLEEP_ON_BIT ((uint32_t)0x00000004) +#define IP_DEEP_SLEEP_ON_POS 2 +#define IP_RADIO_SLEEP_EN_BIT ((uint32_t)0x00000002) +#define IP_RADIO_SLEEP_EN_POS 1 +#define IP_OSC_SLEEP_EN_BIT ((uint32_t)0x00000001) +#define IP_OSC_SLEEP_EN_POS 0 + +#define IP_EXTWKUPDSB_RST 0x0 +#define IP_DEEP_SLEEP_STAT_RST 0x0 +#define IP_DEEP_SLEEP_CORR_EN_RST 0x0 +#define IP_DEEP_SLEEP_ON_RST 0x0 +#define IP_RADIO_SLEEP_EN_RST 0x0 +#define IP_OSC_SLEEP_EN_RST 0x0 + +__INLINE void ip_deepslcntl_pack(uint8_t extwkupdsb, uint8_t deepsleepcorren, uint8_t deepsleepon, uint8_t radiosleepen, uint8_t oscsleepen) +{ + ASSERT_ERR((((uint32_t)extwkupdsb << 31) & ~((uint32_t)0x80000000)) == 0); + ASSERT_ERR((((uint32_t)deepsleepcorren << 3) & ~((uint32_t)0x00000008)) == 0); + ASSERT_ERR((((uint32_t)deepsleepon << 2) & ~((uint32_t)0x00000004)) == 0); + ASSERT_ERR((((uint32_t)radiosleepen << 1) & ~((uint32_t)0x00000002)) == 0); + ASSERT_ERR((((uint32_t)oscsleepen << 0) & ~((uint32_t)0x00000001)) == 0); + REG_IP_WR(IP_DEEPSLCNTL_ADDR, ((uint32_t)extwkupdsb << 31) | ((uint32_t)deepsleepcorren << 3) | ((uint32_t)deepsleepon << 2) | ((uint32_t)radiosleepen << 1) | ((uint32_t)oscsleepen << 0)); +} + +__INLINE void ip_deepslcntl_unpack(uint8_t* extwkupdsb, uint8_t* deepsleepstat, uint8_t* deepsleepcorren, uint8_t* deepsleepon, uint8_t* radiosleepen, uint8_t* oscsleepen) +{ + uint32_t localVal = REG_IP_RD(IP_DEEPSLCNTL_ADDR); + + *extwkupdsb = (localVal & ((uint32_t)0x80000000)) >> 31; + *deepsleepstat = (localVal & ((uint32_t)0x00008000)) >> 15; + *deepsleepcorren = (localVal & ((uint32_t)0x00000008)) >> 3; + *deepsleepon = (localVal & ((uint32_t)0x00000004)) >> 2; + *radiosleepen = (localVal & ((uint32_t)0x00000002)) >> 1; + *oscsleepen = (localVal & ((uint32_t)0x00000001)) >> 0; +} + +__INLINE uint8_t ip_deepslcntl_extwkupdsb_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_DEEPSLCNTL_ADDR); + return ((localVal & ((uint32_t)0x80000000)) >> 31); +} + +__INLINE void ip_deepslcntl_extwkupdsb_setf(uint8_t extwkupdsb) +{ + ASSERT_ERR((((uint32_t)extwkupdsb << 31) & ~((uint32_t)0x80000000)) == 0); + REG_IP_WR(IP_DEEPSLCNTL_ADDR, (REG_IP_RD(IP_DEEPSLCNTL_ADDR) & ~((uint32_t)0x80000000)) | ((uint32_t)extwkupdsb << 31)); +} + +__INLINE uint8_t ip_deepslcntl_deep_sleep_stat_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_DEEPSLCNTL_ADDR); + return ((localVal & ((uint32_t)0x00008000)) >> 15); +} + +__INLINE uint8_t ip_deepslcntl_deep_sleep_corr_en_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_DEEPSLCNTL_ADDR); + return ((localVal & ((uint32_t)0x00000008)) >> 3); +} + +__INLINE void ip_deepslcntl_deep_sleep_corr_en_setf(uint8_t deepsleepcorren) +{ + ASSERT_ERR((((uint32_t)deepsleepcorren << 3) & ~((uint32_t)0x00000008)) == 0); + REG_IP_WR(IP_DEEPSLCNTL_ADDR, (REG_IP_RD(IP_DEEPSLCNTL_ADDR) & ~((uint32_t)0x00000008)) | ((uint32_t)deepsleepcorren << 3)); +} + +__INLINE uint8_t ip_deepslcntl_deep_sleep_on_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_DEEPSLCNTL_ADDR); + return ((localVal & ((uint32_t)0x00000004)) >> 2); +} + +__INLINE void ip_deepslcntl_deep_sleep_on_setf(uint8_t deepsleepon) +{ + ASSERT_ERR((((uint32_t)deepsleepon << 2) & ~((uint32_t)0x00000004)) == 0); + REG_IP_WR(IP_DEEPSLCNTL_ADDR, (REG_IP_RD(IP_DEEPSLCNTL_ADDR) & ~((uint32_t)0x00000004)) | ((uint32_t)deepsleepon << 2)); +} + +__INLINE uint8_t ip_deepslcntl_radio_sleep_en_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_DEEPSLCNTL_ADDR); + return ((localVal & ((uint32_t)0x00000002)) >> 1); +} + +__INLINE void ip_deepslcntl_radio_sleep_en_setf(uint8_t radiosleepen) +{ + ASSERT_ERR((((uint32_t)radiosleepen << 1) & ~((uint32_t)0x00000002)) == 0); + REG_IP_WR(IP_DEEPSLCNTL_ADDR, (REG_IP_RD(IP_DEEPSLCNTL_ADDR) & ~((uint32_t)0x00000002)) | ((uint32_t)radiosleepen << 1)); +} + +__INLINE uint8_t ip_deepslcntl_osc_sleep_en_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_DEEPSLCNTL_ADDR); + return ((localVal & ((uint32_t)0x00000001)) >> 0); +} + +__INLINE void ip_deepslcntl_osc_sleep_en_setf(uint8_t oscsleepen) +{ + ASSERT_ERR((((uint32_t)oscsleepen << 0) & ~((uint32_t)0x00000001)) == 0); + REG_IP_WR(IP_DEEPSLCNTL_ADDR, (REG_IP_RD(IP_DEEPSLCNTL_ADDR) & ~((uint32_t)0x00000001)) | ((uint32_t)oscsleepen << 0)); +} + +/** + * @brief DEEPSLWKUP register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31:00 DEEPSLTIME 0x0 + *+ */ +#define IP_DEEPSLWKUP_ADDR BASEBAND_REG_BASE +0x34 // 0x50800034 +#define IP_DEEPSLWKUP_OFFSET 0x00000034 +#define IP_DEEPSLWKUP_INDEX 0x0000000D +#define IP_DEEPSLWKUP_RESET 0x00000000 + +__INLINE uint32_t ip_deepslwkup_get(void) +{ + return REG_IP_RD(IP_DEEPSLWKUP_ADDR); +} + +__INLINE void ip_deepslwkup_set(uint32_t value) +{ + REG_IP_WR(IP_DEEPSLWKUP_ADDR, value); +} + +// field definitions +#define IP_DEEPSLTIME_MASK ((uint32_t)0xFFFFFFFF) +#define IP_DEEPSLTIME_LSB 0 +#define IP_DEEPSLTIME_WIDTH ((uint32_t)0x00000020) + +#define IP_DEEPSLTIME_RST 0x0 + +__INLINE uint32_t ip_deepslwkup_deepsltime_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_DEEPSLWKUP_ADDR); + ASSERT_ERR((localVal & ~((uint32_t)0xFFFFFFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void ip_deepslwkup_deepsltime_setf(uint32_t deepsltime) +{ + ASSERT_ERR((((uint32_t)deepsltime << 0) & ~((uint32_t)0xFFFFFFFF)) == 0); + REG_IP_WR(IP_DEEPSLWKUP_ADDR, (uint32_t)deepsltime << 0); +} + +/** + * @brief DEEPSLSTAT register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31:00 DEEPSLDUR 0x0 + *+ */ +#define IP_DEEPSLSTAT_ADDR BASEBAND_REG_BASE +0x38 // 0x50800038 +#define IP_DEEPSLSTAT_OFFSET 0x00000038 +#define IP_DEEPSLSTAT_INDEX 0x0000000E +#define IP_DEEPSLSTAT_RESET 0x00000000 + +__INLINE uint32_t ip_deepslstat_get(void) +{ + return REG_IP_RD(IP_DEEPSLSTAT_ADDR); +} + +// field definitions +#define IP_DEEPSLDUR_MASK ((uint32_t)0xFFFFFFFF) +#define IP_DEEPSLDUR_LSB 0 +#define IP_DEEPSLDUR_WIDTH ((uint32_t)0x00000020) + +#define IP_DEEPSLDUR_RST 0x0 + +__INLINE uint32_t ip_deepslstat_deepsldur_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_DEEPSLSTAT_ADDR); + ASSERT_ERR((localVal & ~((uint32_t)0xFFFFFFFF)) == 0); + return (localVal >> 0); +} + +/** + * @brief ENBPRESET register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31:21 TWEXT 0xA0 + * 20:10 TWOSC 0xA0 + * 09:00 TWRM 0x20 + *+ */ +#define IP_ENBPRESET_ADDR BASEBAND_REG_BASE +0x3C // 0x5080003C +#define IP_ENBPRESET_OFFSET 0x0000003C +#define IP_ENBPRESET_INDEX 0x0000000F +#define IP_ENBPRESET_RESET 0x14028020 + +__INLINE uint32_t ip_enbpreset_get(void) +{ + return REG_IP_RD(IP_ENBPRESET_ADDR); +} + +__INLINE void ip_enbpreset_set(uint32_t value) +{ + REG_IP_WR(IP_ENBPRESET_ADDR, value); +} + +// field definitions +#define IP_TWEXT_MASK ((uint32_t)0xFFE00000) +#define IP_TWEXT_LSB 21 +#define IP_TWEXT_WIDTH ((uint32_t)0x0000000B) +#define IP_TWOSC_MASK ((uint32_t)0x001FFC00) +#define IP_TWOSC_LSB 10 +#define IP_TWOSC_WIDTH ((uint32_t)0x0000000B) +#define IP_TWRM_MASK ((uint32_t)0x000003FF) +#define IP_TWRM_LSB 0 +#define IP_TWRM_WIDTH ((uint32_t)0x0000000A) + +#define IP_TWEXT_RST 0xA0 +#define IP_TWOSC_RST 0xA0 +#define IP_TWRM_RST 0x20 + +__INLINE void ip_enbpreset_pack(uint16_t twext, uint16_t twosc, uint16_t twrm) +{ + ASSERT_ERR((((uint32_t)twext << 21) & ~((uint32_t)0xFFE00000)) == 0); + ASSERT_ERR((((uint32_t)twosc << 10) & ~((uint32_t)0x001FFC00)) == 0); + ASSERT_ERR((((uint32_t)twrm << 0) & ~((uint32_t)0x000003FF)) == 0); + REG_IP_WR(IP_ENBPRESET_ADDR, ((uint32_t)twext << 21) | ((uint32_t)twosc << 10) | ((uint32_t)twrm << 0)); +} + +__INLINE void ip_enbpreset_unpack(uint16_t* twext, uint16_t* twosc, uint16_t* twrm) +{ + uint32_t localVal = REG_IP_RD(IP_ENBPRESET_ADDR); + + *twext = (localVal & ((uint32_t)0xFFE00000)) >> 21; + *twosc = (localVal & ((uint32_t)0x001FFC00)) >> 10; + *twrm = (localVal & ((uint32_t)0x000003FF)) >> 0; +} + +__INLINE uint16_t ip_enbpreset_twext_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_ENBPRESET_ADDR); + return ((localVal & ((uint32_t)0xFFE00000)) >> 21); +} + +__INLINE void ip_enbpreset_twext_setf(uint16_t twext) +{ + ASSERT_ERR((((uint32_t)twext << 21) & ~((uint32_t)0xFFE00000)) == 0); + REG_IP_WR(IP_ENBPRESET_ADDR, (REG_IP_RD(IP_ENBPRESET_ADDR) & ~((uint32_t)0xFFE00000)) | ((uint32_t)twext << 21)); +} + +__INLINE uint16_t ip_enbpreset_twosc_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_ENBPRESET_ADDR); + return ((localVal & ((uint32_t)0x001FFC00)) >> 10); +} + +__INLINE void ip_enbpreset_twosc_setf(uint16_t twosc) +{ + ASSERT_ERR((((uint32_t)twosc << 10) & ~((uint32_t)0x001FFC00)) == 0); + REG_IP_WR(IP_ENBPRESET_ADDR, (REG_IP_RD(IP_ENBPRESET_ADDR) & ~((uint32_t)0x001FFC00)) | ((uint32_t)twosc << 10)); +} + +__INLINE uint16_t ip_enbpreset_twrm_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_ENBPRESET_ADDR); + return ((localVal & ((uint32_t)0x000003FF)) >> 0); +} + +__INLINE void ip_enbpreset_twrm_setf(uint16_t twrm) +{ + ASSERT_ERR((((uint32_t)twrm << 0) & ~((uint32_t)0x000003FF)) == 0); + REG_IP_WR(IP_ENBPRESET_ADDR, (REG_IP_RD(IP_ENBPRESET_ADDR) & ~((uint32_t)0x000003FF)) | ((uint32_t)twrm << 0)); +} + +/** + * @brief FINECNTCORR register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 09:00 FINECNTCORR 0x0 + *+ */ +#define IP_FINECNTCORR_ADDR BASEBAND_REG_BASE +0x40 //0x50800040 +#define IP_FINECNTCORR_OFFSET 0x00000040 +#define IP_FINECNTCORR_INDEX 0x00000010 +#define IP_FINECNTCORR_RESET 0x00000000 + +__INLINE uint32_t ip_finecntcorr_get(void) +{ + return REG_IP_RD(IP_FINECNTCORR_ADDR); +} + +__INLINE void ip_finecntcorr_set(uint32_t value) +{ + REG_IP_WR(IP_FINECNTCORR_ADDR, value); +} + +// field definitions +#define IP_FINECNTCORR_MASK ((uint32_t)0x000003FF) +#define IP_FINECNTCORR_LSB 0 +#define IP_FINECNTCORR_WIDTH ((uint32_t)0x0000000A) + +#define IP_FINECNTCORR_RST 0x0 + +__INLINE uint16_t ip_finecntcorr_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_FINECNTCORR_ADDR); + ASSERT_ERR((localVal & ~((uint32_t)0x000003FF)) == 0); + return (localVal >> 0); +} + +__INLINE void ip_finecntcorr_setf(uint16_t finecntcorr) +{ + ASSERT_ERR((((uint32_t)finecntcorr << 0) & ~((uint32_t)0x000003FF)) == 0); + REG_IP_WR(IP_FINECNTCORR_ADDR, (uint32_t)finecntcorr << 0); +} + +/** + * @brief CLKNCNTCORR register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31 ABS_DELTA 0 + * 27:00 CLKNCNTCORR 0x0 + *+ */ +#define IP_CLKNCNTCORR_ADDR BASEBAND_REG_BASE +0x44 // 0x50800044 +#define IP_CLKNCNTCORR_OFFSET 0x00000044 +#define IP_CLKNCNTCORR_INDEX 0x00000011 +#define IP_CLKNCNTCORR_RESET 0x00000000 + +__INLINE uint32_t ip_clkncntcorr_get(void) +{ + return REG_IP_RD(IP_CLKNCNTCORR_ADDR); +} + +__INLINE void ip_clkncntcorr_set(uint32_t value) +{ + REG_IP_WR(IP_CLKNCNTCORR_ADDR, value); +} + +// field definitions +#define IP_ABS_DELTA_BIT ((uint32_t)0x80000000) +#define IP_ABS_DELTA_POS 31 +#define IP_CLKNCNTCORR_MASK ((uint32_t)0x0FFFFFFF) +#define IP_CLKNCNTCORR_LSB 0 +#define IP_CLKNCNTCORR_WIDTH ((uint32_t)0x0000001C) + +#define IP_ABS_DELTA_RST 0x0 +#define IP_CLKNCNTCORR_RST 0x0 + +__INLINE void ip_clkncntcorr_pack(uint8_t absdelta, uint32_t clkncntcorr) +{ + ASSERT_ERR((((uint32_t)absdelta << 31) & ~((uint32_t)0x80000000)) == 0); + ASSERT_ERR((((uint32_t)clkncntcorr << 0) & ~((uint32_t)0x0FFFFFFF)) == 0); + REG_IP_WR(IP_CLKNCNTCORR_ADDR, ((uint32_t)absdelta << 31) | ((uint32_t)clkncntcorr << 0)); +} + +__INLINE void ip_clkncntcorr_unpack(uint8_t* absdelta, uint32_t* clkncntcorr) +{ + uint32_t localVal = REG_IP_RD(IP_CLKNCNTCORR_ADDR); + + *absdelta = (localVal & ((uint32_t)0x80000000)) >> 31; + *clkncntcorr = (localVal & ((uint32_t)0x0FFFFFFF)) >> 0; +} + +__INLINE uint8_t ip_clkncntcorr_abs_delta_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_CLKNCNTCORR_ADDR); + return ((localVal & ((uint32_t)0x80000000)) >> 31); +} + +__INLINE void ip_clkncntcorr_abs_delta_setf(uint8_t absdelta) +{ + ASSERT_ERR((((uint32_t)absdelta << 31) & ~((uint32_t)0x80000000)) == 0); + REG_IP_WR(IP_CLKNCNTCORR_ADDR, (REG_IP_RD(IP_CLKNCNTCORR_ADDR) & ~((uint32_t)0x80000000)) | ((uint32_t)absdelta << 31)); +} + +__INLINE uint32_t ip_clkncntcorr_clkncntcorr_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_CLKNCNTCORR_ADDR); + return ((localVal & ((uint32_t)0x0FFFFFFF)) >> 0); +} + +__INLINE void ip_clkncntcorr_clkncntcorr_setf(uint32_t clkncntcorr) +{ + ASSERT_ERR((((uint32_t)clkncntcorr << 0) & ~((uint32_t)0x0FFFFFFF)) == 0); + REG_IP_WR(IP_CLKNCNTCORR_ADDR, (REG_IP_RD(IP_CLKNCNTCORR_ADDR) & ~((uint32_t)0x0FFFFFFF)) | ((uint32_t)clkncntcorr << 0)); +} + +/** + * @brief DIAGCNTL register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31 DIAG3_EN 0 + * 29:24 DIAG3 0x0 + * 23 DIAG2_EN 0 + * 21:16 DIAG2 0x0 + * 15 DIAG1_EN 0 + * 13:08 DIAG1 0x0 + * 07 DIAG0_EN 0 + * 05:00 DIAG0 0x0 + *+ */ +#define IP_DIAGCNTL_ADDR BASEBAND_REG_BASE +0x50 // 0x50800050 +#define IP_DIAGCNTL_OFFSET 0x00000050 +#define IP_DIAGCNTL_INDEX 0x00000014 +#define IP_DIAGCNTL_RESET 0x00000000 + +__INLINE uint32_t ip_diagcntl_get(void) +{ + return REG_IP_RD(IP_DIAGCNTL_ADDR); +} + +__INLINE void ip_diagcntl_set(uint32_t value) +{ + REG_IP_WR(IP_DIAGCNTL_ADDR, value); +} + +// field definitions +#define IP_DIAG3_EN_BIT ((uint32_t)0x80000000) +#define IP_DIAG3_EN_POS 31 +#define IP_DIAG3_MASK ((uint32_t)0x3F000000) +#define IP_DIAG3_LSB 24 +#define IP_DIAG3_WIDTH ((uint32_t)0x00000006) +#define IP_DIAG2_EN_BIT ((uint32_t)0x00800000) +#define IP_DIAG2_EN_POS 23 +#define IP_DIAG2_MASK ((uint32_t)0x003F0000) +#define IP_DIAG2_LSB 16 +#define IP_DIAG2_WIDTH ((uint32_t)0x00000006) +#define IP_DIAG1_EN_BIT ((uint32_t)0x00008000) +#define IP_DIAG1_EN_POS 15 +#define IP_DIAG1_MASK ((uint32_t)0x00003F00) +#define IP_DIAG1_LSB 8 +#define IP_DIAG1_WIDTH ((uint32_t)0x00000006) +#define IP_DIAG0_EN_BIT ((uint32_t)0x00000080) +#define IP_DIAG0_EN_POS 7 +#define IP_DIAG0_MASK ((uint32_t)0x0000003F) +#define IP_DIAG0_LSB 0 +#define IP_DIAG0_WIDTH ((uint32_t)0x00000006) + +#define IP_DIAG3_EN_RST 0x0 +#define IP_DIAG3_RST 0x0 +#define IP_DIAG2_EN_RST 0x0 +#define IP_DIAG2_RST 0x0 +#define IP_DIAG1_EN_RST 0x0 +#define IP_DIAG1_RST 0x0 +#define IP_DIAG0_EN_RST 0x0 +#define IP_DIAG0_RST 0x0 + +__INLINE void ip_diagcntl_pack(uint8_t diag3en, uint8_t diag3, uint8_t diag2en, uint8_t diag2, uint8_t diag1en, uint8_t diag1, uint8_t diag0en, uint8_t diag0) +{ + ASSERT_ERR((((uint32_t)diag3en << 31) & ~((uint32_t)0x80000000)) == 0); + ASSERT_ERR((((uint32_t)diag3 << 24) & ~((uint32_t)0x3F000000)) == 0); + ASSERT_ERR((((uint32_t)diag2en << 23) & ~((uint32_t)0x00800000)) == 0); + ASSERT_ERR((((uint32_t)diag2 << 16) & ~((uint32_t)0x003F0000)) == 0); + ASSERT_ERR((((uint32_t)diag1en << 15) & ~((uint32_t)0x00008000)) == 0); + ASSERT_ERR((((uint32_t)diag1 << 8) & ~((uint32_t)0x00003F00)) == 0); + ASSERT_ERR((((uint32_t)diag0en << 7) & ~((uint32_t)0x00000080)) == 0); + ASSERT_ERR((((uint32_t)diag0 << 0) & ~((uint32_t)0x0000003F)) == 0); + REG_IP_WR(IP_DIAGCNTL_ADDR, ((uint32_t)diag3en << 31) | ((uint32_t)diag3 << 24) | ((uint32_t)diag2en << 23) | ((uint32_t)diag2 << 16) | ((uint32_t)diag1en << 15) | ((uint32_t)diag1 << 8) | ((uint32_t)diag0en << 7) | ((uint32_t)diag0 << 0)); +} + +__INLINE void ip_diagcntl_unpack(uint8_t* diag3en, uint8_t* diag3, uint8_t* diag2en, uint8_t* diag2, uint8_t* diag1en, uint8_t* diag1, uint8_t* diag0en, uint8_t* diag0) +{ + uint32_t localVal = REG_IP_RD(IP_DIAGCNTL_ADDR); + + *diag3en = (localVal & ((uint32_t)0x80000000)) >> 31; + *diag3 = (localVal & ((uint32_t)0x3F000000)) >> 24; + *diag2en = (localVal & ((uint32_t)0x00800000)) >> 23; + *diag2 = (localVal & ((uint32_t)0x003F0000)) >> 16; + *diag1en = (localVal & ((uint32_t)0x00008000)) >> 15; + *diag1 = (localVal & ((uint32_t)0x00003F00)) >> 8; + *diag0en = (localVal & ((uint32_t)0x00000080)) >> 7; + *diag0 = (localVal & ((uint32_t)0x0000003F)) >> 0; +} + +__INLINE uint8_t ip_diagcntl_diag3_en_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_DIAGCNTL_ADDR); + return ((localVal & ((uint32_t)0x80000000)) >> 31); +} + +__INLINE void ip_diagcntl_diag3_en_setf(uint8_t diag3en) +{ + ASSERT_ERR((((uint32_t)diag3en << 31) & ~((uint32_t)0x80000000)) == 0); + REG_IP_WR(IP_DIAGCNTL_ADDR, (REG_IP_RD(IP_DIAGCNTL_ADDR) & ~((uint32_t)0x80000000)) | ((uint32_t)diag3en << 31)); +} + +__INLINE uint8_t ip_diagcntl_diag3_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_DIAGCNTL_ADDR); + return ((localVal & ((uint32_t)0x3F000000)) >> 24); +} + +__INLINE void ip_diagcntl_diag3_setf(uint8_t diag3) +{ + ASSERT_ERR((((uint32_t)diag3 << 24) & ~((uint32_t)0x3F000000)) == 0); + REG_IP_WR(IP_DIAGCNTL_ADDR, (REG_IP_RD(IP_DIAGCNTL_ADDR) & ~((uint32_t)0x3F000000)) | ((uint32_t)diag3 << 24)); +} + +__INLINE uint8_t ip_diagcntl_diag2_en_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_DIAGCNTL_ADDR); + return ((localVal & ((uint32_t)0x00800000)) >> 23); +} + +__INLINE void ip_diagcntl_diag2_en_setf(uint8_t diag2en) +{ + ASSERT_ERR((((uint32_t)diag2en << 23) & ~((uint32_t)0x00800000)) == 0); + REG_IP_WR(IP_DIAGCNTL_ADDR, (REG_IP_RD(IP_DIAGCNTL_ADDR) & ~((uint32_t)0x00800000)) | ((uint32_t)diag2en << 23)); +} + +__INLINE uint8_t ip_diagcntl_diag2_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_DIAGCNTL_ADDR); + return ((localVal & ((uint32_t)0x003F0000)) >> 16); +} + +__INLINE void ip_diagcntl_diag2_setf(uint8_t diag2) +{ + ASSERT_ERR((((uint32_t)diag2 << 16) & ~((uint32_t)0x003F0000)) == 0); + REG_IP_WR(IP_DIAGCNTL_ADDR, (REG_IP_RD(IP_DIAGCNTL_ADDR) & ~((uint32_t)0x003F0000)) | ((uint32_t)diag2 << 16)); +} + +__INLINE uint8_t ip_diagcntl_diag1_en_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_DIAGCNTL_ADDR); + return ((localVal & ((uint32_t)0x00008000)) >> 15); +} + +__INLINE void ip_diagcntl_diag1_en_setf(uint8_t diag1en) +{ + ASSERT_ERR((((uint32_t)diag1en << 15) & ~((uint32_t)0x00008000)) == 0); + REG_IP_WR(IP_DIAGCNTL_ADDR, (REG_IP_RD(IP_DIAGCNTL_ADDR) & ~((uint32_t)0x00008000)) | ((uint32_t)diag1en << 15)); +} + +__INLINE uint8_t ip_diagcntl_diag1_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_DIAGCNTL_ADDR); + return ((localVal & ((uint32_t)0x00003F00)) >> 8); +} + +__INLINE void ip_diagcntl_diag1_setf(uint8_t diag1) +{ + ASSERT_ERR((((uint32_t)diag1 << 8) & ~((uint32_t)0x00003F00)) == 0); + REG_IP_WR(IP_DIAGCNTL_ADDR, (REG_IP_RD(IP_DIAGCNTL_ADDR) & ~((uint32_t)0x00003F00)) | ((uint32_t)diag1 << 8)); +} + +__INLINE uint8_t ip_diagcntl_diag0_en_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_DIAGCNTL_ADDR); + return ((localVal & ((uint32_t)0x00000080)) >> 7); +} + +__INLINE void ip_diagcntl_diag0_en_setf(uint8_t diag0en) +{ + ASSERT_ERR((((uint32_t)diag0en << 7) & ~((uint32_t)0x00000080)) == 0); + REG_IP_WR(IP_DIAGCNTL_ADDR, (REG_IP_RD(IP_DIAGCNTL_ADDR) & ~((uint32_t)0x00000080)) | ((uint32_t)diag0en << 7)); +} + +__INLINE uint8_t ip_diagcntl_diag0_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_DIAGCNTL_ADDR); + return ((localVal & ((uint32_t)0x0000003F)) >> 0); +} + +__INLINE void ip_diagcntl_diag0_setf(uint8_t diag0) +{ + ASSERT_ERR((((uint32_t)diag0 << 0) & ~((uint32_t)0x0000003F)) == 0); + REG_IP_WR(IP_DIAGCNTL_ADDR, (REG_IP_RD(IP_DIAGCNTL_ADDR) & ~((uint32_t)0x0000003F)) | ((uint32_t)diag0 << 0)); +} + +/** + * @brief DIAGSTAT register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31:24 DIAG3STAT 0x0 + * 23:16 DIAG2STAT 0x0 + * 15:08 DIAG1STAT 0x0 + * 07:00 DIAG0STAT 0x0 + *+ */ +#define IP_DIAGSTAT_ADDR BASEBAND_REG_BASE +0x54 //0x50800054 +#define IP_DIAGSTAT_OFFSET 0x00000054 +#define IP_DIAGSTAT_INDEX 0x00000015 +#define IP_DIAGSTAT_RESET 0x00000000 + +__INLINE uint32_t ip_diagstat_get(void) +{ + return REG_IP_RD(IP_DIAGSTAT_ADDR); +} + +// field definitions +#define IP_DIAG3STAT_MASK ((uint32_t)0xFF000000) +#define IP_DIAG3STAT_LSB 24 +#define IP_DIAG3STAT_WIDTH ((uint32_t)0x00000008) +#define IP_DIAG2STAT_MASK ((uint32_t)0x00FF0000) +#define IP_DIAG2STAT_LSB 16 +#define IP_DIAG2STAT_WIDTH ((uint32_t)0x00000008) +#define IP_DIAG1STAT_MASK ((uint32_t)0x0000FF00) +#define IP_DIAG1STAT_LSB 8 +#define IP_DIAG1STAT_WIDTH ((uint32_t)0x00000008) +#define IP_DIAG0STAT_MASK ((uint32_t)0x000000FF) +#define IP_DIAG0STAT_LSB 0 +#define IP_DIAG0STAT_WIDTH ((uint32_t)0x00000008) + +#define IP_DIAG3STAT_RST 0x0 +#define IP_DIAG2STAT_RST 0x0 +#define IP_DIAG1STAT_RST 0x0 +#define IP_DIAG0STAT_RST 0x0 + +__INLINE void ip_diagstat_unpack(uint8_t* diag3stat, uint8_t* diag2stat, uint8_t* diag1stat, uint8_t* diag0stat) +{ + uint32_t localVal = REG_IP_RD(IP_DIAGSTAT_ADDR); + + *diag3stat = (localVal & ((uint32_t)0xFF000000)) >> 24; + *diag2stat = (localVal & ((uint32_t)0x00FF0000)) >> 16; + *diag1stat = (localVal & ((uint32_t)0x0000FF00)) >> 8; + *diag0stat = (localVal & ((uint32_t)0x000000FF)) >> 0; +} + +__INLINE uint8_t ip_diagstat_diag3stat_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_DIAGSTAT_ADDR); + return ((localVal & ((uint32_t)0xFF000000)) >> 24); +} + +__INLINE uint8_t ip_diagstat_diag2stat_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_DIAGSTAT_ADDR); + return ((localVal & ((uint32_t)0x00FF0000)) >> 16); +} + +__INLINE uint8_t ip_diagstat_diag1stat_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_DIAGSTAT_ADDR); + return ((localVal & ((uint32_t)0x0000FF00)) >> 8); +} + +__INLINE uint8_t ip_diagstat_diag0stat_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_DIAGSTAT_ADDR); + return ((localVal & ((uint32_t)0x000000FF)) >> 0); +} + +/** + * @brief DEBUGADDMAX register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31:16 REG_ADDMAX 0x0 + * 15:00 EM_ADDMAX 0x0 + *+ */ +#define IP_DEBUGADDMAX_ADDR BASEBAND_REG_BASE +0x58 // 0x50800058 +#define IP_DEBUGADDMAX_OFFSET 0x00000058 +#define IP_DEBUGADDMAX_INDEX 0x00000016 +#define IP_DEBUGADDMAX_RESET 0x00000000 + +__INLINE uint32_t ip_debugaddmax_get(void) +{ + return REG_IP_RD(IP_DEBUGADDMAX_ADDR); +} + +__INLINE void ip_debugaddmax_set(uint32_t value) +{ + REG_IP_WR(IP_DEBUGADDMAX_ADDR, value); +} + +// field definitions +#define IP_REG_ADDMAX_MASK ((uint32_t)0xFFFF0000) +#define IP_REG_ADDMAX_LSB 16 +#define IP_REG_ADDMAX_WIDTH ((uint32_t)0x00000010) +#define IP_EM_ADDMAX_MASK ((uint32_t)0x0000FFFF) +#define IP_EM_ADDMAX_LSB 0 +#define IP_EM_ADDMAX_WIDTH ((uint32_t)0x00000010) + +#define IP_REG_ADDMAX_RST 0x0 +#define IP_EM_ADDMAX_RST 0x0 + +__INLINE void ip_debugaddmax_pack(uint16_t regaddmax, uint16_t emaddmax) +{ + ASSERT_ERR((((uint32_t)regaddmax << 16) & ~((uint32_t)0xFFFF0000)) == 0); + ASSERT_ERR((((uint32_t)emaddmax << 0) & ~((uint32_t)0x0000FFFF)) == 0); + REG_IP_WR(IP_DEBUGADDMAX_ADDR, ((uint32_t)regaddmax << 16) | ((uint32_t)emaddmax << 0)); +} + +__INLINE void ip_debugaddmax_unpack(uint16_t* regaddmax, uint16_t* emaddmax) +{ + uint32_t localVal = REG_IP_RD(IP_DEBUGADDMAX_ADDR); + + *regaddmax = (localVal & ((uint32_t)0xFFFF0000)) >> 16; + *emaddmax = (localVal & ((uint32_t)0x0000FFFF)) >> 0; +} + +__INLINE uint16_t ip_debugaddmax_reg_addmax_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_DEBUGADDMAX_ADDR); + return ((localVal & ((uint32_t)0xFFFF0000)) >> 16); +} + +__INLINE void ip_debugaddmax_reg_addmax_setf(uint16_t regaddmax) +{ + ASSERT_ERR((((uint32_t)regaddmax << 16) & ~((uint32_t)0xFFFF0000)) == 0); + REG_IP_WR(IP_DEBUGADDMAX_ADDR, (REG_IP_RD(IP_DEBUGADDMAX_ADDR) & ~((uint32_t)0xFFFF0000)) | ((uint32_t)regaddmax << 16)); +} + +__INLINE uint16_t ip_debugaddmax_em_addmax_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_DEBUGADDMAX_ADDR); + return ((localVal & ((uint32_t)0x0000FFFF)) >> 0); +} + +__INLINE void ip_debugaddmax_em_addmax_setf(uint16_t emaddmax) +{ + ASSERT_ERR((((uint32_t)emaddmax << 0) & ~((uint32_t)0x0000FFFF)) == 0); + REG_IP_WR(IP_DEBUGADDMAX_ADDR, (REG_IP_RD(IP_DEBUGADDMAX_ADDR) & ~((uint32_t)0x0000FFFF)) | ((uint32_t)emaddmax << 0)); +} + +/** + * @brief DEBUGADDMIN register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31:16 REG_ADDMIN 0x0 + * 15:00 EM_ADDMIN 0x0 + *+ */ +#define IP_DEBUGADDMIN_ADDR BASEBAND_REG_BASE +0x5C // 0x5080005C +#define IP_DEBUGADDMIN_OFFSET 0x0000005C +#define IP_DEBUGADDMIN_INDEX 0x00000017 +#define IP_DEBUGADDMIN_RESET 0x00000000 + +__INLINE uint32_t ip_debugaddmin_get(void) +{ + return REG_IP_RD(IP_DEBUGADDMIN_ADDR); +} + +__INLINE void ip_debugaddmin_set(uint32_t value) +{ + REG_IP_WR(IP_DEBUGADDMIN_ADDR, value); +} + +// field definitions +#define IP_REG_ADDMIN_MASK ((uint32_t)0xFFFF0000) +#define IP_REG_ADDMIN_LSB 16 +#define IP_REG_ADDMIN_WIDTH ((uint32_t)0x00000010) +#define IP_EM_ADDMIN_MASK ((uint32_t)0x0000FFFF) +#define IP_EM_ADDMIN_LSB 0 +#define IP_EM_ADDMIN_WIDTH ((uint32_t)0x00000010) + +#define IP_REG_ADDMIN_RST 0x0 +#define IP_EM_ADDMIN_RST 0x0 + +__INLINE void ip_debugaddmin_pack(uint16_t regaddmin, uint16_t emaddmin) +{ + ASSERT_ERR((((uint32_t)regaddmin << 16) & ~((uint32_t)0xFFFF0000)) == 0); + ASSERT_ERR((((uint32_t)emaddmin << 0) & ~((uint32_t)0x0000FFFF)) == 0); + REG_IP_WR(IP_DEBUGADDMIN_ADDR, ((uint32_t)regaddmin << 16) | ((uint32_t)emaddmin << 0)); +} + +__INLINE void ip_debugaddmin_unpack(uint16_t* regaddmin, uint16_t* emaddmin) +{ + uint32_t localVal = REG_IP_RD(IP_DEBUGADDMIN_ADDR); + + *regaddmin = (localVal & ((uint32_t)0xFFFF0000)) >> 16; + *emaddmin = (localVal & ((uint32_t)0x0000FFFF)) >> 0; +} + +__INLINE uint16_t ip_debugaddmin_reg_addmin_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_DEBUGADDMIN_ADDR); + return ((localVal & ((uint32_t)0xFFFF0000)) >> 16); +} + +__INLINE void ip_debugaddmin_reg_addmin_setf(uint16_t regaddmin) +{ + ASSERT_ERR((((uint32_t)regaddmin << 16) & ~((uint32_t)0xFFFF0000)) == 0); + REG_IP_WR(IP_DEBUGADDMIN_ADDR, (REG_IP_RD(IP_DEBUGADDMIN_ADDR) & ~((uint32_t)0xFFFF0000)) | ((uint32_t)regaddmin << 16)); +} + +__INLINE uint16_t ip_debugaddmin_em_addmin_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_DEBUGADDMIN_ADDR); + return ((localVal & ((uint32_t)0x0000FFFF)) >> 0); +} + +__INLINE void ip_debugaddmin_em_addmin_setf(uint16_t emaddmin) +{ + ASSERT_ERR((((uint32_t)emaddmin << 0) & ~((uint32_t)0x0000FFFF)) == 0); + REG_IP_WR(IP_DEBUGADDMIN_ADDR, (REG_IP_RD(IP_DEBUGADDMIN_ADDR) & ~((uint32_t)0x0000FFFF)) | ((uint32_t)emaddmin << 0)); +} + +/** + * @brief ERRORTYPESTAT register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 03 ACT_SCHDL_APFM_ERROR 0 + * 02 ACT_SCHDL_ENTRY_ERROR 0 + * 01 FIFOWRITEERR 0 + * 00 RADIO_EMACC_ERROR 0 + *+ */ +#define IP_ERRORTYPESTAT_ADDR BASEBAND_REG_BASE +0x60 //0x50800060 +#define IP_ERRORTYPESTAT_OFFSET 0x00000060 +#define IP_ERRORTYPESTAT_INDEX 0x00000018 +#define IP_ERRORTYPESTAT_RESET 0x00000000 + +__INLINE uint32_t ip_errortypestat_get(void) +{ + return REG_IP_RD(IP_ERRORTYPESTAT_ADDR); +} + +// field definitions +#define IP_ACT_SCHDL_APFM_ERROR_BIT ((uint32_t)0x00000008) +#define IP_ACT_SCHDL_APFM_ERROR_POS 3 +#define IP_ACT_SCHDL_ENTRY_ERROR_BIT ((uint32_t)0x00000004) +#define IP_ACT_SCHDL_ENTRY_ERROR_POS 2 +#define IP_FIFOWRITEERR_BIT ((uint32_t)0x00000002) +#define IP_FIFOWRITEERR_POS 1 +#define IP_RADIO_EMACC_ERROR_BIT ((uint32_t)0x00000001) +#define IP_RADIO_EMACC_ERROR_POS 0 + +#define IP_ACT_SCHDL_APFM_ERROR_RST 0x0 +#define IP_ACT_SCHDL_ENTRY_ERROR_RST 0x0 +#define IP_FIFOWRITEERR_RST 0x0 +#define IP_RADIO_EMACC_ERROR_RST 0x0 + +__INLINE void ip_errortypestat_unpack(uint8_t* actschdlapfmerror, uint8_t* actschdlentryerror, uint8_t* fifowriteerr, uint8_t* radioemaccerror) +{ + uint32_t localVal = REG_IP_RD(IP_ERRORTYPESTAT_ADDR); + + *actschdlapfmerror = (localVal & ((uint32_t)0x00000008)) >> 3; + *actschdlentryerror = (localVal & ((uint32_t)0x00000004)) >> 2; + *fifowriteerr = (localVal & ((uint32_t)0x00000002)) >> 1; + *radioemaccerror = (localVal & ((uint32_t)0x00000001)) >> 0; +} + +__INLINE uint8_t ip_errortypestat_act_schdl_apfm_error_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_ERRORTYPESTAT_ADDR); + return ((localVal & ((uint32_t)0x00000008)) >> 3); +} + +__INLINE uint8_t ip_errortypestat_act_schdl_entry_error_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_ERRORTYPESTAT_ADDR); + return ((localVal & ((uint32_t)0x00000004)) >> 2); +} + +__INLINE uint8_t ip_errortypestat_fifowriteerr_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_ERRORTYPESTAT_ADDR); + return ((localVal & ((uint32_t)0x00000002)) >> 1); +} + +__INLINE uint8_t ip_errortypestat_radio_emacc_error_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_ERRORTYPESTAT_ADDR); + return ((localVal & ((uint32_t)0x00000001)) >> 0); +} + +/** + * @brief SWPROFILING register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31 SWPROF31 0 + * 30 SWPROF30 0 + * 29 SWPROF29 0 + * 28 SWPROF28 0 + * 27 SWPROF27 0 + * 26 SWPROF26 0 + * 25 SWPROF25 0 + * 24 SWPROF24 0 + * 23 SWPROF23 0 + * 22 SWPROF22 0 + * 21 SWPROF21 0 + * 20 SWPROF20 0 + * 19 SWPROF19 0 + * 18 SWPROF18 0 + * 17 SWPROF17 0 + * 16 SWPROF16 0 + * 15 SWPROF15 0 + * 14 SWPROF14 0 + * 13 SWPROF13 0 + * 12 SWPROF12 0 + * 11 SWPROF11 0 + * 10 SWPROF10 0 + * 09 SWPROF9 0 + * 08 SWPROF8 0 + * 07 SWPROF7 0 + * 06 SWPROF6 0 + * 05 SWPROF5 0 + * 04 SWPROF4 0 + * 03 SWPROF3 0 + * 02 SWPROF2 0 + * 01 SWPROF1 0 + * 00 SWPROF0 0 + *+ */ +#define IP_SWPROFILING_ADDR BASEBAND_REG_BASE +0x64 // 0x50800064 +#define IP_SWPROFILING_OFFSET 0x00000064 +#define IP_SWPROFILING_INDEX 0x00000019 +#define IP_SWPROFILING_RESET 0x00000000 + +__INLINE uint32_t ip_swprofiling_get(void) +{ + return REG_IP_RD(IP_SWPROFILING_ADDR); +} + +__INLINE void ip_swprofiling_set(uint32_t value) +{ + REG_IP_WR(IP_SWPROFILING_ADDR, value); +} + +// field definitions +#define IP_SWPROF31_BIT ((uint32_t)0x80000000) +#define IP_SWPROF31_POS 31 +#define IP_SWPROF30_BIT ((uint32_t)0x40000000) +#define IP_SWPROF30_POS 30 +#define IP_SWPROF29_BIT ((uint32_t)0x20000000) +#define IP_SWPROF29_POS 29 +#define IP_SWPROF28_BIT ((uint32_t)0x10000000) +#define IP_SWPROF28_POS 28 +#define IP_SWPROF27_BIT ((uint32_t)0x08000000) +#define IP_SWPROF27_POS 27 +#define IP_SWPROF26_BIT ((uint32_t)0x04000000) +#define IP_SWPROF26_POS 26 +#define IP_SWPROF25_BIT ((uint32_t)0x02000000) +#define IP_SWPROF25_POS 25 +#define IP_SWPROF24_BIT ((uint32_t)0x01000000) +#define IP_SWPROF24_POS 24 +#define IP_SWPROF23_BIT ((uint32_t)0x00800000) +#define IP_SWPROF23_POS 23 +#define IP_SWPROF22_BIT ((uint32_t)0x00400000) +#define IP_SWPROF22_POS 22 +#define IP_SWPROF21_BIT ((uint32_t)0x00200000) +#define IP_SWPROF21_POS 21 +#define IP_SWPROF20_BIT ((uint32_t)0x00100000) +#define IP_SWPROF20_POS 20 +#define IP_SWPROF19_BIT ((uint32_t)0x00080000) +#define IP_SWPROF19_POS 19 +#define IP_SWPROF18_BIT ((uint32_t)0x00040000) +#define IP_SWPROF18_POS 18 +#define IP_SWPROF17_BIT ((uint32_t)0x00020000) +#define IP_SWPROF17_POS 17 +#define IP_SWPROF16_BIT ((uint32_t)0x00010000) +#define IP_SWPROF16_POS 16 +#define IP_SWPROF15_BIT ((uint32_t)0x00008000) +#define IP_SWPROF15_POS 15 +#define IP_SWPROF14_BIT ((uint32_t)0x00004000) +#define IP_SWPROF14_POS 14 +#define IP_SWPROF13_BIT ((uint32_t)0x00002000) +#define IP_SWPROF13_POS 13 +#define IP_SWPROF12_BIT ((uint32_t)0x00001000) +#define IP_SWPROF12_POS 12 +#define IP_SWPROF11_BIT ((uint32_t)0x00000800) +#define IP_SWPROF11_POS 11 +#define IP_SWPROF10_BIT ((uint32_t)0x00000400) +#define IP_SWPROF10_POS 10 +#define IP_SWPROF9_BIT ((uint32_t)0x00000200) +#define IP_SWPROF9_POS 9 +#define IP_SWPROF8_BIT ((uint32_t)0x00000100) +#define IP_SWPROF8_POS 8 +#define IP_SWPROF7_BIT ((uint32_t)0x00000080) +#define IP_SWPROF7_POS 7 +#define IP_SWPROF6_BIT ((uint32_t)0x00000040) +#define IP_SWPROF6_POS 6 +#define IP_SWPROF5_BIT ((uint32_t)0x00000020) +#define IP_SWPROF5_POS 5 +#define IP_SWPROF4_BIT ((uint32_t)0x00000010) +#define IP_SWPROF4_POS 4 +#define IP_SWPROF3_BIT ((uint32_t)0x00000008) +#define IP_SWPROF3_POS 3 +#define IP_SWPROF2_BIT ((uint32_t)0x00000004) +#define IP_SWPROF2_POS 2 +#define IP_SWPROF1_BIT ((uint32_t)0x00000002) +#define IP_SWPROF1_POS 1 +#define IP_SWPROF0_BIT ((uint32_t)0x00000001) +#define IP_SWPROF0_POS 0 + +#define IP_SWPROF31_RST 0x0 +#define IP_SWPROF30_RST 0x0 +#define IP_SWPROF29_RST 0x0 +#define IP_SWPROF28_RST 0x0 +#define IP_SWPROF27_RST 0x0 +#define IP_SWPROF26_RST 0x0 +#define IP_SWPROF25_RST 0x0 +#define IP_SWPROF24_RST 0x0 +#define IP_SWPROF23_RST 0x0 +#define IP_SWPROF22_RST 0x0 +#define IP_SWPROF21_RST 0x0 +#define IP_SWPROF20_RST 0x0 +#define IP_SWPROF19_RST 0x0 +#define IP_SWPROF18_RST 0x0 +#define IP_SWPROF17_RST 0x0 +#define IP_SWPROF16_RST 0x0 +#define IP_SWPROF15_RST 0x0 +#define IP_SWPROF14_RST 0x0 +#define IP_SWPROF13_RST 0x0 +#define IP_SWPROF12_RST 0x0 +#define IP_SWPROF11_RST 0x0 +#define IP_SWPROF10_RST 0x0 +#define IP_SWPROF9_RST 0x0 +#define IP_SWPROF8_RST 0x0 +#define IP_SWPROF7_RST 0x0 +#define IP_SWPROF6_RST 0x0 +#define IP_SWPROF5_RST 0x0 +#define IP_SWPROF4_RST 0x0 +#define IP_SWPROF3_RST 0x0 +#define IP_SWPROF2_RST 0x0 +#define IP_SWPROF1_RST 0x0 +#define IP_SWPROF0_RST 0x0 + +__INLINE void ip_swprofiling_pack(uint8_t swprof31, uint8_t swprof30, uint8_t swprof29, uint8_t swprof28, uint8_t swprof27, uint8_t swprof26, uint8_t swprof25, uint8_t swprof24, uint8_t swprof23, uint8_t swprof22, uint8_t swprof21, uint8_t swprof20, uint8_t swprof19, uint8_t swprof18, uint8_t swprof17, uint8_t swprof16, uint8_t swprof15, uint8_t swprof14, uint8_t swprof13, uint8_t swprof12, uint8_t swprof11, uint8_t swprof10, uint8_t swprof9, uint8_t swprof8, uint8_t swprof7, uint8_t swprof6, uint8_t swprof5, uint8_t swprof4, uint8_t swprof3, uint8_t swprof2, uint8_t swprof1, uint8_t swprof0) +{ + ASSERT_ERR((((uint32_t)swprof31 << 31) & ~((uint32_t)0x80000000)) == 0); + ASSERT_ERR((((uint32_t)swprof30 << 30) & ~((uint32_t)0x40000000)) == 0); + ASSERT_ERR((((uint32_t)swprof29 << 29) & ~((uint32_t)0x20000000)) == 0); + ASSERT_ERR((((uint32_t)swprof28 << 28) & ~((uint32_t)0x10000000)) == 0); + ASSERT_ERR((((uint32_t)swprof27 << 27) & ~((uint32_t)0x08000000)) == 0); + ASSERT_ERR((((uint32_t)swprof26 << 26) & ~((uint32_t)0x04000000)) == 0); + ASSERT_ERR((((uint32_t)swprof25 << 25) & ~((uint32_t)0x02000000)) == 0); + ASSERT_ERR((((uint32_t)swprof24 << 24) & ~((uint32_t)0x01000000)) == 0); + ASSERT_ERR((((uint32_t)swprof23 << 23) & ~((uint32_t)0x00800000)) == 0); + ASSERT_ERR((((uint32_t)swprof22 << 22) & ~((uint32_t)0x00400000)) == 0); + ASSERT_ERR((((uint32_t)swprof21 << 21) & ~((uint32_t)0x00200000)) == 0); + ASSERT_ERR((((uint32_t)swprof20 << 20) & ~((uint32_t)0x00100000)) == 0); + ASSERT_ERR((((uint32_t)swprof19 << 19) & ~((uint32_t)0x00080000)) == 0); + ASSERT_ERR((((uint32_t)swprof18 << 18) & ~((uint32_t)0x00040000)) == 0); + ASSERT_ERR((((uint32_t)swprof17 << 17) & ~((uint32_t)0x00020000)) == 0); + ASSERT_ERR((((uint32_t)swprof16 << 16) & ~((uint32_t)0x00010000)) == 0); + ASSERT_ERR((((uint32_t)swprof15 << 15) & ~((uint32_t)0x00008000)) == 0); + ASSERT_ERR((((uint32_t)swprof14 << 14) & ~((uint32_t)0x00004000)) == 0); + ASSERT_ERR((((uint32_t)swprof13 << 13) & ~((uint32_t)0x00002000)) == 0); + ASSERT_ERR((((uint32_t)swprof12 << 12) & ~((uint32_t)0x00001000)) == 0); + ASSERT_ERR((((uint32_t)swprof11 << 11) & ~((uint32_t)0x00000800)) == 0); + ASSERT_ERR((((uint32_t)swprof10 << 10) & ~((uint32_t)0x00000400)) == 0); + ASSERT_ERR((((uint32_t)swprof9 << 9) & ~((uint32_t)0x00000200)) == 0); + ASSERT_ERR((((uint32_t)swprof8 << 8) & ~((uint32_t)0x00000100)) == 0); + ASSERT_ERR((((uint32_t)swprof7 << 7) & ~((uint32_t)0x00000080)) == 0); + ASSERT_ERR((((uint32_t)swprof6 << 6) & ~((uint32_t)0x00000040)) == 0); + ASSERT_ERR((((uint32_t)swprof5 << 5) & ~((uint32_t)0x00000020)) == 0); + ASSERT_ERR((((uint32_t)swprof4 << 4) & ~((uint32_t)0x00000010)) == 0); + ASSERT_ERR((((uint32_t)swprof3 << 3) & ~((uint32_t)0x00000008)) == 0); + ASSERT_ERR((((uint32_t)swprof2 << 2) & ~((uint32_t)0x00000004)) == 0); + ASSERT_ERR((((uint32_t)swprof1 << 1) & ~((uint32_t)0x00000002)) == 0); + ASSERT_ERR((((uint32_t)swprof0 << 0) & ~((uint32_t)0x00000001)) == 0); + REG_IP_WR(IP_SWPROFILING_ADDR, ((uint32_t)swprof31 << 31) | ((uint32_t)swprof30 << 30) | ((uint32_t)swprof29 << 29) | ((uint32_t)swprof28 << 28) | ((uint32_t)swprof27 << 27) | ((uint32_t)swprof26 << 26) | ((uint32_t)swprof25 << 25) | ((uint32_t)swprof24 << 24) | ((uint32_t)swprof23 << 23) | ((uint32_t)swprof22 << 22) | ((uint32_t)swprof21 << 21) | ((uint32_t)swprof20 << 20) | ((uint32_t)swprof19 << 19) | ((uint32_t)swprof18 << 18) | ((uint32_t)swprof17 << 17) | ((uint32_t)swprof16 << 16) | ((uint32_t)swprof15 << 15) | ((uint32_t)swprof14 << 14) | ((uint32_t)swprof13 << 13) | ((uint32_t)swprof12 << 12) | ((uint32_t)swprof11 << 11) | ((uint32_t)swprof10 << 10) | ((uint32_t)swprof9 << 9) | ((uint32_t)swprof8 << 8) | ((uint32_t)swprof7 << 7) | ((uint32_t)swprof6 << 6) | ((uint32_t)swprof5 << 5) | ((uint32_t)swprof4 << 4) | ((uint32_t)swprof3 << 3) | ((uint32_t)swprof2 << 2) | ((uint32_t)swprof1 << 1) | ((uint32_t)swprof0 << 0)); +} + +__INLINE void ip_swprofiling_unpack(uint8_t* swprof31, uint8_t* swprof30, uint8_t* swprof29, uint8_t* swprof28, uint8_t* swprof27, uint8_t* swprof26, uint8_t* swprof25, uint8_t* swprof24, uint8_t* swprof23, uint8_t* swprof22, uint8_t* swprof21, uint8_t* swprof20, uint8_t* swprof19, uint8_t* swprof18, uint8_t* swprof17, uint8_t* swprof16, uint8_t* swprof15, uint8_t* swprof14, uint8_t* swprof13, uint8_t* swprof12, uint8_t* swprof11, uint8_t* swprof10, uint8_t* swprof9, uint8_t* swprof8, uint8_t* swprof7, uint8_t* swprof6, uint8_t* swprof5, uint8_t* swprof4, uint8_t* swprof3, uint8_t* swprof2, uint8_t* swprof1, uint8_t* swprof0) +{ + uint32_t localVal = REG_IP_RD(IP_SWPROFILING_ADDR); + + *swprof31 = (localVal & ((uint32_t)0x80000000)) >> 31; + *swprof30 = (localVal & ((uint32_t)0x40000000)) >> 30; + *swprof29 = (localVal & ((uint32_t)0x20000000)) >> 29; + *swprof28 = (localVal & ((uint32_t)0x10000000)) >> 28; + *swprof27 = (localVal & ((uint32_t)0x08000000)) >> 27; + *swprof26 = (localVal & ((uint32_t)0x04000000)) >> 26; + *swprof25 = (localVal & ((uint32_t)0x02000000)) >> 25; + *swprof24 = (localVal & ((uint32_t)0x01000000)) >> 24; + *swprof23 = (localVal & ((uint32_t)0x00800000)) >> 23; + *swprof22 = (localVal & ((uint32_t)0x00400000)) >> 22; + *swprof21 = (localVal & ((uint32_t)0x00200000)) >> 21; + *swprof20 = (localVal & ((uint32_t)0x00100000)) >> 20; + *swprof19 = (localVal & ((uint32_t)0x00080000)) >> 19; + *swprof18 = (localVal & ((uint32_t)0x00040000)) >> 18; + *swprof17 = (localVal & ((uint32_t)0x00020000)) >> 17; + *swprof16 = (localVal & ((uint32_t)0x00010000)) >> 16; + *swprof15 = (localVal & ((uint32_t)0x00008000)) >> 15; + *swprof14 = (localVal & ((uint32_t)0x00004000)) >> 14; + *swprof13 = (localVal & ((uint32_t)0x00002000)) >> 13; + *swprof12 = (localVal & ((uint32_t)0x00001000)) >> 12; + *swprof11 = (localVal & ((uint32_t)0x00000800)) >> 11; + *swprof10 = (localVal & ((uint32_t)0x00000400)) >> 10; + *swprof9 = (localVal & ((uint32_t)0x00000200)) >> 9; + *swprof8 = (localVal & ((uint32_t)0x00000100)) >> 8; + *swprof7 = (localVal & ((uint32_t)0x00000080)) >> 7; + *swprof6 = (localVal & ((uint32_t)0x00000040)) >> 6; + *swprof5 = (localVal & ((uint32_t)0x00000020)) >> 5; + *swprof4 = (localVal & ((uint32_t)0x00000010)) >> 4; + *swprof3 = (localVal & ((uint32_t)0x00000008)) >> 3; + *swprof2 = (localVal & ((uint32_t)0x00000004)) >> 2; + *swprof1 = (localVal & ((uint32_t)0x00000002)) >> 1; + *swprof0 = (localVal & ((uint32_t)0x00000001)) >> 0; +} + +__INLINE uint8_t ip_swprofiling_swprof31_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x80000000)) >> 31); +} + +__INLINE void ip_swprofiling_swprof31_setf(uint8_t swprof31) +{ + ASSERT_ERR((((uint32_t)swprof31 << 31) & ~((uint32_t)0x80000000)) == 0); + REG_IP_WR(IP_SWPROFILING_ADDR, (REG_IP_RD(IP_SWPROFILING_ADDR) & ~((uint32_t)0x80000000)) | ((uint32_t)swprof31 << 31)); +} + +__INLINE uint8_t ip_swprofiling_swprof30_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x40000000)) >> 30); +} + +__INLINE void ip_swprofiling_swprof30_setf(uint8_t swprof30) +{ + ASSERT_ERR((((uint32_t)swprof30 << 30) & ~((uint32_t)0x40000000)) == 0); + REG_IP_WR(IP_SWPROFILING_ADDR, (REG_IP_RD(IP_SWPROFILING_ADDR) & ~((uint32_t)0x40000000)) | ((uint32_t)swprof30 << 30)); +} + +__INLINE uint8_t ip_swprofiling_swprof29_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x20000000)) >> 29); +} + +__INLINE void ip_swprofiling_swprof29_setf(uint8_t swprof29) +{ + ASSERT_ERR((((uint32_t)swprof29 << 29) & ~((uint32_t)0x20000000)) == 0); + REG_IP_WR(IP_SWPROFILING_ADDR, (REG_IP_RD(IP_SWPROFILING_ADDR) & ~((uint32_t)0x20000000)) | ((uint32_t)swprof29 << 29)); +} + +__INLINE uint8_t ip_swprofiling_swprof28_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x10000000)) >> 28); +} + +__INLINE void ip_swprofiling_swprof28_setf(uint8_t swprof28) +{ + ASSERT_ERR((((uint32_t)swprof28 << 28) & ~((uint32_t)0x10000000)) == 0); + REG_IP_WR(IP_SWPROFILING_ADDR, (REG_IP_RD(IP_SWPROFILING_ADDR) & ~((uint32_t)0x10000000)) | ((uint32_t)swprof28 << 28)); +} + +__INLINE uint8_t ip_swprofiling_swprof27_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x08000000)) >> 27); +} + +__INLINE void ip_swprofiling_swprof27_setf(uint8_t swprof27) +{ + ASSERT_ERR((((uint32_t)swprof27 << 27) & ~((uint32_t)0x08000000)) == 0); + REG_IP_WR(IP_SWPROFILING_ADDR, (REG_IP_RD(IP_SWPROFILING_ADDR) & ~((uint32_t)0x08000000)) | ((uint32_t)swprof27 << 27)); +} + +__INLINE uint8_t ip_swprofiling_swprof26_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x04000000)) >> 26); +} + +__INLINE void ip_swprofiling_swprof26_setf(uint8_t swprof26) +{ + ASSERT_ERR((((uint32_t)swprof26 << 26) & ~((uint32_t)0x04000000)) == 0); + REG_IP_WR(IP_SWPROFILING_ADDR, (REG_IP_RD(IP_SWPROFILING_ADDR) & ~((uint32_t)0x04000000)) | ((uint32_t)swprof26 << 26)); +} + +__INLINE uint8_t ip_swprofiling_swprof25_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x02000000)) >> 25); +} + +__INLINE void ip_swprofiling_swprof25_setf(uint8_t swprof25) +{ + ASSERT_ERR((((uint32_t)swprof25 << 25) & ~((uint32_t)0x02000000)) == 0); + REG_IP_WR(IP_SWPROFILING_ADDR, (REG_IP_RD(IP_SWPROFILING_ADDR) & ~((uint32_t)0x02000000)) | ((uint32_t)swprof25 << 25)); +} + +__INLINE uint8_t ip_swprofiling_swprof24_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x01000000)) >> 24); +} + +__INLINE void ip_swprofiling_swprof24_setf(uint8_t swprof24) +{ + ASSERT_ERR((((uint32_t)swprof24 << 24) & ~((uint32_t)0x01000000)) == 0); + REG_IP_WR(IP_SWPROFILING_ADDR, (REG_IP_RD(IP_SWPROFILING_ADDR) & ~((uint32_t)0x01000000)) | ((uint32_t)swprof24 << 24)); +} + +__INLINE uint8_t ip_swprofiling_swprof23_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x00800000)) >> 23); +} + +__INLINE void ip_swprofiling_swprof23_setf(uint8_t swprof23) +{ + ASSERT_ERR((((uint32_t)swprof23 << 23) & ~((uint32_t)0x00800000)) == 0); + REG_IP_WR(IP_SWPROFILING_ADDR, (REG_IP_RD(IP_SWPROFILING_ADDR) & ~((uint32_t)0x00800000)) | ((uint32_t)swprof23 << 23)); +} + +__INLINE uint8_t ip_swprofiling_swprof22_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x00400000)) >> 22); +} + +__INLINE void ip_swprofiling_swprof22_setf(uint8_t swprof22) +{ + ASSERT_ERR((((uint32_t)swprof22 << 22) & ~((uint32_t)0x00400000)) == 0); + REG_IP_WR(IP_SWPROFILING_ADDR, (REG_IP_RD(IP_SWPROFILING_ADDR) & ~((uint32_t)0x00400000)) | ((uint32_t)swprof22 << 22)); +} + +__INLINE uint8_t ip_swprofiling_swprof21_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x00200000)) >> 21); +} + +__INLINE void ip_swprofiling_swprof21_setf(uint8_t swprof21) +{ + ASSERT_ERR((((uint32_t)swprof21 << 21) & ~((uint32_t)0x00200000)) == 0); + REG_IP_WR(IP_SWPROFILING_ADDR, (REG_IP_RD(IP_SWPROFILING_ADDR) & ~((uint32_t)0x00200000)) | ((uint32_t)swprof21 << 21)); +} + +__INLINE uint8_t ip_swprofiling_swprof20_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x00100000)) >> 20); +} + +__INLINE void ip_swprofiling_swprof20_setf(uint8_t swprof20) +{ + ASSERT_ERR((((uint32_t)swprof20 << 20) & ~((uint32_t)0x00100000)) == 0); + REG_IP_WR(IP_SWPROFILING_ADDR, (REG_IP_RD(IP_SWPROFILING_ADDR) & ~((uint32_t)0x00100000)) | ((uint32_t)swprof20 << 20)); +} + +__INLINE uint8_t ip_swprofiling_swprof19_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x00080000)) >> 19); +} + +__INLINE void ip_swprofiling_swprof19_setf(uint8_t swprof19) +{ + ASSERT_ERR((((uint32_t)swprof19 << 19) & ~((uint32_t)0x00080000)) == 0); + REG_IP_WR(IP_SWPROFILING_ADDR, (REG_IP_RD(IP_SWPROFILING_ADDR) & ~((uint32_t)0x00080000)) | ((uint32_t)swprof19 << 19)); +} + +__INLINE uint8_t ip_swprofiling_swprof18_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x00040000)) >> 18); +} + +__INLINE void ip_swprofiling_swprof18_setf(uint8_t swprof18) +{ + ASSERT_ERR((((uint32_t)swprof18 << 18) & ~((uint32_t)0x00040000)) == 0); + REG_IP_WR(IP_SWPROFILING_ADDR, (REG_IP_RD(IP_SWPROFILING_ADDR) & ~((uint32_t)0x00040000)) | ((uint32_t)swprof18 << 18)); +} + +__INLINE uint8_t ip_swprofiling_swprof17_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x00020000)) >> 17); +} + +__INLINE void ip_swprofiling_swprof17_setf(uint8_t swprof17) +{ + ASSERT_ERR((((uint32_t)swprof17 << 17) & ~((uint32_t)0x00020000)) == 0); + REG_IP_WR(IP_SWPROFILING_ADDR, (REG_IP_RD(IP_SWPROFILING_ADDR) & ~((uint32_t)0x00020000)) | ((uint32_t)swprof17 << 17)); +} + +__INLINE uint8_t ip_swprofiling_swprof16_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x00010000)) >> 16); +} + +__INLINE void ip_swprofiling_swprof16_setf(uint8_t swprof16) +{ + ASSERT_ERR((((uint32_t)swprof16 << 16) & ~((uint32_t)0x00010000)) == 0); + REG_IP_WR(IP_SWPROFILING_ADDR, (REG_IP_RD(IP_SWPROFILING_ADDR) & ~((uint32_t)0x00010000)) | ((uint32_t)swprof16 << 16)); +} + +__INLINE uint8_t ip_swprofiling_swprof15_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x00008000)) >> 15); +} + +__INLINE void ip_swprofiling_swprof15_setf(uint8_t swprof15) +{ + ASSERT_ERR((((uint32_t)swprof15 << 15) & ~((uint32_t)0x00008000)) == 0); + REG_IP_WR(IP_SWPROFILING_ADDR, (REG_IP_RD(IP_SWPROFILING_ADDR) & ~((uint32_t)0x00008000)) | ((uint32_t)swprof15 << 15)); +} + +__INLINE uint8_t ip_swprofiling_swprof14_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x00004000)) >> 14); +} + +__INLINE void ip_swprofiling_swprof14_setf(uint8_t swprof14) +{ + ASSERT_ERR((((uint32_t)swprof14 << 14) & ~((uint32_t)0x00004000)) == 0); + REG_IP_WR(IP_SWPROFILING_ADDR, (REG_IP_RD(IP_SWPROFILING_ADDR) & ~((uint32_t)0x00004000)) | ((uint32_t)swprof14 << 14)); +} + +__INLINE uint8_t ip_swprofiling_swprof13_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x00002000)) >> 13); +} + +__INLINE void ip_swprofiling_swprof13_setf(uint8_t swprof13) +{ + ASSERT_ERR((((uint32_t)swprof13 << 13) & ~((uint32_t)0x00002000)) == 0); + REG_IP_WR(IP_SWPROFILING_ADDR, (REG_IP_RD(IP_SWPROFILING_ADDR) & ~((uint32_t)0x00002000)) | ((uint32_t)swprof13 << 13)); +} + +__INLINE uint8_t ip_swprofiling_swprof12_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x00001000)) >> 12); +} + +__INLINE void ip_swprofiling_swprof12_setf(uint8_t swprof12) +{ + ASSERT_ERR((((uint32_t)swprof12 << 12) & ~((uint32_t)0x00001000)) == 0); + REG_IP_WR(IP_SWPROFILING_ADDR, (REG_IP_RD(IP_SWPROFILING_ADDR) & ~((uint32_t)0x00001000)) | ((uint32_t)swprof12 << 12)); +} + +__INLINE uint8_t ip_swprofiling_swprof11_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x00000800)) >> 11); +} + +__INLINE void ip_swprofiling_swprof11_setf(uint8_t swprof11) +{ + ASSERT_ERR((((uint32_t)swprof11 << 11) & ~((uint32_t)0x00000800)) == 0); + REG_IP_WR(IP_SWPROFILING_ADDR, (REG_IP_RD(IP_SWPROFILING_ADDR) & ~((uint32_t)0x00000800)) | ((uint32_t)swprof11 << 11)); +} + +__INLINE uint8_t ip_swprofiling_swprof10_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x00000400)) >> 10); +} + +__INLINE void ip_swprofiling_swprof10_setf(uint8_t swprof10) +{ + ASSERT_ERR((((uint32_t)swprof10 << 10) & ~((uint32_t)0x00000400)) == 0); + REG_IP_WR(IP_SWPROFILING_ADDR, (REG_IP_RD(IP_SWPROFILING_ADDR) & ~((uint32_t)0x00000400)) | ((uint32_t)swprof10 << 10)); +} + +__INLINE uint8_t ip_swprofiling_swprof9_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x00000200)) >> 9); +} + +__INLINE void ip_swprofiling_swprof9_setf(uint8_t swprof9) +{ + ASSERT_ERR((((uint32_t)swprof9 << 9) & ~((uint32_t)0x00000200)) == 0); + REG_IP_WR(IP_SWPROFILING_ADDR, (REG_IP_RD(IP_SWPROFILING_ADDR) & ~((uint32_t)0x00000200)) | ((uint32_t)swprof9 << 9)); +} + +__INLINE uint8_t ip_swprofiling_swprof8_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x00000100)) >> 8); +} + +__INLINE void ip_swprofiling_swprof8_setf(uint8_t swprof8) +{ + ASSERT_ERR((((uint32_t)swprof8 << 8) & ~((uint32_t)0x00000100)) == 0); + REG_IP_WR(IP_SWPROFILING_ADDR, (REG_IP_RD(IP_SWPROFILING_ADDR) & ~((uint32_t)0x00000100)) | ((uint32_t)swprof8 << 8)); +} + +__INLINE uint8_t ip_swprofiling_swprof7_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x00000080)) >> 7); +} + +__INLINE void ip_swprofiling_swprof7_setf(uint8_t swprof7) +{ + ASSERT_ERR((((uint32_t)swprof7 << 7) & ~((uint32_t)0x00000080)) == 0); + REG_IP_WR(IP_SWPROFILING_ADDR, (REG_IP_RD(IP_SWPROFILING_ADDR) & ~((uint32_t)0x00000080)) | ((uint32_t)swprof7 << 7)); +} + +__INLINE uint8_t ip_swprofiling_swprof6_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x00000040)) >> 6); +} + +__INLINE void ip_swprofiling_swprof6_setf(uint8_t swprof6) +{ + ASSERT_ERR((((uint32_t)swprof6 << 6) & ~((uint32_t)0x00000040)) == 0); + REG_IP_WR(IP_SWPROFILING_ADDR, (REG_IP_RD(IP_SWPROFILING_ADDR) & ~((uint32_t)0x00000040)) | ((uint32_t)swprof6 << 6)); +} + +__INLINE uint8_t ip_swprofiling_swprof5_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x00000020)) >> 5); +} + +__INLINE void ip_swprofiling_swprof5_setf(uint8_t swprof5) +{ + ASSERT_ERR((((uint32_t)swprof5 << 5) & ~((uint32_t)0x00000020)) == 0); + REG_IP_WR(IP_SWPROFILING_ADDR, (REG_IP_RD(IP_SWPROFILING_ADDR) & ~((uint32_t)0x00000020)) | ((uint32_t)swprof5 << 5)); +} + +__INLINE uint8_t ip_swprofiling_swprof4_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x00000010)) >> 4); +} + +__INLINE void ip_swprofiling_swprof4_setf(uint8_t swprof4) +{ + ASSERT_ERR((((uint32_t)swprof4 << 4) & ~((uint32_t)0x00000010)) == 0); + REG_IP_WR(IP_SWPROFILING_ADDR, (REG_IP_RD(IP_SWPROFILING_ADDR) & ~((uint32_t)0x00000010)) | ((uint32_t)swprof4 << 4)); +} + +__INLINE uint8_t ip_swprofiling_swprof3_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x00000008)) >> 3); +} + +__INLINE void ip_swprofiling_swprof3_setf(uint8_t swprof3) +{ + ASSERT_ERR((((uint32_t)swprof3 << 3) & ~((uint32_t)0x00000008)) == 0); + REG_IP_WR(IP_SWPROFILING_ADDR, (REG_IP_RD(IP_SWPROFILING_ADDR) & ~((uint32_t)0x00000008)) | ((uint32_t)swprof3 << 3)); +} + +__INLINE uint8_t ip_swprofiling_swprof2_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x00000004)) >> 2); +} + +__INLINE void ip_swprofiling_swprof2_setf(uint8_t swprof2) +{ + ASSERT_ERR((((uint32_t)swprof2 << 2) & ~((uint32_t)0x00000004)) == 0); + REG_IP_WR(IP_SWPROFILING_ADDR, (REG_IP_RD(IP_SWPROFILING_ADDR) & ~((uint32_t)0x00000004)) | ((uint32_t)swprof2 << 2)); +} + +__INLINE uint8_t ip_swprofiling_swprof1_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x00000002)) >> 1); +} + +__INLINE void ip_swprofiling_swprof1_setf(uint8_t swprof1) +{ + ASSERT_ERR((((uint32_t)swprof1 << 1) & ~((uint32_t)0x00000002)) == 0); + REG_IP_WR(IP_SWPROFILING_ADDR, (REG_IP_RD(IP_SWPROFILING_ADDR) & ~((uint32_t)0x00000002)) | ((uint32_t)swprof1 << 1)); +} + +__INLINE uint8_t ip_swprofiling_swprof0_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_SWPROFILING_ADDR); + return ((localVal & ((uint32_t)0x00000001)) >> 0); +} + +__INLINE void ip_swprofiling_swprof0_setf(uint8_t swprof0) +{ + ASSERT_ERR((((uint32_t)swprof0 << 0) & ~((uint32_t)0x00000001)) == 0); + REG_IP_WR(IP_SWPROFILING_ADDR, (REG_IP_RD(IP_SWPROFILING_ADDR) & ~((uint32_t)0x00000001)) | ((uint32_t)swprof0 << 0)); +} + +/** + * @brief RADIOCNTL0 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 29:16 SPIPTR 0x0 + * 07 SPICFG 0 + * 05:04 SPIFREQ 0x0 + * 01 SPICOMP 1 + * 00 SPIGO 0 + *+ */ +#define IP_RADIOCNTL0_ADDR BASEBAND_REG_BASE +0x70 // 0x50800070 +#define IP_RADIOCNTL0_OFFSET 0x00000070 +#define IP_RADIOCNTL0_INDEX 0x0000001C +#define IP_RADIOCNTL0_RESET 0x00000002 + +__INLINE uint32_t ip_radiocntl0_get(void) +{ + return REG_IP_RD(IP_RADIOCNTL0_ADDR); +} + +__INLINE void ip_radiocntl0_set(uint32_t value) +{ + REG_IP_WR(IP_RADIOCNTL0_ADDR, value); +} + +// field definitions +#define IP_SPIPTR_MASK ((uint32_t)0x3FFF0000) +#define IP_SPIPTR_LSB 16 +#define IP_SPIPTR_WIDTH ((uint32_t)0x0000000E) +#define IP_SPICFG_BIT ((uint32_t)0x00000080) +#define IP_SPICFG_POS 7 +#define IP_SPIFREQ_MASK ((uint32_t)0x00000030) +#define IP_SPIFREQ_LSB 4 +#define IP_SPIFREQ_WIDTH ((uint32_t)0x00000002) +#define IP_SPICOMP_BIT ((uint32_t)0x00000002) +#define IP_SPICOMP_POS 1 +#define IP_SPIGO_BIT ((uint32_t)0x00000001) +#define IP_SPIGO_POS 0 + +#define IP_SPIPTR_RST 0x0 +#define IP_SPICFG_RST 0x0 +#define IP_SPIFREQ_RST 0x0 +#define IP_SPICOMP_RST 0x1 +#define IP_SPIGO_RST 0x0 + +__INLINE void ip_radiocntl0_pack(uint16_t spiptr, uint8_t spicfg, uint8_t spifreq, uint8_t spigo) +{ + ASSERT_ERR((((uint32_t)spiptr << 16) & ~((uint32_t)0x3FFF0000)) == 0); + ASSERT_ERR((((uint32_t)spicfg << 7) & ~((uint32_t)0x00000080)) == 0); + ASSERT_ERR((((uint32_t)spifreq << 4) & ~((uint32_t)0x00000030)) == 0); + ASSERT_ERR((((uint32_t)spigo << 0) & ~((uint32_t)0x00000001)) == 0); + REG_IP_WR(IP_RADIOCNTL0_ADDR, ((uint32_t)spiptr << 16) | ((uint32_t)spicfg << 7) | ((uint32_t)spifreq << 4) | ((uint32_t)spigo << 0)); +} + +__INLINE void ip_radiocntl0_unpack(uint16_t* spiptr, uint8_t* spicfg, uint8_t* spifreq, uint8_t* spicomp, uint8_t* spigo) +{ + uint32_t localVal = REG_IP_RD(IP_RADIOCNTL0_ADDR); + + *spiptr = (localVal & ((uint32_t)0x3FFF0000)) >> 16; + *spicfg = (localVal & ((uint32_t)0x00000080)) >> 7; + *spifreq = (localVal & ((uint32_t)0x00000030)) >> 4; + *spicomp = (localVal & ((uint32_t)0x00000002)) >> 1; + *spigo = (localVal & ((uint32_t)0x00000001)) >> 0; +} + +__INLINE uint16_t ip_radiocntl0_spiptr_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_RADIOCNTL0_ADDR); + return ((localVal & ((uint32_t)0x3FFF0000)) >> 16); +} + +__INLINE void ip_radiocntl0_spiptr_setf(uint16_t spiptr) +{ + ASSERT_ERR((((uint32_t)spiptr << 16) & ~((uint32_t)0x3FFF0000)) == 0); + REG_IP_WR(IP_RADIOCNTL0_ADDR, (REG_IP_RD(IP_RADIOCNTL0_ADDR) & ~((uint32_t)0x3FFF0000)) | ((uint32_t)spiptr << 16)); +} + +__INLINE uint8_t ip_radiocntl0_spicfg_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_RADIOCNTL0_ADDR); + return ((localVal & ((uint32_t)0x00000080)) >> 7); +} + +__INLINE void ip_radiocntl0_spicfg_setf(uint8_t spicfg) +{ + ASSERT_ERR((((uint32_t)spicfg << 7) & ~((uint32_t)0x00000080)) == 0); + REG_IP_WR(IP_RADIOCNTL0_ADDR, (REG_IP_RD(IP_RADIOCNTL0_ADDR) & ~((uint32_t)0x00000080)) | ((uint32_t)spicfg << 7)); +} + +__INLINE uint8_t ip_radiocntl0_spifreq_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_RADIOCNTL0_ADDR); + return ((localVal & ((uint32_t)0x00000030)) >> 4); +} + +__INLINE void ip_radiocntl0_spifreq_setf(uint8_t spifreq) +{ + ASSERT_ERR((((uint32_t)spifreq << 4) & ~((uint32_t)0x00000030)) == 0); + REG_IP_WR(IP_RADIOCNTL0_ADDR, (REG_IP_RD(IP_RADIOCNTL0_ADDR) & ~((uint32_t)0x00000030)) | ((uint32_t)spifreq << 4)); +} + +__INLINE uint8_t ip_radiocntl0_spicomp_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_RADIOCNTL0_ADDR); + return ((localVal & ((uint32_t)0x00000002)) >> 1); +} + +__INLINE uint8_t ip_radiocntl0_spigo_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_RADIOCNTL0_ADDR); + return ((localVal & ((uint32_t)0x00000001)) >> 0); +} + +__INLINE void ip_radiocntl0_spigo_setf(uint8_t spigo) +{ + ASSERT_ERR((((uint32_t)spigo << 0) & ~((uint32_t)0x00000001)) == 0); + REG_IP_WR(IP_RADIOCNTL0_ADDR, (REG_IP_RD(IP_RADIOCNTL0_ADDR) & ~((uint32_t)0x00000001)) | ((uint32_t)spigo << 0)); +} + +/** + * @brief RADIOCNTL1 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31 FORCEAGC_EN 0 + * 30 FORCEIQ 0 + * 29 RXDNSL 0 + * 28 TXDNSL 0 + * 27:16 FORCEAGC_LENGTH 0x0 + * 15 SYNC_PULSE_MODE 0 + * 14 SYNC_PULSE_SRC 0 + * 13 DPCORR_EN 0 + * 12 JEF_SELECT 0 + * 09:04 XRFSEL 0x0 + * 03:00 SUBVERSION 0x0 + *+ */ +#define IP_RADIOCNTL1_ADDR BASEBAND_REG_BASE +0x74 //0x50800074 +#define IP_RADIOCNTL1_OFFSET 0x00000074 +#define IP_RADIOCNTL1_INDEX 0x0000001D +#define IP_RADIOCNTL1_RESET 0x00000000 + +__INLINE uint32_t ip_radiocntl1_get(void) +{ + return REG_IP_RD(IP_RADIOCNTL1_ADDR); +} + +__INLINE void ip_radiocntl1_set(uint32_t value) +{ + REG_IP_WR(IP_RADIOCNTL1_ADDR, value); +} + +// field definitions +#define IP_FORCEAGC_EN_BIT ((uint32_t)0x80000000) +#define IP_FORCEAGC_EN_POS 31 +#define IP_FORCEIQ_BIT ((uint32_t)0x40000000) +#define IP_FORCEIQ_POS 30 +#define IP_RXDNSL_BIT ((uint32_t)0x20000000) +#define IP_RXDNSL_POS 29 +#define IP_TXDNSL_BIT ((uint32_t)0x10000000) +#define IP_TXDNSL_POS 28 +#define IP_FORCEAGC_LENGTH_MASK ((uint32_t)0x0FFF0000) +#define IP_FORCEAGC_LENGTH_LSB 16 +#define IP_FORCEAGC_LENGTH_WIDTH ((uint32_t)0x0000000C) +#define IP_SYNC_PULSE_MODE_BIT ((uint32_t)0x00008000) +#define IP_SYNC_PULSE_MODE_POS 15 +#define IP_SYNC_PULSE_SRC_BIT ((uint32_t)0x00004000) +#define IP_SYNC_PULSE_SRC_POS 14 +#define IP_DPCORR_EN_BIT ((uint32_t)0x00002000) +#define IP_DPCORR_EN_POS 13 +#define IP_JEF_SELECT_BIT ((uint32_t)0x00001000) +#define IP_JEF_SELECT_POS 12 +#define IP_XRFSEL_MASK ((uint32_t)0x000003F0) +#define IP_XRFSEL_LSB 4 +#define IP_XRFSEL_WIDTH ((uint32_t)0x00000006) +#define IP_SUBVERSION_MASK ((uint32_t)0x0000000F) +#define IP_SUBVERSION_LSB 0 +#define IP_SUBVERSION_WIDTH ((uint32_t)0x00000004) + +#define IP_FORCEAGC_EN_RST 0x0 +#define IP_FORCEIQ_RST 0x0 +#define IP_RXDNSL_RST 0x0 +#define IP_TXDNSL_RST 0x0 +#define IP_FORCEAGC_LENGTH_RST 0x0 +#define IP_SYNC_PULSE_MODE_RST 0x0 +#define IP_SYNC_PULSE_SRC_RST 0x0 +#define IP_DPCORR_EN_RST 0x0 +#define IP_JEF_SELECT_RST 0x0 +#define IP_XRFSEL_RST 0x0 +#define IP_SUBVERSION_RST 0x0 + +__INLINE void ip_radiocntl1_pack(uint8_t forceagcen, uint8_t forceiq, uint8_t rxdnsl, uint8_t txdnsl, uint16_t forceagclength, uint8_t syncpulsemode, uint8_t syncpulsesrc, uint8_t dpcorren, uint8_t jefselect, uint8_t xrfsel, uint8_t subversion) +{ + ASSERT_ERR((((uint32_t)forceagcen << 31) & ~((uint32_t)0x80000000)) == 0); + ASSERT_ERR((((uint32_t)forceiq << 30) & ~((uint32_t)0x40000000)) == 0); + ASSERT_ERR((((uint32_t)rxdnsl << 29) & ~((uint32_t)0x20000000)) == 0); + ASSERT_ERR((((uint32_t)txdnsl << 28) & ~((uint32_t)0x10000000)) == 0); + ASSERT_ERR((((uint32_t)forceagclength << 16) & ~((uint32_t)0x0FFF0000)) == 0); + ASSERT_ERR((((uint32_t)syncpulsemode << 15) & ~((uint32_t)0x00008000)) == 0); + ASSERT_ERR((((uint32_t)syncpulsesrc << 14) & ~((uint32_t)0x00004000)) == 0); + ASSERT_ERR((((uint32_t)dpcorren << 13) & ~((uint32_t)0x00002000)) == 0); + ASSERT_ERR((((uint32_t)jefselect << 12) & ~((uint32_t)0x00001000)) == 0); + ASSERT_ERR((((uint32_t)xrfsel << 4) & ~((uint32_t)0x000003F0)) == 0); + ASSERT_ERR((((uint32_t)subversion << 0) & ~((uint32_t)0x0000000F)) == 0); + REG_IP_WR(IP_RADIOCNTL1_ADDR, ((uint32_t)forceagcen << 31) | ((uint32_t)forceiq << 30) | ((uint32_t)rxdnsl << 29) | ((uint32_t)txdnsl << 28) | ((uint32_t)forceagclength << 16) | ((uint32_t)syncpulsemode << 15) | ((uint32_t)syncpulsesrc << 14) | ((uint32_t)dpcorren << 13) | ((uint32_t)jefselect << 12) | ((uint32_t)xrfsel << 4) | ((uint32_t)subversion << 0)); +} + +__INLINE void ip_radiocntl1_unpack(uint8_t* forceagcen, uint8_t* forceiq, uint8_t* rxdnsl, uint8_t* txdnsl, uint16_t* forceagclength, uint8_t* syncpulsemode, uint8_t* syncpulsesrc, uint8_t* dpcorren, uint8_t* jefselect, uint8_t* xrfsel, uint8_t* subversion) +{ + uint32_t localVal = REG_IP_RD(IP_RADIOCNTL1_ADDR); + + *forceagcen = (localVal & ((uint32_t)0x80000000)) >> 31; + *forceiq = (localVal & ((uint32_t)0x40000000)) >> 30; + *rxdnsl = (localVal & ((uint32_t)0x20000000)) >> 29; + *txdnsl = (localVal & ((uint32_t)0x10000000)) >> 28; + *forceagclength = (localVal & ((uint32_t)0x0FFF0000)) >> 16; + *syncpulsemode = (localVal & ((uint32_t)0x00008000)) >> 15; + *syncpulsesrc = (localVal & ((uint32_t)0x00004000)) >> 14; + *dpcorren = (localVal & ((uint32_t)0x00002000)) >> 13; + *jefselect = (localVal & ((uint32_t)0x00001000)) >> 12; + *xrfsel = (localVal & ((uint32_t)0x000003F0)) >> 4; + *subversion = (localVal & ((uint32_t)0x0000000F)) >> 0; +} + +__INLINE uint8_t ip_radiocntl1_forceagc_en_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_RADIOCNTL1_ADDR); + return ((localVal & ((uint32_t)0x80000000)) >> 31); +} + +__INLINE void ip_radiocntl1_forceagc_en_setf(uint8_t forceagcen) +{ + ASSERT_ERR((((uint32_t)forceagcen << 31) & ~((uint32_t)0x80000000)) == 0); + REG_IP_WR(IP_RADIOCNTL1_ADDR, (REG_IP_RD(IP_RADIOCNTL1_ADDR) & ~((uint32_t)0x80000000)) | ((uint32_t)forceagcen << 31)); +} + +__INLINE uint8_t ip_radiocntl1_forceiq_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_RADIOCNTL1_ADDR); + return ((localVal & ((uint32_t)0x40000000)) >> 30); +} + +__INLINE void ip_radiocntl1_forceiq_setf(uint8_t forceiq) +{ + ASSERT_ERR((((uint32_t)forceiq << 30) & ~((uint32_t)0x40000000)) == 0); + REG_IP_WR(IP_RADIOCNTL1_ADDR, (REG_IP_RD(IP_RADIOCNTL1_ADDR) & ~((uint32_t)0x40000000)) | ((uint32_t)forceiq << 30)); +} + +__INLINE uint8_t ip_radiocntl1_rxdnsl_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_RADIOCNTL1_ADDR); + return ((localVal & ((uint32_t)0x20000000)) >> 29); +} + +__INLINE void ip_radiocntl1_rxdnsl_setf(uint8_t rxdnsl) +{ + ASSERT_ERR((((uint32_t)rxdnsl << 29) & ~((uint32_t)0x20000000)) == 0); + REG_IP_WR(IP_RADIOCNTL1_ADDR, (REG_IP_RD(IP_RADIOCNTL1_ADDR) & ~((uint32_t)0x20000000)) | ((uint32_t)rxdnsl << 29)); +} + +__INLINE uint8_t ip_radiocntl1_txdnsl_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_RADIOCNTL1_ADDR); + return ((localVal & ((uint32_t)0x10000000)) >> 28); +} + +__INLINE void ip_radiocntl1_txdnsl_setf(uint8_t txdnsl) +{ + ASSERT_ERR((((uint32_t)txdnsl << 28) & ~((uint32_t)0x10000000)) == 0); + REG_IP_WR(IP_RADIOCNTL1_ADDR, (REG_IP_RD(IP_RADIOCNTL1_ADDR) & ~((uint32_t)0x10000000)) | ((uint32_t)txdnsl << 28)); +} + +__INLINE uint16_t ip_radiocntl1_forceagc_length_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_RADIOCNTL1_ADDR); + return ((localVal & ((uint32_t)0x0FFF0000)) >> 16); +} + +__INLINE void ip_radiocntl1_forceagc_length_setf(uint16_t forceagclength) +{ + ASSERT_ERR((((uint32_t)forceagclength << 16) & ~((uint32_t)0x0FFF0000)) == 0); + REG_IP_WR(IP_RADIOCNTL1_ADDR, (REG_IP_RD(IP_RADIOCNTL1_ADDR) & ~((uint32_t)0x0FFF0000)) | ((uint32_t)forceagclength << 16)); +} + +__INLINE uint8_t ip_radiocntl1_sync_pulse_mode_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_RADIOCNTL1_ADDR); + return ((localVal & ((uint32_t)0x00008000)) >> 15); +} + +__INLINE void ip_radiocntl1_sync_pulse_mode_setf(uint8_t syncpulsemode) +{ + ASSERT_ERR((((uint32_t)syncpulsemode << 15) & ~((uint32_t)0x00008000)) == 0); + REG_IP_WR(IP_RADIOCNTL1_ADDR, (REG_IP_RD(IP_RADIOCNTL1_ADDR) & ~((uint32_t)0x00008000)) | ((uint32_t)syncpulsemode << 15)); +} + +__INLINE uint8_t ip_radiocntl1_sync_pulse_src_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_RADIOCNTL1_ADDR); + return ((localVal & ((uint32_t)0x00004000)) >> 14); +} + +__INLINE void ip_radiocntl1_sync_pulse_src_setf(uint8_t syncpulsesrc) +{ + ASSERT_ERR((((uint32_t)syncpulsesrc << 14) & ~((uint32_t)0x00004000)) == 0); + REG_IP_WR(IP_RADIOCNTL1_ADDR, (REG_IP_RD(IP_RADIOCNTL1_ADDR) & ~((uint32_t)0x00004000)) | ((uint32_t)syncpulsesrc << 14)); +} + +__INLINE uint8_t ip_radiocntl1_dpcorr_en_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_RADIOCNTL1_ADDR); + return ((localVal & ((uint32_t)0x00002000)) >> 13); +} + +__INLINE void ip_radiocntl1_dpcorr_en_setf(uint8_t dpcorren) +{ + ASSERT_ERR((((uint32_t)dpcorren << 13) & ~((uint32_t)0x00002000)) == 0); + REG_IP_WR(IP_RADIOCNTL1_ADDR, (REG_IP_RD(IP_RADIOCNTL1_ADDR) & ~((uint32_t)0x00002000)) | ((uint32_t)dpcorren << 13)); +} + +__INLINE uint8_t ip_radiocntl1_jef_select_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_RADIOCNTL1_ADDR); + return ((localVal & ((uint32_t)0x00001000)) >> 12); +} + +__INLINE void ip_radiocntl1_jef_select_setf(uint8_t jefselect) +{ + ASSERT_ERR((((uint32_t)jefselect << 12) & ~((uint32_t)0x00001000)) == 0); + REG_IP_WR(IP_RADIOCNTL1_ADDR, (REG_IP_RD(IP_RADIOCNTL1_ADDR) & ~((uint32_t)0x00001000)) | ((uint32_t)jefselect << 12)); +} + +__INLINE uint8_t ip_radiocntl1_xrfsel_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_RADIOCNTL1_ADDR); + return ((localVal & ((uint32_t)0x000003F0)) >> 4); +} + +__INLINE void ip_radiocntl1_xrfsel_setf(uint8_t xrfsel) +{ + ASSERT_ERR((((uint32_t)xrfsel << 4) & ~((uint32_t)0x000003F0)) == 0); + REG_IP_WR(IP_RADIOCNTL1_ADDR, (REG_IP_RD(IP_RADIOCNTL1_ADDR) & ~((uint32_t)0x000003F0)) | ((uint32_t)xrfsel << 4)); +} + +__INLINE uint8_t ip_radiocntl1_subversion_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_RADIOCNTL1_ADDR); + return ((localVal & ((uint32_t)0x0000000F)) >> 0); +} + +__INLINE void ip_radiocntl1_subversion_setf(uint8_t subversion) +{ + ASSERT_ERR((((uint32_t)subversion << 0) & ~((uint32_t)0x0000000F)) == 0); + REG_IP_WR(IP_RADIOCNTL1_ADDR, (REG_IP_RD(IP_RADIOCNTL1_ADDR) & ~((uint32_t)0x0000000F)) | ((uint32_t)subversion << 0)); +} + +/** + * @brief AESCNTL register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 01 AES_MODE 0 + * 00 AES_START 0 + *+ */ +#define IP_AESCNTL_ADDR BASEBAND_REG_BASE +0xB0 // 0x508000B0 +#define IP_AESCNTL_OFFSET 0x000000B0 +#define IP_AESCNTL_INDEX 0x0000002C +#define IP_AESCNTL_RESET 0x00000000 + +__INLINE uint32_t ip_aescntl_get(void) +{ + return REG_IP_RD(IP_AESCNTL_ADDR); +} + +__INLINE void ip_aescntl_set(uint32_t value) +{ + REG_IP_WR(IP_AESCNTL_ADDR, value); +} + +// field definitions +#define IP_AES_MODE_BIT ((uint32_t)0x00000002) +#define IP_AES_MODE_POS 1 +#define IP_AES_START_BIT ((uint32_t)0x00000001) +#define IP_AES_START_POS 0 + +#define IP_AES_MODE_RST 0x0 +#define IP_AES_START_RST 0x0 + +__INLINE void ip_aescntl_pack(uint8_t aesmode, uint8_t aesstart) +{ + ASSERT_ERR((((uint32_t)aesmode << 1) & ~((uint32_t)0x00000002)) == 0); + ASSERT_ERR((((uint32_t)aesstart << 0) & ~((uint32_t)0x00000001)) == 0); + REG_IP_WR(IP_AESCNTL_ADDR, ((uint32_t)aesmode << 1) | ((uint32_t)aesstart << 0)); +} + +__INLINE void ip_aescntl_unpack(uint8_t* aesmode, uint8_t* aesstart) +{ + uint32_t localVal = REG_IP_RD(IP_AESCNTL_ADDR); + + *aesmode = (localVal & ((uint32_t)0x00000002)) >> 1; + *aesstart = (localVal & ((uint32_t)0x00000001)) >> 0; +} + +__INLINE uint8_t ip_aescntl_aes_mode_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_AESCNTL_ADDR); + return ((localVal & ((uint32_t)0x00000002)) >> 1); +} + +__INLINE void ip_aescntl_aes_mode_setf(uint8_t aesmode) +{ + ASSERT_ERR((((uint32_t)aesmode << 1) & ~((uint32_t)0x00000002)) == 0); + REG_IP_WR(IP_AESCNTL_ADDR, (REG_IP_RD(IP_AESCNTL_ADDR) & ~((uint32_t)0x00000002)) | ((uint32_t)aesmode << 1)); +} + +__INLINE uint8_t ip_aescntl_aes_start_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_AESCNTL_ADDR); + return ((localVal & ((uint32_t)0x00000001)) >> 0); +} + +__INLINE void ip_aescntl_aes_start_setf(uint8_t aesstart) +{ + ASSERT_ERR((((uint32_t)aesstart << 0) & ~((uint32_t)0x00000001)) == 0); + REG_IP_WR(IP_AESCNTL_ADDR, (REG_IP_RD(IP_AESCNTL_ADDR) & ~((uint32_t)0x00000001)) | ((uint32_t)aesstart << 0)); +} + +/** + * @brief AESKEY31_0 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31:00 AESKEY31_0 0x0 + *+ */ +#define IP_AESKEY31_0_ADDR BASEBAND_REG_BASE +0xB4 //0x508000B4 +#define IP_AESKEY31_0_OFFSET 0x000000B4 +#define IP_AESKEY31_0_INDEX 0x0000002D +#define IP_AESKEY31_0_RESET 0x00000000 + +__INLINE uint32_t ip_aeskey31_0_get(void) +{ + return REG_IP_RD(IP_AESKEY31_0_ADDR); +} + +__INLINE void ip_aeskey31_0_set(uint32_t value) +{ + REG_IP_WR(IP_AESKEY31_0_ADDR, value); +} + +// field definitions +#define IP_AESKEY31_0_MASK ((uint32_t)0xFFFFFFFF) +#define IP_AESKEY31_0_LSB 0 +#define IP_AESKEY31_0_WIDTH ((uint32_t)0x00000020) + +#define IP_AESKEY31_0_RST 0x0 + +__INLINE uint32_t ip_aeskey31_0_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_AESKEY31_0_ADDR); + ASSERT_ERR((localVal & ~((uint32_t)0xFFFFFFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void ip_aeskey31_0_setf(uint32_t aeskey310) +{ + ASSERT_ERR((((uint32_t)aeskey310 << 0) & ~((uint32_t)0xFFFFFFFF)) == 0); + REG_IP_WR(IP_AESKEY31_0_ADDR, (uint32_t)aeskey310 << 0); +} + +/** + * @brief AESKEY63_32 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31:00 AESKEY63_32 0x0 + *+ */ +#define IP_AESKEY63_32_ADDR BASEBAND_REG_BASE +0xB8 // 0x508000B8 +#define IP_AESKEY63_32_OFFSET 0x000000B8 +#define IP_AESKEY63_32_INDEX 0x0000002E +#define IP_AESKEY63_32_RESET 0x00000000 + +__INLINE uint32_t ip_aeskey63_32_get(void) +{ + return REG_IP_RD(IP_AESKEY63_32_ADDR); +} + +__INLINE void ip_aeskey63_32_set(uint32_t value) +{ + REG_IP_WR(IP_AESKEY63_32_ADDR, value); +} + +// field definitions +#define IP_AESKEY63_32_MASK ((uint32_t)0xFFFFFFFF) +#define IP_AESKEY63_32_LSB 0 +#define IP_AESKEY63_32_WIDTH ((uint32_t)0x00000020) + +#define IP_AESKEY63_32_RST 0x0 + +__INLINE uint32_t ip_aeskey63_32_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_AESKEY63_32_ADDR); + ASSERT_ERR((localVal & ~((uint32_t)0xFFFFFFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void ip_aeskey63_32_setf(uint32_t aeskey6332) +{ + ASSERT_ERR((((uint32_t)aeskey6332 << 0) & ~((uint32_t)0xFFFFFFFF)) == 0); + REG_IP_WR(IP_AESKEY63_32_ADDR, (uint32_t)aeskey6332 << 0); +} + +/** + * @brief AESKEY95_64 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31:00 AESKEY95_64 0x0 + *+ */ +#define IP_AESKEY95_64_ADDR BASEBAND_REG_BASE +0xBC //0x508000BC +#define IP_AESKEY95_64_OFFSET 0x000000BC +#define IP_AESKEY95_64_INDEX 0x0000002F +#define IP_AESKEY95_64_RESET 0x00000000 + +__INLINE uint32_t ip_aeskey95_64_get(void) +{ + return REG_IP_RD(IP_AESKEY95_64_ADDR); +} + +__INLINE void ip_aeskey95_64_set(uint32_t value) +{ + REG_IP_WR(IP_AESKEY95_64_ADDR, value); +} + +// field definitions +#define IP_AESKEY95_64_MASK ((uint32_t)0xFFFFFFFF) +#define IP_AESKEY95_64_LSB 0 +#define IP_AESKEY95_64_WIDTH ((uint32_t)0x00000020) + +#define IP_AESKEY95_64_RST 0x0 + +__INLINE uint32_t ip_aeskey95_64_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_AESKEY95_64_ADDR); + ASSERT_ERR((localVal & ~((uint32_t)0xFFFFFFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void ip_aeskey95_64_setf(uint32_t aeskey9564) +{ + ASSERT_ERR((((uint32_t)aeskey9564 << 0) & ~((uint32_t)0xFFFFFFFF)) == 0); + REG_IP_WR(IP_AESKEY95_64_ADDR, (uint32_t)aeskey9564 << 0); +} + +/** + * @brief AESKEY127_96 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31:00 AESKEY127_96 0x0 + *+ */ +#define IP_AESKEY127_96_ADDR BASEBAND_REG_BASE +0xC0 // 0x508000C0 +#define IP_AESKEY127_96_OFFSET 0x000000C0 +#define IP_AESKEY127_96_INDEX 0x00000030 +#define IP_AESKEY127_96_RESET 0x00000000 + +__INLINE uint32_t ip_aeskey127_96_get(void) +{ + return REG_IP_RD(IP_AESKEY127_96_ADDR); +} + +__INLINE void ip_aeskey127_96_set(uint32_t value) +{ + REG_IP_WR(IP_AESKEY127_96_ADDR, value); +} + +// field definitions +#define IP_AESKEY127_96_MASK ((uint32_t)0xFFFFFFFF) +#define IP_AESKEY127_96_LSB 0 +#define IP_AESKEY127_96_WIDTH ((uint32_t)0x00000020) + +#define IP_AESKEY127_96_RST 0x0 + +__INLINE uint32_t ip_aeskey127_96_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_AESKEY127_96_ADDR); + ASSERT_ERR((localVal & ~((uint32_t)0xFFFFFFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void ip_aeskey127_96_setf(uint32_t aeskey12796) +{ + ASSERT_ERR((((uint32_t)aeskey12796 << 0) & ~((uint32_t)0xFFFFFFFF)) == 0); + REG_IP_WR(IP_AESKEY127_96_ADDR, (uint32_t)aeskey12796 << 0); +} + +/** + * @brief AESPTR register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 13:00 AESPTR 0x0 + *+ */ +#define IP_AESPTR_ADDR BASEBAND_REG_BASE +0xC4 //0x508000C4 +#define IP_AESPTR_OFFSET 0x000000C4 +#define IP_AESPTR_INDEX 0x00000031 +#define IP_AESPTR_RESET 0x00000000 + +__INLINE uint32_t ip_aesptr_get(void) +{ + return REG_IP_RD(IP_AESPTR_ADDR); +} + +__INLINE void ip_aesptr_set(uint32_t value) +{ + REG_IP_WR(IP_AESPTR_ADDR, value); +} + +// field definitions +#define IP_AESPTR_MASK ((uint32_t)0x00003FFF) +#define IP_AESPTR_LSB 0 +#define IP_AESPTR_WIDTH ((uint32_t)0x0000000E) + +#define IP_AESPTR_RST 0x0 + +__INLINE uint16_t ip_aesptr_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_AESPTR_ADDR); + ASSERT_ERR((localVal & ~((uint32_t)0x00003FFF)) == 0); + return (localVal >> 0); +} + +__INLINE void ip_aesptr_setf(uint16_t aesptr) +{ + ASSERT_ERR((((uint32_t)aesptr << 0) & ~((uint32_t)0x00003FFF)) == 0); + REG_IP_WR(IP_AESPTR_ADDR, (uint32_t)aesptr << 0); +} + +/** + * @brief TXMICVAL register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31:00 TXMICVAL 0x0 + *+ */ +#define IP_TXMICVAL_ADDR BASEBAND_REG_BASE +0xC8 //0x508000C8 +#define IP_TXMICVAL_OFFSET 0x000000C8 +#define IP_TXMICVAL_INDEX 0x00000032 +#define IP_TXMICVAL_RESET 0x00000000 + +__INLINE uint32_t ip_txmicval_get(void) +{ + return REG_IP_RD(IP_TXMICVAL_ADDR); +} + +// field definitions +#define IP_TXMICVAL_MASK ((uint32_t)0xFFFFFFFF) +#define IP_TXMICVAL_LSB 0 +#define IP_TXMICVAL_WIDTH ((uint32_t)0x00000020) + +#define IP_TXMICVAL_RST 0x0 + +__INLINE uint32_t ip_txmicval_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_TXMICVAL_ADDR); + ASSERT_ERR((localVal & ~((uint32_t)0xFFFFFFFF)) == 0); + return (localVal >> 0); +} + +/** + * @brief RXMICVAL register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31:00 RXMICVAL 0x0 + *+ */ +#define IP_RXMICVAL_ADDR BASEBAND_REG_BASE +0xCC //0x508000CC +#define IP_RXMICVAL_OFFSET 0x000000CC +#define IP_RXMICVAL_INDEX 0x00000033 +#define IP_RXMICVAL_RESET 0x00000000 + +__INLINE uint32_t ip_rxmicval_get(void) +{ + return REG_IP_RD(IP_RXMICVAL_ADDR); +} + +// field definitions +#define IP_RXMICVAL_MASK ((uint32_t)0xFFFFFFFF) +#define IP_RXMICVAL_LSB 0 +#define IP_RXMICVAL_WIDTH ((uint32_t)0x00000020) + +#define IP_RXMICVAL_RST 0x0 + +__INLINE uint32_t ip_rxmicval_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_RXMICVAL_ADDR); + ASSERT_ERR((localVal & ~((uint32_t)0xFFFFFFFF)) == 0); + return (localVal >> 0); +} + +/** + * @brief TIMGENCNTL register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 25:16 PREFETCHABORT_TIME 0x1DF + * 08:00 PREFETCH_TIME 0xBD + *+ */ +#define IP_TIMGENCNTL_ADDR BASEBAND_REG_BASE +0xE0 //0x508000E0 +#define IP_TIMGENCNTL_OFFSET 0x000000E0 +#define IP_TIMGENCNTL_INDEX 0x00000038 +#define IP_TIMGENCNTL_RESET 0x01DF00BD + +__INLINE uint32_t ip_timgencntl_get(void) +{ + return REG_IP_RD(IP_TIMGENCNTL_ADDR); +} + +__INLINE void ip_timgencntl_set(uint32_t value) +{ + REG_IP_WR(IP_TIMGENCNTL_ADDR, value); +} + +// field definitions +#define IP_PREFETCHABORT_TIME_MASK ((uint32_t)0x03FF0000) +#define IP_PREFETCHABORT_TIME_LSB 16 +#define IP_PREFETCHABORT_TIME_WIDTH ((uint32_t)0x0000000A) +#define IP_PREFETCH_TIME_MASK ((uint32_t)0x000001FF) +#define IP_PREFETCH_TIME_LSB 0 +#define IP_PREFETCH_TIME_WIDTH ((uint32_t)0x00000009) + +#define IP_PREFETCHABORT_TIME_RST 0x1DF +#define IP_PREFETCH_TIME_RST 0xBD + +__INLINE void ip_timgencntl_pack(uint16_t prefetchaborttime, uint16_t prefetchtime) +{ + ASSERT_ERR((((uint32_t)prefetchaborttime << 16) & ~((uint32_t)0x03FF0000)) == 0); + ASSERT_ERR((((uint32_t)prefetchtime << 0) & ~((uint32_t)0x000001FF)) == 0); + REG_IP_WR(IP_TIMGENCNTL_ADDR, ((uint32_t)prefetchaborttime << 16) | ((uint32_t)prefetchtime << 0)); +} + +__INLINE void ip_timgencntl_unpack(uint16_t* prefetchaborttime, uint16_t* prefetchtime) +{ + uint32_t localVal = REG_IP_RD(IP_TIMGENCNTL_ADDR); + + *prefetchaborttime = (localVal & ((uint32_t)0x03FF0000)) >> 16; + *prefetchtime = (localVal & ((uint32_t)0x000001FF)) >> 0; +} + +__INLINE uint16_t ip_timgencntl_prefetchabort_time_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_TIMGENCNTL_ADDR); + return ((localVal & ((uint32_t)0x03FF0000)) >> 16); +} + +__INLINE void ip_timgencntl_prefetchabort_time_setf(uint16_t prefetchaborttime) +{ + ASSERT_ERR((((uint32_t)prefetchaborttime << 16) & ~((uint32_t)0x03FF0000)) == 0); + REG_IP_WR(IP_TIMGENCNTL_ADDR, (REG_IP_RD(IP_TIMGENCNTL_ADDR) & ~((uint32_t)0x03FF0000)) | ((uint32_t)prefetchaborttime << 16)); +} + +__INLINE uint16_t ip_timgencntl_prefetch_time_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_TIMGENCNTL_ADDR); + return ((localVal & ((uint32_t)0x000001FF)) >> 0); +} + +__INLINE void ip_timgencntl_prefetch_time_setf(uint16_t prefetchtime) +{ + ASSERT_ERR((((uint32_t)prefetchtime << 0) & ~((uint32_t)0x000001FF)) == 0); + REG_IP_WR(IP_TIMGENCNTL_ADDR, (REG_IP_RD(IP_TIMGENCNTL_ADDR) & ~((uint32_t)0x000001FF)) | ((uint32_t)prefetchtime << 0)); +} + +/** + * @brief FINETIMTGT register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 27:00 FINETARGET 0x0 + *+ */ +#define IP_FINETIMTGT_ADDR BASEBAND_REG_BASE +0xE4 //0x508000E4 +#define IP_FINETIMTGT_OFFSET 0x000000E4 +#define IP_FINETIMTGT_INDEX 0x00000039 +#define IP_FINETIMTGT_RESET 0x00000000 + +__INLINE uint32_t ip_finetimtgt_get(void) +{ + return REG_IP_RD(IP_FINETIMTGT_ADDR); +} + +__INLINE void ip_finetimtgt_set(uint32_t value) +{ + REG_IP_WR(IP_FINETIMTGT_ADDR, value); +} + +// field definitions +#define IP_FINETARGET_MASK ((uint32_t)0x0FFFFFFF) +#define IP_FINETARGET_LSB 0 +#define IP_FINETARGET_WIDTH ((uint32_t)0x0000001C) + +#define IP_FINETARGET_RST 0x0 + +__INLINE uint32_t ip_finetimtgt_finetarget_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_FINETIMTGT_ADDR); + ASSERT_ERR((localVal & ~((uint32_t)0x0FFFFFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void ip_finetimtgt_finetarget_setf(uint32_t finetarget) +{ + ASSERT_ERR((((uint32_t)finetarget << 0) & ~((uint32_t)0x0FFFFFFF)) == 0); + REG_IP_WR(IP_FINETIMTGT_ADDR, (uint32_t)finetarget << 0); +} + +/** + * @brief CLKNTGT1 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 27:00 CLKNTGT1 0x0 + *+ */ +#define IP_CLKNTGT1_ADDR BASEBAND_REG_BASE +0xE8 // 0x508000E8 +#define IP_CLKNTGT1_OFFSET 0x000000E8 +#define IP_CLKNTGT1_INDEX 0x0000003A +#define IP_CLKNTGT1_RESET 0x00000000 + +__INLINE uint32_t ip_clkntgt1_get(void) +{ + return REG_IP_RD(IP_CLKNTGT1_ADDR); +} + +__INLINE void ip_clkntgt1_set(uint32_t value) +{ + REG_IP_WR(IP_CLKNTGT1_ADDR, value); +} + +// field definitions +#define IP_CLKNTGT1_MASK ((uint32_t)0x0FFFFFFF) +#define IP_CLKNTGT1_LSB 0 +#define IP_CLKNTGT1_WIDTH ((uint32_t)0x0000001C) + +#define IP_CLKNTGT1_RST 0x0 + +__INLINE uint32_t ip_clkntgt1_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_CLKNTGT1_ADDR); + ASSERT_ERR((localVal & ~((uint32_t)0x0FFFFFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void ip_clkntgt1_setf(uint32_t clkntgt1) +{ + ASSERT_ERR((((uint32_t)clkntgt1 << 0) & ~((uint32_t)0x0FFFFFFF)) == 0); + REG_IP_WR(IP_CLKNTGT1_ADDR, (uint32_t)clkntgt1 << 0); +} + +/** + * @brief HMICROSECTGT1 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 09:00 HMICROSECTGT1 0x0 + *+ */ +#define IP_HMICROSECTGT1_ADDR BASEBAND_REG_BASE +0xEC //0x508000EC +#define IP_HMICROSECTGT1_OFFSET 0x000000EC +#define IP_HMICROSECTGT1_INDEX 0x0000003B +#define IP_HMICROSECTGT1_RESET 0x00000000 + +__INLINE uint32_t ip_hmicrosectgt1_get(void) +{ + return REG_IP_RD(IP_HMICROSECTGT1_ADDR); +} + +__INLINE void ip_hmicrosectgt1_set(uint32_t value) +{ + REG_IP_WR(IP_HMICROSECTGT1_ADDR, value); +} + +// field definitions +#define IP_HMICROSECTGT1_MASK ((uint32_t)0x000003FF) +#define IP_HMICROSECTGT1_LSB 0 +#define IP_HMICROSECTGT1_WIDTH ((uint32_t)0x0000000A) + +#define IP_HMICROSECTGT1_RST 0x0 + +__INLINE uint16_t ip_hmicrosectgt1_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_HMICROSECTGT1_ADDR); + ASSERT_ERR((localVal & ~((uint32_t)0x000003FF)) == 0); + return (localVal >> 0); +} + +__INLINE void ip_hmicrosectgt1_setf(uint16_t hmicrosectgt1) +{ + ASSERT_ERR((((uint32_t)hmicrosectgt1 << 0) & ~((uint32_t)0x000003FF)) == 0); + REG_IP_WR(IP_HMICROSECTGT1_ADDR, (uint32_t)hmicrosectgt1 << 0); +} + +/** + * @brief CLKNTGT2 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 27:00 CLKNTGT2 0x0 + *+ */ +#define IP_CLKNTGT2_ADDR BASEBAND_REG_BASE +0xF0 //0x508000F0 +#define IP_CLKNTGT2_OFFSET 0x000000F0 +#define IP_CLKNTGT2_INDEX 0x0000003C +#define IP_CLKNTGT2_RESET 0x00000000 + +__INLINE uint32_t ip_clkntgt2_get(void) +{ + return REG_IP_RD(IP_CLKNTGT2_ADDR); +} + +__INLINE void ip_clkntgt2_set(uint32_t value) +{ + REG_IP_WR(IP_CLKNTGT2_ADDR, value); +} + +// field definitions +#define IP_CLKNTGT2_MASK ((uint32_t)0x0FFFFFFF) +#define IP_CLKNTGT2_LSB 0 +#define IP_CLKNTGT2_WIDTH ((uint32_t)0x0000001C) + +#define IP_CLKNTGT2_RST 0x0 + +__INLINE uint32_t ip_clkntgt2_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_CLKNTGT2_ADDR); + ASSERT_ERR((localVal & ~((uint32_t)0x0FFFFFFF)) == 0); + return (localVal >> 0); +} + +__INLINE void ip_clkntgt2_setf(uint32_t clkntgt2) +{ + ASSERT_ERR((((uint32_t)clkntgt2 << 0) & ~((uint32_t)0x0FFFFFFF)) == 0); + REG_IP_WR(IP_CLKNTGT2_ADDR, (uint32_t)clkntgt2 << 0); +} + +/** + * @brief HMICROSECTGT2 register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 09:00 HMICROSECTGT2 0x0 + *+ */ +#define IP_HMICROSECTGT2_ADDR BASEBAND_REG_BASE +0xF4 //0x508000F4 +#define IP_HMICROSECTGT2_OFFSET 0x000000F4 +#define IP_HMICROSECTGT2_INDEX 0x0000003D +#define IP_HMICROSECTGT2_RESET 0x00000000 + +__INLINE uint32_t ip_hmicrosectgt2_get(void) +{ + return REG_IP_RD(IP_HMICROSECTGT2_ADDR); +} + +__INLINE void ip_hmicrosectgt2_set(uint32_t value) +{ + REG_IP_WR(IP_HMICROSECTGT2_ADDR, value); +} + +// field definitions +#define IP_HMICROSECTGT2_MASK ((uint32_t)0x000003FF) +#define IP_HMICROSECTGT2_LSB 0 +#define IP_HMICROSECTGT2_WIDTH ((uint32_t)0x0000000A) + +#define IP_HMICROSECTGT2_RST 0x0 + +__INLINE uint16_t ip_hmicrosectgt2_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_HMICROSECTGT2_ADDR); + ASSERT_ERR((localVal & ~((uint32_t)0x000003FF)) == 0); + return (localVal >> 0); +} + +__INLINE void ip_hmicrosectgt2_setf(uint16_t hmicrosectgt2) +{ + ASSERT_ERR((((uint32_t)hmicrosectgt2 << 0) & ~((uint32_t)0x000003FF)) == 0); + REG_IP_WR(IP_HMICROSECTGT2_ADDR, (uint32_t)hmicrosectgt2 << 0); +} + +/** + * @brief SLOTCLK register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31 SAMP 0 + * 30 CLKN_UPD 0 + * 27:00 SCLK 0x0 + *+ */ +#define IP_SLOTCLK_ADDR BASEBAND_REG_BASE +0xF8 //0x508000F8 +#define IP_SLOTCLK_OFFSET 0x000000F8 +#define IP_SLOTCLK_INDEX 0x0000003E +#define IP_SLOTCLK_RESET 0x00000000 + +__INLINE uint32_t ip_slotclk_get(void) +{ + return REG_IP_RD(IP_SLOTCLK_ADDR); +} + +__INLINE void ip_slotclk_set(uint32_t value) +{ + REG_IP_WR(IP_SLOTCLK_ADDR, value); +} + +// field definitions +#define IP_SAMP_BIT ((uint32_t)0x80000000) +#define IP_SAMP_POS 31 +#define IP_CLKN_UPD_BIT ((uint32_t)0x40000000) +#define IP_CLKN_UPD_POS 30 +#define IP_SCLK_MASK ((uint32_t)0x0FFFFFFF) +#define IP_SCLK_LSB 0 +#define IP_SCLK_WIDTH ((uint32_t)0x0000001C) + +#define IP_SAMP_RST 0x0 +#define IP_CLKN_UPD_RST 0x0 +#define IP_SCLK_RST 0x0 + +__INLINE void ip_slotclk_pack(uint8_t samp, uint8_t clknupd, uint32_t sclk) +{ + ASSERT_ERR((((uint32_t)samp << 31) & ~((uint32_t)0x80000000)) == 0); + ASSERT_ERR((((uint32_t)clknupd << 30) & ~((uint32_t)0x40000000)) == 0); + ASSERT_ERR((((uint32_t)sclk << 0) & ~((uint32_t)0x0FFFFFFF)) == 0); + REG_IP_WR(IP_SLOTCLK_ADDR, ((uint32_t)samp << 31) | ((uint32_t)clknupd << 30) | ((uint32_t)sclk << 0)); +} + +__INLINE void ip_slotclk_unpack(uint8_t* samp, uint8_t* clknupd, uint32_t* sclk) +{ + uint32_t localVal = REG_IP_RD(IP_SLOTCLK_ADDR); + + *samp = (localVal & ((uint32_t)0x80000000)) >> 31; + *clknupd = (localVal & ((uint32_t)0x40000000)) >> 30; + *sclk = (localVal & ((uint32_t)0x0FFFFFFF)) >> 0; +} + +__INLINE uint8_t ip_slotclk_samp_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_SLOTCLK_ADDR); + return ((localVal & ((uint32_t)0x80000000)) >> 31); +} + +__INLINE void ip_slotclk_samp_setf(uint8_t samp) +{ + ASSERT_ERR((((uint32_t)samp << 31) & ~((uint32_t)0x80000000)) == 0); + REG_IP_WR(IP_SLOTCLK_ADDR, (REG_IP_RD(IP_SLOTCLK_ADDR) & ~((uint32_t)0x80000000)) | ((uint32_t)samp << 31)); +} + +__INLINE uint8_t ip_slotclk_clkn_upd_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_SLOTCLK_ADDR); + return ((localVal & ((uint32_t)0x40000000)) >> 30); +} + +__INLINE void ip_slotclk_clkn_upd_setf(uint8_t clknupd) +{ + ASSERT_ERR((((uint32_t)clknupd << 30) & ~((uint32_t)0x40000000)) == 0); + REG_IP_WR(IP_SLOTCLK_ADDR, (REG_IP_RD(IP_SLOTCLK_ADDR) & ~((uint32_t)0x40000000)) | ((uint32_t)clknupd << 30)); +} + +__INLINE uint32_t ip_slotclk_sclk_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_SLOTCLK_ADDR); + return ((localVal & ((uint32_t)0x0FFFFFFF)) >> 0); +} + +__INLINE void ip_slotclk_sclk_setf(uint32_t sclk) +{ + ASSERT_ERR((((uint32_t)sclk << 0) & ~((uint32_t)0x0FFFFFFF)) == 0); + REG_IP_WR(IP_SLOTCLK_ADDR, (REG_IP_RD(IP_SLOTCLK_ADDR) & ~((uint32_t)0x0FFFFFFF)) | ((uint32_t)sclk << 0)); +} + +/** + * @brief FINETIMECNT register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 09:00 FINECNT 0x0 + *+ */ +#define IP_FINETIMECNT_ADDR BASEBAND_REG_BASE +0xFC //0x508000FC +#define IP_FINETIMECNT_OFFSET 0x000000FC +#define IP_FINETIMECNT_INDEX 0x0000003F +#define IP_FINETIMECNT_RESET 0x00000000 + +__INLINE uint32_t ip_finetimecnt_get(void) +{ + return REG_IP_RD(IP_FINETIMECNT_ADDR); +} + +// field definitions +#define IP_FINECNT_MASK ((uint32_t)0x000003FF) +#define IP_FINECNT_LSB 0 +#define IP_FINECNT_WIDTH ((uint32_t)0x0000000A) + +#define IP_FINECNT_RST 0x0 + +__INLINE uint16_t ip_finetimecnt_finecnt_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_FINETIMECNT_ADDR); + ASSERT_ERR((localVal & ~((uint32_t)0x000003FF)) == 0); + return (localVal >> 0); +} + +/** + * @brief ACTSCHCNTL register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31 START_ACT 0 + * 03:00 ENTRY_IDX 0x0 + *+ */ +#define IP_ACTSCHCNTL_ADDR BASEBAND_REG_BASE +0x100 // 0x50800100 +#define IP_ACTSCHCNTL_OFFSET 0x00000100 +#define IP_ACTSCHCNTL_INDEX 0x00000040 +#define IP_ACTSCHCNTL_RESET 0x00000000 + +__INLINE uint32_t ip_actschcntl_get(void) +{ + return REG_IP_RD(IP_ACTSCHCNTL_ADDR); +} + +__INLINE void ip_actschcntl_set(uint32_t value) +{ + REG_IP_WR(IP_ACTSCHCNTL_ADDR, value); +} + +// field definitions +#define IP_START_ACT_BIT ((uint32_t)0x80000000) +#define IP_START_ACT_POS 31 +#define IP_ENTRY_IDX_MASK ((uint32_t)0x0000000F) +#define IP_ENTRY_IDX_LSB 0 +#define IP_ENTRY_IDX_WIDTH ((uint32_t)0x00000004) + +#define IP_START_ACT_RST 0x0 +#define IP_ENTRY_IDX_RST 0x0 + +__INLINE void ip_actschcntl_pack(uint8_t startact, uint8_t entryidx) +{ + ASSERT_ERR((((uint32_t)startact << 31) & ~((uint32_t)0x80000000)) == 0); + ASSERT_ERR((((uint32_t)entryidx << 0) & ~((uint32_t)0x0000000F)) == 0); + REG_IP_WR(IP_ACTSCHCNTL_ADDR, ((uint32_t)startact << 31) | ((uint32_t)entryidx << 0)); +} + +__INLINE void ip_actschcntl_unpack(uint8_t* startact, uint8_t* entryidx) +{ + uint32_t localVal = REG_IP_RD(IP_ACTSCHCNTL_ADDR); + + *startact = (localVal & ((uint32_t)0x80000000)) >> 31; + *entryidx = (localVal & ((uint32_t)0x0000000F)) >> 0; +} + +__INLINE uint8_t ip_actschcntl_start_act_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_ACTSCHCNTL_ADDR); + return ((localVal & ((uint32_t)0x80000000)) >> 31); +} + +__INLINE void ip_actschcntl_start_act_setf(uint8_t startact) +{ + ASSERT_ERR((((uint32_t)startact << 31) & ~((uint32_t)0x80000000)) == 0); + REG_IP_WR(IP_ACTSCHCNTL_ADDR, (REG_IP_RD(IP_ACTSCHCNTL_ADDR) & ~((uint32_t)0x80000000)) | ((uint32_t)startact << 31)); +} + +__INLINE uint8_t ip_actschcntl_entry_idx_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_ACTSCHCNTL_ADDR); + return ((localVal & ((uint32_t)0x0000000F)) >> 0); +} + +__INLINE void ip_actschcntl_entry_idx_setf(uint8_t entryidx) +{ + ASSERT_ERR((((uint32_t)entryidx << 0) & ~((uint32_t)0x0000000F)) == 0); + REG_IP_WR(IP_ACTSCHCNTL_ADDR, (REG_IP_RD(IP_ACTSCHCNTL_ADDR) & ~((uint32_t)0x0000000F)) | ((uint32_t)entryidx << 0)); +} + +/** + * @brief DFANCNTL register definition + *
+ * Bits Field Name Reset Value + * ----- ------------------ ----------- + * 31 BTRXPRIMIDCNTLEN 0 + * 30:24 BTRXPRIMANTID 0x0 + * 23 BTTXPRIMIDCNTLEN 0 + * 22:16 BTTXPRIMANTID 0x0 + * 15 LERXPRIMIDCNTLEN 0 + * 14:08 LERXPRIMANTID 0x0 + * 07 LETXPRIMIDCNTLEN 0 + * 06:00 LETXPRIMANTID 0x0 + *+ */ +#define IP_DFANCNTL_ADDR BASEBAND_REG_BASE +0x184 // 0x50800184 +#define IP_DFANCNTL_OFFSET 0x00000184 +#define IP_DFANCNTL_INDEX 0x00000061 +#define IP_DFANCNTL_RESET 0x00000000 + +__INLINE uint32_t ip_dfancntl_get(void) +{ + return REG_IP_RD(IP_DFANCNTL_ADDR); +} + +__INLINE void ip_dfancntl_set(uint32_t value) +{ + REG_IP_WR(IP_DFANCNTL_ADDR, value); +} + +// field definitions +#define IP_BTRXPRIMIDCNTLEN_BIT ((uint32_t)0x80000000) +#define IP_BTRXPRIMIDCNTLEN_POS 31 +#define IP_BTRXPRIMANTID_MASK ((uint32_t)0x7F000000) +#define IP_BTRXPRIMANTID_LSB 24 +#define IP_BTRXPRIMANTID_WIDTH ((uint32_t)0x00000007) +#define IP_BTTXPRIMIDCNTLEN_BIT ((uint32_t)0x00800000) +#define IP_BTTXPRIMIDCNTLEN_POS 23 +#define IP_BTTXPRIMANTID_MASK ((uint32_t)0x007F0000) +#define IP_BTTXPRIMANTID_LSB 16 +#define IP_BTTXPRIMANTID_WIDTH ((uint32_t)0x00000007) +#define IP_LERXPRIMIDCNTLEN_BIT ((uint32_t)0x00008000) +#define IP_LERXPRIMIDCNTLEN_POS 15 +#define IP_LERXPRIMANTID_MASK ((uint32_t)0x00007F00) +#define IP_LERXPRIMANTID_LSB 8 +#define IP_LERXPRIMANTID_WIDTH ((uint32_t)0x00000007) +#define IP_LETXPRIMIDCNTLEN_BIT ((uint32_t)0x00000080) +#define IP_LETXPRIMIDCNTLEN_POS 7 +#define IP_LETXPRIMANTID_MASK ((uint32_t)0x0000007F) +#define IP_LETXPRIMANTID_LSB 0 +#define IP_LETXPRIMANTID_WIDTH ((uint32_t)0x00000007) + +#define IP_BTRXPRIMIDCNTLEN_RST 0x0 +#define IP_BTRXPRIMANTID_RST 0x0 +#define IP_BTTXPRIMIDCNTLEN_RST 0x0 +#define IP_BTTXPRIMANTID_RST 0x0 +#define IP_LERXPRIMIDCNTLEN_RST 0x0 +#define IP_LERXPRIMANTID_RST 0x0 +#define IP_LETXPRIMIDCNTLEN_RST 0x0 +#define IP_LETXPRIMANTID_RST 0x0 + +__INLINE void ip_dfancntl_pack(uint8_t btrxprimidcntlen, uint8_t btrxprimantid, uint8_t bttxprimidcntlen, uint8_t bttxprimantid, uint8_t lerxprimidcntlen, uint8_t lerxprimantid, uint8_t letxprimidcntlen, uint8_t letxprimantid) +{ + ASSERT_ERR((((uint32_t)btrxprimidcntlen << 31) & ~((uint32_t)0x80000000)) == 0); + ASSERT_ERR((((uint32_t)btrxprimantid << 24) & ~((uint32_t)0x7F000000)) == 0); + ASSERT_ERR((((uint32_t)bttxprimidcntlen << 23) & ~((uint32_t)0x00800000)) == 0); + ASSERT_ERR((((uint32_t)bttxprimantid << 16) & ~((uint32_t)0x007F0000)) == 0); + ASSERT_ERR((((uint32_t)lerxprimidcntlen << 15) & ~((uint32_t)0x00008000)) == 0); + ASSERT_ERR((((uint32_t)lerxprimantid << 8) & ~((uint32_t)0x00007F00)) == 0); + ASSERT_ERR((((uint32_t)letxprimidcntlen << 7) & ~((uint32_t)0x00000080)) == 0); + ASSERT_ERR((((uint32_t)letxprimantid << 0) & ~((uint32_t)0x0000007F)) == 0); + REG_IP_WR(IP_DFANCNTL_ADDR, ((uint32_t)btrxprimidcntlen << 31) | ((uint32_t)btrxprimantid << 24) | ((uint32_t)bttxprimidcntlen << 23) | ((uint32_t)bttxprimantid << 16) | ((uint32_t)lerxprimidcntlen << 15) | ((uint32_t)lerxprimantid << 8) | ((uint32_t)letxprimidcntlen << 7) | ((uint32_t)letxprimantid << 0)); +} + +__INLINE void ip_dfancntl_unpack(uint8_t* btrxprimidcntlen, uint8_t* btrxprimantid, uint8_t* bttxprimidcntlen, uint8_t* bttxprimantid, uint8_t* lerxprimidcntlen, uint8_t* lerxprimantid, uint8_t* letxprimidcntlen, uint8_t* letxprimantid) +{ + uint32_t localVal = REG_IP_RD(IP_DFANCNTL_ADDR); + + *btrxprimidcntlen = (localVal & ((uint32_t)0x80000000)) >> 31; + *btrxprimantid = (localVal & ((uint32_t)0x7F000000)) >> 24; + *bttxprimidcntlen = (localVal & ((uint32_t)0x00800000)) >> 23; + *bttxprimantid = (localVal & ((uint32_t)0x007F0000)) >> 16; + *lerxprimidcntlen = (localVal & ((uint32_t)0x00008000)) >> 15; + *lerxprimantid = (localVal & ((uint32_t)0x00007F00)) >> 8; + *letxprimidcntlen = (localVal & ((uint32_t)0x00000080)) >> 7; + *letxprimantid = (localVal & ((uint32_t)0x0000007F)) >> 0; +} + +__INLINE uint8_t ip_dfancntl_btrxprimidcntlen_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_DFANCNTL_ADDR); + return ((localVal & ((uint32_t)0x80000000)) >> 31); +} + +__INLINE void ip_dfancntl_btrxprimidcntlen_setf(uint8_t btrxprimidcntlen) +{ + ASSERT_ERR((((uint32_t)btrxprimidcntlen << 31) & ~((uint32_t)0x80000000)) == 0); + REG_IP_WR(IP_DFANCNTL_ADDR, (REG_IP_RD(IP_DFANCNTL_ADDR) & ~((uint32_t)0x80000000)) | ((uint32_t)btrxprimidcntlen << 31)); +} + +__INLINE uint8_t ip_dfancntl_btrxprimantid_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_DFANCNTL_ADDR); + return ((localVal & ((uint32_t)0x7F000000)) >> 24); +} + +__INLINE void ip_dfancntl_btrxprimantid_setf(uint8_t btrxprimantid) +{ + ASSERT_ERR((((uint32_t)btrxprimantid << 24) & ~((uint32_t)0x7F000000)) == 0); + REG_IP_WR(IP_DFANCNTL_ADDR, (REG_IP_RD(IP_DFANCNTL_ADDR) & ~((uint32_t)0x7F000000)) | ((uint32_t)btrxprimantid << 24)); +} + +__INLINE uint8_t ip_dfancntl_bttxprimidcntlen_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_DFANCNTL_ADDR); + return ((localVal & ((uint32_t)0x00800000)) >> 23); +} + +__INLINE void ip_dfancntl_bttxprimidcntlen_setf(uint8_t bttxprimidcntlen) +{ + ASSERT_ERR((((uint32_t)bttxprimidcntlen << 23) & ~((uint32_t)0x00800000)) == 0); + REG_IP_WR(IP_DFANCNTL_ADDR, (REG_IP_RD(IP_DFANCNTL_ADDR) & ~((uint32_t)0x00800000)) | ((uint32_t)bttxprimidcntlen << 23)); +} + +__INLINE uint8_t ip_dfancntl_bttxprimantid_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_DFANCNTL_ADDR); + return ((localVal & ((uint32_t)0x007F0000)) >> 16); +} + +__INLINE void ip_dfancntl_bttxprimantid_setf(uint8_t bttxprimantid) +{ + ASSERT_ERR((((uint32_t)bttxprimantid << 16) & ~((uint32_t)0x007F0000)) == 0); + REG_IP_WR(IP_DFANCNTL_ADDR, (REG_IP_RD(IP_DFANCNTL_ADDR) & ~((uint32_t)0x007F0000)) | ((uint32_t)bttxprimantid << 16)); +} + +__INLINE uint8_t ip_dfancntl_lerxprimidcntlen_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_DFANCNTL_ADDR); + return ((localVal & ((uint32_t)0x00008000)) >> 15); +} + +__INLINE void ip_dfancntl_lerxprimidcntlen_setf(uint8_t lerxprimidcntlen) +{ + ASSERT_ERR((((uint32_t)lerxprimidcntlen << 15) & ~((uint32_t)0x00008000)) == 0); + REG_IP_WR(IP_DFANCNTL_ADDR, (REG_IP_RD(IP_DFANCNTL_ADDR) & ~((uint32_t)0x00008000)) | ((uint32_t)lerxprimidcntlen << 15)); +} + +__INLINE uint8_t ip_dfancntl_lerxprimantid_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_DFANCNTL_ADDR); + return ((localVal & ((uint32_t)0x00007F00)) >> 8); +} + +__INLINE void ip_dfancntl_lerxprimantid_setf(uint8_t lerxprimantid) +{ + ASSERT_ERR((((uint32_t)lerxprimantid << 8) & ~((uint32_t)0x00007F00)) == 0); + REG_IP_WR(IP_DFANCNTL_ADDR, (REG_IP_RD(IP_DFANCNTL_ADDR) & ~((uint32_t)0x00007F00)) | ((uint32_t)lerxprimantid << 8)); +} + +__INLINE uint8_t ip_dfancntl_letxprimidcntlen_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_DFANCNTL_ADDR); + return ((localVal & ((uint32_t)0x00000080)) >> 7); +} + +__INLINE void ip_dfancntl_letxprimidcntlen_setf(uint8_t letxprimidcntlen) +{ + ASSERT_ERR((((uint32_t)letxprimidcntlen << 7) & ~((uint32_t)0x00000080)) == 0); + REG_IP_WR(IP_DFANCNTL_ADDR, (REG_IP_RD(IP_DFANCNTL_ADDR) & ~((uint32_t)0x00000080)) | ((uint32_t)letxprimidcntlen << 7)); +} + +__INLINE uint8_t ip_dfancntl_letxprimantid_getf(void) +{ + uint32_t localVal = REG_IP_RD(IP_DFANCNTL_ADDR); + return ((localVal & ((uint32_t)0x0000007F)) >> 0); +} + +__INLINE void ip_dfancntl_letxprimantid_setf(uint8_t letxprimantid) +{ + ASSERT_ERR((((uint32_t)letxprimantid << 0) & ~((uint32_t)0x0000007F)) == 0); + REG_IP_WR(IP_DFANCNTL_ADDR, (REG_IP_RD(IP_DFANCNTL_ADDR) & ~((uint32_t)0x0000007F)) | ((uint32_t)letxprimantid << 0)); +} + + +#endif // _REG_IPCORE_H_ + diff --git a/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Nationstech/ble_library/ns_ble_stack/rfinit/api/rf.h b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Nationstech/ble_library/ns_ble_stack/rfinit/api/rf.h new file mode 100644 index 0000000..26b3229 --- /dev/null +++ b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Nationstech/ble_library/ns_ble_stack/rfinit/api/rf.h @@ -0,0 +1,53 @@ +/** + **************************************************************************************** + * + * @file rf.h + * + * @brief Common header file for all radios. + * + * Copyright (C) RivieraWaves 2009-2015 + * + * + **************************************************************************************** + */ + +#ifndef RF_H_ +#define RF_H_ + +/** + **************************************************************************************** + * @addtogroup RF + * @ingroup DRIVERS + * @brief Common definitions for radio modules. + * + * This module declares the functions and constants that have to be defined for all RF. + * + * @{ + **************************************************************************************** + */ + + +/* + * FUNCTION DECLARATIONS + **************************************************************************************** + */ + +struct rwip_rf_api; // forward declaration to avoid including rw.h + +/** + ***************************************************************************************** + * @brief Initialization of RF. + * + * This function initializes the RF and fills the structure containing the function + * pointers and parameters required by the RW BT stack. + * + * @param[out] api Pointer to the BT RF API structure + * + ***************************************************************************************** + */ +void rf_init(struct rwip_rf_api *api); +void llhwc_phy_prerx(void); + +/// @} RF + +#endif // RF_H_ diff --git a/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Nationstech/ble_library/ns_ble_stack/stack_common/ble_stack_common.h b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Nationstech/ble_library/ns_ble_stack/stack_common/ble_stack_common.h new file mode 100644 index 0000000..9ec01da --- /dev/null +++ b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Nationstech/ble_library/ns_ble_stack/stack_common/ble_stack_common.h @@ -0,0 +1,889 @@ +/** +* Copyright (c) 2025, NSING Technologies Inc. +* +* All rights reserved. +* +* This software is the exclusive property of NSING Technologies Inc. (Hereinafter +* referred to as NSING). This software, and the product of NSING described herein +* (Hereinafter referred to as the Product) are owned by NSING under the laws and treaties +* of the People's Republic of China and other applicable jurisdictions worldwide. +* +* NSING does not grant any license under its patents, copyrights, trademarks, or other +* intellectual property rights. Names and brands of third party may be mentioned or referred +* thereto (if any) for identification purposes only. +* +* NSING reserves the right to make changes, corrections, enhancements, modifications, and +* improvements to this software at any time without notice. Please contact NSING and obtain +* the latest version of this software before placing orders. + +* Although NSING has attempted to provide accurate and reliable information, NSING assumes +* no responsibility for the accuracy and reliability of this software. +* +* It is the responsibility of the user of this software to properly design, program, and test +* the functionality and safety of any application made of this information and any resulting product. +* In no event shall NSING be liable for any direct, indirect, incidental, special,exemplary, or +* consequential damages arising in any way out of the use of this software or the Product. +* +* NSING Products are neither intended nor warranted for usage in systems or equipment, any +* malfunction or failure of which may cause loss of human life, bodily injury or severe property +* damage. Such applications are deemed, "Insecure Usage". +* +* All Insecure Usage shall be made at user's risk. User shall indemnify NSING and hold NSING +* harmless from and against all claims, costs, damages, and other liabilities, arising from or related +* to any customer's Insecure Usage. + +* Any express or implied warranty with regard to this software or the Product, including,but not +* limited to, the warranties of merchantability, fitness for a particular purpose and non-infringement +* are disclaimed to the fullest extent permitted by law. + +* Unless otherwise explicitly permitted by NSING, anyone may not duplicate, modify, transcribe +* or otherwise distribute this software for any purposes, in whole or in part. +* +* NSING products and technologies shall not be used for or incorporated into any products or systems +* whose manufacture, use, or sale is prohibited under any applicable domestic or foreign laws or regulations. +* User shall comply with any applicable export control laws and regulations promulgated and administered by +* the governments of any countries asserting jurisdiction over the parties or transactions. +**/ + + +/** + * @file ble_stack_common.h + * @author NSING Firmware Team + * @version v1.0.4 + * + * @copyright Copyright (c) 2025, NSING Technologies Inc. All rights reserved. + */ +#ifndef __BLE_STACK_COMMON_H_ +#define __BLE_STACK_COMMON_H_ + +#include "rwip.h" +#include "global_var.h" +#include "Typedefine.h" +#include "co_bt_defines.h" +#include "prf.h" +#include "rwip_int.h" + + +#ifdef __cplusplus +extern "C" { +#endif + +/* Configer define ------------------------------------------------------------*/ +#ifndef _PATCH_LATENCY_ +#define _PATCH_LATENCY_ 0 +#endif +#ifndef _PATCH_ENC_RESPONDSE_ +#define _PATCH_ENC_RESPONDSE_ 0 +#endif + +#if ((_PATCH_LATENCY_) || (_PATCH_ENC_RESPONDSE_)) +#define _PATCH_LLD_COM_ 1 +#else +#define _PATCH_LLD_COM_ 0 +#endif + +#ifndef _PATCH_KE_TIMER_SET_ +#define _PATCH_KE_TIMER_SET_ 1 +#endif + +#ifndef _PATCH_KE_MSG_SET_ +#define _PATCH_KE_MSG_SET_ 0 +#endif + +#ifndef _PATCH_MULTI_CON_ +#define _PATCH_MULTI_CON_ 1 +#endif + +#ifndef _3_CONN_ +#define _3_CONN_ 1 +#endif + +/* Private define ------------------------------------------------------------*/ +#define PATCH ((PATCH_Module*)(PATCH_BASE+0x14)) +#define RCC_AHB_PERIPH_PATCH ((uint32_t)0x00000020) + +#define PATCH_REPLACE_ADDR_0 0x00021dd4 //lld_con_start +#define PATCH_REPLACE_ADDR_1 0x00021218 //lld_con_llcp_tx +#define PATCH_REPLACE_ADDR_2 0x00020aec //lld_con_data_len_update +#define PATCH_REPLACE_ADDR_3 0x00020a38 //lld_con_data_flow_set +#define PATCH_REPLACE_ADDR_4 0x000180bC //ke tiemr +#define PATCH_REPLACE_ADDR_5 0x000180C0 //ke tiemr +#define PATCH_REPLACE_ADDR_6 0x000178AC //ke msg +#define PATCH_REPLACE_ADDR_7 0x0001db34 //MULTI_CON +#define PATCH_REPLACE_ADDR_8 0x0001db40 //MULTI_CON +#define PATCH_REPLACE_ADDR_9 0x000261C0 //3_CONN + +#define PATCH_0_FUNC_OFFSET 0x13d1 +#define PATCH_1_FUNC_OFFSET 0x1331 +#define PATCH_2_FUNC_OFFSET 0x12bd +#define PATCH_3_FUNC_OFFSET 0x1219 + +#define np_lld_con_frm_cbk 0x479 +#define np_lld_con_evt_canceled_cbk 0x1a1 +#define np_lld_con_evt_start_cbk 0x1e1 + + + + +#define PATCH_ROM_ADDR_0 (PATCH_REPLACE_ADDR_0 & 0xFFFFFFC0) +#define PATCH_ROM_ADDR_1 (PATCH_REPLACE_ADDR_1 & 0xFFFFFFC0) +#define PATCH_ROM_ADDR_2 (PATCH_REPLACE_ADDR_2 & 0xFFFFFFC0) +#define PATCH_ROM_ADDR_3 (PATCH_REPLACE_ADDR_3 & 0xFFFFFFC0) +#define PATCH_ROM_ADDR_4 (PATCH_REPLACE_ADDR_4 & 0xFFFFFFC0) +#define PATCH_ROM_ADDR_5 (PATCH_REPLACE_ADDR_5 & 0xFFFFFFC0) +#define PATCH_ROM_ADDR_6 (PATCH_REPLACE_ADDR_6 & 0xFFFFFFC0) +#define PATCH_ROM_ADDR_7 (PATCH_REPLACE_ADDR_7 & 0xFFFFFFC0) +#define PATCH_ROM_ADDR_8 (PATCH_REPLACE_ADDR_8 & 0xFFFFFFC0) +#define PATCH_ROM_ADDR_9 (PATCH_REPLACE_ADDR_9 & 0xFFFFFFC0) + +#define PATCH_RAM_ADDR_OFFSET_0 ((PATCH_REPLACE_ADDR_0 & 0x3F) + 0x4) +#define PATCH_RAM_ADDR_OFFSET_1 ((PATCH_REPLACE_ADDR_1 & 0x3F) + 0x4) +#define PATCH_RAM_ADDR_OFFSET_2 ((PATCH_REPLACE_ADDR_2 & 0x3F) + 0xC) //special +#define PATCH_RAM_ADDR_OFFSET_3 ((PATCH_REPLACE_ADDR_3 & 0x3F) + 0x4) +#define PATCH_RAM_ADDR_OFFSET_4 ((PATCH_REPLACE_ADDR_4 & 0x3F) + 4) +#define PATCH_RAM_ADDR_OFFSET_5 ((PATCH_REPLACE_ADDR_5 & 0x3F) + 0) +#define PATCH_RAM_ADDR_OFFSET_6 ((PATCH_REPLACE_ADDR_6 & 0x3F) + 4) +#define PATCH_RAM_ADDR_OFFSET_8 ((PATCH_REPLACE_ADDR_8 & 0x3F) + 0) + +/* Public typedef -----------------------------------------------------------*/ +typedef struct +{ + __IO uint32_t RomAddrx:12; + __IO uint32_t PatchAddrx:10; + uint32_t Reserved:10; + +} PATCHDATAx_Type; + +typedef struct +{ + uint32_t PATCHEN; + PATCHDATAx_Type PATCHDATAx[16]; + +} PATCH_Module; +/* Public define ------------------------------------------------------------*/ +/* Public macro -------------------------------------------------------------*/ +/* Public variables ---------------------------------------------------------*/ + + +#if (_PATCH_LLD_COM_) + +#define np_lld_con_frm_cbk_addr 0x20000D00 +#define np_lld_con_evt_canceled_cbk_addr 0x20000D04 +#define np_lld_con_evt_start_cbk_addr 0x20000D08 + +static __align(64) unsigned char patch_0_Array[0x40] = +{ + 0xff, 0xff, 0xff, 0x07, 0xff, 0x7f, 0x00, 0x00, 0xcc, 0x03, 0x00, 0x20, 0x71, 0x02, 0x00, 0x00, + 0x91, 0xd7, 0x02, 0x00, 0x00, 0x4a, 0x10, 0x47, 0x11, 0x11, 0x11, 0x11, 0x85, 0x00, 0x70, 0x59, + 0x0c, 0x27, 0x0c, 0x46, 0x00, 0x28, 0x7d, 0xd1, 0x00, 0x21, 0x98, 0x20, 0xf5, 0xf7, 0x1e, 0xfe, + 0x70, 0x51, 0x05, 0x00, 0x76, 0xd0, 0x00, 0x20, 0x00, 0x90, 0x03, 0xf0, 0x0f, 0xfe, 0x05, 0x90 +}; +static __align(64) unsigned char patch_1_Array[0x40] = +{ + 0x00, 0x2c, 0xf2, 0xda, 0x00, 0x20, 0x28, 0x60, 0x68, 0x60, 0xa8, 0x60, 0xe8, 0x60, 0x70, 0xbd, + 0x70, 0x47, 0x00, 0x00, 0x10, 0x04, 0x00, 0x20, 0x00, 0x4a, 0x10, 0x47, 0x11, 0x11, 0x11, 0x11, + 0x10, 0x86, 0x01, 0x22, 0x82, 0xf3, 0x10, 0x88, 0x01, 0x9a, 0x24, 0x4b, 0x95, 0x00, 0x5a, 0x59, + 0x00, 0x2a, 0x3f, 0xd0, 0x17, 0x46, 0x80, 0x37, 0x51, 0x62, 0x78, 0x88, 0x08, 0x21, 0x08, 0x43 +}; +static __align(64) unsigned char patch_2_Array[0x40] = +{ + 0xa2, 0x64, 0x43, 0x8f, 0x52, 0x1b, 0x5b, 0x1e, 0x12, 0x01, 0x12, 0x09, 0x43, 0x87, 0x8a, 0x42, + 0xf2, 0xd8, 0x00, 0x22, 0x29, 0x46, 0x01, 0x98, 0x00, 0xf0, 0xd6, 0xff, 0x00, 0x20, 0x86, 0xf3, + 0x10, 0x88, 0x03, 0xb0, 0xf0, 0xbd, 0x00, 0x00, 0x10, 0x04, 0x00, 0x20, 0x38, 0xb5, 0x04, 0x9c, + 0x00, 0x94, 0x01, 0x4c, 0xa0, 0x47, 0x38, 0xbd, 0x11, 0x11, 0x11, 0x11, 0x0a, 0x4c, 0xbd, 0x00 +}; + +static __align(64) unsigned char patch_3_Array[0x40] = +{ + 0x01, 0x22, 0x82, 0xf3, 0x10, 0x88, 0x09, 0x4d, 0x82, 0x00, 0xaa, 0x58, 0x00, 0x2a, 0x09, 0xd0, + 0x70, 0x22, 0x50, 0x43, 0x06, 0x4a, 0x80, 0x18, 0x40, 0x8d, 0x06, 0x4a, 0xc0, 0xb2, 0x52, 0x69, + 0x90, 0x47, 0x03, 0x46, 0x84, 0xf3, 0x10, 0x88, 0x18, 0x46, 0x70, 0xbd, 0x10, 0x04, 0x00, 0x20, + 0x40, 0xc1, 0x02, 0x40, 0x74, 0x02, 0x00, 0x20, 0x00, 0x4a, 0x10, 0x47, 0x11, 0x11, 0x11, 0x11 +}; + + +#define ramcode_array_len 0x17b0 +#define ramcode_array_crc 0x5961 +static __align(0x100) unsigned char lld_con_Array[] ={ +0x40,0xba,0x70,0x47,0xc0,0xba,0x70,0x47,0x30,0xb5,0x0b,0x46,0x01,0x46,0x00,0x20, +0x20,0x22,0x01,0x24,0x09,0xe0,0x0d,0x46,0xd5,0x40,0x9d,0x42,0x05,0xd3,0x1d,0x46, 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+0x8d,0xfc,0x00,0x24,0x20,0x46,0x09,0xb0,0xf0,0xbd,0x00,0x00,0x10,0x04,0x00,0x20, +0x04,0x0d,0x00,0x20,0xa1,0x81,0x00,0x20,0x08,0x0d,0x00,0x20,0xe1,0x81,0x00,0x20, +0x91,0xd7,0x02,0x00,0x50,0xd7,0x02,0x00,0xf8,0x0c,0x00,0x20,0x40,0xc1,0x02,0x40, +0x80,0xc1,0x02,0x40,0x94,0x02,0x00,0x20,0x76,0xd7,0x02,0x00,0x03,0x01,0x00,0x20, +0x8b,0x05,0x00,0x00,0x00,0xc0,0x02,0x40,0xd0,0xe4,0x02,0x00,0x71,0x02,0x00,0x00, +}; + +#endif //(_PATCH_LLD_COM_) +#if (_PATCH_KE_TIMER_SET_) + +static __align(64) unsigned char patch_4_Array[0x40] = +{ + 0x11, 0xd8, 0x0d, 0x49, 0x08, 0x68, 0x49, 0x68, 0x13, 0xf0, 0x08, 0xfb, 0x04, 0x98, 0xef, 0xf7, + 0x8e, 0xff, 0x04, 0x46, 0xc1, 0x88, 0x80, 0x88, 0xff, 0x22, 0xff, 0xf7, 0x9d, 0xfd, 0x20, 0x46, + 0xff, 0xf7, 0x3a, 0xfc, 0xb3, 0xe7, 0x05, 0xb0, 0xf0, 0xbd, 0x00, 0x00, 0xff, 0xff, 0xff, 0x07, + 0xd8, 0x01, 0x00, 0x20, 0xc8, 0x01, 0x00, 0x20, 0x30, 0xd7, 0x02, 0x00, 0x00, 0x4b, 0x18, 0x47 +}; +static __align(64) unsigned char patch_5_Array[0x40] = +{ + 0xfb, 0xfd, 0x06, 0x46, 0x05, 0x20, 0x30, 0x70, 0x75, 0x80, 0x00, 0x99, 0xb1, 0x81, 0x30, 0x1d, + 0x39, 0x46, 0xe5, 0xf7, 0x73, 0xfd, 0x30, 0x46, 0xf9, 0xf7, 0x0e, 0xff, 0x0e, 0x22, 0x29, 0x46, + 0x20, 0x46, 0xff, 0xf7, 0x45, 0xfd, 0x07, 0xb0, 0xf0, 0xbd, 0x00, 0x2e, 0x0c, 0xd0, 0x53, 0x4b, + 0x05, 0x22, 0x03, 0x21, 0x28, 0x46, 0xfd, 0xf7, 0x33, 0xfe, 0x12, 0x22, 0x29, 0x46, 0x20, 0x46, +}; + + +const static __align(4) unsigned char fun_5_Array[] ={ +0xf7,0xb5,0x86,0xb0,0x00,0x20,0x02,0x90,0x5c,0x48,0x15,0x46,0x04,0x69,0x5c,0x48, +0x0e,0x46,0x82,0x42,0x01,0xd9,0x05,0x46,0x02,0xe0,0x00,0x2d,0x00,0xd1,0x01,0x25, +0x00,0x2c,0x08,0xd0,0xa1,0x88,0x06,0x98,0x81,0x42,0x04,0xd1,0xe0,0x88,0xb0,0x42, +0x01,0xd1,0x01,0x20,0x02,0x90,0x53,0x48,0x03,0x90,0x84,0x46,0x06,0x98,0x01,0x04, +0x31,0x43,0x00,0x20,0x00,0x2c,0x1c,0xd0,0x0a,0x0c,0xa7,0x88,0x8b,0xb2,0x97,0x42, +0x07,0xd1,0xe7,0x88,0x9f,0x42,0x04,0xd1,0x00,0x28,0x07,0xd0,0x21,0x68,0x01,0x60, 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+0x04,0xd9,0x15,0x46,0x12,0x68,0xec,0xe7,0x70,0x46,0x41,0x60,0x0a,0x60,0x00,0x2d, +0x01,0xd0,0x29,0x60,0xf0,0xbd,0x70,0x46,0x01,0x60,0xf0,0xbd,0xff,0xff,0xff,0x07, +0x70,0xb5,0x84,0xb0,0x04,0x46,0x0e,0x46,0xef,0xf3,0x10,0x85,0x01,0x20,0x80,0xf3, +0x10,0x88,0x02,0xa8,0xff,0xf7,0x76,0xff,0x85,0xf3,0x10,0x88,0x02,0x98,0x03,0x99, +0x02,0x46,0x00,0x90,0x01,0x91,0xa0,0x1a,0x00,0x01,0x07,0x49,0x00,0x09,0x88,0x42, +0x04,0xd2,0xa2,0x42,0x05,0xd1,0x01,0x98,0x86,0x42,0x02,0xd8,0x01,0x20,0x04,0xb0, +0x70,0xbd,0x00,0x20,0x04,0xb0,0x70,0xbd,0xff,0xff,0xff,0x07,0x30,0xb5,0x83,0xb0, +0x04,0x46,0xef,0xf3,0x10,0x85,0x01,0x20,0x80,0xf3,0x10,0x88,0x68,0x46,0xff,0xf7, +0x51,0xff,0x85,0xf3,0x10,0x88,0x01,0x99,0x00,0x98,0x61,0x60,0x20,0x60,0x03,0xb0, +0x30,0xbd,0x00,0x00, +}; +#endif + +#if (_PATCH_KE_MSG_SET_) +static __align(64) unsigned char patch_6_Array[] = +{ + 0x33,0x1a,0x2a,0x46,0x9a,0x40,0x0a,0x42,0x02,0xd1,0x40,0x1c,0x20,0x28,0xf7,0xd3, + 0x30,0x1a,0x00,0x06,0x80,0x0d,0x00,0x19,0x40,0x68,0x00,0x28,0x00,0xd0,0x80,0x47, + 0x21,0x68,0x00,0x29,0xeb,0xd1,0x70,0xbd,0xf8,0x01,0x00,0x20,0x00,0x49,0x08,0x47, + 0x66,0x66,0x66,0x66,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +}; + +static __align(4) unsigned char fun_6_Array[] ={ +0x10,0xb4,0xef,0xf3,0x10,0x81,0x01,0x22,0x82,0xf3,0x10,0x88,0x13,0x46,0x0a,0x28, +0x04,0xd2,0x06,0x4a,0x83,0x40,0x14,0x68,0x1c,0x43,0x14,0x60,0x01,0x20,0x04,0x4a, +0xc0,0x03,0x10,0x60,0x81,0xf3,0x10,0x88,0x10,0xbc,0x70,0x47,0xf8,0x01,0x00,0x20, +0x00,0xe2,0x00,0xe0,0x40,0xba,0x70,0x47,0xc0,0xba,0x70,0x47, +}; +#endif + +#if (_PATCH_MULTI_CON_) +static __align(64) unsigned char patch_7_Array[] = +{ + 0x4b,0x75,0x00,0x2d,0x05,0xd0,0x39,0x8f,0x00,0x29,0x02,0xd0,0x00,0x99,0x89,0x79, + 0x00,0xe0,0x00,0x21,0x11,0x76,0xfa,0xf7,0x4b,0xf8,0x04,0x4d,0x28,0x59,0xf9,0xf7, + 0xfb,0xfe,0x00,0x20,0x28,0x51,0x05,0xb0,0xf0,0xbd,0x00,0x00,0x00,0x04,0x00,0x20, + 0x07,0x02,0x00,0x00, //0xf0,0xb5,0x0c,0x46,0x93,0xb0,0x09,0x78,0x0b,0x91,0x48,0x22, + 0x38,0xb5,0x04,0x9c,0x00,0x94,0x01,0x4c,0xa0,0x47,0x38,0xbd +}; + +static __align(64) unsigned char patch_8_Array[] = +{ + 0x51,0x43,0xf8,0x4a,0x26,0x46,0x8f,0x18,0x39,0x46,0x20,0x36,0xfd,0x6d,0x70,0x7d, + 0x80,0x31,0x11,0x91,0xc9,0x7f,0xa0,0x37,0x0e,0x91,0x22,0x46,0x39,0x78,0x15,0x32, + 0x0f,0x92,0xf1,0x4a,0x10,0x92,0x03,0x29,0x2b,0xd0,0x00,0x28,0x73,0xd0,0xf1,0x7d, + 0x0f,0x98,0x0c,0xf0,0x0d,0xf8,0x00,0x28,0x6f,0xd0,0x68,0x88,0x69,0x46,0x08,0x83 +}; + +static __align(4) unsigned char fun_8_Array[] ={ +0xf0,0xb5,0x97,0xb0,0x08,0x78,0x0c,0x46,0x0f,0x90,0x00,0x20,0x14,0x90,0x0f,0x98, +0x48,0x21,0x48,0x43,0xfe,0x49,0x22,0x46,0x40,0x18,0x06,0x46,0x80,0x36,0x10,0x90, +0xf1,0x7f,0x00,0x91,0xc5,0x6d,0xa0,0x30,0x16,0x90,0x01,0x78,0x15,0x32,0x27,0x46, +0x12,0x92,0x20,0x37,0xf7,0x4a,0x15,0x92,0x03,0x29,0x2a,0xd0,0x61,0x78,0x3c,0x29, +0x49,0xd0,0x43,0x29,0x47,0xd0,0x78,0x7d,0x00,0x28,0x7d,0xd0,0xf9,0x7d,0x12,0x98, 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+0xbf,0xf8,0x3a,0xe0,0x28,0x7b,0x70,0x71,0x29,0x46,0x0d,0x31,0xb0,0x1d,0x00,0xf0, +0xc2,0xf8,0x30,0x46,0x00,0xf0,0xb4,0xf8,0x3d,0xe0,0x14,0x23,0x3e,0x22,0x00,0x21, +0x2e,0x48,0x00,0xf0,0xa7,0xf8,0x01,0x21,0x06,0x46,0x01,0x70,0x14,0x98,0x00,0x28, +0x0d,0xd0,0x00,0x20,0x70,0x70,0x31,0x71,0x00,0x98,0x70,0x80,0xf8,0x7d,0x82,0x07, +0x09,0xd5,0x71,0x71,0xb0,0x1d,0x05,0x99,0x00,0xf0,0xa5,0xf8,0x0a,0xe0,0x3c,0x20, +0x70,0x70,0x30,0x46,0x1d,0xe0,0xc0,0x07,0xc0,0x0f,0x70,0x71,0xb0,0x1d,0x12,0x99, +0x00,0xf0,0x99,0xf8,0xe0,0x8b,0xb0,0x81,0x20,0x8c,0xf0,0x81,0x60,0x8c,0x30,0x82, +0xb8,0x7a,0xb0,0x74,0x30,0x46,0x00,0xf0,0x83,0xf8,0x06,0x23,0x3e,0x22,0x00,0x21, +0x16,0x48,0x00,0xf0,0x77,0xf8,0x14,0x21,0x01,0x70,0x00,0x99,0x41,0x80,0xb9,0x7d, +0x01,0x71,0x00,0xf0,0x75,0xf8,0x15,0x98,0x80,0x7e,0x02,0x28,0x26,0xd1,0x60,0x78, +0x14,0x99,0x08,0x43,0x22,0xd0,0x08,0x23,0x3e,0x22,0x00,0x21,0x0b,0x48,0x00,0xf0, +0x61,0xf8,0x12,0x21,0x01,0x70,0x61,0x78,0x41,0x70,0x29,0x78,0x81,0x70,0x0f,0xe0, +0x40,0x04,0x00,0x20,0xc0,0x06,0x00,0x20,0x0a,0x20,0x00,0x00,0x39,0x20,0x00,0x00, +0x40,0x06,0x00,0x20,0x00,0x06,0x00,0x20,0xb1,0xa2,0x01,0x00,0x04,0x11,0x00,0x00, +0x00,0x99,0x81,0x80,0x39,0x7e,0x81,0x71,0x00,0xf0,0x4a,0xf8,0x00,0x20,0x17,0xb0, +0xf0,0xbd,0x00,0x00,0x40,0xba,0x70,0x47,0xc0,0xba,0x70,0x47,0x03,0xb4,0x01,0x48, +0x01,0x90,0x01,0xbd,0x91,0x9b,0x02,0x00,0x03,0xb4,0x01,0x48,0x01,0x90,0x01,0xbd, +0xe1,0x98,0x02,0x00,0x03,0xb4,0x01,0x48,0x01,0x90,0x01,0xbd,0x7d,0x9f,0x02,0x00, +0x03,0xb4,0x01,0x48,0x01,0x90,0x01,0xbd,0x49,0xfa,0x01,0x00,0x03,0xb4,0x01,0x48, +0x01,0x90,0x01,0xbd,0x09,0xd3,0x01,0x00,0x03,0xb4,0x01,0x48,0x01,0x90,0x01,0xbd, +0x6d,0x5b,0x02,0x00,0x03,0xb4,0x01,0x48,0x01,0x90,0x01,0xbd,0x3d,0x99,0x02,0x00, +0x03,0xb4,0x01,0x48,0x01,0x90,0x01,0xbd,0xe1,0x90,0x02,0x00,0x03,0xb4,0x01,0x48, +0x01,0x90,0x01,0xbd,0x55,0x07,0x01,0x00,0x03,0xb4,0x01,0x48,0x01,0x90,0x01,0xbd, +0xd5,0x9c,0x02,0x00,0x03,0xb4,0x01,0x48,0x01,0x90,0x01,0xbd,0x39,0x7b,0x01,0x00, +0x03,0xb4,0x01,0x48,0x01,0x90,0x01,0xbd,0x79,0x6d,0x01,0x00,0x00,0x21,0x01,0x80, +0x41,0x80,0x81,0x80,0x70,0x47,0x0a,0x78,0x02,0x70,0x4b,0x78,0x43,0x70,0x8a,0x78, +0x82,0x70,0xca,0x78,0xc2,0x70,0x0b,0x79,0x03,0x71,0x4a,0x79,0x42,0x71,0x70,0x47, +0x0a,0x68,0x02,0x60,0x0b,0x79,0x03,0x71,0x70,0x47,0x00,0x00, +}; +#endif + +#if (_3_CONN_) +static __align(64) unsigned char patch_9_Array[] = +{ + 0x49,0x7b,0x41,0x70,0x05,0x70,0xf1,0xf7,0xf3,0xfc,0x20,0x68,0xf1,0xf7,0xa4,0xfb, + 0x25,0x60,0x03,0xb0,0xf0,0xbd,0x00,0x00,0x24,0x00,0x00,0x20,0x00,0x80,0x02,0x40, + 0x80,0xc1,0x02,0x40,0x06,0x02,0x00,0x00,0xf8,0xb5,0x4e,0x78,0x48,0x21,0xf0,0xb2, + 0x48,0x43,0x23,0x49,0x21,0x4d,0x41,0x18,0x0c,0x46,0xaa,0x7e,0xa0,0x34,0x00,0x27 +}; +#endif + +/* Public function prototypes -----------------------------------------------*/ + +static __inline void patchx_enable(uint32_t patch_num, uint32_t dst_addr, uint32_t src_addr) +{ + if(patch_num >= 16) + return; + PATCH->PATCHDATAx[patch_num].RomAddrx = dst_addr >> 6; + PATCH->PATCHDATAx[patch_num].PatchAddrx = src_addr >> 6; + PATCH->PATCHEN |= 1<< patch_num; +} + + + +extern void RCC_EnableAHBPeriphClk(uint32_t RCC_AHBPeriph, FunctionalState Cmd); +static __inline void NS_BLE_PATCH_INIT(void) +{ + RCC_EnableAHBPeriphClk(RCC_AHB_PERIPH_PATCH, ENABLE); + + #if (_PATCH_LLD_COM_) + REG32(np_lld_con_frm_cbk_addr) = (uint32_t)lld_con_Array + np_lld_con_frm_cbk; + REG32(np_lld_con_evt_canceled_cbk_addr) = (uint32_t)lld_con_Array + np_lld_con_evt_canceled_cbk; + REG32(np_lld_con_evt_start_cbk_addr) = (uint32_t)lld_con_Array + np_lld_con_evt_start_cbk; + + //patch 0 + REG32(patch_0_Array+PATCH_RAM_ADDR_OFFSET_0) = (uint32_t)lld_con_Array+PATCH_0_FUNC_OFFSET; + patchx_enable(0, PATCH_ROM_ADDR_0, (uint32_t)patch_0_Array); + + //patch 1 + REG32(patch_1_Array+PATCH_RAM_ADDR_OFFSET_1) = (uint32_t)lld_con_Array+PATCH_1_FUNC_OFFSET; + patchx_enable(1, PATCH_ROM_ADDR_1, (uint32_t)patch_1_Array); + + //patch 2 + REG32(patch_2_Array+PATCH_RAM_ADDR_OFFSET_2) = (uint32_t)lld_con_Array+PATCH_2_FUNC_OFFSET; + patchx_enable(2, PATCH_ROM_ADDR_2, (uint32_t)patch_2_Array); + + //patch 3 + REG32(patch_3_Array+PATCH_RAM_ADDR_OFFSET_3) = (uint32_t)lld_con_Array+PATCH_3_FUNC_OFFSET; + patchx_enable(3, PATCH_ROM_ADDR_3, (uint32_t)patch_3_Array); + #endif //(_PATCH_LATENCY_) + + #if (_PATCH_KE_TIMER_SET_) + patchx_enable(4, PATCH_ROM_ADDR_4, (uint32_t)patch_4_Array); + REG32(patch_5_Array+PATCH_RAM_ADDR_OFFSET_5) = (uint32_t)fun_5_Array+1; + patchx_enable(5, PATCH_ROM_ADDR_5, (uint32_t)patch_5_Array); + #endif + + #if (_PATCH_KE_MSG_SET_) + REG32(patch_6_Array+PATCH_RAM_ADDR_OFFSET_6) = (uint32_t)fun_6_Array+1; + patchx_enable(6, PATCH_ROM_ADDR_6, (uint32_t)patch_6_Array); + #endif + + #if (_PATCH_MULTI_CON_) + patchx_enable(7, PATCH_ROM_ADDR_7, (uint32_t)patch_7_Array); + REG32(patch_8_Array+PATCH_RAM_ADDR_OFFSET_8) = (uint32_t)fun_8_Array+1; + patchx_enable(8, PATCH_ROM_ADDR_8, (uint32_t)patch_8_Array); + #endif + + #if (_3_CONN_) + patchx_enable(9, PATCH_ROM_ADDR_9, (uint32_t)patch_9_Array); + #endif +} + + +static __inline void NS_BLE_STACK_INIT() +{ + PWR->VTOR_REG = 0; + g_modem_flag = MODEM_CHIP; + g_app_init_branch = false; + g_clock_src = HSI_CLK; + g_system_hsi_clk = HSI_VALUE; + g_cal_hsi_cnt_value = HSI_64M_VAL; + g_delay_div_param = 79; + g_delay_us_div_param = 8; + llm_local_le_feats.feats[0] = 0xff; + llm_local_le_feats.feats[1] = 0xff; + llm_local_le_feats.feats[2] = 0xff; + llm_local_le_feats.feats[3] = 0x07; + llm_local_le_feats.feats[4] = 0x00; + llm_local_le_feats.feats[5] = 0x00; + llm_local_le_feats.feats[6] = 0x00; + llm_local_le_feats.feats[7] = 0x00; + REG32(0x200000dc) =(uint32_t) prf_add_profile; + REG32(0x200000e0) =(uint32_t) prf_get_task_from_id; + REG32(0x200000e4) =(uint32_t) prf_get_id_from_task; + rwip_init(RESET_NO_ERROR); + +} + + +#ifdef __cplusplus +} +#endif + +#endif /* __BLE_STACK_COMMON_H_*/ + + diff --git a/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Nationstech/ble_library/ns_ble_stack/stack_common/global_func.h b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Nationstech/ble_library/ns_ble_stack/stack_common/global_func.h new file mode 100644 index 0000000..ff5f860 --- /dev/null +++ b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Nationstech/ble_library/ns_ble_stack/stack_common/global_func.h @@ -0,0 +1,150 @@ +/** +* Copyright (c) 2025, NSING Technologies Inc. +* +* All rights reserved. +* +* This software is the exclusive property of NSING Technologies Inc. (Hereinafter +* referred to as NSING). This software, and the product of NSING described herein +* (Hereinafter referred to as the Product) are owned by NSING under the laws and treaties +* of the People's Republic of China and other applicable jurisdictions worldwide. +* +* NSING does not grant any license under its patents, copyrights, trademarks, or other +* intellectual property rights. Names and brands of third party may be mentioned or referred +* thereto (if any) for identification purposes only. +* +* NSING reserves the right to make changes, corrections, enhancements, modifications, and +* improvements to this software at any time without notice. Please contact NSING and obtain +* the latest version of this software before placing orders. + +* Although NSING has attempted to provide accurate and reliable information, NSING assumes +* no responsibility for the accuracy and reliability of this software. +* +* It is the responsibility of the user of this software to properly design, program, and test +* the functionality and safety of any application made of this information and any resulting product. +* In no event shall NSING be liable for any direct, indirect, incidental, special,exemplary, or +* consequential damages arising in any way out of the use of this software or the Product. +* +* NSING Products are neither intended nor warranted for usage in systems or equipment, any +* malfunction or failure of which may cause loss of human life, bodily injury or severe property +* damage. Such applications are deemed, "Insecure Usage". +* +* All Insecure Usage shall be made at user's risk. User shall indemnify NSING and hold NSING +* harmless from and against all claims, costs, damages, and other liabilities, arising from or related +* to any customer's Insecure Usage. + +* Any express or implied warranty with regard to this software or the Product, including,but not +* limited to, the warranties of merchantability, fitness for a particular purpose and non-infringement +* are disclaimed to the fullest extent permitted by law. + +* Unless otherwise explicitly permitted by NSING, anyone may not duplicate, modify, transcribe +* or otherwise distribute this software for any purposes, in whole or in part. +* +* NSING products and technologies shall not be used for or incorporated into any products or systems +* whose manufacture, use, or sale is prohibited under any applicable domestic or foreign laws or regulations. +* User shall comply with any applicable export control laws and regulations promulgated and administered by +* the governments of any countries asserting jurisdiction over the parties or transactions. +**/ + + +/** + * @file global_func.h + * @author NSING Firmware Team + * @version v1.0.4 + * + * @copyright Copyright (c) 2025, NSING Technologies Inc. All rights reserved. + */ + +/* Includes ------------------------------------------------------------------*/ +#include
+ BaseType_t xCoRoutineCreate( + crCOROUTINE_CODE pxCoRoutineCode, + UBaseType_t uxPriority, + UBaseType_t uxIndex + );+ * + * Create a new co-routine and add it to the list of co-routines that are + * ready to run. + * + * @param pxCoRoutineCode Pointer to the co-routine function. Co-routine + * functions require special syntax - see the co-routine section of the WEB + * documentation for more information. + * + * @param uxPriority The priority with respect to other co-routines at which + * the co-routine will run. + * + * @param uxIndex Used to distinguish between different co-routines that + * execute the same function. See the example below and the co-routine section + * of the WEB documentation for further information. + * + * @return pdPASS if the co-routine was successfully created and added to a ready + * list, otherwise an error code defined with ProjDefs.h. + * + * Example usage: +
+ // Co-routine to be created.
+ void vFlashCoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
+ {
+ // Variables in co-routines must be declared static if they must maintain value across a blocking call.
+ // This may not be necessary for const variables.
+ static const char cLedToFlash[ 2 ] = { 5, 6 };
+ static const TickType_t uxFlashRates[ 2 ] = { 200, 400 };
+
+ // Must start every co-routine with a call to crSTART();
+ crSTART( xHandle );
+
+ for( ;; )
+ {
+ // This co-routine just delays for a fixed period, then toggles
+ // an LED. Two co-routines are created using this function, so
+ // the uxIndex parameter is used to tell the co-routine which
+ // LED to flash and how int32_t to delay. This assumes xQueue has
+ // already been created.
+ vParTestToggleLED( cLedToFlash[ uxIndex ] );
+ crDELAY( xHandle, uxFlashRates[ uxIndex ] );
+ }
+
+ // Must end every co-routine with a call to crEND();
+ crEND();
+ }
+
+ // Function that creates two co-routines.
+ void vOtherFunction( void )
+ {
+ uint8_t ucParameterToPass;
+ TaskHandle_t xHandle;
+
+ // Create two co-routines at priority 0. The first is given index 0
+ // so (from the code above) toggles LED 5 every 200 ticks. The second
+ // is given index 1 so toggles LED 6 every 400 ticks.
+ for( uxIndex = 0; uxIndex < 2; uxIndex++ )
+ {
+ xCoRoutineCreate( vFlashCoRoutine, 0, uxIndex );
+ }
+ }
+
+ * \defgroup xCoRoutineCreate xCoRoutineCreate
+ * \ingroup Tasks
+ */
+BaseType_t xCoRoutineCreate( crCOROUTINE_CODE pxCoRoutineCode, UBaseType_t uxPriority, UBaseType_t uxIndex );
+
+
+/**
+ * croutine. h
+ *+ void vCoRoutineSchedule( void );+ * + * Run a co-routine. + * + * vCoRoutineSchedule() executes the highest priority co-routine that is able + * to run. The co-routine will execute until it either blocks, yields or is + * preempted by a task. Co-routines execute cooperatively so one + * co-routine cannot be preempted by another, but can be preempted by a task. + * + * If an application comprises of both tasks and co-routines then + * vCoRoutineSchedule should be called from the idle task (in an idle task + * hook). + * + * Example usage: +
+ // This idle task hook will schedule a co-routine each time it is called.
+ // The rest of the idle task will execute between co-routine calls.
+ void vApplicationIdleHook( void )
+ {
+ vCoRoutineSchedule();
+ }
+
+ // Alternatively, if you do not require any other part of the idle task to
+ // execute, the idle task hook can call vCoRoutineScheduler() within an
+ // infinite loop.
+ void vApplicationIdleHook( void )
+ {
+ for( ;; )
+ {
+ vCoRoutineSchedule();
+ }
+ }
+
+ * \defgroup vCoRoutineSchedule vCoRoutineSchedule
+ * \ingroup Tasks
+ */
+void vCoRoutineSchedule( void );
+
+/**
+ * croutine. h
+ * + crSTART( CoRoutineHandle_t xHandle );+ * + * This macro MUST always be called at the start of a co-routine function. + * + * Example usage: +
+ // Co-routine to be created.
+ void vACoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
+ {
+ // Variables in co-routines must be declared static if they must maintain value across a blocking call.
+ static int32_t ulAVariable;
+
+ // Must start every co-routine with a call to crSTART();
+ crSTART( xHandle );
+
+ for( ;; )
+ {
+ // Co-routine functionality goes here.
+ }
+
+ // Must end every co-routine with a call to crEND();
+ crEND();
+ }
+ * \defgroup crSTART crSTART
+ * \ingroup Tasks
+ */
+#define crSTART( pxCRCB ) switch( ( ( CRCB_t * )( pxCRCB ) )->uxState ) { case 0:
+
+/**
+ * croutine. h
+ * + crEND();+ * + * This macro MUST always be called at the end of a co-routine function. + * + * Example usage: +
+ // Co-routine to be created.
+ void vACoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
+ {
+ // Variables in co-routines must be declared static if they must maintain value across a blocking call.
+ static int32_t ulAVariable;
+
+ // Must start every co-routine with a call to crSTART();
+ crSTART( xHandle );
+
+ for( ;; )
+ {
+ // Co-routine functionality goes here.
+ }
+
+ // Must end every co-routine with a call to crEND();
+ crEND();
+ }
+ * \defgroup crSTART crSTART
+ * \ingroup Tasks
+ */
+#define crEND() }
+
+/*
+ * These macros are intended for internal use by the co-routine implementation
+ * only. The macros should not be used directly by application writers.
+ */
+#define crSET_STATE0( xHandle ) ( ( CRCB_t * )( xHandle ) )->uxState = (__LINE__ * 2); return; case (__LINE__ * 2):
+#define crSET_STATE1( xHandle ) ( ( CRCB_t * )( xHandle ) )->uxState = ((__LINE__ * 2)+1); return; case ((__LINE__ * 2)+1):
+
+/**
+ * croutine. h
+ *+ crDELAY( CoRoutineHandle_t xHandle, TickType_t xTicksToDelay );+ * + * Delay a co-routine for a fixed period of time. + * + * crDELAY can only be called from the co-routine function itself - not + * from within a function called by the co-routine function. This is because + * co-routines do not maintain their own stack. + * + * @param xHandle The handle of the co-routine to delay. This is the xHandle + * parameter of the co-routine function. + * + * @param xTickToDelay The number of ticks that the co-routine should delay + * for. The actual amount of time this equates to is defined by + * configTICK_RATE_HZ (set in FreeRTOSConfig.h). The constant portTICK_PERIOD_MS + * can be used to convert ticks to milliseconds. + * + * Example usage: +
+ // Co-routine to be created.
+ void vACoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
+ {
+ // Variables in co-routines must be declared static if they must maintain value across a blocking call.
+ // This may not be necessary for const variables.
+ // We are to delay for 200ms.
+ static const xTickType xDelayTime = 200 / portTICK_PERIOD_MS;
+
+ // Must start every co-routine with a call to crSTART();
+ crSTART( xHandle );
+
+ for( ;; )
+ {
+ // Delay for 200ms.
+ crDELAY( xHandle, xDelayTime );
+
+ // Do something here.
+ }
+
+ // Must end every co-routine with a call to crEND();
+ crEND();
+ }
+ * \defgroup crDELAY crDELAY
+ * \ingroup Tasks
+ */
+#define crDELAY( xHandle, xTicksToDelay ) \
+ if( ( xTicksToDelay ) > 0 ) \
+ { \
+ vCoRoutineAddToDelayedList( ( xTicksToDelay ), NULL ); \
+ } \
+ crSET_STATE0( ( xHandle ) );
+
+/**
+ * + crQUEUE_SEND( + CoRoutineHandle_t xHandle, + QueueHandle_t pxQueue, + void *pvItemToQueue, + TickType_t xTicksToWait, + BaseType_t *pxResult + )+ * + * The macro's crQUEUE_SEND() and crQUEUE_RECEIVE() are the co-routine + * equivalent to the xQueueSend() and xQueueReceive() functions used by tasks. + * + * crQUEUE_SEND and crQUEUE_RECEIVE can only be used from a co-routine whereas + * xQueueSend() and xQueueReceive() can only be used from tasks. + * + * crQUEUE_SEND can only be called from the co-routine function itself - not + * from within a function called by the co-routine function. This is because + * co-routines do not maintain their own stack. + * + * See the co-routine section of the WEB documentation for information on + * passing data between tasks and co-routines and between ISR's and + * co-routines. + * + * @param xHandle The handle of the calling co-routine. This is the xHandle + * parameter of the co-routine function. + * + * @param pxQueue The handle of the queue on which the data will be posted. + * The handle is obtained as the return value when the queue is created using + * the xQueueCreate() API function. + * + * @param pvItemToQueue A pointer to the data being posted onto the queue. + * The number of bytes of each queued item is specified when the queue is + * created. This number of bytes is copied from pvItemToQueue into the queue + * itself. + * + * @param xTickToDelay The number of ticks that the co-routine should block + * to wait for space to become available on the queue, should space not be + * available immediately. The actual amount of time this equates to is defined + * by configTICK_RATE_HZ (set in FreeRTOSConfig.h). The constant + * portTICK_PERIOD_MS can be used to convert ticks to milliseconds (see example + * below). + * + * @param pxResult The variable pointed to by pxResult will be set to pdPASS if + * data was successfully posted onto the queue, otherwise it will be set to an + * error defined within ProjDefs.h. + * + * Example usage: +
+ // Co-routine function that blocks for a fixed period then posts a number onto
+ // a queue.
+ static void prvCoRoutineFlashTask( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
+ {
+ // Variables in co-routines must be declared static if they must maintain value across a blocking call.
+ static BaseType_t xNumberToPost = 0;
+ static BaseType_t xResult;
+
+ // Co-routines must begin with a call to crSTART().
+ crSTART( xHandle );
+
+ for( ;; )
+ {
+ // This assumes the queue has already been created.
+ crQUEUE_SEND( xHandle, xCoRoutineQueue, &xNumberToPost, NO_DELAY, &xResult );
+
+ if( xResult != pdPASS )
+ {
+ // The message was not posted!
+ }
+
+ // Increment the number to be posted onto the queue.
+ xNumberToPost++;
+
+ // Delay for 100 ticks.
+ crDELAY( xHandle, 100 );
+ }
+
+ // Co-routines must end with a call to crEND().
+ crEND();
+ }
+ * \defgroup crQUEUE_SEND crQUEUE_SEND
+ * \ingroup Tasks
+ */
+#define crQUEUE_SEND( xHandle, pxQueue, pvItemToQueue, xTicksToWait, pxResult ) \
+{ \
+ *( pxResult ) = xQueueCRSend( ( pxQueue) , ( pvItemToQueue) , ( xTicksToWait ) ); \
+ if( *( pxResult ) == errQUEUE_BLOCKED ) \
+ { \
+ crSET_STATE0( ( xHandle ) ); \
+ *pxResult = xQueueCRSend( ( pxQueue ), ( pvItemToQueue ), 0 ); \
+ } \
+ if( *pxResult == errQUEUE_YIELD ) \
+ { \
+ crSET_STATE1( ( xHandle ) ); \
+ *pxResult = pdPASS; \
+ } \
+}
+
+/**
+ * croutine. h
+ * + crQUEUE_RECEIVE( + CoRoutineHandle_t xHandle, + QueueHandle_t pxQueue, + void *pvBuffer, + TickType_t xTicksToWait, + BaseType_t *pxResult + )+ * + * The macro's crQUEUE_SEND() and crQUEUE_RECEIVE() are the co-routine + * equivalent to the xQueueSend() and xQueueReceive() functions used by tasks. + * + * crQUEUE_SEND and crQUEUE_RECEIVE can only be used from a co-routine whereas + * xQueueSend() and xQueueReceive() can only be used from tasks. + * + * crQUEUE_RECEIVE can only be called from the co-routine function itself - not + * from within a function called by the co-routine function. This is because + * co-routines do not maintain their own stack. + * + * See the co-routine section of the WEB documentation for information on + * passing data between tasks and co-routines and between ISR's and + * co-routines. + * + * @param xHandle The handle of the calling co-routine. This is the xHandle + * parameter of the co-routine function. + * + * @param pxQueue The handle of the queue from which the data will be received. + * The handle is obtained as the return value when the queue is created using + * the xQueueCreate() API function. + * + * @param pvBuffer The buffer into which the received item is to be copied. + * The number of bytes of each queued item is specified when the queue is + * created. This number of bytes is copied into pvBuffer. + * + * @param xTickToDelay The number of ticks that the co-routine should block + * to wait for data to become available from the queue, should data not be + * available immediately. The actual amount of time this equates to is defined + * by configTICK_RATE_HZ (set in FreeRTOSConfig.h). The constant + * portTICK_PERIOD_MS can be used to convert ticks to milliseconds (see the + * crQUEUE_SEND example). + * + * @param pxResult The variable pointed to by pxResult will be set to pdPASS if + * data was successfully retrieved from the queue, otherwise it will be set to + * an error code as defined within ProjDefs.h. + * + * Example usage: +
+ // A co-routine receives the number of an LED to flash from a queue. It
+ // blocks on the queue until the number is received.
+ static void prvCoRoutineFlashWorkTask( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
+ {
+ // Variables in co-routines must be declared static if they must maintain value across a blocking call.
+ static BaseType_t xResult;
+ static UBaseType_t uxLEDToFlash;
+
+ // All co-routines must start with a call to crSTART().
+ crSTART( xHandle );
+
+ for( ;; )
+ {
+ // Wait for data to become available on the queue.
+ crQUEUE_RECEIVE( xHandle, xCoRoutineQueue, &uxLEDToFlash, portMAX_DELAY, &xResult );
+
+ if( xResult == pdPASS )
+ {
+ // We received the LED to flash - flash it!
+ vParTestToggleLED( uxLEDToFlash );
+ }
+ }
+
+ crEND();
+ }
+ * \defgroup crQUEUE_RECEIVE crQUEUE_RECEIVE
+ * \ingroup Tasks
+ */
+#define crQUEUE_RECEIVE( xHandle, pxQueue, pvBuffer, xTicksToWait, pxResult ) \
+{ \
+ *( pxResult ) = xQueueCRReceive( ( pxQueue) , ( pvBuffer ), ( xTicksToWait ) ); \
+ if( *( pxResult ) == errQUEUE_BLOCKED ) \
+ { \
+ crSET_STATE0( ( xHandle ) ); \
+ *( pxResult ) = xQueueCRReceive( ( pxQueue) , ( pvBuffer ), 0 ); \
+ } \
+ if( *( pxResult ) == errQUEUE_YIELD ) \
+ { \
+ crSET_STATE1( ( xHandle ) ); \
+ *( pxResult ) = pdPASS; \
+ } \
+}
+
+/**
+ * croutine. h
+ * + crQUEUE_SEND_FROM_ISR( + QueueHandle_t pxQueue, + void *pvItemToQueue, + BaseType_t xCoRoutinePreviouslyWoken + )+ * + * The macro's crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() are the + * co-routine equivalent to the xQueueSendFromISR() and xQueueReceiveFromISR() + * functions used by tasks. + * + * crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() can only be used to + * pass data between a co-routine and and ISR, whereas xQueueSendFromISR() and + * xQueueReceiveFromISR() can only be used to pass data between a task and and + * ISR. + * + * crQUEUE_SEND_FROM_ISR can only be called from an ISR to send data to a queue + * that is being used from within a co-routine. + * + * See the co-routine section of the WEB documentation for information on + * passing data between tasks and co-routines and between ISR's and + * co-routines. + * + * @param xQueue The handle to the queue on which the item is to be posted. + * + * @param pvItemToQueue A pointer to the item that is to be placed on the + * queue. The size of the items the queue will hold was defined when the + * queue was created, so this many bytes will be copied from pvItemToQueue + * into the queue storage area. + * + * @param xCoRoutinePreviouslyWoken This is included so an ISR can post onto + * the same queue multiple times from a single interrupt. The first call + * should always pass in pdFALSE. Subsequent calls should pass in + * the value returned from the previous call. + * + * @return pdTRUE if a co-routine was woken by posting onto the queue. This is + * used by the ISR to determine if a context switch may be required following + * the ISR. + * + * Example usage: +
+ // A co-routine that blocks on a queue waiting for characters to be received.
+ static void vReceivingCoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
+ {
+ char cRxedChar;
+ BaseType_t xResult;
+
+ // All co-routines must start with a call to crSTART().
+ crSTART( xHandle );
+
+ for( ;; )
+ {
+ // Wait for data to become available on the queue. This assumes the
+ // queue xCommsRxQueue has already been created!
+ crQUEUE_RECEIVE( xHandle, xCommsRxQueue, &uxLEDToFlash, portMAX_DELAY, &xResult );
+
+ // Was a character received?
+ if( xResult == pdPASS )
+ {
+ // Process the character here.
+ }
+ }
+
+ // All co-routines must end with a call to crEND().
+ crEND();
+ }
+
+ // An ISR that uses a queue to send characters received on a serial port to
+ // a co-routine.
+ void vUART_ISR( void )
+ {
+ char cRxedChar;
+ BaseType_t xCRWokenByPost = pdFALSE;
+
+ // We loop around reading characters until there are none left in the UART.
+ while( UART_RX_REG_NOT_EMPTY() )
+ {
+ // Obtain the character from the UART.
+ cRxedChar = UART_RX_REG;
+
+ // Post the character onto a queue. xCRWokenByPost will be pdFALSE
+ // the first time around the loop. If the post causes a co-routine
+ // to be woken (unblocked) then xCRWokenByPost will be set to pdTRUE.
+ // In this manner we can ensure that if more than one co-routine is
+ // blocked on the queue only one is woken by this ISR no matter how
+ // many characters are posted to the queue.
+ xCRWokenByPost = crQUEUE_SEND_FROM_ISR( xCommsRxQueue, &cRxedChar, xCRWokenByPost );
+ }
+ }
+ * \defgroup crQUEUE_SEND_FROM_ISR crQUEUE_SEND_FROM_ISR
+ * \ingroup Tasks
+ */
+#define crQUEUE_SEND_FROM_ISR( pxQueue, pvItemToQueue, xCoRoutinePreviouslyWoken ) xQueueCRSendFromISR( ( pxQueue ), ( pvItemToQueue ), ( xCoRoutinePreviouslyWoken ) )
+
+
+/**
+ * croutine. h
+ * + crQUEUE_SEND_FROM_ISR( + QueueHandle_t pxQueue, + void *pvBuffer, + BaseType_t * pxCoRoutineWoken + )+ * + * The macro's crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() are the + * co-routine equivalent to the xQueueSendFromISR() and xQueueReceiveFromISR() + * functions used by tasks. + * + * crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() can only be used to + * pass data between a co-routine and and ISR, whereas xQueueSendFromISR() and + * xQueueReceiveFromISR() can only be used to pass data between a task and and + * ISR. + * + * crQUEUE_RECEIVE_FROM_ISR can only be called from an ISR to receive data + * from a queue that is being used from within a co-routine (a co-routine + * posted to the queue). + * + * See the co-routine section of the WEB documentation for information on + * passing data between tasks and co-routines and between ISR's and + * co-routines. + * + * @param xQueue The handle to the queue on which the item is to be posted. + * + * @param pvBuffer A pointer to a buffer into which the received item will be + * placed. The size of the items the queue will hold was defined when the + * queue was created, so this many bytes will be copied from the queue into + * pvBuffer. + * + * @param pxCoRoutineWoken A co-routine may be blocked waiting for space to become + * available on the queue. If crQUEUE_RECEIVE_FROM_ISR causes such a + * co-routine to unblock *pxCoRoutineWoken will get set to pdTRUE, otherwise + * *pxCoRoutineWoken will remain unchanged. + * + * @return pdTRUE an item was successfully received from the queue, otherwise + * pdFALSE. + * + * Example usage: +
+ // A co-routine that posts a character to a queue then blocks for a fixed
+ // period. The character is incremented each time.
+ static void vSendingCoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
+ {
+ // cChar holds its value while this co-routine is blocked and must therefore
+ // be declared static.
+ static char cCharToTx = 'a';
+ BaseType_t xResult;
+
+ // All co-routines must start with a call to crSTART().
+ crSTART( xHandle );
+
+ for( ;; )
+ {
+ // Send the next character to the queue.
+ crQUEUE_SEND( xHandle, xCoRoutineQueue, &cCharToTx, NO_DELAY, &xResult );
+
+ if( xResult == pdPASS )
+ {
+ // The character was successfully posted to the queue.
+ }
+ else
+ {
+ // Could not post the character to the queue.
+ }
+
+ // Enable the UART Tx interrupt to cause an interrupt in this
+ // hypothetical UART. The interrupt will obtain the character
+ // from the queue and send it.
+ ENABLE_RX_INTERRUPT();
+
+ // Increment to the next character then block for a fixed period.
+ // cCharToTx will maintain its value across the delay as it is
+ // declared static.
+ cCharToTx++;
+ if( cCharToTx > 'x' )
+ {
+ cCharToTx = 'a';
+ }
+ crDELAY( 100 );
+ }
+
+ // All co-routines must end with a call to crEND().
+ crEND();
+ }
+
+ // An ISR that uses a queue to receive characters to send on a UART.
+ void vUART_ISR( void )
+ {
+ char cCharToTx;
+ BaseType_t xCRWokenByPost = pdFALSE;
+
+ while( UART_TX_REG_EMPTY() )
+ {
+ // Are there any characters in the queue waiting to be sent?
+ // xCRWokenByPost will automatically be set to pdTRUE if a co-routine
+ // is woken by the post - ensuring that only a single co-routine is
+ // woken no matter how many times we go around this loop.
+ if( crQUEUE_RECEIVE_FROM_ISR( pxQueue, &cCharToTx, &xCRWokenByPost ) )
+ {
+ SEND_CHARACTER( cCharToTx );
+ }
+ }
+ }
+ * \defgroup crQUEUE_RECEIVE_FROM_ISR crQUEUE_RECEIVE_FROM_ISR
+ * \ingroup Tasks
+ */
+#define crQUEUE_RECEIVE_FROM_ISR( pxQueue, pvBuffer, pxCoRoutineWoken ) xQueueCRReceiveFromISR( ( pxQueue ), ( pvBuffer ), ( pxCoRoutineWoken ) )
+
+/*
+ * This function is intended for internal use by the co-routine macros only.
+ * The macro nature of the co-routine implementation requires that the
+ * prototype appears here. The function should not be used by application
+ * writers.
+ *
+ * Removes the current co-routine from its ready list and places it in the
+ * appropriate delayed list.
+ */
+void vCoRoutineAddToDelayedList( TickType_t xTicksToDelay, List_t *pxEventList );
+
+/*
+ * This function is intended for internal use by the queue implementation only.
+ * The function should not be used by application writers.
+ *
+ * Removes the highest priority co-routine from the event list and places it in
+ * the pending ready list.
+ */
+BaseType_t xCoRoutineRemoveFromEventList( const List_t *pxEventList );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* CO_ROUTINE_H */
diff --git a/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h
new file mode 100644
index 0000000..fb4910f
--- /dev/null
+++ b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h
@@ -0,0 +1,279 @@
+/*
+ * FreeRTOS Kernel V10.0.1
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+#ifndef DEPRECATED_DEFINITIONS_H
+#define DEPRECATED_DEFINITIONS_H
+
+
+/* Each FreeRTOS port has a unique portmacro.h header file. Originally a
+pre-processor definition was used to ensure the pre-processor found the correct
+portmacro.h file for the port being used. That scheme was deprecated in favour
+of setting the compiler's include path such that it found the correct
+portmacro.h file - removing the need for the constant and allowing the
+portmacro.h file to be located anywhere in relation to the port being used. The
+definitions below remain in the code for backward compatibility only. New
+projects should not use them. */
+
+#ifdef OPEN_WATCOM_INDUSTRIAL_PC_PORT
+ #include "..\..\Source\portable\owatcom\16bitdos\pc\portmacro.h"
+ typedef void ( __interrupt __far *pxISR )();
+#endif
+
+#ifdef OPEN_WATCOM_FLASH_LITE_186_PORT
+ #include "..\..\Source\portable\owatcom\16bitdos\flsh186\portmacro.h"
+ typedef void ( __interrupt __far *pxISR )();
+#endif
+
+#ifdef GCC_MEGA_AVR
+ #include "../portable/GCC/ATMega323/portmacro.h"
+#endif
+
+#ifdef IAR_MEGA_AVR
+ #include "../portable/IAR/ATMega323/portmacro.h"
+#endif
+
+#ifdef MPLAB_PIC24_PORT
+ #include "../../Source/portable/MPLAB/PIC24_dsPIC/portmacro.h"
+#endif
+
+#ifdef MPLAB_DSPIC_PORT
+ #include "../../Source/portable/MPLAB/PIC24_dsPIC/portmacro.h"
+#endif
+
+#ifdef MPLAB_PIC18F_PORT
+ #include "../../Source/portable/MPLAB/PIC18F/portmacro.h"
+#endif
+
+#ifdef MPLAB_PIC32MX_PORT
+ #include "../../Source/portable/MPLAB/PIC32MX/portmacro.h"
+#endif
+
+#ifdef _FEDPICC
+ #include "libFreeRTOS/Include/portmacro.h"
+#endif
+
+#ifdef SDCC_CYGNAL
+ #include "../../Source/portable/SDCC/Cygnal/portmacro.h"
+#endif
+
+#ifdef GCC_ARM7
+ #include "../../Source/portable/GCC/ARM7_LPC2000/portmacro.h"
+#endif
+
+#ifdef GCC_ARM7_ECLIPSE
+ #include "portmacro.h"
+#endif
+
+#ifdef ROWLEY_LPC23xx
+ #include "../../Source/portable/GCC/ARM7_LPC23xx/portmacro.h"
+#endif
+
+#ifdef IAR_MSP430
+ #include "..\..\Source\portable\IAR\MSP430\portmacro.h"
+#endif
+
+#ifdef GCC_MSP430
+ #include "../../Source/portable/GCC/MSP430F449/portmacro.h"
+#endif
+
+#ifdef ROWLEY_MSP430
+ #include "../../Source/portable/Rowley/MSP430F449/portmacro.h"
+#endif
+
+#ifdef ARM7_LPC21xx_KEIL_RVDS
+ #include "..\..\Source\portable\RVDS\ARM7_LPC21xx\portmacro.h"
+#endif
+
+#ifdef SAM7_GCC
+ #include "../../Source/portable/GCC/ARM7_AT91SAM7S/portmacro.h"
+#endif
+
+#ifdef SAM7_IAR
+ #include "..\..\Source\portable\IAR\AtmelSAM7S64\portmacro.h"
+#endif
+
+#ifdef SAM9XE_IAR
+ #include "..\..\Source\portable\IAR\AtmelSAM9XE\portmacro.h"
+#endif
+
+#ifdef LPC2000_IAR
+ #include "..\..\Source\portable\IAR\LPC2000\portmacro.h"
+#endif
+
+#ifdef STR71X_IAR
+ #include "..\..\Source\portable\IAR\STR71x\portmacro.h"
+#endif
+
+#ifdef STR75X_IAR
+ #include "..\..\Source\portable\IAR\STR75x\portmacro.h"
+#endif
+
+#ifdef STR75X_GCC
+ #include "..\..\Source\portable\GCC\STR75x\portmacro.h"
+#endif
+
+#ifdef STR91X_IAR
+ #include "..\..\Source\portable\IAR\STR91x\portmacro.h"
+#endif
+
+#ifdef GCC_H8S
+ #include "../../Source/portable/GCC/H8S2329/portmacro.h"
+#endif
+
+#ifdef GCC_AT91FR40008
+ #include "../../Source/portable/GCC/ARM7_AT91FR40008/portmacro.h"
+#endif
+
+#ifdef RVDS_ARMCM3_LM3S102
+ #include "../../Source/portable/RVDS/ARM_CM3/portmacro.h"
+#endif
+
+#ifdef GCC_ARMCM3_LM3S102
+ #include "../../Source/portable/GCC/ARM_CM3/portmacro.h"
+#endif
+
+#ifdef GCC_ARMCM3
+ #include "../../Source/portable/GCC/ARM_CM3/portmacro.h"
+#endif
+
+#ifdef IAR_ARM_CM3
+ #include "../../Source/portable/IAR/ARM_CM3/portmacro.h"
+#endif
+
+#ifdef IAR_ARMCM3_LM
+ #include "../../Source/portable/IAR/ARM_CM3/portmacro.h"
+#endif
+
+#ifdef HCS12_CODE_WARRIOR
+ #include "../../Source/portable/CodeWarrior/HCS12/portmacro.h"
+#endif
+
+#ifdef MICROBLAZE_GCC
+ #include "../../Source/portable/GCC/MicroBlaze/portmacro.h"
+#endif
+
+#ifdef TERN_EE
+ #include "..\..\Source\portable\Paradigm\Tern_EE\small\portmacro.h"
+#endif
+
+#ifdef GCC_HCS12
+ #include "../../Source/portable/GCC/HCS12/portmacro.h"
+#endif
+
+#ifdef GCC_MCF5235
+ #include "../../Source/portable/GCC/MCF5235/portmacro.h"
+#endif
+
+#ifdef COLDFIRE_V2_GCC
+ #include "../../../Source/portable/GCC/ColdFire_V2/portmacro.h"
+#endif
+
+#ifdef COLDFIRE_V2_CODEWARRIOR
+ #include "../../Source/portable/CodeWarrior/ColdFire_V2/portmacro.h"
+#endif
+
+#ifdef GCC_PPC405
+ #include "../../Source/portable/GCC/PPC405_Xilinx/portmacro.h"
+#endif
+
+#ifdef GCC_PPC440
+ #include "../../Source/portable/GCC/PPC440_Xilinx/portmacro.h"
+#endif
+
+#ifdef _16FX_SOFTUNE
+ #include "..\..\Source\portable\Softune\MB96340\portmacro.h"
+#endif
+
+#ifdef BCC_INDUSTRIAL_PC_PORT
+ /* A short file name has to be used in place of the normal
+ FreeRTOSConfig.h when using the Borland compiler. */
+ #include "frconfig.h"
+ #include "..\portable\BCC\16BitDOS\PC\prtmacro.h"
+ typedef void ( __interrupt __far *pxISR )();
+#endif
+
+#ifdef BCC_FLASH_LITE_186_PORT
+ /* A short file name has to be used in place of the normal
+ FreeRTOSConfig.h when using the Borland compiler. */
+ #include "frconfig.h"
+ #include "..\portable\BCC\16BitDOS\flsh186\prtmacro.h"
+ typedef void ( __interrupt __far *pxISR )();
+#endif
+
+#ifdef __GNUC__
+ #ifdef __AVR32_AVR32A__
+ #include "portmacro.h"
+ #endif
+#endif
+
+#ifdef __ICCAVR32__
+ #ifdef __CORE__
+ #if __CORE__ == __AVR32A__
+ #include "portmacro.h"
+ #endif
+ #endif
+#endif
+
+#ifdef __91467D
+ #include "portmacro.h"
+#endif
+
+#ifdef __96340
+ #include "portmacro.h"
+#endif
+
+
+#ifdef __IAR_V850ES_Fx3__
+ #include "../../Source/portable/IAR/V850ES/portmacro.h"
+#endif
+
+#ifdef __IAR_V850ES_Jx3__
+ #include "../../Source/portable/IAR/V850ES/portmacro.h"
+#endif
+
+#ifdef __IAR_V850ES_Jx3_L__
+ #include "../../Source/portable/IAR/V850ES/portmacro.h"
+#endif
+
+#ifdef __IAR_V850ES_Jx2__
+ #include "../../Source/portable/IAR/V850ES/portmacro.h"
+#endif
+
+#ifdef __IAR_V850ES_Hx2__
+ #include "../../Source/portable/IAR/V850ES/portmacro.h"
+#endif
+
+#ifdef __IAR_78K0R_Kx3__
+ #include "../../Source/portable/IAR/78K0R/portmacro.h"
+#endif
+
+#ifdef __IAR_78K0R_Kx3L__
+ #include "../../Source/portable/IAR/78K0R/portmacro.h"
+#endif
+
+#endif /* DEPRECATED_DEFINITIONS_H */
+
diff --git a/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h
new file mode 100644
index 0000000..0c1582b
--- /dev/null
+++ b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h
@@ -0,0 +1,756 @@
+/*
+ * FreeRTOS Kernel V10.0.1
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+#ifndef EVENT_GROUPS_H
+#define EVENT_GROUPS_H
+
+#ifndef INC_FREERTOS_H
+ #error "include FreeRTOS.h" must appear in source files before "include event_groups.h"
+#endif
+
+/* FreeRTOS includes. */
+#include "timers.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * An event group is a collection of bits to which an application can assign a
+ * meaning. For example, an application may create an event group to convey
+ * the status of various CAN bus related events in which bit 0 might mean "A CAN
+ * message has been received and is ready for processing", bit 1 might mean "The
+ * application has queued a message that is ready for sending onto the CAN
+ * network", and bit 2 might mean "It is time to send a SYNC message onto the
+ * CAN network" etc. A task can then test the bit values to see which events
+ * are active, and optionally enter the Blocked state to wait for a specified
+ * bit or a group of specified bits to be active. To continue the CAN bus
+ * example, a CAN controlling task can enter the Blocked state (and therefore
+ * not consume any processing time) until either bit 0, bit 1 or bit 2 are
+ * active, at which time the bit that was actually active would inform the task
+ * which action it had to take (process a received message, send a message, or
+ * send a SYNC).
+ *
+ * The event groups implementation contains intelligence to avoid race
+ * conditions that would otherwise occur were an application to use a simple
+ * variable for the same purpose. This is particularly important with respect
+ * to when a bit within an event group is to be cleared, and when bits have to
+ * be set and then tested atomically - as is the case where event groups are
+ * used to create a synchronisation point between multiple tasks (a
+ * 'rendezvous').
+ *
+ * \defgroup EventGroup
+ */
+
+
+
+/**
+ * event_groups.h
+ *
+ * Type by which event groups are referenced. For example, a call to
+ * xEventGroupCreate() returns an EventGroupHandle_t variable that can then
+ * be used as a parameter to other event group functions.
+ *
+ * \defgroup EventGroupHandle_t EventGroupHandle_t
+ * \ingroup EventGroup
+ */
+typedef void * EventGroupHandle_t;
+
+/*
+ * The type that holds event bits always matches TickType_t - therefore the
+ * number of bits it holds is set by configUSE_16_BIT_TICKS (16 bits if set to 1,
+ * 32 bits if set to 0.
+ *
+ * \defgroup EventBits_t EventBits_t
+ * \ingroup EventGroup
+ */
+typedef TickType_t EventBits_t;
+
+/**
+ * event_groups.h
+ *+ EventGroupHandle_t xEventGroupCreate( void ); ++ * + * Create a new event group. + * + * Internally, within the FreeRTOS implementation, event groups use a [small] + * block of memory, in which the event group's structure is stored. If an event + * groups is created using xEventGropuCreate() then the required memory is + * automatically dynamically allocated inside the xEventGroupCreate() function. + * (see http://www.freertos.org/a00111.html). If an event group is created + * using xEventGropuCreateStatic() then the application writer must instead + * provide the memory that will get used by the event group. + * xEventGroupCreateStatic() therefore allows an event group to be created + * without using any dynamic memory allocation. + * + * Although event groups are not related to ticks, for internal implementation + * reasons the number of bits available for use in an event group is dependent + * on the configUSE_16_BIT_TICKS setting in FreeRTOSConfig.h. If + * configUSE_16_BIT_TICKS is 1 then each event group contains 8 usable bits (bit + * 0 to bit 7). If configUSE_16_BIT_TICKS is set to 0 then each event group has + * 24 usable bits (bit 0 to bit 23). The EventBits_t type is used to store + * event bits within an event group. + * + * @return If the event group was created then a handle to the event group is + * returned. If there was insufficient FreeRTOS heap available to create the + * event group then NULL is returned. See http://www.freertos.org/a00111.html + * + * Example usage: +
+ // Declare a variable to hold the created event group.
+ EventGroupHandle_t xCreatedEventGroup;
+
+ // Attempt to create the event group.
+ xCreatedEventGroup = xEventGroupCreate();
+
+ // Was the event group created successfully?
+ if( xCreatedEventGroup == NULL )
+ {
+ // The event group was not created because there was insufficient
+ // FreeRTOS heap available.
+ }
+ else
+ {
+ // The event group was created.
+ }
+
+ * \defgroup xEventGroupCreate xEventGroupCreate
+ * \ingroup EventGroup
+ */
+#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+ EventGroupHandle_t xEventGroupCreate( void ) PRIVILEGED_FUNCTION;
+#endif
+
+/**
+ * event_groups.h
+ *+ EventGroupHandle_t xEventGroupCreateStatic( EventGroupHandle_t * pxEventGroupBuffer ); ++ * + * Create a new event group. + * + * Internally, within the FreeRTOS implementation, event groups use a [small] + * block of memory, in which the event group's structure is stored. If an event + * groups is created using xEventGropuCreate() then the required memory is + * automatically dynamically allocated inside the xEventGroupCreate() function. + * (see http://www.freertos.org/a00111.html). If an event group is created + * using xEventGropuCreateStatic() then the application writer must instead + * provide the memory that will get used by the event group. + * xEventGroupCreateStatic() therefore allows an event group to be created + * without using any dynamic memory allocation. + * + * Although event groups are not related to ticks, for internal implementation + * reasons the number of bits available for use in an event group is dependent + * on the configUSE_16_BIT_TICKS setting in FreeRTOSConfig.h. If + * configUSE_16_BIT_TICKS is 1 then each event group contains 8 usable bits (bit + * 0 to bit 7). If configUSE_16_BIT_TICKS is set to 0 then each event group has + * 24 usable bits (bit 0 to bit 23). The EventBits_t type is used to store + * event bits within an event group. + * + * @param pxEventGroupBuffer pxEventGroupBuffer must point to a variable of type + * StaticEventGroup_t, which will be then be used to hold the event group's data + * structures, removing the need for the memory to be allocated dynamically. + * + * @return If the event group was created then a handle to the event group is + * returned. If pxEventGroupBuffer was NULL then NULL is returned. + * + * Example usage: +
+ // StaticEventGroup_t is a publicly accessible structure that has the same + // size and alignment requirements as the real event group structure. It is + // provided as a mechanism for applications to know the size of the event + // group (which is dependent on the architecture and configuration file + // settings) without breaking the strict data hiding policy by exposing the + // real event group internals. This StaticEventGroup_t variable is passed + // into the xSemaphoreCreateEventGroupStatic() function and is used to store + // the event group's data structures + StaticEventGroup_t xEventGroupBuffer; + + // Create the event group without dynamically allocating any memory. + xEventGroup = xEventGroupCreateStatic( &xEventGroupBuffer ); ++ */ +#if( configSUPPORT_STATIC_ALLOCATION == 1 ) + EventGroupHandle_t xEventGroupCreateStatic( StaticEventGroup_t *pxEventGroupBuffer ) PRIVILEGED_FUNCTION; +#endif + +/** + * event_groups.h + *
+ EventBits_t xEventGroupWaitBits( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToWaitFor, + const BaseType_t xClearOnExit, + const BaseType_t xWaitForAllBits, + const TickType_t xTicksToWait ); ++ * + * [Potentially] block to wait for one or more bits to be set within a + * previously created event group. + * + * This function cannot be called from an interrupt. + * + * @param xEventGroup The event group in which the bits are being tested. The + * event group must have previously been created using a call to + * xEventGroupCreate(). + * + * @param uxBitsToWaitFor A bitwise value that indicates the bit or bits to test + * inside the event group. For example, to wait for bit 0 and/or bit 2 set + * uxBitsToWaitFor to 0x05. To wait for bits 0 and/or bit 1 and/or bit 2 set + * uxBitsToWaitFor to 0x07. Etc. + * + * @param xClearOnExit If xClearOnExit is set to pdTRUE then any bits within + * uxBitsToWaitFor that are set within the event group will be cleared before + * xEventGroupWaitBits() returns if the wait condition was met (if the function + * returns for a reason other than a timeout). If xClearOnExit is set to + * pdFALSE then the bits set in the event group are not altered when the call to + * xEventGroupWaitBits() returns. + * + * @param xWaitForAllBits If xWaitForAllBits is set to pdTRUE then + * xEventGroupWaitBits() will return when either all the bits in uxBitsToWaitFor + * are set or the specified block time expires. If xWaitForAllBits is set to + * pdFALSE then xEventGroupWaitBits() will return when any one of the bits set + * in uxBitsToWaitFor is set or the specified block time expires. The block + * time is specified by the xTicksToWait parameter. + * + * @param xTicksToWait The maximum amount of time (specified in 'ticks') to wait + * for one/all (depending on the xWaitForAllBits value) of the bits specified by + * uxBitsToWaitFor to become set. + * + * @return The value of the event group at the time either the bits being waited + * for became set, or the block time expired. Test the return value to know + * which bits were set. If xEventGroupWaitBits() returned because its timeout + * expired then not all the bits being waited for will be set. If + * xEventGroupWaitBits() returned because the bits it was waiting for were set + * then the returned value is the event group value before any bits were + * automatically cleared in the case that xClearOnExit parameter was set to + * pdTRUE. + * + * Example usage: +
+ #define BIT_0 ( 1 << 0 )
+ #define BIT_4 ( 1 << 4 )
+
+ void aFunction( EventGroupHandle_t xEventGroup )
+ {
+ EventBits_t uxBits;
+ const TickType_t xTicksToWait = 100 / portTICK_PERIOD_MS;
+
+ // Wait a maximum of 100ms for either bit 0 or bit 4 to be set within
+ // the event group. Clear the bits before exiting.
+ uxBits = xEventGroupWaitBits(
+ xEventGroup, // The event group being tested.
+ BIT_0 | BIT_4, // The bits within the event group to wait for.
+ pdTRUE, // BIT_0 and BIT_4 should be cleared before returning.
+ pdFALSE, // Don't wait for both bits, either bit will do.
+ xTicksToWait ); // Wait a maximum of 100ms for either bit to be set.
+
+ if( ( uxBits & ( BIT_0 | BIT_4 ) ) == ( BIT_0 | BIT_4 ) )
+ {
+ // xEventGroupWaitBits() returned because both bits were set.
+ }
+ else if( ( uxBits & BIT_0 ) != 0 )
+ {
+ // xEventGroupWaitBits() returned because just BIT_0 was set.
+ }
+ else if( ( uxBits & BIT_4 ) != 0 )
+ {
+ // xEventGroupWaitBits() returned because just BIT_4 was set.
+ }
+ else
+ {
+ // xEventGroupWaitBits() returned because xTicksToWait ticks passed
+ // without either BIT_0 or BIT_4 becoming set.
+ }
+ }
+
+ * \defgroup xEventGroupWaitBits xEventGroupWaitBits
+ * \ingroup EventGroup
+ */
+EventBits_t xEventGroupWaitBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToWaitFor, const BaseType_t xClearOnExit, const BaseType_t xWaitForAllBits, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
+
+/**
+ * event_groups.h
+ *+ EventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear ); ++ * + * Clear bits within an event group. This function cannot be called from an + * interrupt. + * + * @param xEventGroup The event group in which the bits are to be cleared. + * + * @param uxBitsToClear A bitwise value that indicates the bit or bits to clear + * in the event group. For example, to clear bit 3 only, set uxBitsToClear to + * 0x08. To clear bit 3 and bit 0 set uxBitsToClear to 0x09. + * + * @return The value of the event group before the specified bits were cleared. + * + * Example usage: +
+ #define BIT_0 ( 1 << 0 )
+ #define BIT_4 ( 1 << 4 )
+
+ void aFunction( EventGroupHandle_t xEventGroup )
+ {
+ EventBits_t uxBits;
+
+ // Clear bit 0 and bit 4 in xEventGroup.
+ uxBits = xEventGroupClearBits(
+ xEventGroup, // The event group being updated.
+ BIT_0 | BIT_4 );// The bits being cleared.
+
+ if( ( uxBits & ( BIT_0 | BIT_4 ) ) == ( BIT_0 | BIT_4 ) )
+ {
+ // Both bit 0 and bit 4 were set before xEventGroupClearBits() was
+ // called. Both will now be clear (not set).
+ }
+ else if( ( uxBits & BIT_0 ) != 0 )
+ {
+ // Bit 0 was set before xEventGroupClearBits() was called. It will
+ // now be clear.
+ }
+ else if( ( uxBits & BIT_4 ) != 0 )
+ {
+ // Bit 4 was set before xEventGroupClearBits() was called. It will
+ // now be clear.
+ }
+ else
+ {
+ // Neither bit 0 nor bit 4 were set in the first place.
+ }
+ }
+
+ * \defgroup xEventGroupClearBits xEventGroupClearBits
+ * \ingroup EventGroup
+ */
+EventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear ) PRIVILEGED_FUNCTION;
+
+/**
+ * event_groups.h
+ *+ BaseType_t xEventGroupClearBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet ); ++ * + * A version of xEventGroupClearBits() that can be called from an interrupt. + * + * Setting bits in an event group is not a deterministic operation because there + * are an unknown number of tasks that may be waiting for the bit or bits being + * set. FreeRTOS does not allow nondeterministic operations to be performed + * while interrupts are disabled, so protects event groups that are accessed + * from tasks by suspending the scheduler rather than disabling interrupts. As + * a result event groups cannot be accessed directly from an interrupt service + * routine. Therefore xEventGroupClearBitsFromISR() sends a message to the + * timer task to have the clear operation performed in the context of the timer + * task. + * + * @param xEventGroup The event group in which the bits are to be cleared. + * + * @param uxBitsToClear A bitwise value that indicates the bit or bits to clear. + * For example, to clear bit 3 only, set uxBitsToClear to 0x08. To clear bit 3 + * and bit 0 set uxBitsToClear to 0x09. + * + * @return If the request to execute the function was posted successfully then + * pdPASS is returned, otherwise pdFALSE is returned. pdFALSE will be returned + * if the timer service queue was full. + * + * Example usage: +
+ #define BIT_0 ( 1 << 0 )
+ #define BIT_4 ( 1 << 4 )
+
+ // An event group which it is assumed has already been created by a call to
+ // xEventGroupCreate().
+ EventGroupHandle_t xEventGroup;
+
+ void anInterruptHandler( void )
+ {
+ // Clear bit 0 and bit 4 in xEventGroup.
+ xResult = xEventGroupClearBitsFromISR(
+ xEventGroup, // The event group being updated.
+ BIT_0 | BIT_4 ); // The bits being set.
+
+ if( xResult == pdPASS )
+ {
+ // The message was posted successfully.
+ }
+ }
+
+ * \defgroup xEventGroupClearBitsFromISR xEventGroupClearBitsFromISR
+ * \ingroup EventGroup
+ */
+#if( configUSE_TRACE_FACILITY == 1 )
+ BaseType_t xEventGroupClearBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet ) PRIVILEGED_FUNCTION;
+#else
+ #define xEventGroupClearBitsFromISR( xEventGroup, uxBitsToClear ) xTimerPendFunctionCallFromISR( vEventGroupClearBitsCallback, ( void * ) xEventGroup, ( uint32_t ) uxBitsToClear, NULL )
+#endif
+
+/**
+ * event_groups.h
+ *+ EventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet ); ++ * + * Set bits within an event group. + * This function cannot be called from an interrupt. xEventGroupSetBitsFromISR() + * is a version that can be called from an interrupt. + * + * Setting bits in an event group will automatically unblock tasks that are + * blocked waiting for the bits. + * + * @param xEventGroup The event group in which the bits are to be set. + * + * @param uxBitsToSet A bitwise value that indicates the bit or bits to set. + * For example, to set bit 3 only, set uxBitsToSet to 0x08. To set bit 3 + * and bit 0 set uxBitsToSet to 0x09. + * + * @return The value of the event group at the time the call to + * xEventGroupSetBits() returns. There are two reasons why the returned value + * might have the bits specified by the uxBitsToSet parameter cleared. First, + * if setting a bit results in a task that was waiting for the bit leaving the + * blocked state then it is possible the bit will be cleared automatically + * (see the xClearBitOnExit parameter of xEventGroupWaitBits()). Second, any + * unblocked (or otherwise Ready state) task that has a priority above that of + * the task that called xEventGroupSetBits() will execute and may change the + * event group value before the call to xEventGroupSetBits() returns. + * + * Example usage: +
+ #define BIT_0 ( 1 << 0 )
+ #define BIT_4 ( 1 << 4 )
+
+ void aFunction( EventGroupHandle_t xEventGroup )
+ {
+ EventBits_t uxBits;
+
+ // Set bit 0 and bit 4 in xEventGroup.
+ uxBits = xEventGroupSetBits(
+ xEventGroup, // The event group being updated.
+ BIT_0 | BIT_4 );// The bits being set.
+
+ if( ( uxBits & ( BIT_0 | BIT_4 ) ) == ( BIT_0 | BIT_4 ) )
+ {
+ // Both bit 0 and bit 4 remained set when the function returned.
+ }
+ else if( ( uxBits & BIT_0 ) != 0 )
+ {
+ // Bit 0 remained set when the function returned, but bit 4 was
+ // cleared. It might be that bit 4 was cleared automatically as a
+ // task that was waiting for bit 4 was removed from the Blocked
+ // state.
+ }
+ else if( ( uxBits & BIT_4 ) != 0 )
+ {
+ // Bit 4 remained set when the function returned, but bit 0 was
+ // cleared. It might be that bit 0 was cleared automatically as a
+ // task that was waiting for bit 0 was removed from the Blocked
+ // state.
+ }
+ else
+ {
+ // Neither bit 0 nor bit 4 remained set. It might be that a task
+ // was waiting for both of the bits to be set, and the bits were
+ // cleared as the task left the Blocked state.
+ }
+ }
+
+ * \defgroup xEventGroupSetBits xEventGroupSetBits
+ * \ingroup EventGroup
+ */
+EventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet ) PRIVILEGED_FUNCTION;
+
+/**
+ * event_groups.h
+ *+ BaseType_t xEventGroupSetBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, BaseType_t *pxHigherPriorityTaskWoken ); ++ * + * A version of xEventGroupSetBits() that can be called from an interrupt. + * + * Setting bits in an event group is not a deterministic operation because there + * are an unknown number of tasks that may be waiting for the bit or bits being + * set. FreeRTOS does not allow nondeterministic operations to be performed in + * interrupts or from critical sections. Therefore xEventGroupSetBitsFromISR() + * sends a message to the timer task to have the set operation performed in the + * context of the timer task - where a scheduler lock is used in place of a + * critical section. + * + * @param xEventGroup The event group in which the bits are to be set. + * + * @param uxBitsToSet A bitwise value that indicates the bit or bits to set. + * For example, to set bit 3 only, set uxBitsToSet to 0x08. To set bit 3 + * and bit 0 set uxBitsToSet to 0x09. + * + * @param pxHigherPriorityTaskWoken As mentioned above, calling this function + * will result in a message being sent to the timer daemon task. If the + * priority of the timer daemon task is higher than the priority of the + * currently running task (the task the interrupt interrupted) then + * *pxHigherPriorityTaskWoken will be set to pdTRUE by + * xEventGroupSetBitsFromISR(), indicating that a context switch should be + * requested before the interrupt exits. For that reason + * *pxHigherPriorityTaskWoken must be initialised to pdFALSE. See the + * example code below. + * + * @return If the request to execute the function was posted successfully then + * pdPASS is returned, otherwise pdFALSE is returned. pdFALSE will be returned + * if the timer service queue was full. + * + * Example usage: +
+ #define BIT_0 ( 1 << 0 )
+ #define BIT_4 ( 1 << 4 )
+
+ // An event group which it is assumed has already been created by a call to
+ // xEventGroupCreate().
+ EventGroupHandle_t xEventGroup;
+
+ void anInterruptHandler( void )
+ {
+ BaseType_t xHigherPriorityTaskWoken, xResult;
+
+ // xHigherPriorityTaskWoken must be initialised to pdFALSE.
+ xHigherPriorityTaskWoken = pdFALSE;
+
+ // Set bit 0 and bit 4 in xEventGroup.
+ xResult = xEventGroupSetBitsFromISR(
+ xEventGroup, // The event group being updated.
+ BIT_0 | BIT_4 // The bits being set.
+ &xHigherPriorityTaskWoken );
+
+ // Was the message posted successfully?
+ if( xResult == pdPASS )
+ {
+ // If xHigherPriorityTaskWoken is now set to pdTRUE then a context
+ // switch should be requested. The macro used is port specific and
+ // will be either portYIELD_FROM_ISR() or portEND_SWITCHING_ISR() -
+ // refer to the documentation page for the port being used.
+ portYIELD_FROM_ISR( xHigherPriorityTaskWoken );
+ }
+ }
+
+ * \defgroup xEventGroupSetBitsFromISR xEventGroupSetBitsFromISR
+ * \ingroup EventGroup
+ */
+#if( configUSE_TRACE_FACILITY == 1 )
+ BaseType_t xEventGroupSetBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, BaseType_t *pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
+#else
+ #define xEventGroupSetBitsFromISR( xEventGroup, uxBitsToSet, pxHigherPriorityTaskWoken ) xTimerPendFunctionCallFromISR( vEventGroupSetBitsCallback, ( void * ) xEventGroup, ( uint32_t ) uxBitsToSet, pxHigherPriorityTaskWoken )
+#endif
+
+/**
+ * event_groups.h
+ *+ EventBits_t xEventGroupSync( EventGroupHandle_t xEventGroup, + const EventBits_t uxBitsToSet, + const EventBits_t uxBitsToWaitFor, + TickType_t xTicksToWait ); ++ * + * Atomically set bits within an event group, then wait for a combination of + * bits to be set within the same event group. This functionality is typically + * used to synchronise multiple tasks, where each task has to wait for the other + * tasks to reach a synchronisation point before proceeding. + * + * This function cannot be used from an interrupt. + * + * The function will return before its block time expires if the bits specified + * by the uxBitsToWait parameter are set, or become set within that time. In + * this case all the bits specified by uxBitsToWait will be automatically + * cleared before the function returns. + * + * @param xEventGroup The event group in which the bits are being tested. The + * event group must have previously been created using a call to + * xEventGroupCreate(). + * + * @param uxBitsToSet The bits to set in the event group before determining + * if, and possibly waiting for, all the bits specified by the uxBitsToWait + * parameter are set. + * + * @param uxBitsToWaitFor A bitwise value that indicates the bit or bits to test + * inside the event group. For example, to wait for bit 0 and bit 2 set + * uxBitsToWaitFor to 0x05. To wait for bits 0 and bit 1 and bit 2 set + * uxBitsToWaitFor to 0x07. Etc. + * + * @param xTicksToWait The maximum amount of time (specified in 'ticks') to wait + * for all of the bits specified by uxBitsToWaitFor to become set. + * + * @return The value of the event group at the time either the bits being waited + * for became set, or the block time expired. Test the return value to know + * which bits were set. If xEventGroupSync() returned because its timeout + * expired then not all the bits being waited for will be set. If + * xEventGroupSync() returned because all the bits it was waiting for were + * set then the returned value is the event group value before any bits were + * automatically cleared. + * + * Example usage: +
+ // Bits used by the three tasks.
+ #define TASK_0_BIT ( 1 << 0 )
+ #define TASK_1_BIT ( 1 << 1 )
+ #define TASK_2_BIT ( 1 << 2 )
+
+ #define ALL_SYNC_BITS ( TASK_0_BIT | TASK_1_BIT | TASK_2_BIT )
+
+ // Use an event group to synchronise three tasks. It is assumed this event
+ // group has already been created elsewhere.
+ EventGroupHandle_t xEventBits;
+
+ void vTask0( void *pvParameters )
+ {
+ EventBits_t uxReturn;
+ TickType_t xTicksToWait = 100 / portTICK_PERIOD_MS;
+
+ for( ;; )
+ {
+ // Perform task functionality here.
+
+ // Set bit 0 in the event flag to note this task has reached the
+ // sync point. The other two tasks will set the other two bits defined
+ // by ALL_SYNC_BITS. All three tasks have reached the synchronisation
+ // point when all the ALL_SYNC_BITS are set. Wait a maximum of 100ms
+ // for this to happen.
+ uxReturn = xEventGroupSync( xEventBits, TASK_0_BIT, ALL_SYNC_BITS, xTicksToWait );
+
+ if( ( uxReturn & ALL_SYNC_BITS ) == ALL_SYNC_BITS )
+ {
+ // All three tasks reached the synchronisation point before the call
+ // to xEventGroupSync() timed out.
+ }
+ }
+ }
+
+ void vTask1( void *pvParameters )
+ {
+ for( ;; )
+ {
+ // Perform task functionality here.
+
+ // Set bit 1 in the event flag to note this task has reached the
+ // synchronisation point. The other two tasks will set the other two
+ // bits defined by ALL_SYNC_BITS. All three tasks have reached the
+ // synchronisation point when all the ALL_SYNC_BITS are set. Wait
+ // indefinitely for this to happen.
+ xEventGroupSync( xEventBits, TASK_1_BIT, ALL_SYNC_BITS, portMAX_DELAY );
+
+ // xEventGroupSync() was called with an indefinite block time, so
+ // this task will only reach here if the syncrhonisation was made by all
+ // three tasks, so there is no need to test the return value.
+ }
+ }
+
+ void vTask2( void *pvParameters )
+ {
+ for( ;; )
+ {
+ // Perform task functionality here.
+
+ // Set bit 2 in the event flag to note this task has reached the
+ // synchronisation point. The other two tasks will set the other two
+ // bits defined by ALL_SYNC_BITS. All three tasks have reached the
+ // synchronisation point when all the ALL_SYNC_BITS are set. Wait
+ // indefinitely for this to happen.
+ xEventGroupSync( xEventBits, TASK_2_BIT, ALL_SYNC_BITS, portMAX_DELAY );
+
+ // xEventGroupSync() was called with an indefinite block time, so
+ // this task will only reach here if the syncrhonisation was made by all
+ // three tasks, so there is no need to test the return value.
+ }
+ }
+
+
+ * \defgroup xEventGroupSync xEventGroupSync
+ * \ingroup EventGroup
+ */
+EventBits_t xEventGroupSync( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
+
+
+/**
+ * event_groups.h
+ *+ EventBits_t xEventGroupGetBits( EventGroupHandle_t xEventGroup ); ++ * + * Returns the current value of the bits in an event group. This function + * cannot be used from an interrupt. + * + * @param xEventGroup The event group being queried. + * + * @return The event group bits at the time xEventGroupGetBits() was called. + * + * \defgroup xEventGroupGetBits xEventGroupGetBits + * \ingroup EventGroup + */ +#define xEventGroupGetBits( xEventGroup ) xEventGroupClearBits( xEventGroup, 0 ) + +/** + * event_groups.h + *
+ EventBits_t xEventGroupGetBitsFromISR( EventGroupHandle_t xEventGroup ); ++ * + * A version of xEventGroupGetBits() that can be called from an ISR. + * + * @param xEventGroup The event group being queried. + * + * @return The event group bits at the time xEventGroupGetBitsFromISR() was called. + * + * \defgroup xEventGroupGetBitsFromISR xEventGroupGetBitsFromISR + * \ingroup EventGroup + */ +EventBits_t xEventGroupGetBitsFromISR( EventGroupHandle_t xEventGroup ) PRIVILEGED_FUNCTION; + +/** + * event_groups.h + *
+ void xEventGroupDelete( EventGroupHandle_t xEventGroup ); ++ * + * Delete an event group that was previously created by a call to + * xEventGroupCreate(). Tasks that are blocked on the event group will be + * unblocked and obtain 0 as the event group's value. + * + * @param xEventGroup The event group being deleted. + */ +void vEventGroupDelete( EventGroupHandle_t xEventGroup ) PRIVILEGED_FUNCTION; + +/* For internal use only. */ +void vEventGroupSetBitsCallback( void *pvEventGroup, const uint32_t ulBitsToSet ) PRIVILEGED_FUNCTION; +void vEventGroupClearBitsCallback( void *pvEventGroup, const uint32_t ulBitsToClear ) PRIVILEGED_FUNCTION; + + +#if (configUSE_TRACE_FACILITY == 1) + UBaseType_t uxEventGroupGetNumber( void* xEventGroup ) PRIVILEGED_FUNCTION; + void vEventGroupSetNumber( void* xEventGroup, UBaseType_t uxEventGroupNumber ) PRIVILEGED_FUNCTION; +#endif + +#ifdef __cplusplus +} +#endif + +#endif /* EVENT_GROUPS_H */ + + diff --git a/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/include/list.h b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/include/list.h new file mode 100644 index 0000000..9f8e557 --- /dev/null +++ b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/include/list.h @@ -0,0 +1,411 @@ +/* + * FreeRTOS Kernel V10.0.1 + * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/* + * This is the list implementation used by the scheduler. While it is tailored + * heavily for the schedulers needs, it is also available for use by + * application code. + * + * list_ts can only store pointers to list_item_ts. Each ListItem_t contains a + * numeric value (xItemValue). Most of the time the lists are sorted in + * descending item value order. + * + * Lists are created already containing one list item. The value of this + * item is the maximum possible that can be stored, it is therefore always at + * the end of the list and acts as a marker. The list member pxHead always + * points to this marker - even though it is at the tail of the list. This + * is because the tail contains a wrap back pointer to the true head of + * the list. + * + * In addition to it's value, each list item contains a pointer to the next + * item in the list (pxNext), a pointer to the list it is in (pxContainer) + * and a pointer to back to the object that contains it. These later two + * pointers are included for efficiency of list manipulation. There is + * effectively a two way link between the object containing the list item and + * the list item itself. + * + * + * \page ListIntroduction List Implementation + * \ingroup FreeRTOSIntro + */ + +#ifndef INC_FREERTOS_H + #error FreeRTOS.h must be included before list.h +#endif + +#ifndef LIST_H +#define LIST_H + +/* + * The list structure members are modified from within interrupts, and therefore + * by rights should be declared volatile. However, they are only modified in a + * functionally atomic way (within critical sections of with the scheduler + * suspended) and are either passed by reference into a function or indexed via + * a volatile variable. Therefore, in all use cases tested so far, the volatile + * qualifier can be omitted in order to provide a moderate performance + * improvement without adversely affecting functional behaviour. The assembly + * instructions generated by the IAR, ARM and GCC compilers when the respective + * compiler's options were set for maximum optimisation has been inspected and + * deemed to be as intended. That said, as compiler technology advances, and + * especially if aggressive cross module optimisation is used (a use case that + * has not been exercised to any great extend) then it is feasible that the + * volatile qualifier will be needed for correct optimisation. It is expected + * that a compiler removing essential code because, without the volatile + * qualifier on the list structure members and with aggressive cross module + * optimisation, the compiler deemed the code unnecessary will result in + * complete and obvious failure of the scheduler. If this is ever experienced + * then the volatile qualifier can be inserted in the relevant places within the + * list structures by simply defining configLIST_VOLATILE to volatile in + * FreeRTOSConfig.h (as per the example at the bottom of this comment block). + * If configLIST_VOLATILE is not defined then the preprocessor directives below + * will simply #define configLIST_VOLATILE away completely. + * + * To use volatile list structure members then add the following line to + * FreeRTOSConfig.h (without the quotes): + * "#define configLIST_VOLATILE volatile" + */ +#ifndef configLIST_VOLATILE + #define configLIST_VOLATILE +#endif /* configSUPPORT_CROSS_MODULE_OPTIMISATION */ + +#ifdef __cplusplus +extern "C" { +#endif + +/* Macros that can be used to place known values within the list structures, +then check that the known values do not get corrupted during the execution of +the application. These may catch the list data structures being overwritten in +memory. They will not catch data errors caused by incorrect configuration or +use of FreeRTOS.*/ +#if( configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES == 0 ) + /* Define the macros to do nothing. */ + #define listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE + #define listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE + #define listFIRST_LIST_INTEGRITY_CHECK_VALUE + #define listSECOND_LIST_INTEGRITY_CHECK_VALUE + #define listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem ) + #define listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem ) + #define listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList ) + #define listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList ) + #define listTEST_LIST_ITEM_INTEGRITY( pxItem ) + #define listTEST_LIST_INTEGRITY( pxList ) +#else + /* Define macros that add new members into the list structures. */ + #define listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE TickType_t xListItemIntegrityValue1; + #define listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE TickType_t xListItemIntegrityValue2; + #define listFIRST_LIST_INTEGRITY_CHECK_VALUE TickType_t xListIntegrityValue1; + #define listSECOND_LIST_INTEGRITY_CHECK_VALUE TickType_t xListIntegrityValue2; + + /* Define macros that set the new structure members to known values. */ + #define listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem ) ( pxItem )->xListItemIntegrityValue1 = pdINTEGRITY_CHECK_VALUE + #define listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem ) ( pxItem )->xListItemIntegrityValue2 = pdINTEGRITY_CHECK_VALUE + #define listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList ) ( pxList )->xListIntegrityValue1 = pdINTEGRITY_CHECK_VALUE + #define listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList ) ( pxList )->xListIntegrityValue2 = pdINTEGRITY_CHECK_VALUE + + /* Define macros that will assert if one of the structure members does not + contain its expected value. */ + #define listTEST_LIST_ITEM_INTEGRITY( pxItem ) configASSERT( ( ( pxItem )->xListItemIntegrityValue1 == pdINTEGRITY_CHECK_VALUE ) && ( ( pxItem )->xListItemIntegrityValue2 == pdINTEGRITY_CHECK_VALUE ) ) + #define listTEST_LIST_INTEGRITY( pxList ) configASSERT( ( ( pxList )->xListIntegrityValue1 == pdINTEGRITY_CHECK_VALUE ) && ( ( pxList )->xListIntegrityValue2 == pdINTEGRITY_CHECK_VALUE ) ) +#endif /* configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES */ + + +/* + * Definition of the only type of object that a list can contain. + */ +struct xLIST_ITEM +{ + listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */ + configLIST_VOLATILE TickType_t xItemValue; /*< The value being listed. In most cases this is used to sort the list in descending order. */ + struct xLIST_ITEM * configLIST_VOLATILE pxNext; /*< Pointer to the next ListItem_t in the list. */ + struct xLIST_ITEM * configLIST_VOLATILE pxPrevious; /*< Pointer to the previous ListItem_t in the list. */ + void * pvOwner; /*< Pointer to the object (normally a TCB) that contains the list item. There is therefore a two way link between the object containing the list item and the list item itself. */ + void * configLIST_VOLATILE pvContainer; /*< Pointer to the list in which this list item is placed (if any). */ + listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */ +}; +typedef struct xLIST_ITEM ListItem_t; /* For some reason lint wants this as two separate definitions. */ + +struct xMINI_LIST_ITEM +{ + listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */ + configLIST_VOLATILE TickType_t xItemValue; + struct xLIST_ITEM * configLIST_VOLATILE pxNext; + struct xLIST_ITEM * configLIST_VOLATILE pxPrevious; +}; +typedef struct xMINI_LIST_ITEM MiniListItem_t; + +/* + * Definition of the type of queue used by the scheduler. + */ +typedef struct xLIST +{ + listFIRST_LIST_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */ + volatile UBaseType_t uxNumberOfItems; + ListItem_t * configLIST_VOLATILE pxIndex; /*< Used to walk through the list. Points to the last item returned by a call to listGET_OWNER_OF_NEXT_ENTRY (). */ + MiniListItem_t xListEnd; /*< List item that contains the maximum possible item value meaning it is always at the end of the list and is therefore used as a marker. */ + listSECOND_LIST_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */ +} List_t; + +/* + * Access macro to set the owner of a list item. The owner of a list item + * is the object (usually a TCB) that contains the list item. + * + * \page listSET_LIST_ITEM_OWNER listSET_LIST_ITEM_OWNER + * \ingroup LinkedList + */ +#define listSET_LIST_ITEM_OWNER( pxListItem, pxOwner ) ( ( pxListItem )->pvOwner = ( void * ) ( pxOwner ) ) + +/* + * Access macro to get the owner of a list item. The owner of a list item + * is the object (usually a TCB) that contains the list item. + * + * \page listSET_LIST_ITEM_OWNER listSET_LIST_ITEM_OWNER + * \ingroup LinkedList + */ +#define listGET_LIST_ITEM_OWNER( pxListItem ) ( ( pxListItem )->pvOwner ) + +/* + * Access macro to set the value of the list item. In most cases the value is + * used to sort the list in descending order. + * + * \page listSET_LIST_ITEM_VALUE listSET_LIST_ITEM_VALUE + * \ingroup LinkedList + */ +#define listSET_LIST_ITEM_VALUE( pxListItem, xValue ) ( ( pxListItem )->xItemValue = ( xValue ) ) + +/* + * Access macro to retrieve the value of the list item. The value can + * represent anything - for example the priority of a task, or the time at + * which a task should be unblocked. + * + * \page listGET_LIST_ITEM_VALUE listGET_LIST_ITEM_VALUE + * \ingroup LinkedList + */ +#define listGET_LIST_ITEM_VALUE( pxListItem ) ( ( pxListItem )->xItemValue ) + +/* + * Access macro to retrieve the value of the list item at the head of a given + * list. + * + * \page listGET_LIST_ITEM_VALUE listGET_LIST_ITEM_VALUE + * \ingroup LinkedList + */ +#define listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxList ) ( ( ( pxList )->xListEnd ).pxNext->xItemValue ) + +/* + * Return the list item at the head of the list. + * + * \page listGET_HEAD_ENTRY listGET_HEAD_ENTRY + * \ingroup LinkedList + */ +#define listGET_HEAD_ENTRY( pxList ) ( ( ( pxList )->xListEnd ).pxNext ) + +/* + * Return the list item at the head of the list. + * + * \page listGET_NEXT listGET_NEXT + * \ingroup LinkedList + */ +#define listGET_NEXT( pxListItem ) ( ( pxListItem )->pxNext ) + +/* + * Return the list item that marks the end of the list + * + * \page listGET_END_MARKER listGET_END_MARKER + * \ingroup LinkedList + */ +#define listGET_END_MARKER( pxList ) ( ( ListItem_t const * ) ( &( ( pxList )->xListEnd ) ) ) + +/* + * Access macro to determine if a list contains any items. The macro will + * only have the value true if the list is empty. + * + * \page listLIST_IS_EMPTY listLIST_IS_EMPTY + * \ingroup LinkedList + */ +#define listLIST_IS_EMPTY( pxList ) ( ( BaseType_t ) ( ( pxList )->uxNumberOfItems == ( UBaseType_t ) 0 ) ) + +/* + * Access macro to return the number of items in the list. + */ +#define listCURRENT_LIST_LENGTH( pxList ) ( ( pxList )->uxNumberOfItems ) + +/* + * Access function to obtain the owner of the next entry in a list. + * + * The list member pxIndex is used to walk through a list. Calling + * listGET_OWNER_OF_NEXT_ENTRY increments pxIndex to the next item in the list + * and returns that entry's pxOwner parameter. Using multiple calls to this + * function it is therefore possible to move through every item contained in + * a list. + * + * The pxOwner parameter of a list item is a pointer to the object that owns + * the list item. In the scheduler this is normally a task control block. + * The pxOwner parameter effectively creates a two way link between the list + * item and its owner. + * + * @param pxTCB pxTCB is set to the address of the owner of the next list item. + * @param pxList The list from which the next item owner is to be returned. + * + * \page listGET_OWNER_OF_NEXT_ENTRY listGET_OWNER_OF_NEXT_ENTRY + * \ingroup LinkedList + */ +#define listGET_OWNER_OF_NEXT_ENTRY( pxTCB, pxList ) \ +{ \ +List_t * const pxConstList = ( pxList ); \ + /* Increment the index to the next item and return the item, ensuring */ \ + /* we don't return the marker used at the end of the list. */ \ + ( pxConstList )->pxIndex = ( pxConstList )->pxIndex->pxNext; \ + if( ( void * ) ( pxConstList )->pxIndex == ( void * ) &( ( pxConstList )->xListEnd ) ) \ + { \ + ( pxConstList )->pxIndex = ( pxConstList )->pxIndex->pxNext; \ + } \ + ( pxTCB ) = ( pxConstList )->pxIndex->pvOwner; \ +} + + +/* + * Access function to obtain the owner of the first entry in a list. Lists + * are normally sorted in ascending item value order. + * + * This function returns the pxOwner member of the first item in the list. + * The pxOwner parameter of a list item is a pointer to the object that owns + * the list item. In the scheduler this is normally a task control block. + * The pxOwner parameter effectively creates a two way link between the list + * item and its owner. + * + * @param pxList The list from which the owner of the head item is to be + * returned. + * + * \page listGET_OWNER_OF_HEAD_ENTRY listGET_OWNER_OF_HEAD_ENTRY + * \ingroup LinkedList + */ +#define listGET_OWNER_OF_HEAD_ENTRY( pxList ) ( (&( ( pxList )->xListEnd ))->pxNext->pvOwner ) + +/* + * Check to see if a list item is within a list. The list item maintains a + * "container" pointer that points to the list it is in. All this macro does + * is check to see if the container and the list match. + * + * @param pxList The list we want to know if the list item is within. + * @param pxListItem The list item we want to know if is in the list. + * @return pdTRUE if the list item is in the list, otherwise pdFALSE. + */ +#define listIS_CONTAINED_WITHIN( pxList, pxListItem ) ( ( BaseType_t ) ( ( pxListItem )->pvContainer == ( void * ) ( pxList ) ) ) + +/* + * Return the list a list item is contained within (referenced from). + * + * @param pxListItem The list item being queried. + * @return A pointer to the List_t object that references the pxListItem + */ +#define listLIST_ITEM_CONTAINER( pxListItem ) ( ( pxListItem )->pvContainer ) + +/* + * This provides a crude means of knowing if a list has been initialised, as + * pxList->xListEnd.xItemValue is set to portMAX_DELAY by the vListInitialise() + * function. + */ +#define listLIST_IS_INITIALISED( pxList ) ( ( pxList )->xListEnd.xItemValue == portMAX_DELAY ) + +/* + * Must be called before a list is used! This initialises all the members + * of the list structure and inserts the xListEnd item into the list as a + * marker to the back of the list. + * + * @param pxList Pointer to the list being initialised. + * + * \page vListInitialise vListInitialise + * \ingroup LinkedList + */ +void vListInitialise( List_t * const pxList ) PRIVILEGED_FUNCTION; + +/* + * Must be called before a list item is used. This sets the list container to + * null so the item does not think that it is already contained in a list. + * + * @param pxItem Pointer to the list item being initialised. + * + * \page vListInitialiseItem vListInitialiseItem + * \ingroup LinkedList + */ +void vListInitialiseItem( ListItem_t * const pxItem ) PRIVILEGED_FUNCTION; + +/* + * Insert a list item into a list. The item will be inserted into the list in + * a position determined by its item value (descending item value order). + * + * @param pxList The list into which the item is to be inserted. + * + * @param pxNewListItem The item that is to be placed in the list. + * + * \page vListInsert vListInsert + * \ingroup LinkedList + */ +void vListInsert( List_t * const pxList, ListItem_t * const pxNewListItem ) PRIVILEGED_FUNCTION; + +/* + * Insert a list item into a list. The item will be inserted in a position + * such that it will be the last item within the list returned by multiple + * calls to listGET_OWNER_OF_NEXT_ENTRY. + * + * The list member pxIndex is used to walk through a list. Calling + * listGET_OWNER_OF_NEXT_ENTRY increments pxIndex to the next item in the list. + * Placing an item in a list using vListInsertEnd effectively places the item + * in the list position pointed to by pxIndex. This means that every other + * item within the list will be returned by listGET_OWNER_OF_NEXT_ENTRY before + * the pxIndex parameter again points to the item being inserted. + * + * @param pxList The list into which the item is to be inserted. + * + * @param pxNewListItem The list item to be inserted into the list. + * + * \page vListInsertEnd vListInsertEnd + * \ingroup LinkedList + */ +void vListInsertEnd( List_t * const pxList, ListItem_t * const pxNewListItem ) PRIVILEGED_FUNCTION; + +/* + * Remove an item from a list. The list item has a pointer to the list that + * it is in, so only the list item need be passed into the function. + * + * @param uxListRemove The item to be removed. The item will remove itself from + * the list pointed to by it's pxContainer parameter. + * + * @return The number of items that remain in the list after the list item has + * been removed. + * + * \page uxListRemove uxListRemove + * \ingroup LinkedList + */ +UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove ) PRIVILEGED_FUNCTION; + +#ifdef __cplusplus +} +#endif + +#endif + diff --git a/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/include/message_buffer.h b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/include/message_buffer.h new file mode 100644 index 0000000..91e34fa --- /dev/null +++ b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/include/message_buffer.h @@ -0,0 +1,779 @@ +/* + * FreeRTOS Kernel V10.0.1 + * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + + +/* + * Message buffers build functionality on top of FreeRTOS stream buffers. + * Whereas stream buffers are used to send a continuous stream of data from one + * task or interrupt to another, message buffers are used to send variable + * length discrete messages from one task or interrupt to another. Their + * implementation is light weight, making them particularly suited for interrupt + * to task and core to core communication scenarios. + * + * ***NOTE***: Uniquely among FreeRTOS objects, the stream buffer + * implementation (so also the message buffer implementation, as message buffers + * are built on top of stream buffers) assumes there is only one task or + * interrupt that will write to the buffer (the writer), and only one task or + * interrupt that will read from the buffer (the reader). It is safe for the + * writer and reader to be different tasks or interrupts, but, unlike other + * FreeRTOS objects, it is not safe to have multiple different writers or + * multiple different readers. If there are to be multiple different writers + * then the application writer must place each call to a writing API function + * (such as xMessageBufferSend()) inside a critical section and set the send + * block time to 0. Likewise, if there are to be multiple different readers + * then the application writer must place each call to a reading API function + * (such as xMessageBufferRead()) inside a critical section and set the receive + * timeout to 0. + * + * Message buffers hold variable length messages. To enable that, when a + * message is written to the message buffer an additional sizeof( size_t ) bytes + * are also written to store the message's length (that happens internally, with + * the API function). sizeof( size_t ) is typically 4 bytes on a 32-bit + * architecture, so writing a 10 byte message to a message buffer on a 32-bit + * architecture will actually reduce the available space in the message buffer + * by 14 bytes (10 byte are used by the message, and 4 bytes to hold the length + * of the message). + */ + +#ifndef FREERTOS_MESSAGE_BUFFER_H +#define FREERTOS_MESSAGE_BUFFER_H + +/* Message buffers are built onto of stream buffers. */ +#include "stream_buffer.h" + +#if defined( __cplusplus ) +extern "C" { +#endif + +/** + * Type by which message buffers are referenced. For example, a call to + * xMessageBufferCreate() returns an MessageBufferHandle_t variable that can + * then be used as a parameter to xMessageBufferSend(), xMessageBufferReceive(), + * etc. + */ +typedef void * MessageBufferHandle_t; + +/*-----------------------------------------------------------*/ + +/** + * message_buffer.h + * +
+MessageBufferHandle_t xMessageBufferCreate( size_t xBufferSizeBytes ); ++ * + * Creates a new message buffer using dynamically allocated memory. See + * xMessageBufferCreateStatic() for a version that uses statically allocated + * memory (memory that is allocated at compile time). + * + * configSUPPORT_DYNAMIC_ALLOCATION must be set to 1 or left undefined in + * FreeRTOSConfig.h for xMessageBufferCreate() to be available. + * + * @param xBufferSizeBytes The total number of bytes (not messages) the message + * buffer will be able to hold at any one time. When a message is written to + * the message buffer an additional sizeof( size_t ) bytes are also written to + * store the message's length. sizeof( size_t ) is typically 4 bytes on a + * 32-bit architecture, so on most 32-bit architectures a 10 byte message will + * take up 14 bytes of message buffer space. + * + * @return If NULL is returned, then the message buffer cannot be created + * because there is insufficient heap memory available for FreeRTOS to allocate + * the message buffer data structures and storage area. A non-NULL value being + * returned indicates that the message buffer has been created successfully - + * the returned value should be stored as the handle to the created message + * buffer. + * + * Example use: +
+
+void vAFunction( void )
+{
+MessageBufferHandle_t xMessageBuffer;
+const size_t xMessageBufferSizeBytes = 100;
+
+ // Create a message buffer that can hold 100 bytes. The memory used to hold
+ // both the message buffer structure and the messages themselves is allocated
+ // dynamically. Each message added to the buffer consumes an additional 4
+ // bytes which are used to hold the lengh of the message.
+ xMessageBuffer = xMessageBufferCreate( xMessageBufferSizeBytes );
+
+ if( xMessageBuffer == NULL )
+ {
+ // There was not enough heap memory space available to create the
+ // message buffer.
+ }
+ else
+ {
+ // The message buffer was created successfully and can now be used.
+ }
+
+
+ * \defgroup xMessageBufferCreate xMessageBufferCreate
+ * \ingroup MessageBufferManagement
+ */
+#define xMessageBufferCreate( xBufferSizeBytes ) ( MessageBufferHandle_t ) xStreamBufferGenericCreate( xBufferSizeBytes, ( size_t ) 0, pdTRUE )
+
+/**
+ * message_buffer.h
+ *
++MessageBufferHandle_t xMessageBufferCreateStatic( size_t xBufferSizeBytes, + uint8_t *pucMessageBufferStorageArea, + StaticMessageBuffer_t *pxStaticMessageBuffer ); ++ * Creates a new message buffer using statically allocated memory. See + * xMessageBufferCreate() for a version that uses dynamically allocated memory. + * + * @param xBufferSizeBytes The size, in bytes, of the buffer pointed to by the + * pucMessageBufferStorageArea parameter. When a message is written to the + * message buffer an additional sizeof( size_t ) bytes are also written to store + * the message's length. sizeof( size_t ) is typically 4 bytes on a 32-bit + * architecture, so on most 32-bit architecture a 10 byte message will take up + * 14 bytes of message buffer space. The maximum number of bytes that can be + * stored in the message buffer is actually (xBufferSizeBytes - 1). + * + * @param pucMessageBufferStorageArea Must point to a uint8_t array that is at + * least xBufferSizeBytes + 1 big. This is the array to which messages are + * copied when they are written to the message buffer. + * + * @param pxStaticMessageBuffer Must point to a variable of type + * StaticMessageBuffer_t, which will be used to hold the message buffer's data + * structure. + * + * @return If the message buffer is created successfully then a handle to the + * created message buffer is returned. If either pucMessageBufferStorageArea or + * pxStaticmessageBuffer are NULL then NULL is returned. + * + * Example use: +
+
+// Used to dimension the array used to hold the messages. The available space
+// will actually be one less than this, so 999.
+#define STORAGE_SIZE_BYTES 1000
+
+// Defines the memory that will actually hold the messages within the message
+// buffer.
+static uint8_t ucStorageBuffer[ STORAGE_SIZE_BYTES ];
+
+// The variable used to hold the message buffer structure.
+StaticMessageBuffer_t xMessageBufferStruct;
+
+void MyFunction( void )
+{
+MessageBufferHandle_t xMessageBuffer;
+
+ xMessageBuffer = xMessageBufferCreateStatic( sizeof( ucBufferStorage ),
+ ucBufferStorage,
+ &xMessageBufferStruct );
+
+ // As neither the pucMessageBufferStorageArea or pxStaticMessageBuffer
+ // parameters were NULL, xMessageBuffer will not be NULL, and can be used to
+ // reference the created message buffer in other message buffer API calls.
+
+ // Other code that uses the message buffer can go here.
+}
+
+
+ * \defgroup xMessageBufferCreateStatic xMessageBufferCreateStatic
+ * \ingroup MessageBufferManagement
+ */
+#define xMessageBufferCreateStatic( xBufferSizeBytes, pucMessageBufferStorageArea, pxStaticMessageBuffer ) ( MessageBufferHandle_t ) xStreamBufferGenericCreateStatic( xBufferSizeBytes, 0, pdTRUE, pucMessageBufferStorageArea, pxStaticMessageBuffer )
+
+/**
+ * message_buffer.h
+ *
++size_t xMessageBufferSend( MessageBufferHandle_t xMessageBuffer, + const void *pvTxData, + size_t xDataLengthBytes, + TickType_t xTicksToWait ); ++ * + * Sends a discrete message to the message buffer. The message can be any + * length that fits within the buffer's free space, and is copied into the + * buffer. + * + * ***NOTE***: Uniquely among FreeRTOS objects, the stream buffer + * implementation (so also the message buffer implementation, as message buffers + * are built on top of stream buffers) assumes there is only one task or + * interrupt that will write to the buffer (the writer), and only one task or + * interrupt that will read from the buffer (the reader). It is safe for the + * writer and reader to be different tasks or interrupts, but, unlike other + * FreeRTOS objects, it is not safe to have multiple different writers or + * multiple different readers. If there are to be multiple different writers + * then the application writer must place each call to a writing API function + * (such as xMessageBufferSend()) inside a critical section and set the send + * block time to 0. Likewise, if there are to be multiple different readers + * then the application writer must place each call to a reading API function + * (such as xMessageBufferRead()) inside a critical section and set the receive + * block time to 0. + * + * Use xMessageBufferSend() to write to a message buffer from a task. Use + * xMessageBufferSendFromISR() to write to a message buffer from an interrupt + * service routine (ISR). + * + * @param xMessageBuffer The handle of the message buffer to which a message is + * being sent. + * + * @param pvTxData A pointer to the message that is to be copied into the + * message buffer. + * + * @param xDataLengthBytes The length of the message. That is, the number of + * bytes to copy from pvTxData into the message buffer. When a message is + * written to the message buffer an additional sizeof( size_t ) bytes are also + * written to store the message's length. sizeof( size_t ) is typically 4 bytes + * on a 32-bit architecture, so on most 32-bit architecture setting + * xDataLengthBytes to 20 will reduce the free space in the message buffer by 24 + * bytes (20 bytes of message data and 4 bytes to hold the message length). + * + * @param xTicksToWait The maximum amount of time the calling task should remain + * in the Blocked state to wait for enough space to become available in the + * message buffer, should the message buffer have insufficient space when + * xMessageBufferSend() is called. The calling task will never block if + * xTicksToWait is zero. The block time is specified in tick periods, so the + * absolute time it represents is dependent on the tick frequency. The macro + * pdMS_TO_TICKS() can be used to convert a time specified in milliseconds into + * a time specified in ticks. Setting xTicksToWait to portMAX_DELAY will cause + * the task to wait indefinitely (without timing out), provided + * INCLUDE_vTaskSuspend is set to 1 in FreeRTOSConfig.h. Tasks do not use any + * CPU time when they are in the Blocked state. + * + * @return The number of bytes written to the message buffer. If the call to + * xMessageBufferSend() times out before there was enough space to write the + * message into the message buffer then zero is returned. If the call did not + * time out then xDataLengthBytes is returned. + * + * Example use: ++void vAFunction( MessageBufferHandle_t xMessageBuffer ) +{ +size_t xBytesSent; +uint8_t ucArrayToSend[] = { 0, 1, 2, 3 }; +char *pcStringToSend = "String to send"; +const TickType_t x100ms = pdMS_TO_TICKS( 100 ); + + // Send an array to the message buffer, blocking for a maximum of 100ms to + // wait for enough space to be available in the message buffer. + xBytesSent = xMessageBufferSend( xMessageBuffer, ( void * ) ucArrayToSend, sizeof( ucArrayToSend ), x100ms ); + + if( xBytesSent != sizeof( ucArrayToSend ) ) + { + // The call to xMessageBufferSend() times out before there was enough + // space in the buffer for the data to be written. + } + + // Send the string to the message buffer. Return immediately if there is + // not enough space in the buffer. + xBytesSent = xMessageBufferSend( xMessageBuffer, ( void * ) pcStringToSend, strlen( pcStringToSend ), 0 ); + + if( xBytesSent != strlen( pcStringToSend ) ) + { + // The string could not be added to the message buffer because there was + // not enough free space in the buffer. + } +} ++ * \defgroup xMessageBufferSend xMessageBufferSend + * \ingroup MessageBufferManagement + */ +#define xMessageBufferSend( xMessageBuffer, pvTxData, xDataLengthBytes, xTicksToWait ) xStreamBufferSend( ( StreamBufferHandle_t ) xMessageBuffer, pvTxData, xDataLengthBytes, xTicksToWait ) + +/** + * message_buffer.h + * ++size_t xMessageBufferSendFromISR( MessageBufferHandle_t xMessageBuffer, + const void *pvTxData, + size_t xDataLengthBytes, + BaseType_t *pxHigherPriorityTaskWoken ); ++ * + * Interrupt safe version of the API function that sends a discrete message to + * the message buffer. The message can be any length that fits within the + * buffer's free space, and is copied into the buffer. + * + * ***NOTE***: Uniquely among FreeRTOS objects, the stream buffer + * implementation (so also the message buffer implementation, as message buffers + * are built on top of stream buffers) assumes there is only one task or + * interrupt that will write to the buffer (the writer), and only one task or + * interrupt that will read from the buffer (the reader). It is safe for the + * writer and reader to be different tasks or interrupts, but, unlike other + * FreeRTOS objects, it is not safe to have multiple different writers or + * multiple different readers. If there are to be multiple different writers + * then the application writer must place each call to a writing API function + * (such as xMessageBufferSend()) inside a critical section and set the send + * block time to 0. Likewise, if there are to be multiple different readers + * then the application writer must place each call to a reading API function + * (such as xMessageBufferRead()) inside a critical section and set the receive + * block time to 0. + * + * Use xMessageBufferSend() to write to a message buffer from a task. Use + * xMessageBufferSendFromISR() to write to a message buffer from an interrupt + * service routine (ISR). + * + * @param xMessageBuffer The handle of the message buffer to which a message is + * being sent. + * + * @param pvTxData A pointer to the message that is to be copied into the + * message buffer. + * + * @param xDataLengthBytes The length of the message. That is, the number of + * bytes to copy from pvTxData into the message buffer. When a message is + * written to the message buffer an additional sizeof( size_t ) bytes are also + * written to store the message's length. sizeof( size_t ) is typically 4 bytes + * on a 32-bit architecture, so on most 32-bit architecture setting + * xDataLengthBytes to 20 will reduce the free space in the message buffer by 24 + * bytes (20 bytes of message data and 4 bytes to hold the message length). + * + * @param pxHigherPriorityTaskWoken It is possible that a message buffer will + * have a task blocked on it waiting for data. Calling + * xMessageBufferSendFromISR() can make data available, and so cause a task that + * was waiting for data to leave the Blocked state. If calling + * xMessageBufferSendFromISR() causes a task to leave the Blocked state, and the + * unblocked task has a priority higher than the currently executing task (the + * task that was interrupted), then, internally, xMessageBufferSendFromISR() + * will set *pxHigherPriorityTaskWoken to pdTRUE. If + * xMessageBufferSendFromISR() sets this value to pdTRUE, then normally a + * context switch should be performed before the interrupt is exited. This will + * ensure that the interrupt returns directly to the highest priority Ready + * state task. *pxHigherPriorityTaskWoken should be set to pdFALSE before it + * is passed into the function. See the code example below for an example. + * + * @return The number of bytes actually written to the message buffer. If the + * message buffer didn't have enough free space for the message to be stored + * then 0 is returned, otherwise xDataLengthBytes is returned. + * + * Example use: ++// A message buffer that has already been created. +MessageBufferHandle_t xMessageBuffer; + +void vAnInterruptServiceRoutine( void ) +{ +size_t xBytesSent; +char *pcStringToSend = "String to send"; +BaseType_t xHigherPriorityTaskWoken = pdFALSE; // Initialised to pdFALSE. + + // Attempt to send the string to the message buffer. + xBytesSent = xMessageBufferSendFromISR( xMessageBuffer, + ( void * ) pcStringToSend, + strlen( pcStringToSend ), + &xHigherPriorityTaskWoken ); + + if( xBytesSent != strlen( pcStringToSend ) ) + { + // The string could not be added to the message buffer because there was + // not enough free space in the buffer. + } + + // If xHigherPriorityTaskWoken was set to pdTRUE inside + // xMessageBufferSendFromISR() then a task that has a priority above the + // priority of the currently executing task was unblocked and a context + // switch should be performed to ensure the ISR returns to the unblocked + // task. In most FreeRTOS ports this is done by simply passing + // xHigherPriorityTaskWoken into taskYIELD_FROM_ISR(), which will test the + // variables value, and perform the context switch if necessary. Check the + // documentation for the port in use for port specific instructions. + taskYIELD_FROM_ISR( xHigherPriorityTaskWoken ); +} ++ * \defgroup xMessageBufferSendFromISR xMessageBufferSendFromISR + * \ingroup MessageBufferManagement + */ +#define xMessageBufferSendFromISR( xMessageBuffer, pvTxData, xDataLengthBytes, pxHigherPriorityTaskWoken ) xStreamBufferSendFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pvTxData, xDataLengthBytes, pxHigherPriorityTaskWoken ) + +/** + * message_buffer.h + * ++size_t xMessageBufferReceive( MessageBufferHandle_t xMessageBuffer, + void *pvRxData, + size_t xBufferLengthBytes, + TickType_t xTicksToWait ); ++ * + * Receives a discrete message from a message buffer. Messages can be of + * variable length and are copied out of the buffer. + * + * ***NOTE***: Uniquely among FreeRTOS objects, the stream buffer + * implementation (so also the message buffer implementation, as message buffers + * are built on top of stream buffers) assumes there is only one task or + * interrupt that will write to the buffer (the writer), and only one task or + * interrupt that will read from the buffer (the reader). It is safe for the + * writer and reader to be different tasks or interrupts, but, unlike other + * FreeRTOS objects, it is not safe to have multiple different writers or + * multiple different readers. If there are to be multiple different writers + * then the application writer must place each call to a writing API function + * (such as xMessageBufferSend()) inside a critical section and set the send + * block time to 0. Likewise, if there are to be multiple different readers + * then the application writer must place each call to a reading API function + * (such as xMessageBufferRead()) inside a critical section and set the receive + * block time to 0. + * + * Use xMessageBufferReceive() to read from a message buffer from a task. Use + * xMessageBufferReceiveFromISR() to read from a message buffer from an + * interrupt service routine (ISR). + * + * @param xMessageBuffer The handle of the message buffer from which a message + * is being received. + * + * @param pvRxData A pointer to the buffer into which the received message is + * to be copied. + * + * @param xBufferLengthBytes The length of the buffer pointed to by the pvRxData + * parameter. This sets the maximum length of the message that can be received. + * If xBufferLengthBytes is too small to hold the next message then the message + * will be left in the message buffer and 0 will be returned. + * + * @param xTicksToWait The maximum amount of time the task should remain in the + * Blocked state to wait for a message, should the message buffer be empty. + * xMessageBufferReceive() will return immediately if xTicksToWait is zero and + * the message buffer is empty. The block time is specified in tick periods, so + * the absolute time it represents is dependent on the tick frequency. The + * macro pdMS_TO_TICKS() can be used to convert a time specified in milliseconds + * into a time specified in ticks. Setting xTicksToWait to portMAX_DELAY will + * cause the task to wait indefinitely (without timing out), provided + * INCLUDE_vTaskSuspend is set to 1 in FreeRTOSConfig.h. Tasks do not use any + * CPU time when they are in the Blocked state. + * + * @return The length, in bytes, of the message read from the message buffer, if + * any. If xMessageBufferReceive() times out before a message became available + * then zero is returned. If the length of the message is greater than + * xBufferLengthBytes then the message will be left in the message buffer and + * zero is returned. + * + * Example use: ++void vAFunction( MessageBuffer_t xMessageBuffer ) +{ +uint8_t ucRxData[ 20 ]; +size_t xReceivedBytes; +const TickType_t xBlockTime = pdMS_TO_TICKS( 20 ); + + // Receive the next message from the message buffer. Wait in the Blocked + // state (so not using any CPU processing time) for a maximum of 100ms for + // a message to become available. + xReceivedBytes = xMessageBufferReceive( xMessageBuffer, + ( void * ) ucRxData, + sizeof( ucRxData ), + xBlockTime ); + + if( xReceivedBytes > 0 ) + { + // A ucRxData contains a message that is xReceivedBytes long. Process + // the message here.... + } +} ++ * \defgroup xMessageBufferReceive xMessageBufferReceive + * \ingroup MessageBufferManagement + */ +#define xMessageBufferReceive( xMessageBuffer, pvRxData, xBufferLengthBytes, xTicksToWait ) xStreamBufferReceive( ( StreamBufferHandle_t ) xMessageBuffer, pvRxData, xBufferLengthBytes, xTicksToWait ) + + +/** + * message_buffer.h + * ++size_t xMessageBufferReceiveFromISR( MessageBufferHandle_t xMessageBuffer, + void *pvRxData, + size_t xBufferLengthBytes, + BaseType_t *pxHigherPriorityTaskWoken ); ++ * + * An interrupt safe version of the API function that receives a discrete + * message from a message buffer. Messages can be of variable length and are + * copied out of the buffer. + * + * ***NOTE***: Uniquely among FreeRTOS objects, the stream buffer + * implementation (so also the message buffer implementation, as message buffers + * are built on top of stream buffers) assumes there is only one task or + * interrupt that will write to the buffer (the writer), and only one task or + * interrupt that will read from the buffer (the reader). It is safe for the + * writer and reader to be different tasks or interrupts, but, unlike other + * FreeRTOS objects, it is not safe to have multiple different writers or + * multiple different readers. If there are to be multiple different writers + * then the application writer must place each call to a writing API function + * (such as xMessageBufferSend()) inside a critical section and set the send + * block time to 0. Likewise, if there are to be multiple different readers + * then the application writer must place each call to a reading API function + * (such as xMessageBufferRead()) inside a critical section and set the receive + * block time to 0. + * + * Use xMessageBufferReceive() to read from a message buffer from a task. Use + * xMessageBufferReceiveFromISR() to read from a message buffer from an + * interrupt service routine (ISR). + * + * @param xMessageBuffer The handle of the message buffer from which a message + * is being received. + * + * @param pvRxData A pointer to the buffer into which the received message is + * to be copied. + * + * @param xBufferLengthBytes The length of the buffer pointed to by the pvRxData + * parameter. This sets the maximum length of the message that can be received. + * If xBufferLengthBytes is too small to hold the next message then the message + * will be left in the message buffer and 0 will be returned. + * + * @param pxHigherPriorityTaskWoken It is possible that a message buffer will + * have a task blocked on it waiting for space to become available. Calling + * xMessageBufferReceiveFromISR() can make space available, and so cause a task + * that is waiting for space to leave the Blocked state. If calling + * xMessageBufferReceiveFromISR() causes a task to leave the Blocked state, and + * the unblocked task has a priority higher than the currently executing task + * (the task that was interrupted), then, internally, + * xMessageBufferReceiveFromISR() will set *pxHigherPriorityTaskWoken to pdTRUE. + * If xMessageBufferReceiveFromISR() sets this value to pdTRUE, then normally a + * context switch should be performed before the interrupt is exited. That will + * ensure the interrupt returns directly to the highest priority Ready state + * task. *pxHigherPriorityTaskWoken should be set to pdFALSE before it is + * passed into the function. See the code example below for an example. + * + * @return The length, in bytes, of the message read from the message buffer, if + * any. + * + * Example use: ++// A message buffer that has already been created. +MessageBuffer_t xMessageBuffer; + +void vAnInterruptServiceRoutine( void ) +{ +uint8_t ucRxData[ 20 ]; +size_t xReceivedBytes; +BaseType_t xHigherPriorityTaskWoken = pdFALSE; // Initialised to pdFALSE. + + // Receive the next message from the message buffer. + xReceivedBytes = xMessageBufferReceiveFromISR( xMessageBuffer, + ( void * ) ucRxData, + sizeof( ucRxData ), + &xHigherPriorityTaskWoken ); + + if( xReceivedBytes > 0 ) + { + // A ucRxData contains a message that is xReceivedBytes long. Process + // the message here.... + } + + // If xHigherPriorityTaskWoken was set to pdTRUE inside + // xMessageBufferReceiveFromISR() then a task that has a priority above the + // priority of the currently executing task was unblocked and a context + // switch should be performed to ensure the ISR returns to the unblocked + // task. In most FreeRTOS ports this is done by simply passing + // xHigherPriorityTaskWoken into taskYIELD_FROM_ISR(), which will test the + // variables value, and perform the context switch if necessary. Check the + // documentation for the port in use for port specific instructions. + taskYIELD_FROM_ISR( xHigherPriorityTaskWoken ); +} ++ * \defgroup xMessageBufferReceiveFromISR xMessageBufferReceiveFromISR + * \ingroup MessageBufferManagement + */ +#define xMessageBufferReceiveFromISR( xMessageBuffer, pvRxData, xBufferLengthBytes, pxHigherPriorityTaskWoken ) xStreamBufferReceiveFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pvRxData, xBufferLengthBytes, pxHigherPriorityTaskWoken ) + +/** + * message_buffer.h + * ++void vMessageBufferDelete( MessageBufferHandle_t xMessageBuffer ); ++ * + * Deletes a message buffer that was previously created using a call to + * xMessageBufferCreate() or xMessageBufferCreateStatic(). If the message + * buffer was created using dynamic memory (that is, by xMessageBufferCreate()), + * then the allocated memory is freed. + * + * A message buffer handle must not be used after the message buffer has been + * deleted. + * + * @param xMessageBuffer The handle of the message buffer to be deleted. + * + */ +#define vMessageBufferDelete( xMessageBuffer ) vStreamBufferDelete( ( StreamBufferHandle_t ) xMessageBuffer ) + +/** + * message_buffer.h ++BaseType_t xMessageBufferIsFull( MessageBufferHandle_t xMessageBuffer ) ); ++ * + * Tests to see if a message buffer is full. A message buffer is full if it + * cannot accept any more messages, of any size, until space is made available + * by a message being removed from the message buffer. + * + * @param xMessageBuffer The handle of the message buffer being queried. + * + * @return If the message buffer referenced by xMessageBuffer is full then + * pdTRUE is returned. Otherwise pdFALSE is returned. + */ +#define xMessageBufferIsFull( xMessageBuffer ) xStreamBufferIsFull( ( StreamBufferHandle_t ) xMessageBuffer ) + +/** + * message_buffer.h ++BaseType_t xMessageBufferIsEmpty( MessageBufferHandle_t xMessageBuffer ) ); ++ * + * Tests to see if a message buffer is empty (does not contain any messages). + * + * @param xMessageBuffer The handle of the message buffer being queried. + * + * @return If the message buffer referenced by xMessageBuffer is empty then + * pdTRUE is returned. Otherwise pdFALSE is returned. + * + */ +#define xMessageBufferIsEmpty( xMessageBuffer ) xStreamBufferIsEmpty( ( StreamBufferHandle_t ) xMessageBuffer ) + +/** + * message_buffer.h ++BaseType_t xMessageBufferReset( MessageBufferHandle_t xMessageBuffer ); ++ * + * Resets a message buffer to its initial empty state, discarding any message it + * contained. + * + * A message buffer can only be reset if there are no tasks blocked on it. + * + * @param xMessageBuffer The handle of the message buffer being reset. + * + * @return If the message buffer was reset then pdPASS is returned. If the + * message buffer could not be reset because either there was a task blocked on + * the message queue to wait for space to become available, or to wait for a + * a message to be available, then pdFAIL is returned. + * + * \defgroup xMessageBufferReset xMessageBufferReset + * \ingroup MessageBufferManagement + */ +#define xMessageBufferReset( xMessageBuffer ) xStreamBufferReset( ( StreamBufferHandle_t ) xMessageBuffer ) + + +/** + * message_buffer.h ++size_t xMessageBufferSpaceAvailable( MessageBufferHandle_t xMessageBuffer ) ); ++ * Returns the number of bytes of free space in the message buffer. + * + * @param xMessageBuffer The handle of the message buffer being queried. + * + * @return The number of bytes that can be written to the message buffer before + * the message buffer would be full. When a message is written to the message + * buffer an additional sizeof( size_t ) bytes are also written to store the + * message's length. sizeof( size_t ) is typically 4 bytes on a 32-bit + * architecture, so if xMessageBufferSpacesAvailable() returns 10, then the size + * of the largest message that can be written to the message buffer is 6 bytes. + * + * \defgroup xMessageBufferSpaceAvailable xMessageBufferSpaceAvailable + * \ingroup MessageBufferManagement + */ +#define xMessageBufferSpaceAvailable( xMessageBuffer ) xStreamBufferSpacesAvailable( ( StreamBufferHandle_t ) xMessageBuffer ) + +/** + * message_buffer.h + * ++BaseType_t xMessageBufferSendCompletedFromISR( MessageBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken ); ++ * + * For advanced users only. + * + * The sbSEND_COMPLETED() macro is called from within the FreeRTOS APIs when + * data is sent to a message buffer or stream buffer. If there was a task that + * was blocked on the message or stream buffer waiting for data to arrive then + * the sbSEND_COMPLETED() macro sends a notification to the task to remove it + * from the Blocked state. xMessageBufferSendCompletedFromISR() does the same + * thing. It is provided to enable application writers to implement their own + * version of sbSEND_COMPLETED(), and MUST NOT BE USED AT ANY OTHER TIME. + * + * See the example implemented in FreeRTOS/Demo/Minimal/MessageBufferAMP.c for + * additional information. + * + * @param xStreamBuffer The handle of the stream buffer to which data was + * written. + * + * @param pxHigherPriorityTaskWoken *pxHigherPriorityTaskWoken should be + * initialised to pdFALSE before it is passed into + * xMessageBufferSendCompletedFromISR(). If calling + * xMessageBufferSendCompletedFromISR() removes a task from the Blocked state, + * and the task has a priority above the priority of the currently running task, + * then *pxHigherPriorityTaskWoken will get set to pdTRUE indicating that a + * context switch should be performed before exiting the ISR. + * + * @return If a task was removed from the Blocked state then pdTRUE is returned. + * Otherwise pdFALSE is returned. + * + * \defgroup xMessageBufferSendCompletedFromISR xMessageBufferSendCompletedFromISR + * \ingroup StreamBufferManagement + */ +#define xMessageBufferSendCompletedFromISR( xMessageBuffer, pxHigherPriorityTaskWoken ) xStreamBufferSendCompletedFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pxHigherPriorityTaskWoken ) + +/** + * message_buffer.h + * ++BaseType_t xMessageBufferReceiveCompletedFromISR( MessageBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken ); ++ * + * For advanced users only. + * + * The sbRECEIVE_COMPLETED() macro is called from within the FreeRTOS APIs when + * data is read out of a message buffer or stream buffer. If there was a task + * that was blocked on the message or stream buffer waiting for data to arrive + * then the sbRECEIVE_COMPLETED() macro sends a notification to the task to + * remove it from the Blocked state. xMessageBufferReceiveCompletedFromISR() + * does the same thing. It is provided to enable application writers to + * implement their own version of sbRECEIVE_COMPLETED(), and MUST NOT BE USED AT + * ANY OTHER TIME. + * + * See the example implemented in FreeRTOS/Demo/Minimal/MessageBufferAMP.c for + * additional information. + * + * @param xStreamBuffer The handle of the stream buffer from which data was + * read. + * + * @param pxHigherPriorityTaskWoken *pxHigherPriorityTaskWoken should be + * initialised to pdFALSE before it is passed into + * xMessageBufferReceiveCompletedFromISR(). If calling + * xMessageBufferReceiveCompletedFromISR() removes a task from the Blocked state, + * and the task has a priority above the priority of the currently running task, + * then *pxHigherPriorityTaskWoken will get set to pdTRUE indicating that a + * context switch should be performed before exiting the ISR. + * + * @return If a task was removed from the Blocked state then pdTRUE is returned. + * Otherwise pdFALSE is returned. + * + * \defgroup xMessageBufferReceiveCompletedFromISR xMessageBufferReceiveCompletedFromISR + * \ingroup StreamBufferManagement + */ +#define xMessageBufferReceiveCompletedFromISR( xMessageBuffer, pxHigherPriorityTaskWoken ) xStreamBufferReceiveCompletedFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pxHigherPriorityTaskWoken ) + +#if defined( __cplusplus ) +} /* extern "C" */ +#endif + +#endif /* !defined( FREERTOS_MESSAGE_BUFFER_H ) */ diff --git a/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/include/mpu_prototypes.h b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/include/mpu_prototypes.h new file mode 100644 index 0000000..e2c89ab --- /dev/null +++ b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/include/mpu_prototypes.h @@ -0,0 +1,155 @@ +/* + * FreeRTOS Kernel V10.0.1 + * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/* + * When the MPU is used the standard (non MPU) API functions are mapped to + * equivalents that start "MPU_", the prototypes for which are defined in this + * header files. This will cause the application code to call the MPU_ version + * which wraps the non-MPU version with privilege promoting then demoting code, + * so the kernel code always runs will full privileges. + */ + + +#ifndef MPU_PROTOTYPES_H +#define MPU_PROTOTYPES_H + +/* MPU versions of tasks.h API functions. */ +BaseType_t MPU_xTaskCreate( TaskFunction_t pxTaskCode, const char * const pcName, const uint16_t usStackDepth, void * const pvParameters, UBaseType_t uxPriority, TaskHandle_t * const pxCreatedTask ); +TaskHandle_t MPU_xTaskCreateStatic( TaskFunction_t pxTaskCode, const char * const pcName, const uint32_t ulStackDepth, void * const pvParameters, UBaseType_t uxPriority, StackType_t * const puxStackBuffer, StaticTask_t * const pxTaskBuffer ); +BaseType_t MPU_xTaskCreateRestricted( const TaskParameters_t * const pxTaskDefinition, TaskHandle_t *pxCreatedTask ); +BaseType_t MPU_xTaskCreateRestrictedStatic( const TaskParameters_t * const pxTaskDefinition, TaskHandle_t *pxCreatedTask ); +void MPU_vTaskAllocateMPURegions( TaskHandle_t xTask, const MemoryRegion_t * const pxRegions ); +void MPU_vTaskDelete( TaskHandle_t xTaskToDelete ); +void MPU_vTaskDelay( const TickType_t xTicksToDelay ); +void MPU_vTaskDelayUntil( TickType_t * const pxPreviousWakeTime, const TickType_t xTimeIncrement ); +BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ); +UBaseType_t MPU_uxTaskPriorityGet( TaskHandle_t xTask ); +eTaskState MPU_eTaskGetState( TaskHandle_t xTask ); +void MPU_vTaskGetInfo( TaskHandle_t xTask, TaskStatus_t *pxTaskStatus, BaseType_t xGetFreeStackSpace, eTaskState eState ); +void MPU_vTaskPrioritySet( TaskHandle_t xTask, UBaseType_t uxNewPriority ); +void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ); +void MPU_vTaskResume( TaskHandle_t xTaskToResume ); +void MPU_vTaskStartScheduler( void ); +void MPU_vTaskSuspendAll( void ); +BaseType_t MPU_xTaskResumeAll( void ); +TickType_t MPU_xTaskGetTickCount( void ); +UBaseType_t MPU_uxTaskGetNumberOfTasks( void ); +char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ); +TaskHandle_t MPU_xTaskGetHandle( const char *pcNameToQuery ); +UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ); +void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, TaskHookFunction_t pxHookFunction ); +TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ); +void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, BaseType_t xIndex, void *pvValue ); +void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, BaseType_t xIndex ); +BaseType_t MPU_xTaskCallApplicationTaskHook( TaskHandle_t xTask, void *pvParameter ); +TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ); +UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, const UBaseType_t uxArraySize, uint32_t * const pulTotalRunTime ); +void MPU_vTaskList( char * pcWriteBuffer ); +void MPU_vTaskGetRunTimeStats( char *pcWriteBuffer ); +BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue ); +BaseType_t MPU_xTaskNotifyWait( uint32_t ulBitsToClearOnEntry, uint32_t ulBitsToClearOnExit, uint32_t *pulNotificationValue, TickType_t xTicksToWait ); +uint32_t MPU_ulTaskNotifyTake( BaseType_t xClearCountOnExit, TickType_t xTicksToWait ); +BaseType_t MPU_xTaskNotifyStateClear( TaskHandle_t xTask ); +BaseType_t MPU_xTaskIncrementTick( void ); +TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ); +void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ); +BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, TickType_t * const pxTicksToWait ); +void MPU_vTaskMissedYield( void ); +BaseType_t MPU_xTaskGetSchedulerState( void ); + +/* MPU versions of queue.h API functions. */ +BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, const BaseType_t xCopyPosition ); +BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait ); +BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait ); +BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, TickType_t xTicksToWait ); +UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ); +UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ); +void MPU_vQueueDelete( QueueHandle_t xQueue ); +QueueHandle_t MPU_xQueueCreateMutex( const uint8_t ucQueueType ); +QueueHandle_t MPU_xQueueCreateMutexStatic( const uint8_t ucQueueType, StaticQueue_t *pxStaticQueue ); +QueueHandle_t MPU_xQueueCreateCountingSemaphore( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount ); +QueueHandle_t MPU_xQueueCreateCountingSemaphoreStatic( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount, StaticQueue_t *pxStaticQueue ); +void* MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ); +BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, TickType_t xTicksToWait ); +BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ); +void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, const char *pcName ); +void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ); +const char * MPU_pcQueueGetName( QueueHandle_t xQueue ); +QueueHandle_t MPU_xQueueGenericCreate( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, const uint8_t ucQueueType ); +QueueHandle_t MPU_xQueueGenericCreateStatic( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, StaticQueue_t *pxStaticQueue, const uint8_t ucQueueType ); +QueueSetHandle_t MPU_xQueueCreateSet( const UBaseType_t uxEventQueueLength ); +BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet ); +BaseType_t MPU_xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet ); +QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, const TickType_t xTicksToWait ); +BaseType_t MPU_xQueueGenericReset( QueueHandle_t xQueue, BaseType_t xNewQueue ); +void MPU_vQueueSetQueueNumber( QueueHandle_t xQueue, UBaseType_t uxQueueNumber ); +UBaseType_t MPU_uxQueueGetQueueNumber( QueueHandle_t xQueue ); +uint8_t MPU_ucQueueGetQueueType( QueueHandle_t xQueue ); + +/* MPU versions of timers.h API functions. */ +TimerHandle_t MPU_xTimerCreate( const char * const pcTimerName, const TickType_t xTimerPeriodInTicks, const UBaseType_t uxAutoReload, void * const pvTimerID, TimerCallbackFunction_t pxCallbackFunction ); +TimerHandle_t MPU_xTimerCreateStatic( const char * const pcTimerName, const TickType_t xTimerPeriodInTicks, const UBaseType_t uxAutoReload, void * const pvTimerID, TimerCallbackFunction_t pxCallbackFunction, StaticTimer_t *pxTimerBuffer ); +void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ); +void MPU_vTimerSetTimerID( TimerHandle_t xTimer, void *pvNewID ); +BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ); +TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ); +BaseType_t MPU_xTimerPendFunctionCall( PendedFunction_t xFunctionToPend, void *pvParameter1, uint32_t ulParameter2, TickType_t xTicksToWait ); +const char * MPU_pcTimerGetName( TimerHandle_t xTimer ); +TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ); +TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ); +BaseType_t MPU_xTimerCreateTimerTask( void ); +BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer, const BaseType_t xCommandID, const TickType_t xOptionalValue, BaseType_t * const pxHigherPriorityTaskWoken, const TickType_t xTicksToWait ); + +/* MPU versions of event_group.h API functions. */ +EventGroupHandle_t MPU_xEventGroupCreate( void ); +EventGroupHandle_t MPU_xEventGroupCreateStatic( StaticEventGroup_t *pxEventGroupBuffer ); +EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToWaitFor, const BaseType_t xClearOnExit, const BaseType_t xWaitForAllBits, TickType_t xTicksToWait ); +EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear ); +EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet ); +EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, TickType_t xTicksToWait ); +void MPU_vEventGroupDelete( EventGroupHandle_t xEventGroup ); +UBaseType_t MPU_uxEventGroupGetNumber( void* xEventGroup ); + +/* MPU versions of message/stream_buffer.h API functions. */ +size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, const void *pvTxData, size_t xDataLengthBytes, TickType_t xTicksToWait ); +size_t MPU_xStreamBufferSendFromISR( StreamBufferHandle_t xStreamBuffer, const void *pvTxData, size_t xDataLengthBytes, BaseType_t * const pxHigherPriorityTaskWoken ); +size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, void *pvRxData, size_t xBufferLengthBytes, TickType_t xTicksToWait ); +size_t MPU_xStreamBufferReceiveFromISR( StreamBufferHandle_t xStreamBuffer, void *pvRxData, size_t xBufferLengthBytes, BaseType_t * const pxHigherPriorityTaskWoken ); +void MPU_vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer ); +BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ); +BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ); +BaseType_t MPU_xStreamBufferReset( StreamBufferHandle_t xStreamBuffer ); +size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ); +size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ); +BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, size_t xTriggerLevel ); +StreamBufferHandle_t MPU_xStreamBufferGenericCreate( size_t xBufferSizeBytes, size_t xTriggerLevelBytes, BaseType_t xIsMessageBuffer ); +StreamBufferHandle_t MPU_xStreamBufferGenericCreateStatic( size_t xBufferSizeBytes, size_t xTriggerLevelBytes, BaseType_t xIsMessageBuffer, uint8_t * const pucStreamBufferStorageArea, StaticStreamBuffer_t * const pxStaticStreamBuffer ); + + + +#endif /* MPU_PROTOTYPES_H */ + diff --git a/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h new file mode 100644 index 0000000..58a4035 --- /dev/null +++ b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h @@ -0,0 +1,181 @@ +/* + * FreeRTOS Kernel V10.0.1 + * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#ifndef MPU_WRAPPERS_H +#define MPU_WRAPPERS_H + +/* This file redefines API functions to be called through a wrapper macro, but +only for ports that are using the MPU. */ +#ifdef portUSING_MPU_WRAPPERS + + /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE will be defined when this file is + included from queue.c or task.c to prevent it from having an effect within + those files. */ + #ifndef MPU_WRAPPERS_INCLUDED_FROM_API_FILE + + /* + * Map standard (non MPU) API functions to equivalents that start + * "MPU_". This will cause the application code to call the MPU_ + * version, which wraps the non-MPU version with privilege promoting + * then demoting code, so the kernel code always runs will full + * privileges. + */ + + /* Map standard tasks.h API functions to the MPU equivalents. */ + #define xTaskCreate MPU_xTaskCreate + #define xTaskCreateStatic MPU_xTaskCreateStatic + #define xTaskCreateRestricted MPU_xTaskCreateRestricted + #define vTaskAllocateMPURegions MPU_vTaskAllocateMPURegions + #define vTaskDelete MPU_vTaskDelete + #define vTaskDelay MPU_vTaskDelay + #define vTaskDelayUntil MPU_vTaskDelayUntil + #define xTaskAbortDelay MPU_xTaskAbortDelay + #define uxTaskPriorityGet MPU_uxTaskPriorityGet + #define eTaskGetState MPU_eTaskGetState + #define vTaskGetInfo MPU_vTaskGetInfo + #define vTaskPrioritySet MPU_vTaskPrioritySet + #define vTaskSuspend MPU_vTaskSuspend + #define vTaskResume MPU_vTaskResume + #define vTaskSuspendAll MPU_vTaskSuspendAll + #define xTaskResumeAll MPU_xTaskResumeAll + #define xTaskGetTickCount MPU_xTaskGetTickCount + #define uxTaskGetNumberOfTasks MPU_uxTaskGetNumberOfTasks + #define pcTaskGetName MPU_pcTaskGetName + #define xTaskGetHandle MPU_xTaskGetHandle + #define uxTaskGetStackHighWaterMark MPU_uxTaskGetStackHighWaterMark + #define vTaskSetApplicationTaskTag MPU_vTaskSetApplicationTaskTag + #define xTaskGetApplicationTaskTag MPU_xTaskGetApplicationTaskTag + #define vTaskSetThreadLocalStoragePointer MPU_vTaskSetThreadLocalStoragePointer + #define pvTaskGetThreadLocalStoragePointer MPU_pvTaskGetThreadLocalStoragePointer + #define xTaskCallApplicationTaskHook MPU_xTaskCallApplicationTaskHook + #define xTaskGetIdleTaskHandle MPU_xTaskGetIdleTaskHandle + #define uxTaskGetSystemState MPU_uxTaskGetSystemState + #define vTaskList MPU_vTaskList + #define vTaskGetRunTimeStats MPU_vTaskGetRunTimeStats + #define xTaskGenericNotify MPU_xTaskGenericNotify + #define xTaskNotifyWait MPU_xTaskNotifyWait + #define ulTaskNotifyTake MPU_ulTaskNotifyTake + #define xTaskNotifyStateClear MPU_xTaskNotifyStateClear + + #define xTaskGetCurrentTaskHandle MPU_xTaskGetCurrentTaskHandle + #define vTaskSetTimeOutState MPU_vTaskSetTimeOutState + #define xTaskCheckForTimeOut MPU_xTaskCheckForTimeOut + #define xTaskGetSchedulerState MPU_xTaskGetSchedulerState + + /* Map standard queue.h API functions to the MPU equivalents. */ + #define xQueueGenericSend MPU_xQueueGenericSend + #define xQueueReceive MPU_xQueueReceive + #define xQueuePeek MPU_xQueuePeek + #define xQueueSemaphoreTake MPU_xQueueSemaphoreTake + #define uxQueueMessagesWaiting MPU_uxQueueMessagesWaiting + #define uxQueueSpacesAvailable MPU_uxQueueSpacesAvailable + #define vQueueDelete MPU_vQueueDelete + #define xQueueCreateMutex MPU_xQueueCreateMutex + #define xQueueCreateMutexStatic MPU_xQueueCreateMutexStatic + #define xQueueCreateCountingSemaphore MPU_xQueueCreateCountingSemaphore + #define xQueueCreateCountingSemaphoreStatic MPU_xQueueCreateCountingSemaphoreStatic + #define xQueueGetMutexHolder MPU_xQueueGetMutexHolder + #define xQueueTakeMutexRecursive MPU_xQueueTakeMutexRecursive + #define xQueueGiveMutexRecursive MPU_xQueueGiveMutexRecursive + #define xQueueGenericCreate MPU_xQueueGenericCreate + #define xQueueGenericCreateStatic MPU_xQueueGenericCreateStatic + #define xQueueCreateSet MPU_xQueueCreateSet + #define xQueueAddToSet MPU_xQueueAddToSet + #define xQueueRemoveFromSet MPU_xQueueRemoveFromSet + #define xQueueSelectFromSet MPU_xQueueSelectFromSet + #define xQueueGenericReset MPU_xQueueGenericReset + + #if( configQUEUE_REGISTRY_SIZE > 0 ) + #define vQueueAddToRegistry MPU_vQueueAddToRegistry + #define vQueueUnregisterQueue MPU_vQueueUnregisterQueue + #define pcQueueGetName MPU_pcQueueGetName + #endif + + /* Map standard timer.h API functions to the MPU equivalents. */ + #define xTimerCreate MPU_xTimerCreate + #define xTimerCreateStatic MPU_xTimerCreateStatic + #define pvTimerGetTimerID MPU_pvTimerGetTimerID + #define vTimerSetTimerID MPU_vTimerSetTimerID + #define xTimerIsTimerActive MPU_xTimerIsTimerActive + #define xTimerGetTimerDaemonTaskHandle MPU_xTimerGetTimerDaemonTaskHandle + #define xTimerPendFunctionCall MPU_xTimerPendFunctionCall + #define pcTimerGetName MPU_pcTimerGetName + #define xTimerGetPeriod MPU_xTimerGetPeriod + #define xTimerGetExpiryTime MPU_xTimerGetExpiryTime + #define xTimerGenericCommand MPU_xTimerGenericCommand + + /* Map standard event_group.h API functions to the MPU equivalents. */ + #define xEventGroupCreate MPU_xEventGroupCreate + #define xEventGroupCreateStatic MPU_xEventGroupCreateStatic + #define xEventGroupWaitBits MPU_xEventGroupWaitBits + #define xEventGroupClearBits MPU_xEventGroupClearBits + #define xEventGroupSetBits MPU_xEventGroupSetBits + #define xEventGroupSync MPU_xEventGroupSync + #define vEventGroupDelete MPU_vEventGroupDelete + + /* Map standard message/stream_buffer.h API functions to the MPU + equivalents. */ + #define xStreamBufferSend MPU_xStreamBufferSend + #define xStreamBufferSendFromISR MPU_xStreamBufferSendFromISR + #define xStreamBufferReceive MPU_xStreamBufferReceive + #define xStreamBufferReceiveFromISR MPU_xStreamBufferReceiveFromISR + #define vStreamBufferDelete MPU_vStreamBufferDelete + #define xStreamBufferIsFull MPU_xStreamBufferIsFull + #define xStreamBufferIsEmpty MPU_xStreamBufferIsEmpty + #define xStreamBufferReset MPU_xStreamBufferReset + #define xStreamBufferSpacesAvailable MPU_xStreamBufferSpacesAvailable + #define xStreamBufferBytesAvailable MPU_xStreamBufferBytesAvailable + #define xStreamBufferSetTriggerLevel MPU_xStreamBufferSetTriggerLevel + #define xStreamBufferGenericCreate MPU_xStreamBufferGenericCreate + #define xStreamBufferGenericCreateStatic MPU_xStreamBufferGenericCreateStatic + + + /* Remove the privileged function macro, but keep the PRIVILEGED_DATA + macro so applications can place data in privileged access sections + (useful when using statically allocated objects). */ + #define PRIVILEGED_FUNCTION + #define PRIVILEGED_DATA __attribute__((section("privileged_data"))) + + #else /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE */ + + /* Ensure API functions go in the privileged execution section. */ + #define PRIVILEGED_FUNCTION __attribute__((section("privileged_functions"))) + #define PRIVILEGED_DATA __attribute__((section("privileged_data"))) + + #endif /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE */ + +#else /* portUSING_MPU_WRAPPERS */ + + #define PRIVILEGED_FUNCTION + #define PRIVILEGED_DATA + #define portUSING_MPU_WRAPPERS 0 + +#endif /* portUSING_MPU_WRAPPERS */ + + +#endif /* MPU_WRAPPERS_H */ + diff --git a/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/include/portable.h b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/include/portable.h new file mode 100644 index 0000000..3758f10 --- /dev/null +++ b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/include/portable.h @@ -0,0 +1,165 @@ +/* + * FreeRTOS Kernel V10.0.1 + * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/*----------------------------------------------------------- + * Portable layer API. Each function must be defined for each port. + *----------------------------------------------------------*/ + +#ifndef PORTABLE_H +#define PORTABLE_H + +/* Each FreeRTOS port has a unique portmacro.h header file. Originally a +pre-processor definition was used to ensure the pre-processor found the correct +portmacro.h file for the port being used. That scheme was deprecated in favour +of setting the compiler's include path such that it found the correct +portmacro.h file - removing the need for the constant and allowing the +portmacro.h file to be located anywhere in relation to the port being used. +Purely for reasons of backward compatibility the old method is still valid, but +to make it clear that new projects should not use it, support for the port +specific constants has been moved into the deprecated_definitions.h header +file. */ +#include "deprecated_definitions.h" + +/* If portENTER_CRITICAL is not defined then including deprecated_definitions.h +did not result in a portmacro.h header file being included - and it should be +included here. In this case the path to the correct portmacro.h header file +must be set in the compiler's include path. */ +#ifndef portENTER_CRITICAL + #include "portmacro.h" +#endif + +#if portBYTE_ALIGNMENT == 32 + #define portBYTE_ALIGNMENT_MASK ( 0x001f ) +#endif + +#if portBYTE_ALIGNMENT == 16 + #define portBYTE_ALIGNMENT_MASK ( 0x000f ) +#endif + +#if portBYTE_ALIGNMENT == 8 + #define portBYTE_ALIGNMENT_MASK ( 0x0007 ) +#endif + +#if portBYTE_ALIGNMENT == 4 + #define portBYTE_ALIGNMENT_MASK ( 0x0003 ) +#endif + +#if portBYTE_ALIGNMENT == 2 + #define portBYTE_ALIGNMENT_MASK ( 0x0001 ) +#endif + +#if portBYTE_ALIGNMENT == 1 + #define portBYTE_ALIGNMENT_MASK ( 0x0000 ) +#endif + +#ifndef portBYTE_ALIGNMENT_MASK + #error "Invalid portBYTE_ALIGNMENT definition" +#endif + +#ifndef portNUM_CONFIGURABLE_REGIONS + #define portNUM_CONFIGURABLE_REGIONS 1 +#endif + +#ifdef __cplusplus +extern "C" { +#endif + +#include "mpu_wrappers.h" + +/* + * Setup the stack of a new task so it is ready to be placed under the + * scheduler control. The registers have to be placed on the stack in + * the order that the port expects to find them. + * + */ +#if( portUSING_MPU_WRAPPERS == 1 ) + StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters, BaseType_t xRunPrivileged ) PRIVILEGED_FUNCTION; +#else + StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters ) PRIVILEGED_FUNCTION; +#endif + +/* Used by heap_5.c. */ +typedef struct HeapRegion +{ + uint8_t *pucStartAddress; + size_t xSizeInBytes; +} HeapRegion_t; + +/* + * Used to define multiple heap regions for use by heap_5.c. This function + * must be called before any calls to pvPortMalloc() - not creating a task, + * queue, semaphore, mutex, software timer, event group, etc. will result in + * pvPortMalloc being called. + * + * pxHeapRegions passes in an array of HeapRegion_t structures - each of which + * defines a region of memory that can be used as the heap. The array is + * terminated by a HeapRegions_t structure that has a size of 0. The region + * with the lowest start address must appear first in the array. + */ +void vPortDefineHeapRegions( const HeapRegion_t * const pxHeapRegions ) PRIVILEGED_FUNCTION; + + +/* + * Map to the memory management routines required for the port. + */ +void *pvPortMalloc( size_t xSize ) PRIVILEGED_FUNCTION; +void vPortFree( void *pv ) PRIVILEGED_FUNCTION; +void vPortInitialiseBlocks( void ) PRIVILEGED_FUNCTION; +size_t xPortGetFreeHeapSize( void ) PRIVILEGED_FUNCTION; +size_t xPortGetMinimumEverFreeHeapSize( void ) PRIVILEGED_FUNCTION; + +/* + * Setup the hardware ready for the scheduler to take control. This generally + * sets up a tick interrupt and sets timers for the correct tick frequency. + */ +BaseType_t xPortStartScheduler( void ) PRIVILEGED_FUNCTION; + +/* + * Undo any hardware/ISR setup that was performed by xPortStartScheduler() so + * the hardware is left in its original condition after the scheduler stops + * executing. + */ +void vPortEndScheduler( void ) PRIVILEGED_FUNCTION; + +/* + * The structures and methods of manipulating the MPU are contained within the + * port layer. + * + * Fills the xMPUSettings structure with the memory region information + * contained in xRegions. + */ +#if( portUSING_MPU_WRAPPERS == 1 ) + struct xMEMORY_REGION; + void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION * const xRegions, StackType_t *pxBottomOfStack, uint32_t ulStackDepth ) PRIVILEGED_FUNCTION; +#endif + +#ifdef __cplusplus +} +#endif + +#endif /* PORTABLE_H */ + diff --git a/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h new file mode 100644 index 0000000..05ba7cd --- /dev/null +++ b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h @@ -0,0 +1,124 @@ +/* + * FreeRTOS Kernel V10.0.1 + * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#ifndef PROJDEFS_H +#define PROJDEFS_H + +/* + * Defines the prototype to which task functions must conform. Defined in this + * file to ensure the type is known before portable.h is included. + */ +typedef void (*TaskFunction_t)( void * ); + +/* Converts a time in milliseconds to a time in ticks. This macro can be +overridden by a macro of the same name defined in FreeRTOSConfig.h in case the +definition here is not suitable for your application. */ +#ifndef pdMS_TO_TICKS + #define pdMS_TO_TICKS( xTimeInMs ) ( ( TickType_t ) ( ( ( TickType_t ) ( xTimeInMs ) * ( TickType_t ) configTICK_RATE_HZ ) / ( TickType_t ) 1000 ) ) +#endif + +#define pdFALSE ( ( BaseType_t ) 0 ) +#define pdTRUE ( ( BaseType_t ) 1 ) + +#define pdPASS ( pdTRUE ) +#define pdFAIL ( pdFALSE ) +#define errQUEUE_EMPTY ( ( BaseType_t ) 0 ) +#define errQUEUE_FULL ( ( BaseType_t ) 0 ) + +/* FreeRTOS error definitions. */ +#define errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY ( -1 ) +#define errQUEUE_BLOCKED ( -4 ) +#define errQUEUE_YIELD ( -5 ) + +/* Macros used for basic data corruption checks. */ +#ifndef configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES + #define configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES 0 +#endif + +#if( configUSE_16_BIT_TICKS == 1 ) + #define pdINTEGRITY_CHECK_VALUE 0x5a5a +#else + #define pdINTEGRITY_CHECK_VALUE 0x5a5a5a5aUL +#endif + +/* The following errno values are used by FreeRTOS+ components, not FreeRTOS +itself. */ +#define pdFREERTOS_ERRNO_NONE 0 /* No errors */ +#define pdFREERTOS_ERRNO_ENOENT 2 /* No such file or directory */ +#define pdFREERTOS_ERRNO_EINTR 4 /* Interrupted system call */ +#define pdFREERTOS_ERRNO_EIO 5 /* I/O error */ +#define pdFREERTOS_ERRNO_ENXIO 6 /* No such device or address */ +#define pdFREERTOS_ERRNO_EBADF 9 /* Bad file number */ +#define pdFREERTOS_ERRNO_EAGAIN 11 /* No more processes */ +#define pdFREERTOS_ERRNO_EWOULDBLOCK 11 /* Operation would block */ +#define pdFREERTOS_ERRNO_ENOMEM 12 /* Not enough memory */ +#define pdFREERTOS_ERRNO_EACCES 13 /* Permission denied */ +#define pdFREERTOS_ERRNO_EFAULT 14 /* Bad address */ +#define pdFREERTOS_ERRNO_EBUSY 16 /* Mount device busy */ +#define pdFREERTOS_ERRNO_EEXIST 17 /* File exists */ +#define pdFREERTOS_ERRNO_EXDEV 18 /* Cross-device link */ +#define pdFREERTOS_ERRNO_ENODEV 19 /* No such device */ +#define pdFREERTOS_ERRNO_ENOTDIR 20 /* Not a directory */ +#define pdFREERTOS_ERRNO_EISDIR 21 /* Is a directory */ +#define pdFREERTOS_ERRNO_EINVAL 22 /* Invalid argument */ +#define pdFREERTOS_ERRNO_ENOSPC 28 /* No space left on device */ +#define pdFREERTOS_ERRNO_ESPIPE 29 /* Illegal seek */ +#define pdFREERTOS_ERRNO_EROFS 30 /* Read only file system */ +#define pdFREERTOS_ERRNO_EUNATCH 42 /* Protocol driver not attached */ +#define pdFREERTOS_ERRNO_EBADE 50 /* Invalid exchange */ +#define pdFREERTOS_ERRNO_EFTYPE 79 /* Inappropriate file type or format */ +#define pdFREERTOS_ERRNO_ENMFILE 89 /* No more files */ +#define pdFREERTOS_ERRNO_ENOTEMPTY 90 /* Directory not empty */ +#define pdFREERTOS_ERRNO_ENAMETOOLONG 91 /* File or path name too long */ +#define pdFREERTOS_ERRNO_EOPNOTSUPP 95 /* Operation not supported on transport endpoint */ +#define pdFREERTOS_ERRNO_ENOBUFS 105 /* No buffer space available */ +#define pdFREERTOS_ERRNO_ENOPROTOOPT 109 /* Protocol not available */ +#define pdFREERTOS_ERRNO_EADDRINUSE 112 /* Address already in use */ +#define pdFREERTOS_ERRNO_ETIMEDOUT 116 /* Connection timed out */ +#define pdFREERTOS_ERRNO_EINPROGRESS 119 /* Connection already in progress */ +#define pdFREERTOS_ERRNO_EALREADY 120 /* Socket already connected */ +#define pdFREERTOS_ERRNO_EADDRNOTAVAIL 125 /* Address not available */ +#define pdFREERTOS_ERRNO_EISCONN 127 /* Socket is already connected */ +#define pdFREERTOS_ERRNO_ENOTCONN 128 /* Socket is not connected */ +#define pdFREERTOS_ERRNO_ENOMEDIUM 135 /* No medium inserted */ +#define pdFREERTOS_ERRNO_EILSEQ 138 /* An invalid UTF-16 sequence was encountered. */ +#define pdFREERTOS_ERRNO_ECANCELED 140 /* Operation canceled. */ + +/* The following endian values are used by FreeRTOS+ components, not FreeRTOS +itself. */ +#define pdFREERTOS_LITTLE_ENDIAN 0 +#define pdFREERTOS_BIG_ENDIAN 1 + +/* Re-defining endian values for generic naming. */ +#define pdLITTLE_ENDIAN pdFREERTOS_LITTLE_ENDIAN +#define pdBIG_ENDIAN pdFREERTOS_BIG_ENDIAN + + +#endif /* PROJDEFS_H */ + + + diff --git a/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/include/queue.h b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/include/queue.h new file mode 100644 index 0000000..ffddee3 --- /dev/null +++ b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/include/queue.h @@ -0,0 +1,1653 @@ +/* + * FreeRTOS Kernel V10.0.1 + * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + + +#ifndef QUEUE_H +#define QUEUE_H + +#ifndef INC_FREERTOS_H + #error "include FreeRTOS.h" must appear in source files before "include queue.h" +#endif + +#ifdef __cplusplus +extern "C" { +#endif + + +/** + * Type by which queues are referenced. For example, a call to xQueueCreate() + * returns an QueueHandle_t variable that can then be used as a parameter to + * xQueueSend(), xQueueReceive(), etc. + */ +typedef void * QueueHandle_t; + +/** + * Type by which queue sets are referenced. For example, a call to + * xQueueCreateSet() returns an xQueueSet variable that can then be used as a + * parameter to xQueueSelectFromSet(), xQueueAddToSet(), etc. + */ +typedef void * QueueSetHandle_t; + +/** + * Queue sets can contain both queues and semaphores, so the + * QueueSetMemberHandle_t is defined as a type to be used where a parameter or + * return value can be either an QueueHandle_t or an SemaphoreHandle_t. + */ +typedef void * QueueSetMemberHandle_t; + +/* For internal use only. */ +#define queueSEND_TO_BACK ( ( BaseType_t ) 0 ) +#define queueSEND_TO_FRONT ( ( BaseType_t ) 1 ) +#define queueOVERWRITE ( ( BaseType_t ) 2 ) + +/* For internal use only. These definitions *must* match those in queue.c. */ +#define queueQUEUE_TYPE_BASE ( ( uint8_t ) 0U ) +#define queueQUEUE_TYPE_SET ( ( uint8_t ) 0U ) +#define queueQUEUE_TYPE_MUTEX ( ( uint8_t ) 1U ) +#define queueQUEUE_TYPE_COUNTING_SEMAPHORE ( ( uint8_t ) 2U ) +#define queueQUEUE_TYPE_BINARY_SEMAPHORE ( ( uint8_t ) 3U ) +#define queueQUEUE_TYPE_RECURSIVE_MUTEX ( ( uint8_t ) 4U ) + +/** + * queue. h + *+ QueueHandle_t xQueueCreate( + UBaseType_t uxQueueLength, + UBaseType_t uxItemSize + ); + *+ * + * Creates a new queue instance, and returns a handle by which the new queue + * can be referenced. + * + * Internally, within the FreeRTOS implementation, queues use two blocks of + * memory. The first block is used to hold the queue's data structures. The + * second block is used to hold items placed into the queue. If a queue is + * created using xQueueCreate() then both blocks of memory are automatically + * dynamically allocated inside the xQueueCreate() function. (see + * http://www.freertos.org/a00111.html). If a queue is created using + * xQueueCreateStatic() then the application writer must provide the memory that + * will get used by the queue. xQueueCreateStatic() therefore allows a queue to + * be created without using any dynamic memory allocation. + * + * http://www.FreeRTOS.org/Embedded-RTOS-Queues.html + * + * @param uxQueueLength The maximum number of items that the queue can contain. + * + * @param uxItemSize The number of bytes each item in the queue will require. + * Items are queued by copy, not by reference, so this is the number of bytes + * that will be copied for each posted item. Each item on the queue must be + * the same size. + * + * @return If the queue is successfully create then a handle to the newly + * created queue is returned. If the queue cannot be created then 0 is + * returned. + * + * Example usage: ++ struct AMessage + { + char ucMessageID; + char ucData[ 20 ]; + }; + + void vATask( void *pvParameters ) + { + QueueHandle_t xQueue1, xQueue2; + + // Create a queue capable of containing 10 uint32_t values. + xQueue1 = xQueueCreate( 10, sizeof( uint32_t ) ); + if( xQueue1 == 0 ) + { + // Queue was not created and must not be used. + } + + // Create a queue capable of containing 10 pointers to AMessage structures. + // These should be passed by pointer as they contain a lot of data. + xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) ); + if( xQueue2 == 0 ) + { + // Queue was not created and must not be used. + } + + // ... Rest of task code. + } ++ * \defgroup xQueueCreate xQueueCreate + * \ingroup QueueManagement + */ +#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) + #define xQueueCreate( uxQueueLength, uxItemSize ) xQueueGenericCreate( ( uxQueueLength ), ( uxItemSize ), ( queueQUEUE_TYPE_BASE ) ) +#endif + +/** + * queue. h + *+ QueueHandle_t xQueueCreateStatic( + UBaseType_t uxQueueLength, + UBaseType_t uxItemSize, + uint8_t *pucQueueStorageBuffer, + StaticQueue_t *pxQueueBuffer + ); + *+ * + * Creates a new queue instance, and returns a handle by which the new queue + * can be referenced. + * + * Internally, within the FreeRTOS implementation, queues use two blocks of + * memory. The first block is used to hold the queue's data structures. The + * second block is used to hold items placed into the queue. If a queue is + * created using xQueueCreate() then both blocks of memory are automatically + * dynamically allocated inside the xQueueCreate() function. (see + * http://www.freertos.org/a00111.html). If a queue is created using + * xQueueCreateStatic() then the application writer must provide the memory that + * will get used by the queue. xQueueCreateStatic() therefore allows a queue to + * be created without using any dynamic memory allocation. + * + * http://www.FreeRTOS.org/Embedded-RTOS-Queues.html + * + * @param uxQueueLength The maximum number of items that the queue can contain. + * + * @param uxItemSize The number of bytes each item in the queue will require. + * Items are queued by copy, not by reference, so this is the number of bytes + * that will be copied for each posted item. Each item on the queue must be + * the same size. + * + * @param pucQueueStorageBuffer If uxItemSize is not zero then + * pucQueueStorageBuffer must point to a uint8_t array that is at least large + * enough to hold the maximum number of items that can be in the queue at any + * one time - which is ( uxQueueLength * uxItemsSize ) bytes. If uxItemSize is + * zero then pucQueueStorageBuffer can be NULL. + * + * @param pxQueueBuffer Must point to a variable of type StaticQueue_t, which + * will be used to hold the queue's data structure. + * + * @return If the queue is created then a handle to the created queue is + * returned. If pxQueueBuffer is NULL then NULL is returned. + * + * Example usage: ++ struct AMessage + { + char ucMessageID; + char ucData[ 20 ]; + }; + + #define QUEUE_LENGTH 10 + #define ITEM_SIZE sizeof( uint32_t ) + + // xQueueBuffer will hold the queue structure. + StaticQueue_t xQueueBuffer; + + // ucQueueStorage will hold the items posted to the queue. Must be at least + // [(queue length) * ( queue item size)] bytes long. + uint8_t ucQueueStorage[ QUEUE_LENGTH * ITEM_SIZE ]; + + void vATask( void *pvParameters ) + { + QueueHandle_t xQueue1; + + // Create a queue capable of containing 10 uint32_t values. + xQueue1 = xQueueCreate( QUEUE_LENGTH, // The number of items the queue can hold. + ITEM_SIZE // The size of each item in the queue + &( ucQueueStorage[ 0 ] ), // The buffer that will hold the items in the queue. + &xQueueBuffer ); // The buffer that will hold the queue structure. + + // The queue is guaranteed to be created successfully as no dynamic memory + // allocation is used. Therefore xQueue1 is now a handle to a valid queue. + + // ... Rest of task code. + } ++ * \defgroup xQueueCreateStatic xQueueCreateStatic + * \ingroup QueueManagement + */ +#if( configSUPPORT_STATIC_ALLOCATION == 1 ) + #define xQueueCreateStatic( uxQueueLength, uxItemSize, pucQueueStorage, pxQueueBuffer ) xQueueGenericCreateStatic( ( uxQueueLength ), ( uxItemSize ), ( pucQueueStorage ), ( pxQueueBuffer ), ( queueQUEUE_TYPE_BASE ) ) +#endif /* configSUPPORT_STATIC_ALLOCATION */ + +/** + * queue. h + *+ BaseType_t xQueueSendToToFront( + QueueHandle_t xQueue, + const void *pvItemToQueue, + TickType_t xTicksToWait + ); + *+ * + * Post an item to the front of a queue. The item is queued by copy, not by + * reference. This function must not be called from an interrupt service + * routine. See xQueueSendFromISR () for an alternative which may be used + * in an ISR. + * + * @param xQueue The handle to the queue on which the item is to be posted. + * + * @param pvItemToQueue A pointer to the item that is to be placed on the + * queue. The size of the items the queue will hold was defined when the + * queue was created, so this many bytes will be copied from pvItemToQueue + * into the queue storage area. + * + * @param xTicksToWait The maximum amount of time the task should block + * waiting for space to become available on the queue, should it already + * be full. The call will return immediately if this is set to 0 and the + * queue is full. The time is defined in tick periods so the constant + * portTICK_PERIOD_MS should be used to convert to real time if this is required. + * + * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL. + * + * Example usage: ++ struct AMessage + { + char ucMessageID; + char ucData[ 20 ]; + } xMessage; + + uint32_t ulVar = 10UL; + + void vATask( void *pvParameters ) + { + QueueHandle_t xQueue1, xQueue2; + struct AMessage *pxMessage; + + // Create a queue capable of containing 10 uint32_t values. + xQueue1 = xQueueCreate( 10, sizeof( uint32_t ) ); + + // Create a queue capable of containing 10 pointers to AMessage structures. + // These should be passed by pointer as they contain a lot of data. + xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) ); + + // ... + + if( xQueue1 != 0 ) + { + // Send an uint32_t. Wait for 10 ticks for space to become + // available if necessary. + if( xQueueSendToFront( xQueue1, ( void * ) &ulVar, ( TickType_t ) 10 ) != pdPASS ) + { + // Failed to post the message, even after 10 ticks. + } + } + + if( xQueue2 != 0 ) + { + // Send a pointer to a struct AMessage object. Don't block if the + // queue is already full. + pxMessage = & xMessage; + xQueueSendToFront( xQueue2, ( void * ) &pxMessage, ( TickType_t ) 0 ); + } + + // ... Rest of task code. + } ++ * \defgroup xQueueSend xQueueSend + * \ingroup QueueManagement + */ +#define xQueueSendToFront( xQueue, pvItemToQueue, xTicksToWait ) xQueueGenericSend( ( xQueue ), ( pvItemToQueue ), ( xTicksToWait ), queueSEND_TO_FRONT ) + +/** + * queue. h + *+ BaseType_t xQueueSendToBack( + QueueHandle_t xQueue, + const void *pvItemToQueue, + TickType_t xTicksToWait + ); + *+ * + * This is a macro that calls xQueueGenericSend(). + * + * Post an item to the back of a queue. The item is queued by copy, not by + * reference. This function must not be called from an interrupt service + * routine. See xQueueSendFromISR () for an alternative which may be used + * in an ISR. + * + * @param xQueue The handle to the queue on which the item is to be posted. + * + * @param pvItemToQueue A pointer to the item that is to be placed on the + * queue. The size of the items the queue will hold was defined when the + * queue was created, so this many bytes will be copied from pvItemToQueue + * into the queue storage area. + * + * @param xTicksToWait The maximum amount of time the task should block + * waiting for space to become available on the queue, should it already + * be full. The call will return immediately if this is set to 0 and the queue + * is full. The time is defined in tick periods so the constant + * portTICK_PERIOD_MS should be used to convert to real time if this is required. + * + * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL. + * + * Example usage: ++ struct AMessage + { + char ucMessageID; + char ucData[ 20 ]; + } xMessage; + + uint32_t ulVar = 10UL; + + void vATask( void *pvParameters ) + { + QueueHandle_t xQueue1, xQueue2; + struct AMessage *pxMessage; + + // Create a queue capable of containing 10 uint32_t values. + xQueue1 = xQueueCreate( 10, sizeof( uint32_t ) ); + + // Create a queue capable of containing 10 pointers to AMessage structures. + // These should be passed by pointer as they contain a lot of data. + xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) ); + + // ... + + if( xQueue1 != 0 ) + { + // Send an uint32_t. Wait for 10 ticks for space to become + // available if necessary. + if( xQueueSendToBack( xQueue1, ( void * ) &ulVar, ( TickType_t ) 10 ) != pdPASS ) + { + // Failed to post the message, even after 10 ticks. + } + } + + if( xQueue2 != 0 ) + { + // Send a pointer to a struct AMessage object. Don't block if the + // queue is already full. + pxMessage = & xMessage; + xQueueSendToBack( xQueue2, ( void * ) &pxMessage, ( TickType_t ) 0 ); + } + + // ... Rest of task code. + } ++ * \defgroup xQueueSend xQueueSend + * \ingroup QueueManagement + */ +#define xQueueSendToBack( xQueue, pvItemToQueue, xTicksToWait ) xQueueGenericSend( ( xQueue ), ( pvItemToQueue ), ( xTicksToWait ), queueSEND_TO_BACK ) + +/** + * queue. h + *+ BaseType_t xQueueSend( + QueueHandle_t xQueue, + const void * pvItemToQueue, + TickType_t xTicksToWait + ); + *+ * + * This is a macro that calls xQueueGenericSend(). It is included for + * backward compatibility with versions of FreeRTOS.org that did not + * include the xQueueSendToFront() and xQueueSendToBack() macros. It is + * equivalent to xQueueSendToBack(). + * + * Post an item on a queue. The item is queued by copy, not by reference. + * This function must not be called from an interrupt service routine. + * See xQueueSendFromISR () for an alternative which may be used in an ISR. + * + * @param xQueue The handle to the queue on which the item is to be posted. + * + * @param pvItemToQueue A pointer to the item that is to be placed on the + * queue. The size of the items the queue will hold was defined when the + * queue was created, so this many bytes will be copied from pvItemToQueue + * into the queue storage area. + * + * @param xTicksToWait The maximum amount of time the task should block + * waiting for space to become available on the queue, should it already + * be full. The call will return immediately if this is set to 0 and the + * queue is full. The time is defined in tick periods so the constant + * portTICK_PERIOD_MS should be used to convert to real time if this is required. + * + * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL. + * + * Example usage: ++ struct AMessage + { + char ucMessageID; + char ucData[ 20 ]; + } xMessage; + + uint32_t ulVar = 10UL; + + void vATask( void *pvParameters ) + { + QueueHandle_t xQueue1, xQueue2; + struct AMessage *pxMessage; + + // Create a queue capable of containing 10 uint32_t values. + xQueue1 = xQueueCreate( 10, sizeof( uint32_t ) ); + + // Create a queue capable of containing 10 pointers to AMessage structures. + // These should be passed by pointer as they contain a lot of data. + xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) ); + + // ... + + if( xQueue1 != 0 ) + { + // Send an uint32_t. Wait for 10 ticks for space to become + // available if necessary. + if( xQueueSend( xQueue1, ( void * ) &ulVar, ( TickType_t ) 10 ) != pdPASS ) + { + // Failed to post the message, even after 10 ticks. + } + } + + if( xQueue2 != 0 ) + { + // Send a pointer to a struct AMessage object. Don't block if the + // queue is already full. + pxMessage = & xMessage; + xQueueSend( xQueue2, ( void * ) &pxMessage, ( TickType_t ) 0 ); + } + + // ... Rest of task code. + } ++ * \defgroup xQueueSend xQueueSend + * \ingroup QueueManagement + */ +#define xQueueSend( xQueue, pvItemToQueue, xTicksToWait ) xQueueGenericSend( ( xQueue ), ( pvItemToQueue ), ( xTicksToWait ), queueSEND_TO_BACK ) + +/** + * queue. h + *+ BaseType_t xQueueOverwrite( + QueueHandle_t xQueue, + const void * pvItemToQueue + ); + *+ * + * Only for use with queues that have a length of one - so the queue is either + * empty or full. + * + * Post an item on a queue. If the queue is already full then overwrite the + * value held in the queue. The item is queued by copy, not by reference. + * + * This function must not be called from an interrupt service routine. + * See xQueueOverwriteFromISR () for an alternative which may be used in an ISR. + * + * @param xQueue The handle of the queue to which the data is being sent. + * + * @param pvItemToQueue A pointer to the item that is to be placed on the + * queue. The size of the items the queue will hold was defined when the + * queue was created, so this many bytes will be copied from pvItemToQueue + * into the queue storage area. + * + * @return xQueueOverwrite() is a macro that calls xQueueGenericSend(), and + * therefore has the same return values as xQueueSendToFront(). However, pdPASS + * is the only value that can be returned because xQueueOverwrite() will write + * to the queue even when the queue is already full. + * + * Example usage: ++ + void vFunction( void *pvParameters ) + { + QueueHandle_t xQueue; + uint32_t ulVarToSend, ulValReceived; + + // Create a queue to hold one uint32_t value. It is strongly + // recommended *not* to use xQueueOverwrite() on queues that can + // contain more than one value, and doing so will trigger an assertion + // if configASSERT() is defined. + xQueue = xQueueCreate( 1, sizeof( uint32_t ) ); + + // Write the value 10 to the queue using xQueueOverwrite(). + ulVarToSend = 10; + xQueueOverwrite( xQueue, &ulVarToSend ); + + // Peeking the queue should now return 10, but leave the value 10 in + // the queue. A block time of zero is used as it is known that the + // queue holds a value. + ulValReceived = 0; + xQueuePeek( xQueue, &ulValReceived, 0 ); + + if( ulValReceived != 10 ) + { + // Error unless the item was removed by a different task. + } + + // The queue is still full. Use xQueueOverwrite() to overwrite the + // value held in the queue with 100. + ulVarToSend = 100; + xQueueOverwrite( xQueue, &ulVarToSend ); + + // This time read from the queue, leaving the queue empty once more. + // A block time of 0 is used again. + xQueueReceive( xQueue, &ulValReceived, 0 ); + + // The value read should be the last value written, even though the + // queue was already full when the value was written. + if( ulValReceived != 100 ) + { + // Error! + } + + // ... +} ++ * \defgroup xQueueOverwrite xQueueOverwrite + * \ingroup QueueManagement + */ +#define xQueueOverwrite( xQueue, pvItemToQueue ) xQueueGenericSend( ( xQueue ), ( pvItemToQueue ), 0, queueOVERWRITE ) + + +/** + * queue. h + *+ BaseType_t xQueueGenericSend( + QueueHandle_t xQueue, + const void * pvItemToQueue, + TickType_t xTicksToWait + BaseType_t xCopyPosition + ); + *+ * + * It is preferred that the macros xQueueSend(), xQueueSendToFront() and + * xQueueSendToBack() are used in place of calling this function directly. + * + * Post an item on a queue. The item is queued by copy, not by reference. + * This function must not be called from an interrupt service routine. + * See xQueueSendFromISR () for an alternative which may be used in an ISR. + * + * @param xQueue The handle to the queue on which the item is to be posted. + * + * @param pvItemToQueue A pointer to the item that is to be placed on the + * queue. The size of the items the queue will hold was defined when the + * queue was created, so this many bytes will be copied from pvItemToQueue + * into the queue storage area. + * + * @param xTicksToWait The maximum amount of time the task should block + * waiting for space to become available on the queue, should it already + * be full. The call will return immediately if this is set to 0 and the + * queue is full. The time is defined in tick periods so the constant + * portTICK_PERIOD_MS should be used to convert to real time if this is required. + * + * @param xCopyPosition Can take the value queueSEND_TO_BACK to place the + * item at the back of the queue, or queueSEND_TO_FRONT to place the item + * at the front of the queue (for high priority messages). + * + * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL. + * + * Example usage: ++ struct AMessage + { + char ucMessageID; + char ucData[ 20 ]; + } xMessage; + + uint32_t ulVar = 10UL; + + void vATask( void *pvParameters ) + { + QueueHandle_t xQueue1, xQueue2; + struct AMessage *pxMessage; + + // Create a queue capable of containing 10 uint32_t values. + xQueue1 = xQueueCreate( 10, sizeof( uint32_t ) ); + + // Create a queue capable of containing 10 pointers to AMessage structures. + // These should be passed by pointer as they contain a lot of data. + xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) ); + + // ... + + if( xQueue1 != 0 ) + { + // Send an uint32_t. Wait for 10 ticks for space to become + // available if necessary. + if( xQueueGenericSend( xQueue1, ( void * ) &ulVar, ( TickType_t ) 10, queueSEND_TO_BACK ) != pdPASS ) + { + // Failed to post the message, even after 10 ticks. + } + } + + if( xQueue2 != 0 ) + { + // Send a pointer to a struct AMessage object. Don't block if the + // queue is already full. + pxMessage = & xMessage; + xQueueGenericSend( xQueue2, ( void * ) &pxMessage, ( TickType_t ) 0, queueSEND_TO_BACK ); + } + + // ... Rest of task code. + } ++ * \defgroup xQueueSend xQueueSend + * \ingroup QueueManagement + */ +BaseType_t xQueueGenericSend( QueueHandle_t xQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, const BaseType_t xCopyPosition ) PRIVILEGED_FUNCTION; + +/** + * queue. h + *+ BaseType_t xQueuePeek( + QueueHandle_t xQueue, + void * const pvBuffer, + TickType_t xTicksToWait + );+ * + * Receive an item from a queue without removing the item from the queue. + * The item is received by copy so a buffer of adequate size must be + * provided. The number of bytes copied into the buffer was defined when + * the queue was created. + * + * Successfully received items remain on the queue so will be returned again + * by the next call, or a call to xQueueReceive(). + * + * This macro must not be used in an interrupt service routine. See + * xQueuePeekFromISR() for an alternative that can be called from an interrupt + * service routine. + * + * @param xQueue The handle to the queue from which the item is to be + * received. + * + * @param pvBuffer Pointer to the buffer into which the received item will + * be copied. + * + * @param xTicksToWait The maximum amount of time the task should block + * waiting for an item to receive should the queue be empty at the time + * of the call. The time is defined in tick periods so the constant + * portTICK_PERIOD_MS should be used to convert to real time if this is required. + * xQueuePeek() will return immediately if xTicksToWait is 0 and the queue + * is empty. + * + * @return pdTRUE if an item was successfully received from the queue, + * otherwise pdFALSE. + * + * Example usage: ++ struct AMessage + { + char ucMessageID; + char ucData[ 20 ]; + } xMessage; + + QueueHandle_t xQueue; + + // Task to create a queue and post a value. + void vATask( void *pvParameters ) + { + struct AMessage *pxMessage; + + // Create a queue capable of containing 10 pointers to AMessage structures. + // These should be passed by pointer as they contain a lot of data. + xQueue = xQueueCreate( 10, sizeof( struct AMessage * ) ); + if( xQueue == 0 ) + { + // Failed to create the queue. + } + + // ... + + // Send a pointer to a struct AMessage object. Don't block if the + // queue is already full. + pxMessage = & xMessage; + xQueueSend( xQueue, ( void * ) &pxMessage, ( TickType_t ) 0 ); + + // ... Rest of task code. + } + + // Task to peek the data from the queue. + void vADifferentTask( void *pvParameters ) + { + struct AMessage *pxRxedMessage; + + if( xQueue != 0 ) + { + // Peek a message on the created queue. Block for 10 ticks if a + // message is not immediately available. + if( xQueuePeek( xQueue, &( pxRxedMessage ), ( TickType_t ) 10 ) ) + { + // pcRxedMessage now points to the struct AMessage variable posted + // by vATask, but the item still remains on the queue. + } + } + + // ... Rest of task code. + } ++ * \defgroup xQueuePeek xQueuePeek + * \ingroup QueueManagement + */ +BaseType_t xQueuePeek( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION; + +/** + * queue. h + *+ BaseType_t xQueuePeekFromISR( + QueueHandle_t xQueue, + void *pvBuffer, + );+ * + * A version of xQueuePeek() that can be called from an interrupt service + * routine (ISR). + * + * Receive an item from a queue without removing the item from the queue. + * The item is received by copy so a buffer of adequate size must be + * provided. The number of bytes copied into the buffer was defined when + * the queue was created. + * + * Successfully received items remain on the queue so will be returned again + * by the next call, or a call to xQueueReceive(). + * + * @param xQueue The handle to the queue from which the item is to be + * received. + * + * @param pvBuffer Pointer to the buffer into which the received item will + * be copied. + * + * @return pdTRUE if an item was successfully received from the queue, + * otherwise pdFALSE. + * + * \defgroup xQueuePeekFromISR xQueuePeekFromISR + * \ingroup QueueManagement + */ +BaseType_t xQueuePeekFromISR( QueueHandle_t xQueue, void * const pvBuffer ) PRIVILEGED_FUNCTION; + +/** + * queue. h + *+ BaseType_t xQueueReceive( + QueueHandle_t xQueue, + void *pvBuffer, + TickType_t xTicksToWait + );+ * + * Receive an item from a queue. The item is received by copy so a buffer of + * adequate size must be provided. The number of bytes copied into the buffer + * was defined when the queue was created. + * + * Successfully received items are removed from the queue. + * + * This function must not be used in an interrupt service routine. See + * xQueueReceiveFromISR for an alternative that can. + * + * @param xQueue The handle to the queue from which the item is to be + * received. + * + * @param pvBuffer Pointer to the buffer into which the received item will + * be copied. + * + * @param xTicksToWait The maximum amount of time the task should block + * waiting for an item to receive should the queue be empty at the time + * of the call. xQueueReceive() will return immediately if xTicksToWait + * is zero and the queue is empty. The time is defined in tick periods so the + * constant portTICK_PERIOD_MS should be used to convert to real time if this is + * required. + * + * @return pdTRUE if an item was successfully received from the queue, + * otherwise pdFALSE. + * + * Example usage: ++ struct AMessage + { + char ucMessageID; + char ucData[ 20 ]; + } xMessage; + + QueueHandle_t xQueue; + + // Task to create a queue and post a value. + void vATask( void *pvParameters ) + { + struct AMessage *pxMessage; + + // Create a queue capable of containing 10 pointers to AMessage structures. + // These should be passed by pointer as they contain a lot of data. + xQueue = xQueueCreate( 10, sizeof( struct AMessage * ) ); + if( xQueue == 0 ) + { + // Failed to create the queue. + } + + // ... + + // Send a pointer to a struct AMessage object. Don't block if the + // queue is already full. + pxMessage = & xMessage; + xQueueSend( xQueue, ( void * ) &pxMessage, ( TickType_t ) 0 ); + + // ... Rest of task code. + } + + // Task to receive from the queue. + void vADifferentTask( void *pvParameters ) + { + struct AMessage *pxRxedMessage; + + if( xQueue != 0 ) + { + // Receive a message on the created queue. Block for 10 ticks if a + // message is not immediately available. + if( xQueueReceive( xQueue, &( pxRxedMessage ), ( TickType_t ) 10 ) ) + { + // pcRxedMessage now points to the struct AMessage variable posted + // by vATask. + } + } + + // ... Rest of task code. + } ++ * \defgroup xQueueReceive xQueueReceive + * \ingroup QueueManagement + */ +BaseType_t xQueueReceive( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION; + +/** + * queue. h + *UBaseType_t uxQueueMessagesWaiting( const QueueHandle_t xQueue );+ * + * Return the number of messages stored in a queue. + * + * @param xQueue A handle to the queue being queried. + * + * @return The number of messages available in the queue. + * + * \defgroup uxQueueMessagesWaiting uxQueueMessagesWaiting + * \ingroup QueueManagement + */ +UBaseType_t uxQueueMessagesWaiting( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION; + +/** + * queue. h + *UBaseType_t uxQueueSpacesAvailable( const QueueHandle_t xQueue );+ * + * Return the number of free spaces available in a queue. This is equal to the + * number of items that can be sent to the queue before the queue becomes full + * if no items are removed. + * + * @param xQueue A handle to the queue being queried. + * + * @return The number of spaces available in the queue. + * + * \defgroup uxQueueMessagesWaiting uxQueueMessagesWaiting + * \ingroup QueueManagement + */ +UBaseType_t uxQueueSpacesAvailable( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION; + +/** + * queue. h + *void vQueueDelete( QueueHandle_t xQueue );+ * + * Delete a queue - freeing all the memory allocated for storing of items + * placed on the queue. + * + * @param xQueue A handle to the queue to be deleted. + * + * \defgroup vQueueDelete vQueueDelete + * \ingroup QueueManagement + */ +void vQueueDelete( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION; + +/** + * queue. h + *+ BaseType_t xQueueSendToFrontFromISR( + QueueHandle_t xQueue, + const void *pvItemToQueue, + BaseType_t *pxHigherPriorityTaskWoken + ); ++ * + * This is a macro that calls xQueueGenericSendFromISR(). + * + * Post an item to the front of a queue. It is safe to use this macro from + * within an interrupt service routine. + * + * Items are queued by copy not reference so it is preferable to only + * queue small items, especially when called from an ISR. In most cases + * it would be preferable to store a pointer to the item being queued. + * + * @param xQueue The handle to the queue on which the item is to be posted. + * + * @param pvItemToQueue A pointer to the item that is to be placed on the + * queue. The size of the items the queue will hold was defined when the + * queue was created, so this many bytes will be copied from pvItemToQueue + * into the queue storage area. + * + * @param pxHigherPriorityTaskWoken xQueueSendToFrontFromISR() will set + * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task + * to unblock, and the unblocked task has a priority higher than the currently + * running task. If xQueueSendToFromFromISR() sets this value to pdTRUE then + * a context switch should be requested before the interrupt is exited. + * + * @return pdTRUE if the data was successfully sent to the queue, otherwise + * errQUEUE_FULL. + * + * Example usage for buffered IO (where the ISR can obtain more than one value + * per call): ++ void vBufferISR( void ) + { + char cIn; + BaseType_t xHigherPrioritTaskWoken; + + // We have not woken a task at the start of the ISR. + xHigherPriorityTaskWoken = pdFALSE; + + // Loop until the buffer is empty. + do + { + // Obtain a byte from the buffer. + cIn = portINPUT_BYTE( RX_REGISTER_ADDRESS ); + + // Post the byte. + xQueueSendToFrontFromISR( xRxQueue, &cIn, &xHigherPriorityTaskWoken ); + + } while( portINPUT_BYTE( BUFFER_COUNT ) ); + + // Now the buffer is empty we can switch context if necessary. + if( xHigherPriorityTaskWoken ) + { + taskYIELD (); + } + } ++ * + * \defgroup xQueueSendFromISR xQueueSendFromISR + * \ingroup QueueManagement + */ +#define xQueueSendToFrontFromISR( xQueue, pvItemToQueue, pxHigherPriorityTaskWoken ) xQueueGenericSendFromISR( ( xQueue ), ( pvItemToQueue ), ( pxHigherPriorityTaskWoken ), queueSEND_TO_FRONT ) + + +/** + * queue. h + *+ BaseType_t xQueueSendToBackFromISR( + QueueHandle_t xQueue, + const void *pvItemToQueue, + BaseType_t *pxHigherPriorityTaskWoken + ); ++ * + * This is a macro that calls xQueueGenericSendFromISR(). + * + * Post an item to the back of a queue. It is safe to use this macro from + * within an interrupt service routine. + * + * Items are queued by copy not reference so it is preferable to only + * queue small items, especially when called from an ISR. In most cases + * it would be preferable to store a pointer to the item being queued. + * + * @param xQueue The handle to the queue on which the item is to be posted. + * + * @param pvItemToQueue A pointer to the item that is to be placed on the + * queue. The size of the items the queue will hold was defined when the + * queue was created, so this many bytes will be copied from pvItemToQueue + * into the queue storage area. + * + * @param pxHigherPriorityTaskWoken xQueueSendToBackFromISR() will set + * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task + * to unblock, and the unblocked task has a priority higher than the currently + * running task. If xQueueSendToBackFromISR() sets this value to pdTRUE then + * a context switch should be requested before the interrupt is exited. + * + * @return pdTRUE if the data was successfully sent to the queue, otherwise + * errQUEUE_FULL. + * + * Example usage for buffered IO (where the ISR can obtain more than one value + * per call): ++ void vBufferISR( void ) + { + char cIn; + BaseType_t xHigherPriorityTaskWoken; + + // We have not woken a task at the start of the ISR. + xHigherPriorityTaskWoken = pdFALSE; + + // Loop until the buffer is empty. + do + { + // Obtain a byte from the buffer. + cIn = portINPUT_BYTE( RX_REGISTER_ADDRESS ); + + // Post the byte. + xQueueSendToBackFromISR( xRxQueue, &cIn, &xHigherPriorityTaskWoken ); + + } while( portINPUT_BYTE( BUFFER_COUNT ) ); + + // Now the buffer is empty we can switch context if necessary. + if( xHigherPriorityTaskWoken ) + { + taskYIELD (); + } + } ++ * + * \defgroup xQueueSendFromISR xQueueSendFromISR + * \ingroup QueueManagement + */ +#define xQueueSendToBackFromISR( xQueue, pvItemToQueue, pxHigherPriorityTaskWoken ) xQueueGenericSendFromISR( ( xQueue ), ( pvItemToQueue ), ( pxHigherPriorityTaskWoken ), queueSEND_TO_BACK ) + +/** + * queue. h + *+ BaseType_t xQueueOverwriteFromISR( + QueueHandle_t xQueue, + const void * pvItemToQueue, + BaseType_t *pxHigherPriorityTaskWoken + ); + *+ * + * A version of xQueueOverwrite() that can be used in an interrupt service + * routine (ISR). + * + * Only for use with queues that can hold a single item - so the queue is either + * empty or full. + * + * Post an item on a queue. If the queue is already full then overwrite the + * value held in the queue. The item is queued by copy, not by reference. + * + * @param xQueue The handle to the queue on which the item is to be posted. + * + * @param pvItemToQueue A pointer to the item that is to be placed on the + * queue. The size of the items the queue will hold was defined when the + * queue was created, so this many bytes will be copied from pvItemToQueue + * into the queue storage area. + * + * @param pxHigherPriorityTaskWoken xQueueOverwriteFromISR() will set + * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task + * to unblock, and the unblocked task has a priority higher than the currently + * running task. If xQueueOverwriteFromISR() sets this value to pdTRUE then + * a context switch should be requested before the interrupt is exited. + * + * @return xQueueOverwriteFromISR() is a macro that calls + * xQueueGenericSendFromISR(), and therefore has the same return values as + * xQueueSendToFrontFromISR(). However, pdPASS is the only value that can be + * returned because xQueueOverwriteFromISR() will write to the queue even when + * the queue is already full. + * + * Example usage: ++ + QueueHandle_t xQueue; + + void vFunction( void *pvParameters ) + { + // Create a queue to hold one uint32_t value. It is strongly + // recommended *not* to use xQueueOverwriteFromISR() on queues that can + // contain more than one value, and doing so will trigger an assertion + // if configASSERT() is defined. + xQueue = xQueueCreate( 1, sizeof( uint32_t ) ); +} + +void vAnInterruptHandler( void ) +{ +// xHigherPriorityTaskWoken must be set to pdFALSE before it is used. +BaseType_t xHigherPriorityTaskWoken = pdFALSE; +uint32_t ulVarToSend, ulValReceived; + + // Write the value 10 to the queue using xQueueOverwriteFromISR(). + ulVarToSend = 10; + xQueueOverwriteFromISR( xQueue, &ulVarToSend, &xHigherPriorityTaskWoken ); + + // The queue is full, but calling xQueueOverwriteFromISR() again will still + // pass because the value held in the queue will be overwritten with the + // new value. + ulVarToSend = 100; + xQueueOverwriteFromISR( xQueue, &ulVarToSend, &xHigherPriorityTaskWoken ); + + // Reading from the queue will now return 100. + + // ... + + if( xHigherPrioritytaskWoken == pdTRUE ) + { + // Writing to the queue caused a task to unblock and the unblocked task + // has a priority higher than or equal to the priority of the currently + // executing task (the task this interrupt interrupted). Perform a context + // switch so this interrupt returns directly to the unblocked task. + portYIELD_FROM_ISR(); // or portEND_SWITCHING_ISR() depending on the port. + } +} ++ * \defgroup xQueueOverwriteFromISR xQueueOverwriteFromISR + * \ingroup QueueManagement + */ +#define xQueueOverwriteFromISR( xQueue, pvItemToQueue, pxHigherPriorityTaskWoken ) xQueueGenericSendFromISR( ( xQueue ), ( pvItemToQueue ), ( pxHigherPriorityTaskWoken ), queueOVERWRITE ) + +/** + * queue. h + *+ BaseType_t xQueueSendFromISR( + QueueHandle_t xQueue, + const void *pvItemToQueue, + BaseType_t *pxHigherPriorityTaskWoken + ); ++ * + * This is a macro that calls xQueueGenericSendFromISR(). It is included + * for backward compatibility with versions of FreeRTOS.org that did not + * include the xQueueSendToBackFromISR() and xQueueSendToFrontFromISR() + * macros. + * + * Post an item to the back of a queue. It is safe to use this function from + * within an interrupt service routine. + * + * Items are queued by copy not reference so it is preferable to only + * queue small items, especially when called from an ISR. In most cases + * it would be preferable to store a pointer to the item being queued. + * + * @param xQueue The handle to the queue on which the item is to be posted. + * + * @param pvItemToQueue A pointer to the item that is to be placed on the + * queue. The size of the items the queue will hold was defined when the + * queue was created, so this many bytes will be copied from pvItemToQueue + * into the queue storage area. + * + * @param pxHigherPriorityTaskWoken xQueueSendFromISR() will set + * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task + * to unblock, and the unblocked task has a priority higher than the currently + * running task. If xQueueSendFromISR() sets this value to pdTRUE then + * a context switch should be requested before the interrupt is exited. + * + * @return pdTRUE if the data was successfully sent to the queue, otherwise + * errQUEUE_FULL. + * + * Example usage for buffered IO (where the ISR can obtain more than one value + * per call): ++ void vBufferISR( void ) + { + char cIn; + BaseType_t xHigherPriorityTaskWoken; + + // We have not woken a task at the start of the ISR. + xHigherPriorityTaskWoken = pdFALSE; + + // Loop until the buffer is empty. + do + { + // Obtain a byte from the buffer. + cIn = portINPUT_BYTE( RX_REGISTER_ADDRESS ); + + // Post the byte. + xQueueSendFromISR( xRxQueue, &cIn, &xHigherPriorityTaskWoken ); + + } while( portINPUT_BYTE( BUFFER_COUNT ) ); + + // Now the buffer is empty we can switch context if necessary. + if( xHigherPriorityTaskWoken ) + { + // Actual macro used here is port specific. + portYIELD_FROM_ISR (); + } + } ++ * + * \defgroup xQueueSendFromISR xQueueSendFromISR + * \ingroup QueueManagement + */ +#define xQueueSendFromISR( xQueue, pvItemToQueue, pxHigherPriorityTaskWoken ) xQueueGenericSendFromISR( ( xQueue ), ( pvItemToQueue ), ( pxHigherPriorityTaskWoken ), queueSEND_TO_BACK ) + +/** + * queue. h + *+ BaseType_t xQueueGenericSendFromISR( + QueueHandle_t xQueue, + const void *pvItemToQueue, + BaseType_t *pxHigherPriorityTaskWoken, + BaseType_t xCopyPosition + ); ++ * + * It is preferred that the macros xQueueSendFromISR(), + * xQueueSendToFrontFromISR() and xQueueSendToBackFromISR() be used in place + * of calling this function directly. xQueueGiveFromISR() is an + * equivalent for use by semaphores that don't actually copy any data. + * + * Post an item on a queue. It is safe to use this function from within an + * interrupt service routine. + * + * Items are queued by copy not reference so it is preferable to only + * queue small items, especially when called from an ISR. In most cases + * it would be preferable to store a pointer to the item being queued. + * + * @param xQueue The handle to the queue on which the item is to be posted. + * + * @param pvItemToQueue A pointer to the item that is to be placed on the + * queue. The size of the items the queue will hold was defined when the + * queue was created, so this many bytes will be copied from pvItemToQueue + * into the queue storage area. + * + * @param pxHigherPriorityTaskWoken xQueueGenericSendFromISR() will set + * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task + * to unblock, and the unblocked task has a priority higher than the currently + * running task. If xQueueGenericSendFromISR() sets this value to pdTRUE then + * a context switch should be requested before the interrupt is exited. + * + * @param xCopyPosition Can take the value queueSEND_TO_BACK to place the + * item at the back of the queue, or queueSEND_TO_FRONT to place the item + * at the front of the queue (for high priority messages). + * + * @return pdTRUE if the data was successfully sent to the queue, otherwise + * errQUEUE_FULL. + * + * Example usage for buffered IO (where the ISR can obtain more than one value + * per call): ++ void vBufferISR( void ) + { + char cIn; + BaseType_t xHigherPriorityTaskWokenByPost; + + // We have not woken a task at the start of the ISR. + xHigherPriorityTaskWokenByPost = pdFALSE; + + // Loop until the buffer is empty. + do + { + // Obtain a byte from the buffer. + cIn = portINPUT_BYTE( RX_REGISTER_ADDRESS ); + + // Post each byte. + xQueueGenericSendFromISR( xRxQueue, &cIn, &xHigherPriorityTaskWokenByPost, queueSEND_TO_BACK ); + + } while( portINPUT_BYTE( BUFFER_COUNT ) ); + + // Now the buffer is empty we can switch context if necessary. Note that the + // name of the yield function required is port specific. + if( xHigherPriorityTaskWokenByPost ) + { + taskYIELD_YIELD_FROM_ISR(); + } + } ++ * + * \defgroup xQueueSendFromISR xQueueSendFromISR + * \ingroup QueueManagement + */ +BaseType_t xQueueGenericSendFromISR( QueueHandle_t xQueue, const void * const pvItemToQueue, BaseType_t * const pxHigherPriorityTaskWoken, const BaseType_t xCopyPosition ) PRIVILEGED_FUNCTION; +BaseType_t xQueueGiveFromISR( QueueHandle_t xQueue, BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION; + +/** + * queue. h + *+ BaseType_t xQueueReceiveFromISR( + QueueHandle_t xQueue, + void *pvBuffer, + BaseType_t *pxTaskWoken + ); + *+ * + * Receive an item from a queue. It is safe to use this function from within an + * interrupt service routine. + * + * @param xQueue The handle to the queue from which the item is to be + * received. + * + * @param pvBuffer Pointer to the buffer into which the received item will + * be copied. + * + * @param pxTaskWoken A task may be blocked waiting for space to become + * available on the queue. If xQueueReceiveFromISR causes such a task to + * unblock *pxTaskWoken will get set to pdTRUE, otherwise *pxTaskWoken will + * remain unchanged. + * + * @return pdTRUE if an item was successfully received from the queue, + * otherwise pdFALSE. + * + * Example usage: ++ + QueueHandle_t xQueue; + + // Function to create a queue and post some values. + void vAFunction( void *pvParameters ) + { + char cValueToPost; + const TickType_t xTicksToWait = ( TickType_t )0xff; + + // Create a queue capable of containing 10 characters. + xQueue = xQueueCreate( 10, sizeof( char ) ); + if( xQueue == 0 ) + { + // Failed to create the queue. + } + + // ... + + // Post some characters that will be used within an ISR. If the queue + // is full then this task will block for xTicksToWait ticks. + cValueToPost = 'a'; + xQueueSend( xQueue, ( void * ) &cValueToPost, xTicksToWait ); + cValueToPost = 'b'; + xQueueSend( xQueue, ( void * ) &cValueToPost, xTicksToWait ); + + // ... keep posting characters ... this task may block when the queue + // becomes full. + + cValueToPost = 'c'; + xQueueSend( xQueue, ( void * ) &cValueToPost, xTicksToWait ); + } + + // ISR that outputs all the characters received on the queue. + void vISR_Routine( void ) + { + BaseType_t xTaskWokenByReceive = pdFALSE; + char cRxedChar; + + while( xQueueReceiveFromISR( xQueue, ( void * ) &cRxedChar, &xTaskWokenByReceive) ) + { + // A character was received. Output the character now. + vOutputCharacter( cRxedChar ); + + // If removing the character from the queue woke the task that was + // posting onto the queue cTaskWokenByReceive will have been set to + // pdTRUE. No matter how many times this loop iterates only one + // task will be woken. + } + + if( cTaskWokenByPost != ( char ) pdFALSE; + { + taskYIELD (); + } + } ++ * \defgroup xQueueReceiveFromISR xQueueReceiveFromISR + * \ingroup QueueManagement + */ +BaseType_t xQueueReceiveFromISR( QueueHandle_t xQueue, void * const pvBuffer, BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION; + +/* + * Utilities to query queues that are safe to use from an ISR. These utilities + * should be used only from witin an ISR, or within a critical section. + */ +BaseType_t xQueueIsQueueEmptyFromISR( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION; +BaseType_t xQueueIsQueueFullFromISR( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION; +UBaseType_t uxQueueMessagesWaitingFromISR( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION; + +/* + * The functions defined above are for passing data to and from tasks. The + * functions below are the equivalents for passing data to and from + * co-routines. + * + * These functions are called from the co-routine macro implementation and + * should not be called directly from application code. Instead use the macro + * wrappers defined within croutine.h. + */ +BaseType_t xQueueCRSendFromISR( QueueHandle_t xQueue, const void *pvItemToQueue, BaseType_t xCoRoutinePreviouslyWoken ); +BaseType_t xQueueCRReceiveFromISR( QueueHandle_t xQueue, void *pvBuffer, BaseType_t *pxTaskWoken ); +BaseType_t xQueueCRSend( QueueHandle_t xQueue, const void *pvItemToQueue, TickType_t xTicksToWait ); +BaseType_t xQueueCRReceive( QueueHandle_t xQueue, void *pvBuffer, TickType_t xTicksToWait ); + +/* + * For internal use only. Use xSemaphoreCreateMutex(), + * xSemaphoreCreateCounting() or xSemaphoreGetMutexHolder() instead of calling + * these functions directly. + */ +QueueHandle_t xQueueCreateMutex( const uint8_t ucQueueType ) PRIVILEGED_FUNCTION; +QueueHandle_t xQueueCreateMutexStatic( const uint8_t ucQueueType, StaticQueue_t *pxStaticQueue ) PRIVILEGED_FUNCTION; +QueueHandle_t xQueueCreateCountingSemaphore( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount ) PRIVILEGED_FUNCTION; +QueueHandle_t xQueueCreateCountingSemaphoreStatic( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount, StaticQueue_t *pxStaticQueue ) PRIVILEGED_FUNCTION; +BaseType_t xQueueSemaphoreTake( QueueHandle_t xQueue, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION; +void* xQueueGetMutexHolder( QueueHandle_t xSemaphore ) PRIVILEGED_FUNCTION; +void* xQueueGetMutexHolderFromISR( QueueHandle_t xSemaphore ) PRIVILEGED_FUNCTION; + +/* + * For internal use only. Use xSemaphoreTakeMutexRecursive() or + * xSemaphoreGiveMutexRecursive() instead of calling these functions directly. + */ +BaseType_t xQueueTakeMutexRecursive( QueueHandle_t xMutex, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION; +BaseType_t xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) PRIVILEGED_FUNCTION; + +/* + * Reset a queue back to its original empty state. The return value is now + * obsolete and is always set to pdPASS. + */ +#define xQueueReset( xQueue ) xQueueGenericReset( xQueue, pdFALSE ) + +/* + * The registry is provided as a means for kernel aware debuggers to + * locate queues, semaphores and mutexes. Call vQueueAddToRegistry() add + * a queue, semaphore or mutex handle to the registry if you want the handle + * to be available to a kernel aware debugger. If you are not using a kernel + * aware debugger then this function can be ignored. + * + * configQUEUE_REGISTRY_SIZE defines the maximum number of handles the + * registry can hold. configQUEUE_REGISTRY_SIZE must be greater than 0 + * within FreeRTOSConfig.h for the registry to be available. Its value + * does not effect the number of queues, semaphores and mutexes that can be + * created - just the number that the registry can hold. + * + * @param xQueue The handle of the queue being added to the registry. This + * is the handle returned by a call to xQueueCreate(). Semaphore and mutex + * handles can also be passed in here. + * + * @param pcName The name to be associated with the handle. This is the + * name that the kernel aware debugger will display. The queue registry only + * stores a pointer to the string - so the string must be persistent (global or + * preferably in ROM/Flash), not on the stack. + */ +#if( configQUEUE_REGISTRY_SIZE > 0 ) + void vQueueAddToRegistry( QueueHandle_t xQueue, const char *pcName ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ +#endif + +/* + * The registry is provided as a means for kernel aware debuggers to + * locate queues, semaphores and mutexes. Call vQueueAddToRegistry() add + * a queue, semaphore or mutex handle to the registry if you want the handle + * to be available to a kernel aware debugger, and vQueueUnregisterQueue() to + * remove the queue, semaphore or mutex from the register. If you are not using + * a kernel aware debugger then this function can be ignored. + * + * @param xQueue The handle of the queue being removed from the registry. + */ +#if( configQUEUE_REGISTRY_SIZE > 0 ) + void vQueueUnregisterQueue( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION; +#endif + +/* + * The queue registry is provided as a means for kernel aware debuggers to + * locate queues, semaphores and mutexes. Call pcQueueGetName() to look + * up and return the name of a queue in the queue registry from the queue's + * handle. + * + * @param xQueue The handle of the queue the name of which will be returned. + * @return If the queue is in the registry then a pointer to the name of the + * queue is returned. If the queue is not in the registry then NULL is + * returned. + */ +#if( configQUEUE_REGISTRY_SIZE > 0 ) + const char *pcQueueGetName( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ +#endif + +/* + * Generic version of the function used to creaet a queue using dynamic memory + * allocation. This is called by other functions and macros that create other + * RTOS objects that use the queue structure as their base. + */ +#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) + QueueHandle_t xQueueGenericCreate( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, const uint8_t ucQueueType ) PRIVILEGED_FUNCTION; +#endif + +/* + * Generic version of the function used to creaet a queue using dynamic memory + * allocation. This is called by other functions and macros that create other + * RTOS objects that use the queue structure as their base. + */ +#if( configSUPPORT_STATIC_ALLOCATION == 1 ) + QueueHandle_t xQueueGenericCreateStatic( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, StaticQueue_t *pxStaticQueue, const uint8_t ucQueueType ) PRIVILEGED_FUNCTION; +#endif + +/* + * Queue sets provide a mechanism to allow a task to block (pend) on a read + * operation from multiple queues or semaphores simultaneously. + * + * See FreeRTOS/Source/Demo/Common/Minimal/QueueSet.c for an example using this + * function. + * + * A queue set must be explicitly created using a call to xQueueCreateSet() + * before it can be used. Once created, standard FreeRTOS queues and semaphores + * can be added to the set using calls to xQueueAddToSet(). + * xQueueSelectFromSet() is then used to determine which, if any, of the queues + * or semaphores contained in the set is in a state where a queue read or + * semaphore take operation would be successful. + * + * Note 1: See the documentation on http://wwwFreeRTOS.org/RTOS-queue-sets.html + * for reasons why queue sets are very rarely needed in practice as there are + * simpler methods of blocking on multiple objects. + * + * Note 2: Blocking on a queue set that contains a mutex will not cause the + * mutex holder to inherit the priority of the blocked task. + * + * Note 3: An additional 4 bytes of RAM is required for each space in a every + * queue added to a queue set. Therefore counting semaphores that have a high + * maximum count value should not be added to a queue set. + * + * Note 4: A receive (in the case of a queue) or take (in the case of a + * semaphore) operation must not be performed on a member of a queue set unless + * a call to xQueueSelectFromSet() has first returned a handle to that set member. + * + * @param uxEventQueueLength Queue sets store events that occur on + * the queues and semaphores contained in the set. uxEventQueueLength specifies + * the maximum number of events that can be queued at once. To be absolutely + * certain that events are not lost uxEventQueueLength should be set to the + * total sum of the length of the queues added to the set, where binary + * semaphores and mutexes have a length of 1, and counting semaphores have a + * length set by their maximum count value. Examples: + * + If a queue set is to hold a queue of length 5, another queue of length 12, + * and a binary semaphore, then uxEventQueueLength should be set to + * (5 + 12 + 1), or 18. + * + If a queue set is to hold three binary semaphores then uxEventQueueLength + * should be set to (1 + 1 + 1 ), or 3. + * + If a queue set is to hold a counting semaphore that has a maximum count of + * 5, and a counting semaphore that has a maximum count of 3, then + * uxEventQueueLength should be set to (5 + 3), or 8. + * + * @return If the queue set is created successfully then a handle to the created + * queue set is returned. Otherwise NULL is returned. + */ +QueueSetHandle_t xQueueCreateSet( const UBaseType_t uxEventQueueLength ) PRIVILEGED_FUNCTION; + +/* + * Adds a queue or semaphore to a queue set that was previously created by a + * call to xQueueCreateSet(). + * + * See FreeRTOS/Source/Demo/Common/Minimal/QueueSet.c for an example using this + * function. + * + * Note 1: A receive (in the case of a queue) or take (in the case of a + * semaphore) operation must not be performed on a member of a queue set unless + * a call to xQueueSelectFromSet() has first returned a handle to that set member. + * + * @param xQueueOrSemaphore The handle of the queue or semaphore being added to + * the queue set (cast to an QueueSetMemberHandle_t type). + * + * @param xQueueSet The handle of the queue set to which the queue or semaphore + * is being added. + * + * @return If the queue or semaphore was successfully added to the queue set + * then pdPASS is returned. If the queue could not be successfully added to the + * queue set because it is already a member of a different queue set then pdFAIL + * is returned. + */ +BaseType_t xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet ) PRIVILEGED_FUNCTION; + +/* + * Removes a queue or semaphore from a queue set. A queue or semaphore can only + * be removed from a set if the queue or semaphore is empty. + * + * See FreeRTOS/Source/Demo/Common/Minimal/QueueSet.c for an example using this + * function. + * + * @param xQueueOrSemaphore The handle of the queue or semaphore being removed + * from the queue set (cast to an QueueSetMemberHandle_t type). + * + * @param xQueueSet The handle of the queue set in which the queue or semaphore + * is included. + * + * @return If the queue or semaphore was successfully removed from the queue set + * then pdPASS is returned. If the queue was not in the queue set, or the + * queue (or semaphore) was not empty, then pdFAIL is returned. + */ +BaseType_t xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet ) PRIVILEGED_FUNCTION; + +/* + * xQueueSelectFromSet() selects from the members of a queue set a queue or + * semaphore that either contains data (in the case of a queue) or is available + * to take (in the case of a semaphore). xQueueSelectFromSet() effectively + * allows a task to block (pend) on a read operation on all the queues and + * semaphores in a queue set simultaneously. + * + * See FreeRTOS/Source/Demo/Common/Minimal/QueueSet.c for an example using this + * function. + * + * Note 1: See the documentation on http://wwwFreeRTOS.org/RTOS-queue-sets.html + * for reasons why queue sets are very rarely needed in practice as there are + * simpler methods of blocking on multiple objects. + * + * Note 2: Blocking on a queue set that contains a mutex will not cause the + * mutex holder to inherit the priority of the blocked task. + * + * Note 3: A receive (in the case of a queue) or take (in the case of a + * semaphore) operation must not be performed on a member of a queue set unless + * a call to xQueueSelectFromSet() has first returned a handle to that set member. + * + * @param xQueueSet The queue set on which the task will (potentially) block. + * + * @param xTicksToWait The maximum time, in ticks, that the calling task will + * remain in the Blocked state (with other tasks executing) to wait for a member + * of the queue set to be ready for a successful queue read or semaphore take + * operation. + * + * @return xQueueSelectFromSet() will return the handle of a queue (cast to + * a QueueSetMemberHandle_t type) contained in the queue set that contains data, + * or the handle of a semaphore (cast to a QueueSetMemberHandle_t type) contained + * in the queue set that is available, or NULL if no such queue or semaphore + * exists before before the specified block time expires. + */ +QueueSetMemberHandle_t xQueueSelectFromSet( QueueSetHandle_t xQueueSet, const TickType_t xTicksToWait ) PRIVILEGED_FUNCTION; + +/* + * A version of xQueueSelectFromSet() that can be used from an ISR. + */ +QueueSetMemberHandle_t xQueueSelectFromSetFromISR( QueueSetHandle_t xQueueSet ) PRIVILEGED_FUNCTION; + +/* Not public API functions. */ +void vQueueWaitForMessageRestricted( QueueHandle_t xQueue, TickType_t xTicksToWait, const BaseType_t xWaitIndefinitely ) PRIVILEGED_FUNCTION; +BaseType_t xQueueGenericReset( QueueHandle_t xQueue, BaseType_t xNewQueue ) PRIVILEGED_FUNCTION; +void vQueueSetQueueNumber( QueueHandle_t xQueue, UBaseType_t uxQueueNumber ) PRIVILEGED_FUNCTION; +UBaseType_t uxQueueGetQueueNumber( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION; +uint8_t ucQueueGetQueueType( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION; + + +#ifdef __cplusplus +} +#endif + +#endif /* QUEUE_H */ + diff --git a/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/include/semphr.h b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/include/semphr.h new file mode 100644 index 0000000..8b0382d --- /dev/null +++ b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/include/semphr.h @@ -0,0 +1,1140 @@ +/* + * FreeRTOS Kernel V10.0.1 + * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#ifndef SEMAPHORE_H +#define SEMAPHORE_H + +#ifndef INC_FREERTOS_H + #error "include FreeRTOS.h" must appear in source files before "include semphr.h" +#endif + +#include "queue.h" + +typedef QueueHandle_t SemaphoreHandle_t; + +#define semBINARY_SEMAPHORE_QUEUE_LENGTH ( ( uint8_t ) 1U ) +#define semSEMAPHORE_QUEUE_ITEM_LENGTH ( ( uint8_t ) 0U ) +#define semGIVE_BLOCK_TIME ( ( TickType_t ) 0U ) + + +/** + * semphr. h + *vSemaphoreCreateBinary( SemaphoreHandle_t xSemaphore )+ * + * In many usage scenarios it is faster and more memory efficient to use a + * direct to task notification in place of a binary semaphore! + * http://www.freertos.org/RTOS-task-notifications.html + * + * This old vSemaphoreCreateBinary() macro is now deprecated in favour of the + * xSemaphoreCreateBinary() function. Note that binary semaphores created using + * the vSemaphoreCreateBinary() macro are created in a state such that the + * first call to 'take' the semaphore would pass, whereas binary semaphores + * created using xSemaphoreCreateBinary() are created in a state such that the + * the semaphore must first be 'given' before it can be 'taken'. + * + * Macro that implements a semaphore by using the existing queue mechanism. + * The queue length is 1 as this is a binary semaphore. The data size is 0 + * as we don't want to actually store any data - we just want to know if the + * queue is empty or full. + * + * This type of semaphore can be used for pure synchronisation between tasks or + * between an interrupt and a task. The semaphore need not be given back once + * obtained, so one task/interrupt can continuously 'give' the semaphore while + * another continuously 'takes' the semaphore. For this reason this type of + * semaphore does not use a priority inheritance mechanism. For an alternative + * that does use priority inheritance see xSemaphoreCreateMutex(). + * + * @param xSemaphore Handle to the created semaphore. Should be of type SemaphoreHandle_t. + * + * Example usage: ++ SemaphoreHandle_t xSemaphore = NULL; + + void vATask( void * pvParameters ) + { + // Semaphore cannot be used before a call to vSemaphoreCreateBinary (). + // This is a macro so pass the variable in directly. + vSemaphoreCreateBinary( xSemaphore ); + + if( xSemaphore != NULL ) + { + // The semaphore was created successfully. + // The semaphore can now be used. + } + } ++ * \defgroup vSemaphoreCreateBinary vSemaphoreCreateBinary + * \ingroup Semaphores + */ +#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) + #define vSemaphoreCreateBinary( xSemaphore ) \ + { \ + ( xSemaphore ) = xQueueGenericCreate( ( UBaseType_t ) 1, semSEMAPHORE_QUEUE_ITEM_LENGTH, queueQUEUE_TYPE_BINARY_SEMAPHORE ); \ + if( ( xSemaphore ) != NULL ) \ + { \ + ( void ) xSemaphoreGive( ( xSemaphore ) ); \ + } \ + } +#endif + +/** + * semphr. h + *SemaphoreHandle_t xSemaphoreCreateBinary( void )+ * + * Creates a new binary semaphore instance, and returns a handle by which the + * new semaphore can be referenced. + * + * In many usage scenarios it is faster and more memory efficient to use a + * direct to task notification in place of a binary semaphore! + * http://www.freertos.org/RTOS-task-notifications.html + * + * Internally, within the FreeRTOS implementation, binary semaphores use a block + * of memory, in which the semaphore structure is stored. If a binary semaphore + * is created using xSemaphoreCreateBinary() then the required memory is + * automatically dynamically allocated inside the xSemaphoreCreateBinary() + * function. (see http://www.freertos.org/a00111.html). If a binary semaphore + * is created using xSemaphoreCreateBinaryStatic() then the application writer + * must provide the memory. xSemaphoreCreateBinaryStatic() therefore allows a + * binary semaphore to be created without using any dynamic memory allocation. + * + * The old vSemaphoreCreateBinary() macro is now deprecated in favour of this + * xSemaphoreCreateBinary() function. Note that binary semaphores created using + * the vSemaphoreCreateBinary() macro are created in a state such that the + * first call to 'take' the semaphore would pass, whereas binary semaphores + * created using xSemaphoreCreateBinary() are created in a state such that the + * the semaphore must first be 'given' before it can be 'taken'. + * + * This type of semaphore can be used for pure synchronisation between tasks or + * between an interrupt and a task. The semaphore need not be given back once + * obtained, so one task/interrupt can continuously 'give' the semaphore while + * another continuously 'takes' the semaphore. For this reason this type of + * semaphore does not use a priority inheritance mechanism. For an alternative + * that does use priority inheritance see xSemaphoreCreateMutex(). + * + * @return Handle to the created semaphore, or NULL if the memory required to + * hold the semaphore's data structures could not be allocated. + * + * Example usage: ++ SemaphoreHandle_t xSemaphore = NULL; + + void vATask( void * pvParameters ) + { + // Semaphore cannot be used before a call to xSemaphoreCreateBinary(). + // This is a macro so pass the variable in directly. + xSemaphore = xSemaphoreCreateBinary(); + + if( xSemaphore != NULL ) + { + // The semaphore was created successfully. + // The semaphore can now be used. + } + } ++ * \defgroup xSemaphoreCreateBinary xSemaphoreCreateBinary + * \ingroup Semaphores + */ +#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) + #define xSemaphoreCreateBinary() xQueueGenericCreate( ( UBaseType_t ) 1, semSEMAPHORE_QUEUE_ITEM_LENGTH, queueQUEUE_TYPE_BINARY_SEMAPHORE ) +#endif + +/** + * semphr. h + *SemaphoreHandle_t xSemaphoreCreateBinaryStatic( StaticSemaphore_t *pxSemaphoreBuffer )+ * + * Creates a new binary semaphore instance, and returns a handle by which the + * new semaphore can be referenced. + * + * NOTE: In many usage scenarios it is faster and more memory efficient to use a + * direct to task notification in place of a binary semaphore! + * http://www.freertos.org/RTOS-task-notifications.html + * + * Internally, within the FreeRTOS implementation, binary semaphores use a block + * of memory, in which the semaphore structure is stored. If a binary semaphore + * is created using xSemaphoreCreateBinary() then the required memory is + * automatically dynamically allocated inside the xSemaphoreCreateBinary() + * function. (see http://www.freertos.org/a00111.html). If a binary semaphore + * is created using xSemaphoreCreateBinaryStatic() then the application writer + * must provide the memory. xSemaphoreCreateBinaryStatic() therefore allows a + * binary semaphore to be created without using any dynamic memory allocation. + * + * This type of semaphore can be used for pure synchronisation between tasks or + * between an interrupt and a task. The semaphore need not be given back once + * obtained, so one task/interrupt can continuously 'give' the semaphore while + * another continuously 'takes' the semaphore. For this reason this type of + * semaphore does not use a priority inheritance mechanism. For an alternative + * that does use priority inheritance see xSemaphoreCreateMutex(). + * + * @param pxSemaphoreBuffer Must point to a variable of type StaticSemaphore_t, + * which will then be used to hold the semaphore's data structure, removing the + * need for the memory to be allocated dynamically. + * + * @return If the semaphore is created then a handle to the created semaphore is + * returned. If pxSemaphoreBuffer is NULL then NULL is returned. + * + * Example usage: ++ SemaphoreHandle_t xSemaphore = NULL; + StaticSemaphore_t xSemaphoreBuffer; + + void vATask( void * pvParameters ) + { + // Semaphore cannot be used before a call to xSemaphoreCreateBinary(). + // The semaphore's data structures will be placed in the xSemaphoreBuffer + // variable, the address of which is passed into the function. The + // function's parameter is not NULL, so the function will not attempt any + // dynamic memory allocation, and therefore the function will not return + // return NULL. + xSemaphore = xSemaphoreCreateBinary( &xSemaphoreBuffer ); + + // Rest of task code goes here. + } ++ * \defgroup xSemaphoreCreateBinaryStatic xSemaphoreCreateBinaryStatic + * \ingroup Semaphores + */ +#if( configSUPPORT_STATIC_ALLOCATION == 1 ) + #define xSemaphoreCreateBinaryStatic( pxStaticSemaphore ) xQueueGenericCreateStatic( ( UBaseType_t ) 1, semSEMAPHORE_QUEUE_ITEM_LENGTH, NULL, pxStaticSemaphore, queueQUEUE_TYPE_BINARY_SEMAPHORE ) +#endif /* configSUPPORT_STATIC_ALLOCATION */ + +/** + * semphr. h + *xSemaphoreTake( + * SemaphoreHandle_t xSemaphore, + * TickType_t xBlockTime + * )+ * + * Macro to obtain a semaphore. The semaphore must have previously been + * created with a call to xSemaphoreCreateBinary(), xSemaphoreCreateMutex() or + * xSemaphoreCreateCounting(). + * + * @param xSemaphore A handle to the semaphore being taken - obtained when + * the semaphore was created. + * + * @param xBlockTime The time in ticks to wait for the semaphore to become + * available. The macro portTICK_PERIOD_MS can be used to convert this to a + * real time. A block time of zero can be used to poll the semaphore. A block + * time of portMAX_DELAY can be used to block indefinitely (provided + * INCLUDE_vTaskSuspend is set to 1 in FreeRTOSConfig.h). + * + * @return pdTRUE if the semaphore was obtained. pdFALSE + * if xBlockTime expired without the semaphore becoming available. + * + * Example usage: ++ SemaphoreHandle_t xSemaphore = NULL; + + // A task that creates a semaphore. + void vATask( void * pvParameters ) + { + // Create the semaphore to guard a shared resource. + xSemaphore = xSemaphoreCreateBinary(); + } + + // A task that uses the semaphore. + void vAnotherTask( void * pvParameters ) + { + // ... Do other things. + + if( xSemaphore != NULL ) + { + // See if we can obtain the semaphore. If the semaphore is not available + // wait 10 ticks to see if it becomes free. + if( xSemaphoreTake( xSemaphore, ( TickType_t ) 10 ) == pdTRUE ) + { + // We were able to obtain the semaphore and can now access the + // shared resource. + + // ... + + // We have finished accessing the shared resource. Release the + // semaphore. + xSemaphoreGive( xSemaphore ); + } + else + { + // We could not obtain the semaphore and can therefore not access + // the shared resource safely. + } + } + } ++ * \defgroup xSemaphoreTake xSemaphoreTake + * \ingroup Semaphores + */ +#define xSemaphoreTake( xSemaphore, xBlockTime ) xQueueSemaphoreTake( ( xSemaphore ), ( xBlockTime ) ) + +/** + * semphr. h + * xSemaphoreTakeRecursive( + * SemaphoreHandle_t xMutex, + * TickType_t xBlockTime + * ) + * + * Macro to recursively obtain, or 'take', a mutex type semaphore. + * The mutex must have previously been created using a call to + * xSemaphoreCreateRecursiveMutex(); + * + * configUSE_RECURSIVE_MUTEXES must be set to 1 in FreeRTOSConfig.h for this + * macro to be available. + * + * This macro must not be used on mutexes created using xSemaphoreCreateMutex(). + * + * A mutex used recursively can be 'taken' repeatedly by the owner. The mutex + * doesn't become available again until the owner has called + * xSemaphoreGiveRecursive() for each successful 'take' request. For example, + * if a task successfully 'takes' the same mutex 5 times then the mutex will + * not be available to any other task until it has also 'given' the mutex back + * exactly five times. + * + * @param xMutex A handle to the mutex being obtained. This is the + * handle returned by xSemaphoreCreateRecursiveMutex(); + * + * @param xBlockTime The time in ticks to wait for the semaphore to become + * available. The macro portTICK_PERIOD_MS can be used to convert this to a + * real time. A block time of zero can be used to poll the semaphore. If + * the task already owns the semaphore then xSemaphoreTakeRecursive() will + * return immediately no matter what the value of xBlockTime. + * + * @return pdTRUE if the semaphore was obtained. pdFALSE if xBlockTime + * expired without the semaphore becoming available. + * + * Example usage: ++ SemaphoreHandle_t xMutex = NULL; + + // A task that creates a mutex. + void vATask( void * pvParameters ) + { + // Create the mutex to guard a shared resource. + xMutex = xSemaphoreCreateRecursiveMutex(); + } + + // A task that uses the mutex. + void vAnotherTask( void * pvParameters ) + { + // ... Do other things. + + if( xMutex != NULL ) + { + // See if we can obtain the mutex. If the mutex is not available + // wait 10 ticks to see if it becomes free. + if( xSemaphoreTakeRecursive( xSemaphore, ( TickType_t ) 10 ) == pdTRUE ) + { + // We were able to obtain the mutex and can now access the + // shared resource. + + // ... + // For some reason due to the nature of the code further calls to + // xSemaphoreTakeRecursive() are made on the same mutex. In real + // code these would not be just sequential calls as this would make + // no sense. Instead the calls are likely to be buried inside + // a more complex call structure. + xSemaphoreTakeRecursive( xMutex, ( TickType_t ) 10 ); + xSemaphoreTakeRecursive( xMutex, ( TickType_t ) 10 ); + + // The mutex has now been 'taken' three times, so will not be + // available to another task until it has also been given back + // three times. Again it is unlikely that real code would have + // these calls sequentially, but instead buried in a more complex + // call structure. This is just for illustrative purposes. + xSemaphoreGiveRecursive( xMutex ); + xSemaphoreGiveRecursive( xMutex ); + xSemaphoreGiveRecursive( xMutex ); + + // Now the mutex can be taken by other tasks. + } + else + { + // We could not obtain the mutex and can therefore not access + // the shared resource safely. + } + } + } ++ * \defgroup xSemaphoreTakeRecursive xSemaphoreTakeRecursive + * \ingroup Semaphores + */ +#if( configUSE_RECURSIVE_MUTEXES == 1 ) + #define xSemaphoreTakeRecursive( xMutex, xBlockTime ) xQueueTakeMutexRecursive( ( xMutex ), ( xBlockTime ) ) +#endif + +/** + * semphr. h + *xSemaphoreGive( SemaphoreHandle_t xSemaphore )+ * + * Macro to release a semaphore. The semaphore must have previously been + * created with a call to xSemaphoreCreateBinary(), xSemaphoreCreateMutex() or + * xSemaphoreCreateCounting(). and obtained using sSemaphoreTake(). + * + * This macro must not be used from an ISR. See xSemaphoreGiveFromISR () for + * an alternative which can be used from an ISR. + * + * This macro must also not be used on semaphores created using + * xSemaphoreCreateRecursiveMutex(). + * + * @param xSemaphore A handle to the semaphore being released. This is the + * handle returned when the semaphore was created. + * + * @return pdTRUE if the semaphore was released. pdFALSE if an error occurred. + * Semaphores are implemented using queues. An error can occur if there is + * no space on the queue to post a message - indicating that the + * semaphore was not first obtained correctly. + * + * Example usage: ++ SemaphoreHandle_t xSemaphore = NULL; + + void vATask( void * pvParameters ) + { + // Create the semaphore to guard a shared resource. + xSemaphore = vSemaphoreCreateBinary(); + + if( xSemaphore != NULL ) + { + if( xSemaphoreGive( xSemaphore ) != pdTRUE ) + { + // We would expect this call to fail because we cannot give + // a semaphore without first "taking" it! + } + + // Obtain the semaphore - don't block if the semaphore is not + // immediately available. + if( xSemaphoreTake( xSemaphore, ( TickType_t ) 0 ) ) + { + // We now have the semaphore and can access the shared resource. + + // ... + + // We have finished accessing the shared resource so can free the + // semaphore. + if( xSemaphoreGive( xSemaphore ) != pdTRUE ) + { + // We would not expect this call to fail because we must have + // obtained the semaphore to get here. + } + } + } + } ++ * \defgroup xSemaphoreGive xSemaphoreGive + * \ingroup Semaphores + */ +#define xSemaphoreGive( xSemaphore ) xQueueGenericSend( ( QueueHandle_t ) ( xSemaphore ), NULL, semGIVE_BLOCK_TIME, queueSEND_TO_BACK ) + +/** + * semphr. h + *xSemaphoreGiveRecursive( SemaphoreHandle_t xMutex )+ * + * Macro to recursively release, or 'give', a mutex type semaphore. + * The mutex must have previously been created using a call to + * xSemaphoreCreateRecursiveMutex(); + * + * configUSE_RECURSIVE_MUTEXES must be set to 1 in FreeRTOSConfig.h for this + * macro to be available. + * + * This macro must not be used on mutexes created using xSemaphoreCreateMutex(). + * + * A mutex used recursively can be 'taken' repeatedly by the owner. The mutex + * doesn't become available again until the owner has called + * xSemaphoreGiveRecursive() for each successful 'take' request. For example, + * if a task successfully 'takes' the same mutex 5 times then the mutex will + * not be available to any other task until it has also 'given' the mutex back + * exactly five times. + * + * @param xMutex A handle to the mutex being released, or 'given'. This is the + * handle returned by xSemaphoreCreateMutex(); + * + * @return pdTRUE if the semaphore was given. + * + * Example usage: ++ SemaphoreHandle_t xMutex = NULL; + + // A task that creates a mutex. + void vATask( void * pvParameters ) + { + // Create the mutex to guard a shared resource. + xMutex = xSemaphoreCreateRecursiveMutex(); + } + + // A task that uses the mutex. + void vAnotherTask( void * pvParameters ) + { + // ... Do other things. + + if( xMutex != NULL ) + { + // See if we can obtain the mutex. If the mutex is not available + // wait 10 ticks to see if it becomes free. + if( xSemaphoreTakeRecursive( xMutex, ( TickType_t ) 10 ) == pdTRUE ) + { + // We were able to obtain the mutex and can now access the + // shared resource. + + // ... + // For some reason due to the nature of the code further calls to + // xSemaphoreTakeRecursive() are made on the same mutex. In real + // code these would not be just sequential calls as this would make + // no sense. Instead the calls are likely to be buried inside + // a more complex call structure. + xSemaphoreTakeRecursive( xMutex, ( TickType_t ) 10 ); + xSemaphoreTakeRecursive( xMutex, ( TickType_t ) 10 ); + + // The mutex has now been 'taken' three times, so will not be + // available to another task until it has also been given back + // three times. Again it is unlikely that real code would have + // these calls sequentially, it would be more likely that the calls + // to xSemaphoreGiveRecursive() would be called as a call stack + // unwound. This is just for demonstrative purposes. + xSemaphoreGiveRecursive( xMutex ); + xSemaphoreGiveRecursive( xMutex ); + xSemaphoreGiveRecursive( xMutex ); + + // Now the mutex can be taken by other tasks. + } + else + { + // We could not obtain the mutex and can therefore not access + // the shared resource safely. + } + } + } ++ * \defgroup xSemaphoreGiveRecursive xSemaphoreGiveRecursive + * \ingroup Semaphores + */ +#if( configUSE_RECURSIVE_MUTEXES == 1 ) + #define xSemaphoreGiveRecursive( xMutex ) xQueueGiveMutexRecursive( ( xMutex ) ) +#endif + +/** + * semphr. h + *+ xSemaphoreGiveFromISR( + SemaphoreHandle_t xSemaphore, + BaseType_t *pxHigherPriorityTaskWoken + )+ * + * Macro to release a semaphore. The semaphore must have previously been + * created with a call to xSemaphoreCreateBinary() or xSemaphoreCreateCounting(). + * + * Mutex type semaphores (those created using a call to xSemaphoreCreateMutex()) + * must not be used with this macro. + * + * This macro can be used from an ISR. + * + * @param xSemaphore A handle to the semaphore being released. This is the + * handle returned when the semaphore was created. + * + * @param pxHigherPriorityTaskWoken xSemaphoreGiveFromISR() will set + * *pxHigherPriorityTaskWoken to pdTRUE if giving the semaphore caused a task + * to unblock, and the unblocked task has a priority higher than the currently + * running task. If xSemaphoreGiveFromISR() sets this value to pdTRUE then + * a context switch should be requested before the interrupt is exited. + * + * @return pdTRUE if the semaphore was successfully given, otherwise errQUEUE_FULL. + * + * Example usage: ++ \#define LONG_TIME 0xffff + \#define TICKS_TO_WAIT 10 + SemaphoreHandle_t xSemaphore = NULL; + + // Repetitive task. + void vATask( void * pvParameters ) + { + for( ;; ) + { + // We want this task to run every 10 ticks of a timer. The semaphore + // was created before this task was started. + + // Block waiting for the semaphore to become available. + if( xSemaphoreTake( xSemaphore, LONG_TIME ) == pdTRUE ) + { + // It is time to execute. + + // ... + + // We have finished our task. Return to the top of the loop where + // we will block on the semaphore until it is time to execute + // again. Note when using the semaphore for synchronisation with an + // ISR in this manner there is no need to 'give' the semaphore back. + } + } + } + + // Timer ISR + void vTimerISR( void * pvParameters ) + { + static uint8_t ucLocalTickCount = 0; + static BaseType_t xHigherPriorityTaskWoken; + + // A timer tick has occurred. + + // ... Do other time functions. + + // Is it time for vATask () to run? + xHigherPriorityTaskWoken = pdFALSE; + ucLocalTickCount++; + if( ucLocalTickCount >= TICKS_TO_WAIT ) + { + // Unblock the task by releasing the semaphore. + xSemaphoreGiveFromISR( xSemaphore, &xHigherPriorityTaskWoken ); + + // Reset the count so we release the semaphore again in 10 ticks time. + ucLocalTickCount = 0; + } + + if( xHigherPriorityTaskWoken != pdFALSE ) + { + // We can force a context switch here. Context switching from an + // ISR uses port specific syntax. Check the demo task for your port + // to find the syntax required. + } + } ++ * \defgroup xSemaphoreGiveFromISR xSemaphoreGiveFromISR + * \ingroup Semaphores + */ +#define xSemaphoreGiveFromISR( xSemaphore, pxHigherPriorityTaskWoken ) xQueueGiveFromISR( ( QueueHandle_t ) ( xSemaphore ), ( pxHigherPriorityTaskWoken ) ) + +/** + * semphr. h + *+ xSemaphoreTakeFromISR( + SemaphoreHandle_t xSemaphore, + BaseType_t *pxHigherPriorityTaskWoken + )+ * + * Macro to take a semaphore from an ISR. The semaphore must have + * previously been created with a call to xSemaphoreCreateBinary() or + * xSemaphoreCreateCounting(). + * + * Mutex type semaphores (those created using a call to xSemaphoreCreateMutex()) + * must not be used with this macro. + * + * This macro can be used from an ISR, however taking a semaphore from an ISR + * is not a common operation. It is likely to only be useful when taking a + * counting semaphore when an interrupt is obtaining an object from a resource + * pool (when the semaphore count indicates the number of resources available). + * + * @param xSemaphore A handle to the semaphore being taken. This is the + * handle returned when the semaphore was created. + * + * @param pxHigherPriorityTaskWoken xSemaphoreTakeFromISR() will set + * *pxHigherPriorityTaskWoken to pdTRUE if taking the semaphore caused a task + * to unblock, and the unblocked task has a priority higher than the currently + * running task. If xSemaphoreTakeFromISR() sets this value to pdTRUE then + * a context switch should be requested before the interrupt is exited. + * + * @return pdTRUE if the semaphore was successfully taken, otherwise + * pdFALSE + */ +#define xSemaphoreTakeFromISR( xSemaphore, pxHigherPriorityTaskWoken ) xQueueReceiveFromISR( ( QueueHandle_t ) ( xSemaphore ), NULL, ( pxHigherPriorityTaskWoken ) ) + +/** + * semphr. h + *SemaphoreHandle_t xSemaphoreCreateMutex( void )+ * + * Creates a new mutex type semaphore instance, and returns a handle by which + * the new mutex can be referenced. + * + * Internally, within the FreeRTOS implementation, mutex semaphores use a block + * of memory, in which the mutex structure is stored. If a mutex is created + * using xSemaphoreCreateMutex() then the required memory is automatically + * dynamically allocated inside the xSemaphoreCreateMutex() function. (see + * http://www.freertos.org/a00111.html). If a mutex is created using + * xSemaphoreCreateMutexStatic() then the application writer must provided the + * memory. xSemaphoreCreateMutexStatic() therefore allows a mutex to be created + * without using any dynamic memory allocation. + * + * Mutexes created using this function can be accessed using the xSemaphoreTake() + * and xSemaphoreGive() macros. The xSemaphoreTakeRecursive() and + * xSemaphoreGiveRecursive() macros must not be used. + * + * This type of semaphore uses a priority inheritance mechanism so a task + * 'taking' a semaphore MUST ALWAYS 'give' the semaphore back once the + * semaphore it is no longer required. + * + * Mutex type semaphores cannot be used from within interrupt service routines. + * + * See xSemaphoreCreateBinary() for an alternative implementation that can be + * used for pure synchronisation (where one task or interrupt always 'gives' the + * semaphore and another always 'takes' the semaphore) and from within interrupt + * service routines. + * + * @return If the mutex was successfully created then a handle to the created + * semaphore is returned. If there was not enough heap to allocate the mutex + * data structures then NULL is returned. + * + * Example usage: ++ SemaphoreHandle_t xSemaphore; + + void vATask( void * pvParameters ) + { + // Semaphore cannot be used before a call to xSemaphoreCreateMutex(). + // This is a macro so pass the variable in directly. + xSemaphore = xSemaphoreCreateMutex(); + + if( xSemaphore != NULL ) + { + // The semaphore was created successfully. + // The semaphore can now be used. + } + } ++ * \defgroup xSemaphoreCreateMutex xSemaphoreCreateMutex + * \ingroup Semaphores + */ +#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) + #define xSemaphoreCreateMutex() xQueueCreateMutex( queueQUEUE_TYPE_MUTEX ) +#endif + +/** + * semphr. h + *SemaphoreHandle_t xSemaphoreCreateMutexStatic( StaticSemaphore_t *pxMutexBuffer )+ * + * Creates a new mutex type semaphore instance, and returns a handle by which + * the new mutex can be referenced. + * + * Internally, within the FreeRTOS implementation, mutex semaphores use a block + * of memory, in which the mutex structure is stored. If a mutex is created + * using xSemaphoreCreateMutex() then the required memory is automatically + * dynamically allocated inside the xSemaphoreCreateMutex() function. (see + * http://www.freertos.org/a00111.html). If a mutex is created using + * xSemaphoreCreateMutexStatic() then the application writer must provided the + * memory. xSemaphoreCreateMutexStatic() therefore allows a mutex to be created + * without using any dynamic memory allocation. + * + * Mutexes created using this function can be accessed using the xSemaphoreTake() + * and xSemaphoreGive() macros. The xSemaphoreTakeRecursive() and + * xSemaphoreGiveRecursive() macros must not be used. + * + * This type of semaphore uses a priority inheritance mechanism so a task + * 'taking' a semaphore MUST ALWAYS 'give' the semaphore back once the + * semaphore it is no longer required. + * + * Mutex type semaphores cannot be used from within interrupt service routines. + * + * See xSemaphoreCreateBinary() for an alternative implementation that can be + * used for pure synchronisation (where one task or interrupt always 'gives' the + * semaphore and another always 'takes' the semaphore) and from within interrupt + * service routines. + * + * @param pxMutexBuffer Must point to a variable of type StaticSemaphore_t, + * which will be used to hold the mutex's data structure, removing the need for + * the memory to be allocated dynamically. + * + * @return If the mutex was successfully created then a handle to the created + * mutex is returned. If pxMutexBuffer was NULL then NULL is returned. + * + * Example usage: ++ SemaphoreHandle_t xSemaphore; + StaticSemaphore_t xMutexBuffer; + + void vATask( void * pvParameters ) + { + // A mutex cannot be used before it has been created. xMutexBuffer is + // into xSemaphoreCreateMutexStatic() so no dynamic memory allocation is + // attempted. + xSemaphore = xSemaphoreCreateMutexStatic( &xMutexBuffer ); + + // As no dynamic memory allocation was performed, xSemaphore cannot be NULL, + // so there is no need to check it. + } ++ * \defgroup xSemaphoreCreateMutexStatic xSemaphoreCreateMutexStatic + * \ingroup Semaphores + */ + #if( configSUPPORT_STATIC_ALLOCATION == 1 ) + #define xSemaphoreCreateMutexStatic( pxMutexBuffer ) xQueueCreateMutexStatic( queueQUEUE_TYPE_MUTEX, ( pxMutexBuffer ) ) +#endif /* configSUPPORT_STATIC_ALLOCATION */ + + +/** + * semphr. h + *SemaphoreHandle_t xSemaphoreCreateRecursiveMutex( void )+ * + * Creates a new recursive mutex type semaphore instance, and returns a handle + * by which the new recursive mutex can be referenced. + * + * Internally, within the FreeRTOS implementation, recursive mutexs use a block + * of memory, in which the mutex structure is stored. If a recursive mutex is + * created using xSemaphoreCreateRecursiveMutex() then the required memory is + * automatically dynamically allocated inside the + * xSemaphoreCreateRecursiveMutex() function. (see + * http://www.freertos.org/a00111.html). If a recursive mutex is created using + * xSemaphoreCreateRecursiveMutexStatic() then the application writer must + * provide the memory that will get used by the mutex. + * xSemaphoreCreateRecursiveMutexStatic() therefore allows a recursive mutex to + * be created without using any dynamic memory allocation. + * + * Mutexes created using this macro can be accessed using the + * xSemaphoreTakeRecursive() and xSemaphoreGiveRecursive() macros. The + * xSemaphoreTake() and xSemaphoreGive() macros must not be used. + * + * A mutex used recursively can be 'taken' repeatedly by the owner. The mutex + * doesn't become available again until the owner has called + * xSemaphoreGiveRecursive() for each successful 'take' request. For example, + * if a task successfully 'takes' the same mutex 5 times then the mutex will + * not be available to any other task until it has also 'given' the mutex back + * exactly five times. + * + * This type of semaphore uses a priority inheritance mechanism so a task + * 'taking' a semaphore MUST ALWAYS 'give' the semaphore back once the + * semaphore it is no longer required. + * + * Mutex type semaphores cannot be used from within interrupt service routines. + * + * See xSemaphoreCreateBinary() for an alternative implementation that can be + * used for pure synchronisation (where one task or interrupt always 'gives' the + * semaphore and another always 'takes' the semaphore) and from within interrupt + * service routines. + * + * @return xSemaphore Handle to the created mutex semaphore. Should be of type + * SemaphoreHandle_t. + * + * Example usage: ++ SemaphoreHandle_t xSemaphore; + + void vATask( void * pvParameters ) + { + // Semaphore cannot be used before a call to xSemaphoreCreateMutex(). + // This is a macro so pass the variable in directly. + xSemaphore = xSemaphoreCreateRecursiveMutex(); + + if( xSemaphore != NULL ) + { + // The semaphore was created successfully. + // The semaphore can now be used. + } + } ++ * \defgroup xSemaphoreCreateRecursiveMutex xSemaphoreCreateRecursiveMutex + * \ingroup Semaphores + */ +#if( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configUSE_RECURSIVE_MUTEXES == 1 ) ) + #define xSemaphoreCreateRecursiveMutex() xQueueCreateMutex( queueQUEUE_TYPE_RECURSIVE_MUTEX ) +#endif + +/** + * semphr. h + *SemaphoreHandle_t xSemaphoreCreateRecursiveMutexStatic( StaticSemaphore_t *pxMutexBuffer )+ * + * Creates a new recursive mutex type semaphore instance, and returns a handle + * by which the new recursive mutex can be referenced. + * + * Internally, within the FreeRTOS implementation, recursive mutexs use a block + * of memory, in which the mutex structure is stored. If a recursive mutex is + * created using xSemaphoreCreateRecursiveMutex() then the required memory is + * automatically dynamically allocated inside the + * xSemaphoreCreateRecursiveMutex() function. (see + * http://www.freertos.org/a00111.html). If a recursive mutex is created using + * xSemaphoreCreateRecursiveMutexStatic() then the application writer must + * provide the memory that will get used by the mutex. + * xSemaphoreCreateRecursiveMutexStatic() therefore allows a recursive mutex to + * be created without using any dynamic memory allocation. + * + * Mutexes created using this macro can be accessed using the + * xSemaphoreTakeRecursive() and xSemaphoreGiveRecursive() macros. The + * xSemaphoreTake() and xSemaphoreGive() macros must not be used. + * + * A mutex used recursively can be 'taken' repeatedly by the owner. The mutex + * doesn't become available again until the owner has called + * xSemaphoreGiveRecursive() for each successful 'take' request. For example, + * if a task successfully 'takes' the same mutex 5 times then the mutex will + * not be available to any other task until it has also 'given' the mutex back + * exactly five times. + * + * This type of semaphore uses a priority inheritance mechanism so a task + * 'taking' a semaphore MUST ALWAYS 'give' the semaphore back once the + * semaphore it is no longer required. + * + * Mutex type semaphores cannot be used from within interrupt service routines. + * + * See xSemaphoreCreateBinary() for an alternative implementation that can be + * used for pure synchronisation (where one task or interrupt always 'gives' the + * semaphore and another always 'takes' the semaphore) and from within interrupt + * service routines. + * + * @param pxMutexBuffer Must point to a variable of type StaticSemaphore_t, + * which will then be used to hold the recursive mutex's data structure, + * removing the need for the memory to be allocated dynamically. + * + * @return If the recursive mutex was successfully created then a handle to the + * created recursive mutex is returned. If pxMutexBuffer was NULL then NULL is + * returned. + * + * Example usage: ++ SemaphoreHandle_t xSemaphore; + StaticSemaphore_t xMutexBuffer; + + void vATask( void * pvParameters ) + { + // A recursive semaphore cannot be used before it is created. Here a + // recursive mutex is created using xSemaphoreCreateRecursiveMutexStatic(). + // The address of xMutexBuffer is passed into the function, and will hold + // the mutexes data structures - so no dynamic memory allocation will be + // attempted. + xSemaphore = xSemaphoreCreateRecursiveMutexStatic( &xMutexBuffer ); + + // As no dynamic memory allocation was performed, xSemaphore cannot be NULL, + // so there is no need to check it. + } ++ * \defgroup xSemaphoreCreateRecursiveMutexStatic xSemaphoreCreateRecursiveMutexStatic + * \ingroup Semaphores + */ +#if( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configUSE_RECURSIVE_MUTEXES == 1 ) ) + #define xSemaphoreCreateRecursiveMutexStatic( pxStaticSemaphore ) xQueueCreateMutexStatic( queueQUEUE_TYPE_RECURSIVE_MUTEX, pxStaticSemaphore ) +#endif /* configSUPPORT_STATIC_ALLOCATION */ + +/** + * semphr. h + *SemaphoreHandle_t xSemaphoreCreateCounting( UBaseType_t uxMaxCount, UBaseType_t uxInitialCount )+ * + * Creates a new counting semaphore instance, and returns a handle by which the + * new counting semaphore can be referenced. + * + * In many usage scenarios it is faster and more memory efficient to use a + * direct to task notification in place of a counting semaphore! + * http://www.freertos.org/RTOS-task-notifications.html + * + * Internally, within the FreeRTOS implementation, counting semaphores use a + * block of memory, in which the counting semaphore structure is stored. If a + * counting semaphore is created using xSemaphoreCreateCounting() then the + * required memory is automatically dynamically allocated inside the + * xSemaphoreCreateCounting() function. (see + * http://www.freertos.org/a00111.html). If a counting semaphore is created + * using xSemaphoreCreateCountingStatic() then the application writer can + * instead optionally provide the memory that will get used by the counting + * semaphore. xSemaphoreCreateCountingStatic() therefore allows a counting + * semaphore to be created without using any dynamic memory allocation. + * + * Counting semaphores are typically used for two things: + * + * 1) Counting events. + * + * In this usage scenario an event handler will 'give' a semaphore each time + * an event occurs (incrementing the semaphore count value), and a handler + * task will 'take' a semaphore each time it processes an event + * (decrementing the semaphore count value). The count value is therefore + * the difference between the number of events that have occurred and the + * number that have been processed. In this case it is desirable for the + * initial count value to be zero. + * + * 2) Resource management. + * + * In this usage scenario the count value indicates the number of resources + * available. To obtain control of a resource a task must first obtain a + * semaphore - decrementing the semaphore count value. When the count value + * reaches zero there are no free resources. When a task finishes with the + * resource it 'gives' the semaphore back - incrementing the semaphore count + * value. In this case it is desirable for the initial count value to be + * equal to the maximum count value, indicating that all resources are free. + * + * @param uxMaxCount The maximum count value that can be reached. When the + * semaphore reaches this value it can no longer be 'given'. + * + * @param uxInitialCount The count value assigned to the semaphore when it is + * created. + * + * @return Handle to the created semaphore. Null if the semaphore could not be + * created. + * + * Example usage: ++ SemaphoreHandle_t xSemaphore; + + void vATask( void * pvParameters ) + { + SemaphoreHandle_t xSemaphore = NULL; + + // Semaphore cannot be used before a call to xSemaphoreCreateCounting(). + // The max value to which the semaphore can count should be 10, and the + // initial value assigned to the count should be 0. + xSemaphore = xSemaphoreCreateCounting( 10, 0 ); + + if( xSemaphore != NULL ) + { + // The semaphore was created successfully. + // The semaphore can now be used. + } + } ++ * \defgroup xSemaphoreCreateCounting xSemaphoreCreateCounting + * \ingroup Semaphores + */ +#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) + #define xSemaphoreCreateCounting( uxMaxCount, uxInitialCount ) xQueueCreateCountingSemaphore( ( uxMaxCount ), ( uxInitialCount ) ) +#endif + +/** + * semphr. h + *SemaphoreHandle_t xSemaphoreCreateCountingStatic( UBaseType_t uxMaxCount, UBaseType_t uxInitialCount, StaticSemaphore_t *pxSemaphoreBuffer )+ * + * Creates a new counting semaphore instance, and returns a handle by which the + * new counting semaphore can be referenced. + * + * In many usage scenarios it is faster and more memory efficient to use a + * direct to task notification in place of a counting semaphore! + * http://www.freertos.org/RTOS-task-notifications.html + * + * Internally, within the FreeRTOS implementation, counting semaphores use a + * block of memory, in which the counting semaphore structure is stored. If a + * counting semaphore is created using xSemaphoreCreateCounting() then the + * required memory is automatically dynamically allocated inside the + * xSemaphoreCreateCounting() function. (see + * http://www.freertos.org/a00111.html). If a counting semaphore is created + * using xSemaphoreCreateCountingStatic() then the application writer must + * provide the memory. xSemaphoreCreateCountingStatic() therefore allows a + * counting semaphore to be created without using any dynamic memory allocation. + * + * Counting semaphores are typically used for two things: + * + * 1) Counting events. + * + * In this usage scenario an event handler will 'give' a semaphore each time + * an event occurs (incrementing the semaphore count value), and a handler + * task will 'take' a semaphore each time it processes an event + * (decrementing the semaphore count value). The count value is therefore + * the difference between the number of events that have occurred and the + * number that have been processed. In this case it is desirable for the + * initial count value to be zero. + * + * 2) Resource management. + * + * In this usage scenario the count value indicates the number of resources + * available. To obtain control of a resource a task must first obtain a + * semaphore - decrementing the semaphore count value. When the count value + * reaches zero there are no free resources. When a task finishes with the + * resource it 'gives' the semaphore back - incrementing the semaphore count + * value. In this case it is desirable for the initial count value to be + * equal to the maximum count value, indicating that all resources are free. + * + * @param uxMaxCount The maximum count value that can be reached. When the + * semaphore reaches this value it can no longer be 'given'. + * + * @param uxInitialCount The count value assigned to the semaphore when it is + * created. + * + * @param pxSemaphoreBuffer Must point to a variable of type StaticSemaphore_t, + * which will then be used to hold the semaphore's data structure, removing the + * need for the memory to be allocated dynamically. + * + * @return If the counting semaphore was successfully created then a handle to + * the created counting semaphore is returned. If pxSemaphoreBuffer was NULL + * then NULL is returned. + * + * Example usage: ++ SemaphoreHandle_t xSemaphore; + StaticSemaphore_t xSemaphoreBuffer; + + void vATask( void * pvParameters ) + { + SemaphoreHandle_t xSemaphore = NULL; + + // Counting semaphore cannot be used before they have been created. Create + // a counting semaphore using xSemaphoreCreateCountingStatic(). The max + // value to which the semaphore can count is 10, and the initial value + // assigned to the count will be 0. The address of xSemaphoreBuffer is + // passed in and will be used to hold the semaphore structure, so no dynamic + // memory allocation will be used. + xSemaphore = xSemaphoreCreateCounting( 10, 0, &xSemaphoreBuffer ); + + // No memory allocation was attempted so xSemaphore cannot be NULL, so there + // is no need to check its value. + } ++ * \defgroup xSemaphoreCreateCountingStatic xSemaphoreCreateCountingStatic + * \ingroup Semaphores + */ +#if( configSUPPORT_STATIC_ALLOCATION == 1 ) + #define xSemaphoreCreateCountingStatic( uxMaxCount, uxInitialCount, pxSemaphoreBuffer ) xQueueCreateCountingSemaphoreStatic( ( uxMaxCount ), ( uxInitialCount ), ( pxSemaphoreBuffer ) ) +#endif /* configSUPPORT_STATIC_ALLOCATION */ + +/** + * semphr. h + *void vSemaphoreDelete( SemaphoreHandle_t xSemaphore );+ * + * Delete a semaphore. This function must be used with care. For example, + * do not delete a mutex type semaphore if the mutex is held by a task. + * + * @param xSemaphore A handle to the semaphore to be deleted. + * + * \defgroup vSemaphoreDelete vSemaphoreDelete + * \ingroup Semaphores + */ +#define vSemaphoreDelete( xSemaphore ) vQueueDelete( ( QueueHandle_t ) ( xSemaphore ) ) + +/** + * semphr.h + *TaskHandle_t xSemaphoreGetMutexHolder( SemaphoreHandle_t xMutex );+ * + * If xMutex is indeed a mutex type semaphore, return the current mutex holder. + * If xMutex is not a mutex type semaphore, or the mutex is available (not held + * by a task), return NULL. + * + * Note: This is a good way of determining if the calling task is the mutex + * holder, but not a good way of determining the identity of the mutex holder as + * the holder may change between the function exiting and the returned value + * being tested. + */ +#define xSemaphoreGetMutexHolder( xSemaphore ) xQueueGetMutexHolder( ( xSemaphore ) ) + +/** + * semphr.h + *TaskHandle_t xSemaphoreGetMutexHolderFromISR( SemaphoreHandle_t xMutex );+ * + * If xMutex is indeed a mutex type semaphore, return the current mutex holder. + * If xMutex is not a mutex type semaphore, or the mutex is available (not held + * by a task), return NULL. + * + */ +#define xSemaphoreGetMutexHolderFromISR( xSemaphore ) xQueueGetMutexHolderFromISR( ( xSemaphore ) ) + +/** + * semphr.h + *UBaseType_t uxSemaphoreGetCount( SemaphoreHandle_t xSemaphore );+ * + * If the semaphore is a counting semaphore then uxSemaphoreGetCount() returns + * its current count value. If the semaphore is a binary semaphore then + * uxSemaphoreGetCount() returns 1 if the semaphore is available, and 0 if the + * semaphore is not available. + * + */ +#define uxSemaphoreGetCount( xSemaphore ) uxQueueMessagesWaiting( ( QueueHandle_t ) ( xSemaphore ) ) + +#endif /* SEMAPHORE_H */ + + diff --git a/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/include/stack_macros.h b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/include/stack_macros.h new file mode 100644 index 0000000..42a351b --- /dev/null +++ b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/include/stack_macros.h @@ -0,0 +1,129 @@ +/* + * FreeRTOS Kernel V10.0.1 + * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#ifndef STACK_MACROS_H +#define STACK_MACROS_H + +/* + * Call the stack overflow hook function if the stack of the task being swapped + * out is currently overflowed, or looks like it might have overflowed in the + * past. + * + * Setting configCHECK_FOR_STACK_OVERFLOW to 1 will cause the macro to check + * the current stack state only - comparing the current top of stack value to + * the stack limit. Setting configCHECK_FOR_STACK_OVERFLOW to greater than 1 + * will also cause the last few stack bytes to be checked to ensure the value + * to which the bytes were set when the task was created have not been + * overwritten. Note this second test does not guarantee that an overflowed + * stack will always be recognised. + */ + +/*-----------------------------------------------------------*/ + +#if( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH < 0 ) ) + + /* Only the current stack state is to be checked. */ + #define taskCHECK_FOR_STACK_OVERFLOW() \ + { \ + /* Is the currently saved stack pointer within the stack limit? */ \ + if( pxCurrentTCB->pxTopOfStack <= pxCurrentTCB->pxStack ) \ + { \ + vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \ + } \ + } + +#endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */ +/*-----------------------------------------------------------*/ + +#if( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH > 0 ) ) + + /* Only the current stack state is to be checked. */ + #define taskCHECK_FOR_STACK_OVERFLOW() \ + { \ + \ + /* Is the currently saved stack pointer within the stack limit? */ \ + if( pxCurrentTCB->pxTopOfStack >= pxCurrentTCB->pxEndOfStack ) \ + { \ + vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \ + } \ + } + +#endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */ +/*-----------------------------------------------------------*/ + +#if( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH < 0 ) ) + + #define taskCHECK_FOR_STACK_OVERFLOW() \ + { \ + const uint32_t * const pulStack = ( uint32_t * ) pxCurrentTCB->pxStack; \ + const uint32_t ulCheckValue = ( uint32_t ) 0xa5a5a5a5; \ + \ + if( ( pulStack[ 0 ] != ulCheckValue ) || \ + ( pulStack[ 1 ] != ulCheckValue ) || \ + ( pulStack[ 2 ] != ulCheckValue ) || \ + ( pulStack[ 3 ] != ulCheckValue ) ) \ + { \ + vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \ + } \ + } + +#endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */ +/*-----------------------------------------------------------*/ + +#if( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH > 0 ) ) + + #define taskCHECK_FOR_STACK_OVERFLOW() \ + { \ + int8_t *pcEndOfStack = ( int8_t * ) pxCurrentTCB->pxEndOfStack; \ + static const uint8_t ucExpectedStackBytes[] = { tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \ + tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \ + tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \ + tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \ + tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE }; \ + \ + \ + pcEndOfStack -= sizeof( ucExpectedStackBytes ); \ + \ + /* Has the extremity of the task stack ever been written over? */ \ + if( memcmp( ( void * ) pcEndOfStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) != 0 ) \ + { \ + vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \ + } \ + } + +#endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */ +/*-----------------------------------------------------------*/ + +/* Remove stack overflow macro if not being used. */ +#ifndef taskCHECK_FOR_STACK_OVERFLOW + #define taskCHECK_FOR_STACK_OVERFLOW() +#endif + + + +#endif /* STACK_MACROS_H */ + diff --git a/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/include/stdint.readme b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/include/stdint.readme new file mode 100644 index 0000000..4414c29 --- /dev/null +++ b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/include/stdint.readme @@ -0,0 +1,27 @@ + +#ifndef FREERTOS_STDINT +#define FREERTOS_STDINT + +/******************************************************************************* + * THIS IS NOT A FULL stdint.h IMPLEMENTATION - It only contains the definitions + * necessary to build the FreeRTOS code. It is provided to allow FreeRTOS to be + * built using compilers that do not provide their own stdint.h definition. + * + * To use this file: + * + * 1) Copy this file into the directory that contains your FreeRTOSConfig.h + * header file, as that directory will already be in the compilers include + * path. + * + * 2) Rename the copied file stdint.h. + * + */ + +typedef signed char int8_t; +typedef unsigned char uint8_t; +typedef short int16_t; +typedef unsigned short uint16_t; +typedef long int32_t; +typedef unsigned long uint32_t; + +#endif /* FREERTOS_STDINT */ diff --git a/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/include/stream_buffer.h b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/include/stream_buffer.h new file mode 100644 index 0000000..5418e05 --- /dev/null +++ b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/include/stream_buffer.h @@ -0,0 +1,852 @@ +/* + * FreeRTOS Kernel V10.0.1 + * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/* + * Stream buffers are used to send a continuous stream of data from one task or + * interrupt to another. Their implementation is light weight, making them + * particularly suited for interrupt to task and core to core communication + * scenarios. + * + * ***NOTE***: Uniquely among FreeRTOS objects, the stream buffer + * implementation (so also the message buffer implementation, as message buffers + * are built on top of stream buffers) assumes there is only one task or + * interrupt that will write to the buffer (the writer), and only one task or + * interrupt that will read from the buffer (the reader). It is safe for the + * writer and reader to be different tasks or interrupts, but, unlike other + * FreeRTOS objects, it is not safe to have multiple different writers or + * multiple different readers. If there are to be multiple different writers + * then the application writer must place each call to a writing API function + * (such as xStreamBufferSend()) inside a critical section and set the send + * block time to 0. Likewise, if there are to be multiple different readers + * then the application writer must place each call to a reading API function + * (such as xStreamBufferRead()) inside a critical section section and set the + * receive block time to 0. + * + */ + +#ifndef STREAM_BUFFER_H +#define STREAM_BUFFER_H + +#if defined( __cplusplus ) +extern "C" { +#endif + +/** + * Type by which stream buffers are referenced. For example, a call to + * xStreamBufferCreate() returns an StreamBufferHandle_t variable that can + * then be used as a parameter to xStreamBufferSend(), xStreamBufferReceive(), + * etc. + */ +typedef void * StreamBufferHandle_t; + + +/** + * message_buffer.h + * ++StreamBufferHandle_t xStreamBufferCreate( size_t xBufferSizeBytes, size_t xTriggerLevelBytes ); ++ * + * Creates a new stream buffer using dynamically allocated memory. See + * xStreamBufferCreateStatic() for a version that uses statically allocated + * memory (memory that is allocated at compile time). + * + * configSUPPORT_DYNAMIC_ALLOCATION must be set to 1 or left undefined in + * FreeRTOSConfig.h for xStreamBufferCreate() to be available. + * + * @param xBufferSizeBytes The total number of bytes the stream buffer will be + * able to hold at any one time. + * + * @param xTriggerLevelBytes The number of bytes that must be in the stream + * buffer before a task that is blocked on the stream buffer to wait for data is + * moved out of the blocked state. For example, if a task is blocked on a read + * of an empty stream buffer that has a trigger level of 1 then the task will be + * unblocked when a single byte is written to the buffer or the task's block + * time expires. As another example, if a task is blocked on a read of an empty + * stream buffer that has a trigger level of 10 then the task will not be + * unblocked until the stream buffer contains at least 10 bytes or the task's + * block time expires. If a reading task's block time expires before the + * trigger level is reached then the task will still receive however many bytes + * are actually available. Setting a trigger level of 0 will result in a + * trigger level of 1 being used. It is not valid to specify a trigger level + * that is greater than the buffer size. + * + * @return If NULL is returned, then the stream buffer cannot be created + * because there is insufficient heap memory available for FreeRTOS to allocate + * the stream buffer data structures and storage area. A non-NULL value being + * returned indicates that the stream buffer has been created successfully - + * the returned value should be stored as the handle to the created stream + * buffer. + * + * Example use: ++ +void vAFunction( void ) +{ +StreamBufferHandle_t xStreamBuffer; +const size_t xStreamBufferSizeBytes = 100, xTriggerLevel = 10; + + // Create a stream buffer that can hold 100 bytes. The memory used to hold + // both the stream buffer structure and the data in the stream buffer is + // allocated dynamically. + xStreamBuffer = xStreamBufferCreate( xStreamBufferSizeBytes, xTriggerLevel ); + + if( xStreamBuffer == NULL ) + { + // There was not enough heap memory space available to create the + // stream buffer. + } + else + { + // The stream buffer was created successfully and can now be used. + } +} ++ * \defgroup xStreamBufferCreate xStreamBufferCreate + * \ingroup StreamBufferManagement + */ +#define xStreamBufferCreate( xBufferSizeBytes, xTriggerLevelBytes ) xStreamBufferGenericCreate( xBufferSizeBytes, xTriggerLevelBytes, pdFALSE ) + +/** + * stream_buffer.h + * ++StreamBufferHandle_t xStreamBufferCreateStatic( size_t xBufferSizeBytes, + size_t xTriggerLevelBytes, + uint8_t *pucStreamBufferStorageArea, + StaticStreamBuffer_t *pxStaticStreamBuffer ); ++ * Creates a new stream buffer using statically allocated memory. See + * xStreamBufferCreate() for a version that uses dynamically allocated memory. + * + * configSUPPORT_STATIC_ALLOCATION must be set to 1 in FreeRTOSConfig.h for + * xStreamBufferCreateStatic() to be available. + * + * @param xBufferSizeBytes The size, in bytes, of the buffer pointed to by the + * pucStreamBufferStorageArea parameter. + * + * @param xTriggerLevelBytes The number of bytes that must be in the stream + * buffer before a task that is blocked on the stream buffer to wait for data is + * moved out of the blocked state. For example, if a task is blocked on a read + * of an empty stream buffer that has a trigger level of 1 then the task will be + * unblocked when a single byte is written to the buffer or the task's block + * time expires. As another example, if a task is blocked on a read of an empty + * stream buffer that has a trigger level of 10 then the task will not be + * unblocked until the stream buffer contains at least 10 bytes or the task's + * block time expires. If a reading task's block time expires before the + * trigger level is reached then the task will still receive however many bytes + * are actually available. Setting a trigger level of 0 will result in a + * trigger level of 1 being used. It is not valid to specify a trigger level + * that is greater than the buffer size. + * + * @param pucStreamBufferStorageArea Must point to a uint8_t array that is at + * least xBufferSizeBytes + 1 big. This is the array to which streams are + * copied when they are written to the stream buffer. + * + * @param pxStaticStreamBuffer Must point to a variable of type + * StaticStreamBuffer_t, which will be used to hold the stream buffer's data + * structure. + * + * @return If the stream buffer is created successfully then a handle to the + * created stream buffer is returned. If either pucStreamBufferStorageArea or + * pxStaticstreamBuffer are NULL then NULL is returned. + * + * Example use: ++ +// Used to dimension the array used to hold the streams. The available space +// will actually be one less than this, so 999. +#define STORAGE_SIZE_BYTES 1000 + +// Defines the memory that will actually hold the streams within the stream +// buffer. +static uint8_t ucStorageBuffer[ STORAGE_SIZE_BYTES ]; + +// The variable used to hold the stream buffer structure. +StaticStreamBuffer_t xStreamBufferStruct; + +void MyFunction( void ) +{ +StreamBufferHandle_t xStreamBuffer; +const size_t xTriggerLevel = 1; + + xStreamBuffer = xStreamBufferCreateStatic( sizeof( ucBufferStorage ), + xTriggerLevel, + ucBufferStorage, + &xStreamBufferStruct ); + + // As neither the pucStreamBufferStorageArea or pxStaticStreamBuffer + // parameters were NULL, xStreamBuffer will not be NULL, and can be used to + // reference the created stream buffer in other stream buffer API calls. + + // Other code that uses the stream buffer can go here. +} + ++ * \defgroup xStreamBufferCreateStatic xStreamBufferCreateStatic + * \ingroup StreamBufferManagement + */ +#define xStreamBufferCreateStatic( xBufferSizeBytes, xTriggerLevelBytes, pucStreamBufferStorageArea, pxStaticStreamBuffer ) xStreamBufferGenericCreateStatic( xBufferSizeBytes, xTriggerLevelBytes, pdFALSE, pucStreamBufferStorageArea, pxStaticStreamBuffer ) + +/** + * stream_buffer.h + * ++size_t xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, + const void *pvTxData, + size_t xDataLengthBytes, + TickType_t xTicksToWait ); ++ * + * Sends bytes to a stream buffer. The bytes are copied into the stream buffer. + * + * ***NOTE***: Uniquely among FreeRTOS objects, the stream buffer + * implementation (so also the message buffer implementation, as message buffers + * are built on top of stream buffers) assumes there is only one task or + * interrupt that will write to the buffer (the writer), and only one task or + * interrupt that will read from the buffer (the reader). It is safe for the + * writer and reader to be different tasks or interrupts, but, unlike other + * FreeRTOS objects, it is not safe to have multiple different writers or + * multiple different readers. If there are to be multiple different writers + * then the application writer must place each call to a writing API function + * (such as xStreamBufferSend()) inside a critical section and set the send + * block time to 0. Likewise, if there are to be multiple different readers + * then the application writer must place each call to a reading API function + * (such as xStreamBufferRead()) inside a critical section and set the receive + * block time to 0. + * + * Use xStreamBufferSend() to write to a stream buffer from a task. Use + * xStreamBufferSendFromISR() to write to a stream buffer from an interrupt + * service routine (ISR). + * + * @param xStreamBuffer The handle of the stream buffer to which a stream is + * being sent. + * + * @param pvTxData A pointer to the buffer that holds the bytes to be copied + * into the stream buffer. + * + * @param xDataLengthBytes The maximum number of bytes to copy from pvTxData + * into the stream buffer. + * + * @param xTicksToWait The maximum amount of time the task should remain in the + * Blocked state to wait for enough space to become available in the stream + * buffer, should the stream buffer contain too little space to hold the + * another xDataLengthBytes bytes. The block time is specified in tick periods, + * so the absolute time it represents is dependent on the tick frequency. The + * macro pdMS_TO_TICKS() can be used to convert a time specified in milliseconds + * into a time specified in ticks. Setting xTicksToWait to portMAX_DELAY will + * cause the task to wait indefinitely (without timing out), provided + * INCLUDE_vTaskSuspend is set to 1 in FreeRTOSConfig.h. If a task times out + * before it can write all xDataLengthBytes into the buffer it will still write + * as many bytes as possible. A task does not use any CPU time when it is in + * the blocked state. + * + * @return The number of bytes written to the stream buffer. If a task times + * out before it can write all xDataLengthBytes into the buffer it will still + * write as many bytes as possible. + * + * Example use: ++void vAFunction( StreamBufferHandle_t xStreamBuffer ) +{ +size_t xBytesSent; +uint8_t ucArrayToSend[] = { 0, 1, 2, 3 }; +char *pcStringToSend = "String to send"; +const TickType_t x100ms = pdMS_TO_TICKS( 100 ); + + // Send an array to the stream buffer, blocking for a maximum of 100ms to + // wait for enough space to be available in the stream buffer. + xBytesSent = xStreamBufferSend( xStreamBuffer, ( void * ) ucArrayToSend, sizeof( ucArrayToSend ), x100ms ); + + if( xBytesSent != sizeof( ucArrayToSend ) ) + { + // The call to xStreamBufferSend() times out before there was enough + // space in the buffer for the data to be written, but it did + // successfully write xBytesSent bytes. + } + + // Send the string to the stream buffer. Return immediately if there is not + // enough space in the buffer. + xBytesSent = xStreamBufferSend( xStreamBuffer, ( void * ) pcStringToSend, strlen( pcStringToSend ), 0 ); + + if( xBytesSent != strlen( pcStringToSend ) ) + { + // The entire string could not be added to the stream buffer because + // there was not enough free space in the buffer, but xBytesSent bytes + // were sent. Could try again to send the remaining bytes. + } +} ++ * \defgroup xStreamBufferSend xStreamBufferSend + * \ingroup StreamBufferManagement + */ +size_t xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, + const void *pvTxData, + size_t xDataLengthBytes, + TickType_t xTicksToWait ) PRIVILEGED_FUNCTION; + +/** + * stream_buffer.h + * ++size_t xStreamBufferSendFromISR( StreamBufferHandle_t xStreamBuffer, + const void *pvTxData, + size_t xDataLengthBytes, + BaseType_t *pxHigherPriorityTaskWoken ); ++ * + * Interrupt safe version of the API function that sends a stream of bytes to + * the stream buffer. + * + * ***NOTE***: Uniquely among FreeRTOS objects, the stream buffer + * implementation (so also the message buffer implementation, as message buffers + * are built on top of stream buffers) assumes there is only one task or + * interrupt that will write to the buffer (the writer), and only one task or + * interrupt that will read from the buffer (the reader). It is safe for the + * writer and reader to be different tasks or interrupts, but, unlike other + * FreeRTOS objects, it is not safe to have multiple different writers or + * multiple different readers. If there are to be multiple different writers + * then the application writer must place each call to a writing API function + * (such as xStreamBufferSend()) inside a critical section and set the send + * block time to 0. Likewise, if there are to be multiple different readers + * then the application writer must place each call to a reading API function + * (such as xStreamBufferRead()) inside a critical section and set the receive + * block time to 0. + * + * Use xStreamBufferSend() to write to a stream buffer from a task. Use + * xStreamBufferSendFromISR() to write to a stream buffer from an interrupt + * service routine (ISR). + * + * @param xStreamBuffer The handle of the stream buffer to which a stream is + * being sent. + * + * @param pvTxData A pointer to the data that is to be copied into the stream + * buffer. + * + * @param xDataLengthBytes The maximum number of bytes to copy from pvTxData + * into the stream buffer. + * + * @param pxHigherPriorityTaskWoken It is possible that a stream buffer will + * have a task blocked on it waiting for data. Calling + * xStreamBufferSendFromISR() can make data available, and so cause a task that + * was waiting for data to leave the Blocked state. If calling + * xStreamBufferSendFromISR() causes a task to leave the Blocked state, and the + * unblocked task has a priority higher than the currently executing task (the + * task that was interrupted), then, internally, xStreamBufferSendFromISR() + * will set *pxHigherPriorityTaskWoken to pdTRUE. If + * xStreamBufferSendFromISR() sets this value to pdTRUE, then normally a + * context switch should be performed before the interrupt is exited. This will + * ensure that the interrupt returns directly to the highest priority Ready + * state task. *pxHigherPriorityTaskWoken should be set to pdFALSE before it + * is passed into the function. See the example code below for an example. + * + * @return The number of bytes actually written to the stream buffer, which will + * be less than xDataLengthBytes if the stream buffer didn't have enough free + * space for all the bytes to be written. + * + * Example use: ++// A stream buffer that has already been created. +StreamBufferHandle_t xStreamBuffer; + +void vAnInterruptServiceRoutine( void ) +{ +size_t xBytesSent; +char *pcStringToSend = "String to send"; +BaseType_t xHigherPriorityTaskWoken = pdFALSE; // Initialised to pdFALSE. + + // Attempt to send the string to the stream buffer. + xBytesSent = xStreamBufferSendFromISR( xStreamBuffer, + ( void * ) pcStringToSend, + strlen( pcStringToSend ), + &xHigherPriorityTaskWoken ); + + if( xBytesSent != strlen( pcStringToSend ) ) + { + // There was not enough free space in the stream buffer for the entire + // string to be written, ut xBytesSent bytes were written. + } + + // If xHigherPriorityTaskWoken was set to pdTRUE inside + // xStreamBufferSendFromISR() then a task that has a priority above the + // priority of the currently executing task was unblocked and a context + // switch should be performed to ensure the ISR returns to the unblocked + // task. In most FreeRTOS ports this is done by simply passing + // xHigherPriorityTaskWoken into taskYIELD_FROM_ISR(), which will test the + // variables value, and perform the context switch if necessary. Check the + // documentation for the port in use for port specific instructions. + taskYIELD_FROM_ISR( xHigherPriorityTaskWoken ); +} ++ * \defgroup xStreamBufferSendFromISR xStreamBufferSendFromISR + * \ingroup StreamBufferManagement + */ +size_t xStreamBufferSendFromISR( StreamBufferHandle_t xStreamBuffer, + const void *pvTxData, + size_t xDataLengthBytes, + BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION; + +/** + * stream_buffer.h + * ++size_t xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, + void *pvRxData, + size_t xBufferLengthBytes, + TickType_t xTicksToWait ); ++ * + * Receives bytes from a stream buffer. + * + * ***NOTE***: Uniquely among FreeRTOS objects, the stream buffer + * implementation (so also the message buffer implementation, as message buffers + * are built on top of stream buffers) assumes there is only one task or + * interrupt that will write to the buffer (the writer), and only one task or + * interrupt that will read from the buffer (the reader). It is safe for the + * writer and reader to be different tasks or interrupts, but, unlike other + * FreeRTOS objects, it is not safe to have multiple different writers or + * multiple different readers. If there are to be multiple different writers + * then the application writer must place each call to a writing API function + * (such as xStreamBufferSend()) inside a critical section and set the send + * block time to 0. Likewise, if there are to be multiple different readers + * then the application writer must place each call to a reading API function + * (such as xStreamBufferRead()) inside a critical section and set the receive + * block time to 0. + * + * Use xStreamBufferReceive() to read from a stream buffer from a task. Use + * xStreamBufferReceiveFromISR() to read from a stream buffer from an + * interrupt service routine (ISR). + * + * @param xStreamBuffer The handle of the stream buffer from which bytes are to + * be received. + * + * @param pvRxData A pointer to the buffer into which the received bytes will be + * copied. + * + * @param xBufferLengthBytes The length of the buffer pointed to by the + * pvRxData parameter. This sets the maximum number of bytes to receive in one + * call. xStreamBufferReceive will return as many bytes as possible up to a + * maximum set by xBufferLengthBytes. + * + * @param xTicksToWait The maximum amount of time the task should remain in the + * Blocked state to wait for data to become available if the stream buffer is + * empty. xStreamBufferReceive() will return immediately if xTicksToWait is + * zero. The block time is specified in tick periods, so the absolute time it + * represents is dependent on the tick frequency. The macro pdMS_TO_TICKS() can + * be used to convert a time specified in milliseconds into a time specified in + * ticks. Setting xTicksToWait to portMAX_DELAY will cause the task to wait + * indefinitely (without timing out), provided INCLUDE_vTaskSuspend is set to 1 + * in FreeRTOSConfig.h. A task does not use any CPU time when it is in the + * Blocked state. + * + * @return The number of bytes actually read from the stream buffer, which will + * be less than xBufferLengthBytes if the call to xStreamBufferReceive() timed + * out before xBufferLengthBytes were available. + * + * Example use: ++void vAFunction( StreamBuffer_t xStreamBuffer ) +{ +uint8_t ucRxData[ 20 ]; +size_t xReceivedBytes; +const TickType_t xBlockTime = pdMS_TO_TICKS( 20 ); + + // Receive up to another sizeof( ucRxData ) bytes from the stream buffer. + // Wait in the Blocked state (so not using any CPU processing time) for a + // maximum of 100ms for the full sizeof( ucRxData ) number of bytes to be + // available. + xReceivedBytes = xStreamBufferReceive( xStreamBuffer, + ( void * ) ucRxData, + sizeof( ucRxData ), + xBlockTime ); + + if( xReceivedBytes > 0 ) + { + // A ucRxData contains another xRecievedBytes bytes of data, which can + // be processed here.... + } +} ++ * \defgroup xStreamBufferReceive xStreamBufferReceive + * \ingroup StreamBufferManagement + */ +size_t xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, + void *pvRxData, + size_t xBufferLengthBytes, + TickType_t xTicksToWait ) PRIVILEGED_FUNCTION; + +/** + * stream_buffer.h + * ++size_t xStreamBufferReceiveFromISR( StreamBufferHandle_t xStreamBuffer, + void *pvRxData, + size_t xBufferLengthBytes, + BaseType_t *pxHigherPriorityTaskWoken ); ++ * + * An interrupt safe version of the API function that receives bytes from a + * stream buffer. + * + * Use xStreamBufferReceive() to read bytes from a stream buffer from a task. + * Use xStreamBufferReceiveFromISR() to read bytes from a stream buffer from an + * interrupt service routine (ISR). + * + * @param xStreamBuffer The handle of the stream buffer from which a stream + * is being received. + * + * @param pvRxData A pointer to the buffer into which the received bytes are + * copied. + * + * @param xBufferLengthBytes The length of the buffer pointed to by the + * pvRxData parameter. This sets the maximum number of bytes to receive in one + * call. xStreamBufferReceive will return as many bytes as possible up to a + * maximum set by xBufferLengthBytes. + * + * @param pxHigherPriorityTaskWoken It is possible that a stream buffer will + * have a task blocked on it waiting for space to become available. Calling + * xStreamBufferReceiveFromISR() can make space available, and so cause a task + * that is waiting for space to leave the Blocked state. If calling + * xStreamBufferReceiveFromISR() causes a task to leave the Blocked state, and + * the unblocked task has a priority higher than the currently executing task + * (the task that was interrupted), then, internally, + * xStreamBufferReceiveFromISR() will set *pxHigherPriorityTaskWoken to pdTRUE. + * If xStreamBufferReceiveFromISR() sets this value to pdTRUE, then normally a + * context switch should be performed before the interrupt is exited. That will + * ensure the interrupt returns directly to the highest priority Ready state + * task. *pxHigherPriorityTaskWoken should be set to pdFALSE before it is + * passed into the function. See the code example below for an example. + * + * @return The number of bytes read from the stream buffer, if any. + * + * Example use: ++// A stream buffer that has already been created. +StreamBuffer_t xStreamBuffer; + +void vAnInterruptServiceRoutine( void ) +{ +uint8_t ucRxData[ 20 ]; +size_t xReceivedBytes; +BaseType_t xHigherPriorityTaskWoken = pdFALSE; // Initialised to pdFALSE. + + // Receive the next stream from the stream buffer. + xReceivedBytes = xStreamBufferReceiveFromISR( xStreamBuffer, + ( void * ) ucRxData, + sizeof( ucRxData ), + &xHigherPriorityTaskWoken ); + + if( xReceivedBytes > 0 ) + { + // ucRxData contains xReceivedBytes read from the stream buffer. + // Process the stream here.... + } + + // If xHigherPriorityTaskWoken was set to pdTRUE inside + // xStreamBufferReceiveFromISR() then a task that has a priority above the + // priority of the currently executing task was unblocked and a context + // switch should be performed to ensure the ISR returns to the unblocked + // task. In most FreeRTOS ports this is done by simply passing + // xHigherPriorityTaskWoken into taskYIELD_FROM_ISR(), which will test the + // variables value, and perform the context switch if necessary. Check the + // documentation for the port in use for port specific instructions. + taskYIELD_FROM_ISR( xHigherPriorityTaskWoken ); +} ++ * \defgroup xStreamBufferReceiveFromISR xStreamBufferReceiveFromISR + * \ingroup StreamBufferManagement + */ +size_t xStreamBufferReceiveFromISR( StreamBufferHandle_t xStreamBuffer, + void *pvRxData, + size_t xBufferLengthBytes, + BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION; + +/** + * stream_buffer.h + * ++void vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer ); ++ * + * Deletes a stream buffer that was previously created using a call to + * xStreamBufferCreate() or xStreamBufferCreateStatic(). If the stream + * buffer was created using dynamic memory (that is, by xStreamBufferCreate()), + * then the allocated memory is freed. + * + * A stream buffer handle must not be used after the stream buffer has been + * deleted. + * + * @param xStreamBuffer The handle of the stream buffer to be deleted. + * + * \defgroup vStreamBufferDelete vStreamBufferDelete + * \ingroup StreamBufferManagement + */ +void vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION; + +/** + * stream_buffer.h + * ++BaseType_t xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ); ++ * + * Queries a stream buffer to see if it is full. A stream buffer is full if it + * does not have any free space, and therefore cannot accept any more data. + * + * @param xStreamBuffer The handle of the stream buffer being queried. + * + * @return If the stream buffer is full then pdTRUE is returned. Otherwise + * pdFALSE is returned. + * + * \defgroup xStreamBufferIsFull xStreamBufferIsFull + * \ingroup StreamBufferManagement + */ +BaseType_t xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION; + +/** + * stream_buffer.h + * ++BaseType_t xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ); ++ * + * Queries a stream buffer to see if it is empty. A stream buffer is empty if + * it does not contain any data. + * + * @param xStreamBuffer The handle of the stream buffer being queried. + * + * @return If the stream buffer is empty then pdTRUE is returned. Otherwise + * pdFALSE is returned. + * + * \defgroup xStreamBufferIsEmpty xStreamBufferIsEmpty + * \ingroup StreamBufferManagement + */ +BaseType_t xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION; + +/** + * stream_buffer.h + * ++BaseType_t xStreamBufferReset( StreamBufferHandle_t xStreamBuffer ); ++ * + * Resets a stream buffer to its initial, empty, state. Any data that was in + * the stream buffer is discarded. A stream buffer can only be reset if there + * are no tasks blocked waiting to either send to or receive from the stream + * buffer. + * + * @param xStreamBuffer The handle of the stream buffer being reset. + * + * @return If the stream buffer is reset then pdPASS is returned. If there was + * a task blocked waiting to send to or read from the stream buffer then the + * stream buffer is not reset and pdFAIL is returned. + * + * \defgroup xStreamBufferReset xStreamBufferReset + * \ingroup StreamBufferManagement + */ +BaseType_t xStreamBufferReset( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION; + +/** + * stream_buffer.h + * ++size_t xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ); ++ * + * Queries a stream buffer to see how much free space it contains, which is + * equal to the amount of data that can be sent to the stream buffer before it + * is full. + * + * @param xStreamBuffer The handle of the stream buffer being queried. + * + * @return The number of bytes that can be written to the stream buffer before + * the stream buffer would be full. + * + * \defgroup xStreamBufferSpacesAvailable xStreamBufferSpacesAvailable + * \ingroup StreamBufferManagement + */ +size_t xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION; + +/** + * stream_buffer.h + * ++size_t xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ); ++ * + * Queries a stream buffer to see how much data it contains, which is equal to + * the number of bytes that can be read from the stream buffer before the stream + * buffer would be empty. + * + * @param xStreamBuffer The handle of the stream buffer being queried. + * + * @return The number of bytes that can be read from the stream buffer before + * the stream buffer would be empty. + * + * \defgroup xStreamBufferBytesAvailable xStreamBufferBytesAvailable + * \ingroup StreamBufferManagement + */ +size_t xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION; + +/** + * stream_buffer.h + * ++BaseType_t xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, size_t xTriggerLevel ); ++ * + * A stream buffer's trigger level is the number of bytes that must be in the + * stream buffer before a task that is blocked on the stream buffer to + * wait for data is moved out of the blocked state. For example, if a task is + * blocked on a read of an empty stream buffer that has a trigger level of 1 + * then the task will be unblocked when a single byte is written to the buffer + * or the task's block time expires. As another example, if a task is blocked + * on a read of an empty stream buffer that has a trigger level of 10 then the + * task will not be unblocked until the stream buffer contains at least 10 bytes + * or the task's block time expires. If a reading task's block time expires + * before the trigger level is reached then the task will still receive however + * many bytes are actually available. Setting a trigger level of 0 will result + * in a trigger level of 1 being used. It is not valid to specify a trigger + * level that is greater than the buffer size. + * + * A trigger level is set when the stream buffer is created, and can be modified + * using xStreamBufferSetTriggerLevel(). + * + * @param xStreamBuffer The handle of the stream buffer being updated. + * + * @param xTriggerLevel The new trigger level for the stream buffer. + * + * @return If xTriggerLevel was less than or equal to the stream buffer's length + * then the trigger level will be updated and pdTRUE is returned. Otherwise + * pdFALSE is returned. + * + * \defgroup xStreamBufferSetTriggerLevel xStreamBufferSetTriggerLevel + * \ingroup StreamBufferManagement + */ +BaseType_t xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, size_t xTriggerLevel ) PRIVILEGED_FUNCTION; + +/** + * stream_buffer.h + * ++BaseType_t xStreamBufferSendCompletedFromISR( StreamBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken ); ++ * + * For advanced users only. + * + * The sbSEND_COMPLETED() macro is called from within the FreeRTOS APIs when + * data is sent to a message buffer or stream buffer. If there was a task that + * was blocked on the message or stream buffer waiting for data to arrive then + * the sbSEND_COMPLETED() macro sends a notification to the task to remove it + * from the Blocked state. xStreamBufferSendCompletedFromISR() does the same + * thing. It is provided to enable application writers to implement their own + * version of sbSEND_COMPLETED(), and MUST NOT BE USED AT ANY OTHER TIME. + * + * See the example implemented in FreeRTOS/Demo/Minimal/MessageBufferAMP.c for + * additional information. + * + * @param xStreamBuffer The handle of the stream buffer to which data was + * written. + * + * @param pxHigherPriorityTaskWoken *pxHigherPriorityTaskWoken should be + * initialised to pdFALSE before it is passed into + * xStreamBufferSendCompletedFromISR(). If calling + * xStreamBufferSendCompletedFromISR() removes a task from the Blocked state, + * and the task has a priority above the priority of the currently running task, + * then *pxHigherPriorityTaskWoken will get set to pdTRUE indicating that a + * context switch should be performed before exiting the ISR. + * + * @return If a task was removed from the Blocked state then pdTRUE is returned. + * Otherwise pdFALSE is returned. + * + * \defgroup xStreamBufferSendCompletedFromISR xStreamBufferSendCompletedFromISR + * \ingroup StreamBufferManagement + */ +BaseType_t xStreamBufferSendCompletedFromISR( StreamBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION; + +/** + * stream_buffer.h + * ++BaseType_t xStreamBufferReceiveCompletedFromISR( StreamBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken ); ++ * + * For advanced users only. + * + * The sbRECEIVE_COMPLETED() macro is called from within the FreeRTOS APIs when + * data is read out of a message buffer or stream buffer. If there was a task + * that was blocked on the message or stream buffer waiting for data to arrive + * then the sbRECEIVE_COMPLETED() macro sends a notification to the task to + * remove it from the Blocked state. xStreamBufferReceiveCompletedFromISR() + * does the same thing. It is provided to enable application writers to + * implement their own version of sbRECEIVE_COMPLETED(), and MUST NOT BE USED AT + * ANY OTHER TIME. + * + * See the example implemented in FreeRTOS/Demo/Minimal/MessageBufferAMP.c for + * additional information. + * + * @param xStreamBuffer The handle of the stream buffer from which data was + * read. + * + * @param pxHigherPriorityTaskWoken *pxHigherPriorityTaskWoken should be + * initialised to pdFALSE before it is passed into + * xStreamBufferReceiveCompletedFromISR(). If calling + * xStreamBufferReceiveCompletedFromISR() removes a task from the Blocked state, + * and the task has a priority above the priority of the currently running task, + * then *pxHigherPriorityTaskWoken will get set to pdTRUE indicating that a + * context switch should be performed before exiting the ISR. + * + * @return If a task was removed from the Blocked state then pdTRUE is returned. + * Otherwise pdFALSE is returned. + * + * \defgroup xStreamBufferReceiveCompletedFromISR xStreamBufferReceiveCompletedFromISR + * \ingroup StreamBufferManagement + */ +BaseType_t xStreamBufferReceiveCompletedFromISR( StreamBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION; + +/* Functions below here are not part of the public API. */ +StreamBufferHandle_t xStreamBufferGenericCreate( size_t xBufferSizeBytes, + size_t xTriggerLevelBytes, + BaseType_t xIsMessageBuffer ) PRIVILEGED_FUNCTION; + +StreamBufferHandle_t xStreamBufferGenericCreateStatic( size_t xBufferSizeBytes, + size_t xTriggerLevelBytes, + BaseType_t xIsMessageBuffer, + uint8_t * const pucStreamBufferStorageArea, + StaticStreamBuffer_t * const pxStaticStreamBuffer ) PRIVILEGED_FUNCTION; + +#if( configUSE_TRACE_FACILITY == 1 ) + void vStreamBufferSetStreamBufferNumber( StreamBufferHandle_t xStreamBuffer, UBaseType_t uxStreamBufferNumber ) PRIVILEGED_FUNCTION; + UBaseType_t uxStreamBufferGetStreamBufferNumber( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION; + uint8_t ucStreamBufferGetStreamBufferType( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION; +#endif + +#if defined( __cplusplus ) +} +#endif + +#endif /* !defined( STREAM_BUFFER_H ) */ diff --git a/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/include/task.h b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/include/task.h new file mode 100644 index 0000000..6c9d428 --- /dev/null +++ b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/include/task.h @@ -0,0 +1,2338 @@ +/* + * FreeRTOS Kernel V10.0.1 + * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + + +#ifndef INC_TASK_H +#define INC_TASK_H + +#ifndef INC_FREERTOS_H + #error "include FreeRTOS.h must appear in source files before include task.h" +#endif + +#include "list.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/*----------------------------------------------------------- + * MACROS AND DEFINITIONS + *----------------------------------------------------------*/ + +#define tskKERNEL_VERSION_NUMBER "V10.0.1" +#define tskKERNEL_VERSION_MAJOR 10 +#define tskKERNEL_VERSION_MINOR 0 +#define tskKERNEL_VERSION_BUILD 1 + +/** + * task. h + * + * Type by which tasks are referenced. For example, a call to xTaskCreate + * returns (via a pointer parameter) an TaskHandle_t variable that can then + * be used as a parameter to vTaskDelete to delete the task. + * + * \defgroup TaskHandle_t TaskHandle_t + * \ingroup Tasks + */ +typedef void * TaskHandle_t; + +/* + * Defines the prototype to which the application task hook function must + * conform. + */ +typedef BaseType_t (*TaskHookFunction_t)( void * ); + +/* Task states returned by eTaskGetState. */ +typedef enum +{ + eRunning = 0, /* A task is querying the state of itself, so must be running. */ + eReady, /* The task being queried is in a read or pending ready list. */ + eBlocked, /* The task being queried is in the Blocked state. */ + eSuspended, /* The task being queried is in the Suspended state, or is in the Blocked state with an infinite time out. */ + eDeleted, /* The task being queried has been deleted, but its TCB has not yet been freed. */ + eInvalid /* Used as an 'invalid state' value. */ +} eTaskState; + +/* Actions that can be performed when vTaskNotify() is called. */ +typedef enum +{ + eNoAction = 0, /* Notify the task without updating its notify value. */ + eSetBits, /* Set bits in the task's notification value. */ + eIncrement, /* Increment the task's notification value. */ + eSetValueWithOverwrite, /* Set the task's notification value to a specific value even if the previous value has not yet been read by the task. */ + eSetValueWithoutOverwrite /* Set the task's notification value if the previous value has been read by the task. */ +} eNotifyAction; + +/* + * Used internally only. + */ +typedef struct xTIME_OUT +{ + BaseType_t xOverflowCount; + TickType_t xTimeOnEntering; +} TimeOut_t; + +/* + * Defines the memory ranges allocated to the task when an MPU is used. + */ +typedef struct xMEMORY_REGION +{ + void *pvBaseAddress; + uint32_t ulLengthInBytes; + uint32_t ulParameters; +} MemoryRegion_t; + +/* + * Parameters required to create an MPU protected task. + */ +typedef struct xTASK_PARAMETERS +{ + TaskFunction_t pvTaskCode; + const char * const pcName; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ + uint16_t usStackDepth; + void *pvParameters; + UBaseType_t uxPriority; + StackType_t *puxStackBuffer; + MemoryRegion_t xRegions[ portNUM_CONFIGURABLE_REGIONS ]; + #if ( ( portUSING_MPU_WRAPPERS == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) ) + StaticTask_t * const pxTaskBuffer; + #endif +} TaskParameters_t; + +/* Used with the uxTaskGetSystemState() function to return the state of each task +in the system. */ +typedef struct xTASK_STATUS +{ + TaskHandle_t xHandle; /* The handle of the task to which the rest of the information in the structure relates. */ + const char *pcTaskName; /* A pointer to the task's name. This value will be invalid if the task was deleted since the structure was populated! */ /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ + UBaseType_t xTaskNumber; /* A number unique to the task. */ + eTaskState eCurrentState; /* The state in which the task existed when the structure was populated. */ + UBaseType_t uxCurrentPriority; /* The priority at which the task was running (may be inherited) when the structure was populated. */ + UBaseType_t uxBasePriority; /* The priority to which the task will return if the task's current priority has been inherited to avoid unbounded priority inversion when obtaining a mutex. Only valid if configUSE_MUTEXES is defined as 1 in FreeRTOSConfig.h. */ + uint32_t ulRunTimeCounter; /* The total run time allocated to the task so far, as defined by the run time stats clock. See http://www.freertos.org/rtos-run-time-stats.html. Only valid when configGENERATE_RUN_TIME_STATS is defined as 1 in FreeRTOSConfig.h. */ + StackType_t *pxStackBase; /* Points to the lowest address of the task's stack area. */ + uint16_t usStackHighWaterMark; /* The minimum amount of stack space that has remained for the task since the task was created. The closer this value is to zero the closer the task has come to overflowing its stack. */ +} TaskStatus_t; + +/* Possible return values for eTaskConfirmSleepModeStatus(). */ +typedef enum +{ + eAbortSleep = 0, /* A task has been made ready or a context switch pended since portSUPPORESS_TICKS_AND_SLEEP() was called - abort entering a sleep mode. */ + eStandardSleep, /* Enter a sleep mode that will not last any longer than the expected idle time. */ + eNoTasksWaitingTimeout /* No tasks are waiting for a timeout so it is safe to enter a sleep mode that can only be exited by an external interrupt. */ +} eSleepModeStatus; + +/** + * Defines the priority used by the idle task. This must not be modified. + * + * \ingroup TaskUtils + */ +#define tskIDLE_PRIORITY ( ( UBaseType_t ) 0U ) + +/** + * task. h + * + * Macro for forcing a context switch. + * + * \defgroup taskYIELD taskYIELD + * \ingroup SchedulerControl + */ +#define taskYIELD() portYIELD() + +/** + * task. h + * + * Macro to mark the start of a critical code region. Preemptive context + * switches cannot occur when in a critical region. + * + * NOTE: This may alter the stack (depending on the portable implementation) + * so must be used with care! + * + * \defgroup taskENTER_CRITICAL taskENTER_CRITICAL + * \ingroup SchedulerControl + */ +#define taskENTER_CRITICAL() portENTER_CRITICAL() +#define taskENTER_CRITICAL_FROM_ISR() portSET_INTERRUPT_MASK_FROM_ISR() + +/** + * task. h + * + * Macro to mark the end of a critical code region. Preemptive context + * switches cannot occur when in a critical region. + * + * NOTE: This may alter the stack (depending on the portable implementation) + * so must be used with care! + * + * \defgroup taskEXIT_CRITICAL taskEXIT_CRITICAL + * \ingroup SchedulerControl + */ +#define taskEXIT_CRITICAL() portEXIT_CRITICAL() +#define taskEXIT_CRITICAL_FROM_ISR( x ) portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) +/** + * task. h + * + * Macro to disable all maskable interrupts. + * + * \defgroup taskDISABLE_INTERRUPTS taskDISABLE_INTERRUPTS + * \ingroup SchedulerControl + */ +#define taskDISABLE_INTERRUPTS() portDISABLE_INTERRUPTS() + +/** + * task. h + * + * Macro to enable microcontroller interrupts. + * + * \defgroup taskENABLE_INTERRUPTS taskENABLE_INTERRUPTS + * \ingroup SchedulerControl + */ +#define taskENABLE_INTERRUPTS() portENABLE_INTERRUPTS() + +/* Definitions returned by xTaskGetSchedulerState(). taskSCHEDULER_SUSPENDED is +0 to generate more optimal code when configASSERT() is defined as the constant +is used in assert() statements. */ +#define taskSCHEDULER_SUSPENDED ( ( BaseType_t ) 0 ) +#define taskSCHEDULER_NOT_STARTED ( ( BaseType_t ) 1 ) +#define taskSCHEDULER_RUNNING ( ( BaseType_t ) 2 ) + + +/*----------------------------------------------------------- + * TASK CREATION API + *----------------------------------------------------------*/ + +/** + * task. h + *+ BaseType_t xTaskCreate( + TaskFunction_t pvTaskCode, + const char * const pcName, + configSTACK_DEPTH_TYPE usStackDepth, + void *pvParameters, + UBaseType_t uxPriority, + TaskHandle_t *pvCreatedTask + );+ * + * Create a new task and add it to the list of tasks that are ready to run. + * + * Internally, within the FreeRTOS implementation, tasks use two blocks of + * memory. The first block is used to hold the task's data structures. The + * second block is used by the task as its stack. If a task is created using + * xTaskCreate() then both blocks of memory are automatically dynamically + * allocated inside the xTaskCreate() function. (see + * http://www.freertos.org/a00111.html). If a task is created using + * xTaskCreateStatic() then the application writer must provide the required + * memory. xTaskCreateStatic() therefore allows a task to be created without + * using any dynamic memory allocation. + * + * See xTaskCreateStatic() for a version that does not use any dynamic memory + * allocation. + * + * xTaskCreate() can only be used to create a task that has unrestricted + * access to the entire microcontroller memory map. Systems that include MPU + * support can alternatively create an MPU constrained task using + * xTaskCreateRestricted(). + * + * @param pvTaskCode Pointer to the task entry function. Tasks + * must be implemented to never return (i.e. continuous loop). + * + * @param pcName A descriptive name for the task. This is mainly used to + * facilitate debugging. Max length defined by configMAX_TASK_NAME_LEN - default + * is 16. + * + * @param usStackDepth The size of the task stack specified as the number of + * variables the stack can hold - not the number of bytes. For example, if + * the stack is 16 bits wide and usStackDepth is defined as 100, 200 bytes + * will be allocated for stack storage. + * + * @param pvParameters Pointer that will be used as the parameter for the task + * being created. + * + * @param uxPriority The priority at which the task should run. Systems that + * include MPU support can optionally create tasks in a privileged (system) + * mode by setting bit portPRIVILEGE_BIT of the priority parameter. For + * example, to create a privileged task at priority 2 the uxPriority parameter + * should be set to ( 2 | portPRIVILEGE_BIT ). + * + * @param pvCreatedTask Used to pass back a handle by which the created task + * can be referenced. + * + * @return pdPASS if the task was successfully created and added to a ready + * list, otherwise an error code defined in the file projdefs.h + * + * Example usage: ++ // Task to be created. + void vTaskCode( void * pvParameters ) + { + for( ;; ) + { + // Task code goes here. + } + } + + // Function that creates a task. + void vOtherFunction( void ) + { + static uint8_t ucParameterToPass; + TaskHandle_t xHandle = NULL; + + // Create the task, storing the handle. Note that the passed parameter ucParameterToPass + // must exist for the lifetime of the task, so in this case is declared static. If it was just an + // an automatic stack variable it might no longer exist, or at least have been corrupted, by the time + // the new task attempts to access it. + xTaskCreate( vTaskCode, "NAME", STACK_SIZE, &ucParameterToPass, tskIDLE_PRIORITY, &xHandle ); + configASSERT( xHandle ); + + // Use the handle to delete the task. + if( xHandle != NULL ) + { + vTaskDelete( xHandle ); + } + } ++ * \defgroup xTaskCreate xTaskCreate + * \ingroup Tasks + */ +#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) + BaseType_t xTaskCreate( TaskFunction_t pxTaskCode, + const char * const pcName, /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ + const configSTACK_DEPTH_TYPE usStackDepth, + void * const pvParameters, + UBaseType_t uxPriority, + TaskHandle_t * const pxCreatedTask ) PRIVILEGED_FUNCTION; +#endif + +/** + * task. h + *+ TaskHandle_t xTaskCreateStatic( TaskFunction_t pvTaskCode, + const char * const pcName, + uint32_t ulStackDepth, + void *pvParameters, + UBaseType_t uxPriority, + StackType_t *pxStackBuffer, + StaticTask_t *pxTaskBuffer );+ * + * Create a new task and add it to the list of tasks that are ready to run. + * + * Internally, within the FreeRTOS implementation, tasks use two blocks of + * memory. The first block is used to hold the task's data structures. The + * second block is used by the task as its stack. If a task is created using + * xTaskCreate() then both blocks of memory are automatically dynamically + * allocated inside the xTaskCreate() function. (see + * http://www.freertos.org/a00111.html). If a task is created using + * xTaskCreateStatic() then the application writer must provide the required + * memory. xTaskCreateStatic() therefore allows a task to be created without + * using any dynamic memory allocation. + * + * @param pvTaskCode Pointer to the task entry function. Tasks + * must be implemented to never return (i.e. continuous loop). + * + * @param pcName A descriptive name for the task. This is mainly used to + * facilitate debugging. The maximum length of the string is defined by + * configMAX_TASK_NAME_LEN in FreeRTOSConfig.h. + * + * @param ulStackDepth The size of the task stack specified as the number of + * variables the stack can hold - not the number of bytes. For example, if + * the stack is 32-bits wide and ulStackDepth is defined as 100 then 400 bytes + * will be allocated for stack storage. + * + * @param pvParameters Pointer that will be used as the parameter for the task + * being created. + * + * @param uxPriority The priority at which the task will run. + * + * @param pxStackBuffer Must point to a StackType_t array that has at least + * ulStackDepth indexes - the array will then be used as the task's stack, + * removing the need for the stack to be allocated dynamically. + * + * @param pxTaskBuffer Must point to a variable of type StaticTask_t, which will + * then be used to hold the task's data structures, removing the need for the + * memory to be allocated dynamically. + * + * @return If neither pxStackBuffer or pxTaskBuffer are NULL, then the task will + * be created and pdPASS is returned. If either pxStackBuffer or pxTaskBuffer + * are NULL then the task will not be created and + * errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY is returned. + * + * Example usage: ++ + // Dimensions the buffer that the task being created will use as its stack. + // NOTE: This is the number of words the stack will hold, not the number of + // bytes. For example, if each stack item is 32-bits, and this is set to 100, + // then 400 bytes (100 * 32-bits) will be allocated. + #define STACK_SIZE 200 + + // Structure that will hold the TCB of the task being created. + StaticTask_t xTaskBuffer; + + // Buffer that the task being created will use as its stack. Note this is + // an array of StackType_t variables. The size of StackType_t is dependent on + // the RTOS port. + StackType_t xStack[ STACK_SIZE ]; + + // Function that implements the task being created. + void vTaskCode( void * pvParameters ) + { + // The parameter value is expected to be 1 as 1 is passed in the + // pvParameters value in the call to xTaskCreateStatic(). + configASSERT( ( uint32_t ) pvParameters == 1UL ); + + for( ;; ) + { + // Task code goes here. + } + } + + // Function that creates a task. + void vOtherFunction( void ) + { + TaskHandle_t xHandle = NULL; + + // Create the task without using any dynamic memory allocation. + xHandle = xTaskCreateStatic( + vTaskCode, // Function that implements the task. + "NAME", // Text name for the task. + STACK_SIZE, // Stack size in words, not bytes. + ( void * ) 1, // Parameter passed into the task. + tskIDLE_PRIORITY,// Priority at which the task is created. + xStack, // Array to use as the task's stack. + &xTaskBuffer ); // Variable to hold the task's data structure. + + // puxStackBuffer and pxTaskBuffer were not NULL, so the task will have + // been created, and xHandle will be the task's handle. Use the handle + // to suspend the task. + vTaskSuspend( xHandle ); + } ++ * \defgroup xTaskCreateStatic xTaskCreateStatic + * \ingroup Tasks + */ +#if( configSUPPORT_STATIC_ALLOCATION == 1 ) + TaskHandle_t xTaskCreateStatic( TaskFunction_t pxTaskCode, + const char * const pcName, /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ + const uint32_t ulStackDepth, + void * const pvParameters, + UBaseType_t uxPriority, + StackType_t * const puxStackBuffer, + StaticTask_t * const pxTaskBuffer ) PRIVILEGED_FUNCTION; +#endif /* configSUPPORT_STATIC_ALLOCATION */ + +/** + * task. h + *+ BaseType_t xTaskCreateRestricted( TaskParameters_t *pxTaskDefinition, TaskHandle_t *pxCreatedTask );+ * + * Only available when configSUPPORT_DYNAMIC_ALLOCATION is set to 1. + * + * xTaskCreateRestricted() should only be used in systems that include an MPU + * implementation. + * + * Create a new task and add it to the list of tasks that are ready to run. + * The function parameters define the memory regions and associated access + * permissions allocated to the task. + * + * See xTaskCreateRestrictedStatic() for a version that does not use any + * dynamic memory allocation. + * + * @param pxTaskDefinition Pointer to a structure that contains a member + * for each of the normal xTaskCreate() parameters (see the xTaskCreate() API + * documentation) plus an optional stack buffer and the memory region + * definitions. + * + * @param pxCreatedTask Used to pass back a handle by which the created task + * can be referenced. + * + * @return pdPASS if the task was successfully created and added to a ready + * list, otherwise an error code defined in the file projdefs.h + * + * Example usage: ++// Create an TaskParameters_t structure that defines the task to be created. +static const TaskParameters_t xCheckTaskParameters = +{ + vATask, // pvTaskCode - the function that implements the task. + "ATask", // pcName - just a text name for the task to assist debugging. + 100, // usStackDepth - the stack size DEFINED IN WORDS. + NULL, // pvParameters - passed into the task function as the function parameters. + ( 1UL | portPRIVILEGE_BIT ),// uxPriority - task priority, set the portPRIVILEGE_BIT if the task should run in a privileged state. + cStackBuffer,// puxStackBuffer - the buffer to be used as the task stack. + + // xRegions - Allocate up to three separate memory regions for access by + // the task, with appropriate access permissions. Different processors have + // different memory alignment requirements - refer to the FreeRTOS documentation + // for full information. + { + // Base address Length Parameters + { cReadWriteArray, 32, portMPU_REGION_READ_WRITE }, + { cReadOnlyArray, 32, portMPU_REGION_READ_ONLY }, + { cPrivilegedOnlyAccessArray, 128, portMPU_REGION_PRIVILEGED_READ_WRITE } + } +}; + +int main( void ) +{ +TaskHandle_t xHandle; + + // Create a task from the const structure defined above. The task handle + // is requested (the second parameter is not NULL) but in this case just for + // demonstration purposes as its not actually used. + xTaskCreateRestricted( &xRegTest1Parameters, &xHandle ); + + // Start the scheduler. + vTaskStartScheduler(); + + // Will only get here if there was insufficient memory to create the idle + // and/or timer task. + for( ;; ); +} ++ * \defgroup xTaskCreateRestricted xTaskCreateRestricted + * \ingroup Tasks + */ +#if( portUSING_MPU_WRAPPERS == 1 ) + BaseType_t xTaskCreateRestricted( const TaskParameters_t * const pxTaskDefinition, TaskHandle_t *pxCreatedTask ) PRIVILEGED_FUNCTION; +#endif + +/** + * task. h + *+ BaseType_t xTaskCreateRestrictedStatic( TaskParameters_t *pxTaskDefinition, TaskHandle_t *pxCreatedTask );+ * + * Only available when configSUPPORT_STATIC_ALLOCATION is set to 1. + * + * xTaskCreateRestrictedStatic() should only be used in systems that include an + * MPU implementation. + * + * Internally, within the FreeRTOS implementation, tasks use two blocks of + * memory. The first block is used to hold the task's data structures. The + * second block is used by the task as its stack. If a task is created using + * xTaskCreateRestricted() then the stack is provided by the application writer, + * and the memory used to hold the task's data structure is automatically + * dynamically allocated inside the xTaskCreateRestricted() function. If a task + * is created using xTaskCreateRestrictedStatic() then the application writer + * must provide the memory used to hold the task's data structures too. + * xTaskCreateRestrictedStatic() therefore allows a memory protected task to be + * created without using any dynamic memory allocation. + * + * @param pxTaskDefinition Pointer to a structure that contains a member + * for each of the normal xTaskCreate() parameters (see the xTaskCreate() API + * documentation) plus an optional stack buffer and the memory region + * definitions. If configSUPPORT_STATIC_ALLOCATION is set to 1 the structure + * contains an additional member, which is used to point to a variable of type + * StaticTask_t - which is then used to hold the task's data structure. + * + * @param pxCreatedTask Used to pass back a handle by which the created task + * can be referenced. + * + * @return pdPASS if the task was successfully created and added to a ready + * list, otherwise an error code defined in the file projdefs.h + * + * Example usage: ++// Create an TaskParameters_t structure that defines the task to be created. +// The StaticTask_t variable is only included in the structure when +// configSUPPORT_STATIC_ALLOCATION is set to 1. The PRIVILEGED_DATA macro can +// be used to force the variable into the RTOS kernel's privileged data area. +static PRIVILEGED_DATA StaticTask_t xTaskBuffer; +static const TaskParameters_t xCheckTaskParameters = +{ + vATask, // pvTaskCode - the function that implements the task. + "ATask", // pcName - just a text name for the task to assist debugging. + 100, // usStackDepth - the stack size DEFINED IN WORDS. + NULL, // pvParameters - passed into the task function as the function parameters. + ( 1UL | portPRIVILEGE_BIT ),// uxPriority - task priority, set the portPRIVILEGE_BIT if the task should run in a privileged state. + cStackBuffer,// puxStackBuffer - the buffer to be used as the task stack. + + // xRegions - Allocate up to three separate memory regions for access by + // the task, with appropriate access permissions. Different processors have + // different memory alignment requirements - refer to the FreeRTOS documentation + // for full information. + { + // Base address Length Parameters + { cReadWriteArray, 32, portMPU_REGION_READ_WRITE }, + { cReadOnlyArray, 32, portMPU_REGION_READ_ONLY }, + { cPrivilegedOnlyAccessArray, 128, portMPU_REGION_PRIVILEGED_READ_WRITE } + } + + &xTaskBuffer; // Holds the task's data structure. +}; + +int main( void ) +{ +TaskHandle_t xHandle; + + // Create a task from the const structure defined above. The task handle + // is requested (the second parameter is not NULL) but in this case just for + // demonstration purposes as its not actually used. + xTaskCreateRestricted( &xRegTest1Parameters, &xHandle ); + + // Start the scheduler. + vTaskStartScheduler(); + + // Will only get here if there was insufficient memory to create the idle + // and/or timer task. + for( ;; ); +} ++ * \defgroup xTaskCreateRestrictedStatic xTaskCreateRestrictedStatic + * \ingroup Tasks + */ +#if( ( portUSING_MPU_WRAPPERS == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) ) + BaseType_t xTaskCreateRestrictedStatic( const TaskParameters_t * const pxTaskDefinition, TaskHandle_t *pxCreatedTask ) PRIVILEGED_FUNCTION; +#endif + +/** + * task. h + *+ void vTaskAllocateMPURegions( TaskHandle_t xTask, const MemoryRegion_t * const pxRegions );+ * + * Memory regions are assigned to a restricted task when the task is created by + * a call to xTaskCreateRestricted(). These regions can be redefined using + * vTaskAllocateMPURegions(). + * + * @param xTask The handle of the task being updated. + * + * @param xRegions A pointer to an MemoryRegion_t structure that contains the + * new memory region definitions. + * + * Example usage: ++// Define an array of MemoryRegion_t structures that configures an MPU region +// allowing read/write access for 1024 bytes starting at the beginning of the +// ucOneKByte array. The other two of the maximum 3 definable regions are +// unused so set to zero. +static const MemoryRegion_t xAltRegions[ portNUM_CONFIGURABLE_REGIONS ] = +{ + // Base address Length Parameters + { ucOneKByte, 1024, portMPU_REGION_READ_WRITE }, + { 0, 0, 0 }, + { 0, 0, 0 } +}; + +void vATask( void *pvParameters ) +{ + // This task was created such that it has access to certain regions of + // memory as defined by the MPU configuration. At some point it is + // desired that these MPU regions are replaced with that defined in the + // xAltRegions const struct above. Use a call to vTaskAllocateMPURegions() + // for this purpose. NULL is used as the task handle to indicate that this + // function should modify the MPU regions of the calling task. + vTaskAllocateMPURegions( NULL, xAltRegions ); + + // Now the task can continue its function, but from this point on can only + // access its stack and the ucOneKByte array (unless any other statically + // defined or shared regions have been declared elsewhere). +} ++ * \defgroup xTaskCreateRestricted xTaskCreateRestricted + * \ingroup Tasks + */ +void vTaskAllocateMPURegions( TaskHandle_t xTask, const MemoryRegion_t * const pxRegions ) PRIVILEGED_FUNCTION; + +/** + * task. h + *void vTaskDelete( TaskHandle_t xTask );+ * + * INCLUDE_vTaskDelete must be defined as 1 for this function to be available. + * See the configuration section for more information. + * + * Remove a task from the RTOS real time kernel's management. The task being + * deleted will be removed from all ready, blocked, suspended and event lists. + * + * NOTE: The idle task is responsible for freeing the kernel allocated + * memory from tasks that have been deleted. It is therefore important that + * the idle task is not starved of microcontroller processing time if your + * application makes any calls to vTaskDelete (). Memory allocated by the + * task code is not automatically freed, and should be freed before the task + * is deleted. + * + * See the demo application file death.c for sample code that utilises + * vTaskDelete (). + * + * @param xTask The handle of the task to be deleted. Passing NULL will + * cause the calling task to be deleted. + * + * Example usage: ++ void vOtherFunction( void ) + { + TaskHandle_t xHandle; + + // Create the task, storing the handle. + xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle ); + + // Use the handle to delete the task. + vTaskDelete( xHandle ); + } ++ * \defgroup vTaskDelete vTaskDelete + * \ingroup Tasks + */ +void vTaskDelete( TaskHandle_t xTaskToDelete ) PRIVILEGED_FUNCTION; + +/*----------------------------------------------------------- + * TASK CONTROL API + *----------------------------------------------------------*/ + +/** + * task. h + *void vTaskDelay( const TickType_t xTicksToDelay );+ * + * Delay a task for a given number of ticks. The actual time that the + * task remains blocked depends on the tick rate. The constant + * portTICK_PERIOD_MS can be used to calculate real time from the tick + * rate - with the resolution of one tick period. + * + * INCLUDE_vTaskDelay must be defined as 1 for this function to be available. + * See the configuration section for more information. + * + * + * vTaskDelay() specifies a time at which the task wishes to unblock relative to + * the time at which vTaskDelay() is called. For example, specifying a block + * period of 100 ticks will cause the task to unblock 100 ticks after + * vTaskDelay() is called. vTaskDelay() does not therefore provide a good method + * of controlling the frequency of a periodic task as the path taken through the + * code, as well as other task and interrupt activity, will effect the frequency + * at which vTaskDelay() gets called and therefore the time at which the task + * next executes. See vTaskDelayUntil() for an alternative API function designed + * to facilitate fixed frequency execution. It does this by specifying an + * absolute time (rather than a relative time) at which the calling task should + * unblock. + * + * @param xTicksToDelay The amount of time, in tick periods, that + * the calling task should block. + * + * Example usage: + + void vTaskFunction( void * pvParameters ) + { + // Block for 500ms. + const TickType_t xDelay = 500 / portTICK_PERIOD_MS; + + for( ;; ) + { + // Simply toggle the LED every 500ms, blocking between each toggle. + vToggleLED(); + vTaskDelay( xDelay ); + } + } + + * \defgroup vTaskDelay vTaskDelay + * \ingroup TaskCtrl + */ +void vTaskDelay( const TickType_t xTicksToDelay ) PRIVILEGED_FUNCTION; + +/** + * task. h + *void vTaskDelayUntil( TickType_t *pxPreviousWakeTime, const TickType_t xTimeIncrement );+ * + * INCLUDE_vTaskDelayUntil must be defined as 1 for this function to be available. + * See the configuration section for more information. + * + * Delay a task until a specified time. This function can be used by periodic + * tasks to ensure a constant execution frequency. + * + * This function differs from vTaskDelay () in one important aspect: vTaskDelay () will + * cause a task to block for the specified number of ticks from the time vTaskDelay () is + * called. It is therefore difficult to use vTaskDelay () by itself to generate a fixed + * execution frequency as the time between a task starting to execute and that task + * calling vTaskDelay () may not be fixed [the task may take a different path though the + * code between calls, or may get interrupted or preempted a different number of times + * each time it executes]. + * + * Whereas vTaskDelay () specifies a wake time relative to the time at which the function + * is called, vTaskDelayUntil () specifies the absolute (exact) time at which it wishes to + * unblock. + * + * The constant portTICK_PERIOD_MS can be used to calculate real time from the tick + * rate - with the resolution of one tick period. + * + * @param pxPreviousWakeTime Pointer to a variable that holds the time at which the + * task was last unblocked. The variable must be initialised with the current time + * prior to its first use (see the example below). Following this the variable is + * automatically updated within vTaskDelayUntil (). + * + * @param xTimeIncrement The cycle time period. The task will be unblocked at + * time *pxPreviousWakeTime + xTimeIncrement. Calling vTaskDelayUntil with the + * same xTimeIncrement parameter value will cause the task to execute with + * a fixed interface period. + * + * Example usage: ++ // Perform an action every 10 ticks. + void vTaskFunction( void * pvParameters ) + { + TickType_t xLastWakeTime; + const TickType_t xFrequency = 10; + + // Initialise the xLastWakeTime variable with the current time. + xLastWakeTime = xTaskGetTickCount (); + for( ;; ) + { + // Wait for the next cycle. + vTaskDelayUntil( &xLastWakeTime, xFrequency ); + + // Perform action here. + } + } ++ * \defgroup vTaskDelayUntil vTaskDelayUntil + * \ingroup TaskCtrl + */ +void vTaskDelayUntil( TickType_t * const pxPreviousWakeTime, const TickType_t xTimeIncrement ) PRIVILEGED_FUNCTION; + +/** + * task. h + *BaseType_t xTaskAbortDelay( TaskHandle_t xTask );+ * + * INCLUDE_xTaskAbortDelay must be defined as 1 in FreeRTOSConfig.h for this + * function to be available. + * + * A task will enter the Blocked state when it is waiting for an event. The + * event it is waiting for can be a temporal event (waiting for a time), such + * as when vTaskDelay() is called, or an event on an object, such as when + * xQueueReceive() or ulTaskNotifyTake() is called. If the handle of a task + * that is in the Blocked state is used in a call to xTaskAbortDelay() then the + * task will leave the Blocked state, and return from whichever function call + * placed the task into the Blocked state. + * + * @param xTask The handle of the task to remove from the Blocked state. + * + * @return If the task referenced by xTask was not in the Blocked state then + * pdFAIL is returned. Otherwise pdPASS is returned. + * + * \defgroup xTaskAbortDelay xTaskAbortDelay + * \ingroup TaskCtrl + */ +BaseType_t xTaskAbortDelay( TaskHandle_t xTask ) PRIVILEGED_FUNCTION; + +/** + * task. h + *UBaseType_t uxTaskPriorityGet( TaskHandle_t xTask );+ * + * INCLUDE_uxTaskPriorityGet must be defined as 1 for this function to be available. + * See the configuration section for more information. + * + * Obtain the priority of any task. + * + * @param xTask Handle of the task to be queried. Passing a NULL + * handle results in the priority of the calling task being returned. + * + * @return The priority of xTask. + * + * Example usage: ++ void vAFunction( void ) + { + TaskHandle_t xHandle; + + // Create a task, storing the handle. + xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle ); + + // ... + + // Use the handle to obtain the priority of the created task. + // It was created with tskIDLE_PRIORITY, but may have changed + // it itself. + if( uxTaskPriorityGet( xHandle ) != tskIDLE_PRIORITY ) + { + // The task has changed it's priority. + } + + // ... + + // Is our priority higher than the created task? + if( uxTaskPriorityGet( xHandle ) < uxTaskPriorityGet( NULL ) ) + { + // Our priority (obtained using NULL handle) is higher. + } + } ++ * \defgroup uxTaskPriorityGet uxTaskPriorityGet + * \ingroup TaskCtrl + */ +UBaseType_t uxTaskPriorityGet( TaskHandle_t xTask ) PRIVILEGED_FUNCTION; + +/** + * task. h + *UBaseType_t uxTaskPriorityGetFromISR( TaskHandle_t xTask );+ * + * A version of uxTaskPriorityGet() that can be used from an ISR. + */ +UBaseType_t uxTaskPriorityGetFromISR( TaskHandle_t xTask ) PRIVILEGED_FUNCTION; + +/** + * task. h + *eTaskState eTaskGetState( TaskHandle_t xTask );+ * + * INCLUDE_eTaskGetState must be defined as 1 for this function to be available. + * See the configuration section for more information. + * + * Obtain the state of any task. States are encoded by the eTaskState + * enumerated type. + * + * @param xTask Handle of the task to be queried. + * + * @return The state of xTask at the time the function was called. Note the + * state of the task might change between the function being called, and the + * functions return value being tested by the calling task. + */ +eTaskState eTaskGetState( TaskHandle_t xTask ) PRIVILEGED_FUNCTION; + +/** + * task. h + *void vTaskGetInfo( TaskHandle_t xTask, TaskStatus_t *pxTaskStatus, BaseType_t xGetFreeStackSpace, eTaskState eState );+ * + * configUSE_TRACE_FACILITY must be defined as 1 for this function to be + * available. See the configuration section for more information. + * + * Populates a TaskStatus_t structure with information about a task. + * + * @param xTask Handle of the task being queried. If xTask is NULL then + * information will be returned about the calling task. + * + * @param pxTaskStatus A pointer to the TaskStatus_t structure that will be + * filled with information about the task referenced by the handle passed using + * the xTask parameter. + * + * @xGetFreeStackSpace The TaskStatus_t structure contains a member to report + * the stack high water mark of the task being queried. Calculating the stack + * high water mark takes a relatively long time, and can make the system + * temporarily unresponsive - so the xGetFreeStackSpace parameter is provided to + * allow the high water mark checking to be skipped. The high watermark value + * will only be written to the TaskStatus_t structure if xGetFreeStackSpace is + * not set to pdFALSE; + * + * @param eState The TaskStatus_t structure contains a member to report the + * state of the task being queried. Obtaining the task state is not as fast as + * a simple assignment - so the eState parameter is provided to allow the state + * information to be omitted from the TaskStatus_t structure. To obtain state + * information then set eState to eInvalid - otherwise the value passed in + * eState will be reported as the task state in the TaskStatus_t structure. + * + * Example usage: ++ void vAFunction( void ) + { + TaskHandle_t xHandle; + TaskStatus_t xTaskDetails; + + // Obtain the handle of a task from its name. + xHandle = xTaskGetHandle( "Task_Name" ); + + // Check the handle is not NULL. + configASSERT( xHandle ); + + // Use the handle to obtain further information about the task. + vTaskGetInfo( xHandle, + &xTaskDetails, + pdTRUE, // Include the high water mark in xTaskDetails. + eInvalid ); // Include the task state in xTaskDetails. + } ++ * \defgroup vTaskGetInfo vTaskGetInfo + * \ingroup TaskCtrl + */ +void vTaskGetInfo( TaskHandle_t xTask, TaskStatus_t *pxTaskStatus, BaseType_t xGetFreeStackSpace, eTaskState eState ) PRIVILEGED_FUNCTION; + +/** + * task. h + *void vTaskPrioritySet( TaskHandle_t xTask, UBaseType_t uxNewPriority );+ * + * INCLUDE_vTaskPrioritySet must be defined as 1 for this function to be available. + * See the configuration section for more information. + * + * Set the priority of any task. + * + * A context switch will occur before the function returns if the priority + * being set is higher than the currently executing task. + * + * @param xTask Handle to the task for which the priority is being set. + * Passing a NULL handle results in the priority of the calling task being set. + * + * @param uxNewPriority The priority to which the task will be set. + * + * Example usage: ++ void vAFunction( void ) + { + TaskHandle_t xHandle; + + // Create a task, storing the handle. + xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle ); + + // ... + + // Use the handle to raise the priority of the created task. + vTaskPrioritySet( xHandle, tskIDLE_PRIORITY + 1 ); + + // ... + + // Use a NULL handle to raise our priority to the same value. + vTaskPrioritySet( NULL, tskIDLE_PRIORITY + 1 ); + } ++ * \defgroup vTaskPrioritySet vTaskPrioritySet + * \ingroup TaskCtrl + */ +void vTaskPrioritySet( TaskHandle_t xTask, UBaseType_t uxNewPriority ) PRIVILEGED_FUNCTION; + +/** + * task. h + *void vTaskSuspend( TaskHandle_t xTaskToSuspend );+ * + * INCLUDE_vTaskSuspend must be defined as 1 for this function to be available. + * See the configuration section for more information. + * + * Suspend any task. When suspended a task will never get any microcontroller + * processing time, no matter what its priority. + * + * Calls to vTaskSuspend are not accumulative - + * i.e. calling vTaskSuspend () twice on the same task still only requires one + * call to vTaskResume () to ready the suspended task. + * + * @param xTaskToSuspend Handle to the task being suspended. Passing a NULL + * handle will cause the calling task to be suspended. + * + * Example usage: ++ void vAFunction( void ) + { + TaskHandle_t xHandle; + + // Create a task, storing the handle. + xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle ); + + // ... + + // Use the handle to suspend the created task. + vTaskSuspend( xHandle ); + + // ... + + // The created task will not run during this period, unless + // another task calls vTaskResume( xHandle ). + + //... + + + // Suspend ourselves. + vTaskSuspend( NULL ); + + // We cannot get here unless another task calls vTaskResume + // with our handle as the parameter. + } ++ * \defgroup vTaskSuspend vTaskSuspend + * \ingroup TaskCtrl + */ +void vTaskSuspend( TaskHandle_t xTaskToSuspend ) PRIVILEGED_FUNCTION; + +/** + * task. h + *void vTaskResume( TaskHandle_t xTaskToResume );+ * + * INCLUDE_vTaskSuspend must be defined as 1 for this function to be available. + * See the configuration section for more information. + * + * Resumes a suspended task. + * + * A task that has been suspended by one or more calls to vTaskSuspend () + * will be made available for running again by a single call to + * vTaskResume (). + * + * @param xTaskToResume Handle to the task being readied. + * + * Example usage: ++ void vAFunction( void ) + { + TaskHandle_t xHandle; + + // Create a task, storing the handle. + xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle ); + + // ... + + // Use the handle to suspend the created task. + vTaskSuspend( xHandle ); + + // ... + + // The created task will not run during this period, unless + // another task calls vTaskResume( xHandle ). + + //... + + + // Resume the suspended task ourselves. + vTaskResume( xHandle ); + + // The created task will once again get microcontroller processing + // time in accordance with its priority within the system. + } ++ * \defgroup vTaskResume vTaskResume + * \ingroup TaskCtrl + */ +void vTaskResume( TaskHandle_t xTaskToResume ) PRIVILEGED_FUNCTION; + +/** + * task. h + *void xTaskResumeFromISR( TaskHandle_t xTaskToResume );+ * + * INCLUDE_xTaskResumeFromISR must be defined as 1 for this function to be + * available. See the configuration section for more information. + * + * An implementation of vTaskResume() that can be called from within an ISR. + * + * A task that has been suspended by one or more calls to vTaskSuspend () + * will be made available for running again by a single call to + * xTaskResumeFromISR (). + * + * xTaskResumeFromISR() should not be used to synchronise a task with an + * interrupt if there is a chance that the interrupt could arrive prior to the + * task being suspended - as this can lead to interrupts being missed. Use of a + * semaphore as a synchronisation mechanism would avoid this eventuality. + * + * @param xTaskToResume Handle to the task being readied. + * + * @return pdTRUE if resuming the task should result in a context switch, + * otherwise pdFALSE. This is used by the ISR to determine if a context switch + * may be required following the ISR. + * + * \defgroup vTaskResumeFromISR vTaskResumeFromISR + * \ingroup TaskCtrl + */ +BaseType_t xTaskResumeFromISR( TaskHandle_t xTaskToResume ) PRIVILEGED_FUNCTION; + +/*----------------------------------------------------------- + * SCHEDULER CONTROL + *----------------------------------------------------------*/ + +/** + * task. h + *void vTaskStartScheduler( void );+ * + * Starts the real time kernel tick processing. After calling the kernel + * has control over which tasks are executed and when. + * + * See the demo application file main.c for an example of creating + * tasks and starting the kernel. + * + * Example usage: ++ void vAFunction( void ) + { + // Create at least one task before starting the kernel. + xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL ); + + // Start the real time kernel with preemption. + vTaskStartScheduler (); + + // Will not get here unless a task calls vTaskEndScheduler () + } ++ * + * \defgroup vTaskStartScheduler vTaskStartScheduler + * \ingroup SchedulerControl + */ +void vTaskStartScheduler( void ) PRIVILEGED_FUNCTION; + +/** + * task. h + *void vTaskEndScheduler( void );+ * + * NOTE: At the time of writing only the x86 real mode port, which runs on a PC + * in place of DOS, implements this function. + * + * Stops the real time kernel tick. All created tasks will be automatically + * deleted and multitasking (either preemptive or cooperative) will + * stop. Execution then resumes from the point where vTaskStartScheduler () + * was called, as if vTaskStartScheduler () had just returned. + * + * See the demo application file main. c in the demo/PC directory for an + * example that uses vTaskEndScheduler (). + * + * vTaskEndScheduler () requires an exit function to be defined within the + * portable layer (see vPortEndScheduler () in port. c for the PC port). This + * performs hardware specific operations such as stopping the kernel tick. + * + * vTaskEndScheduler () will cause all of the resources allocated by the + * kernel to be freed - but will not free resources allocated by application + * tasks. + * + * Example usage: ++ void vTaskCode( void * pvParameters ) + { + for( ;; ) + { + // Task code goes here. + + // At some point we want to end the real time kernel processing + // so call ... + vTaskEndScheduler (); + } + } + + void vAFunction( void ) + { + // Create at least one task before starting the kernel. + xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL ); + + // Start the real time kernel with preemption. + vTaskStartScheduler (); + + // Will only get here when the vTaskCode () task has called + // vTaskEndScheduler (). When we get here we are back to single task + // execution. + } ++ * + * \defgroup vTaskEndScheduler vTaskEndScheduler + * \ingroup SchedulerControl + */ +void vTaskEndScheduler( void ) PRIVILEGED_FUNCTION; + +/** + * task. h + *void vTaskSuspendAll( void );+ * + * Suspends the scheduler without disabling interrupts. Context switches will + * not occur while the scheduler is suspended. + * + * After calling vTaskSuspendAll () the calling task will continue to execute + * without risk of being swapped out until a call to xTaskResumeAll () has been + * made. + * + * API functions that have the potential to cause a context switch (for example, + * vTaskDelayUntil(), xQueueSend(), etc.) must not be called while the scheduler + * is suspended. + * + * Example usage: ++ void vTask1( void * pvParameters ) + { + for( ;; ) + { + // Task code goes here. + + // ... + + // At some point the task wants to perform a long operation during + // which it does not want to get swapped out. It cannot use + // taskENTER_CRITICAL ()/taskEXIT_CRITICAL () as the length of the + // operation may cause interrupts to be missed - including the + // ticks. + + // Prevent the real time kernel swapping out the task. + vTaskSuspendAll (); + + // Perform the operation here. There is no need to use critical + // sections as we have all the microcontroller processing time. + // During this time interrupts will still operate and the kernel + // tick count will be maintained. + + // ... + + // The operation is complete. Restart the kernel. + xTaskResumeAll (); + } + } ++ * \defgroup vTaskSuspendAll vTaskSuspendAll + * \ingroup SchedulerControl + */ +void vTaskSuspendAll( void ) PRIVILEGED_FUNCTION; + +/** + * task. h + *BaseType_t xTaskResumeAll( void );+ * + * Resumes scheduler activity after it was suspended by a call to + * vTaskSuspendAll(). + * + * xTaskResumeAll() only resumes the scheduler. It does not unsuspend tasks + * that were previously suspended by a call to vTaskSuspend(). + * + * @return If resuming the scheduler caused a context switch then pdTRUE is + * returned, otherwise pdFALSE is returned. + * + * Example usage: ++ void vTask1( void * pvParameters ) + { + for( ;; ) + { + // Task code goes here. + + // ... + + // At some point the task wants to perform a long operation during + // which it does not want to get swapped out. It cannot use + // taskENTER_CRITICAL ()/taskEXIT_CRITICAL () as the length of the + // operation may cause interrupts to be missed - including the + // ticks. + + // Prevent the real time kernel swapping out the task. + vTaskSuspendAll (); + + // Perform the operation here. There is no need to use critical + // sections as we have all the microcontroller processing time. + // During this time interrupts will still operate and the real + // time kernel tick count will be maintained. + + // ... + + // The operation is complete. Restart the kernel. We want to force + // a context switch - but there is no point if resuming the scheduler + // caused a context switch already. + if( !xTaskResumeAll () ) + { + taskYIELD (); + } + } + } ++ * \defgroup xTaskResumeAll xTaskResumeAll + * \ingroup SchedulerControl + */ +BaseType_t xTaskResumeAll( void ) PRIVILEGED_FUNCTION; + +/*----------------------------------------------------------- + * TASK UTILITIES + *----------------------------------------------------------*/ + +/** + * task. h + *TickType_t xTaskGetTickCount( void );+ * + * @return The count of ticks since vTaskStartScheduler was called. + * + * \defgroup xTaskGetTickCount xTaskGetTickCount + * \ingroup TaskUtils + */ +TickType_t xTaskGetTickCount( void ) PRIVILEGED_FUNCTION; + +/** + * task. h + *TickType_t xTaskGetTickCountFromISR( void );+ * + * @return The count of ticks since vTaskStartScheduler was called. + * + * This is a version of xTaskGetTickCount() that is safe to be called from an + * ISR - provided that TickType_t is the natural word size of the + * microcontroller being used or interrupt nesting is either not supported or + * not being used. + * + * \defgroup xTaskGetTickCountFromISR xTaskGetTickCountFromISR + * \ingroup TaskUtils + */ +TickType_t xTaskGetTickCountFromISR( void ) PRIVILEGED_FUNCTION; + +/** + * task. h + *uint16_t uxTaskGetNumberOfTasks( void );+ * + * @return The number of tasks that the real time kernel is currently managing. + * This includes all ready, blocked and suspended tasks. A task that + * has been deleted but not yet freed by the idle task will also be + * included in the count. + * + * \defgroup uxTaskGetNumberOfTasks uxTaskGetNumberOfTasks + * \ingroup TaskUtils + */ +UBaseType_t uxTaskGetNumberOfTasks( void ) PRIVILEGED_FUNCTION; + +/** + * task. h + *char *pcTaskGetName( TaskHandle_t xTaskToQuery );+ * + * @return The text (human readable) name of the task referenced by the handle + * xTaskToQuery. A task can query its own name by either passing in its own + * handle, or by setting xTaskToQuery to NULL. + * + * \defgroup pcTaskGetName pcTaskGetName + * \ingroup TaskUtils + */ +char *pcTaskGetName( TaskHandle_t xTaskToQuery ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ + +/** + * task. h + *TaskHandle_t xTaskGetHandle( const char *pcNameToQuery );+ * + * NOTE: This function takes a relatively long time to complete and should be + * used sparingly. + * + * @return The handle of the task that has the human readable name pcNameToQuery. + * NULL is returned if no matching name is found. INCLUDE_xTaskGetHandle + * must be set to 1 in FreeRTOSConfig.h for pcTaskGetHandle() to be available. + * + * \defgroup pcTaskGetHandle pcTaskGetHandle + * \ingroup TaskUtils + */ +TaskHandle_t xTaskGetHandle( const char *pcNameToQuery ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ + +/** + * task.h + *UBaseType_t uxTaskGetStackHighWaterMark( TaskHandle_t xTask );+ * + * INCLUDE_uxTaskGetStackHighWaterMark must be set to 1 in FreeRTOSConfig.h for + * this function to be available. + * + * Returns the high water mark of the stack associated with xTask. That is, + * the minimum free stack space there has been (in words, so on a 32 bit machine + * a value of 1 means 4 bytes) since the task started. The smaller the returned + * number the closer the task has come to overflowing its stack. + * + * @param xTask Handle of the task associated with the stack to be checked. + * Set xTask to NULL to check the stack of the calling task. + * + * @return The smallest amount of free stack space there has been (in words, so + * actual spaces on the stack rather than bytes) since the task referenced by + * xTask was created. + */ +UBaseType_t uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) PRIVILEGED_FUNCTION; + +/* When using trace macros it is sometimes necessary to include task.h before +FreeRTOS.h. When this is done TaskHookFunction_t will not yet have been defined, +so the following two prototypes will cause a compilation error. This can be +fixed by simply guarding against the inclusion of these two prototypes unless +they are explicitly required by the configUSE_APPLICATION_TASK_TAG configuration +constant. */ +#ifdef configUSE_APPLICATION_TASK_TAG + #if configUSE_APPLICATION_TASK_TAG == 1 + /** + * task.h + *void vTaskSetApplicationTaskTag( TaskHandle_t xTask, TaskHookFunction_t pxHookFunction );+ * + * Sets pxHookFunction to be the task hook function used by the task xTask. + * Passing xTask as NULL has the effect of setting the calling tasks hook + * function. + */ + void vTaskSetApplicationTaskTag( TaskHandle_t xTask, TaskHookFunction_t pxHookFunction ) PRIVILEGED_FUNCTION; + + /** + * task.h + *void xTaskGetApplicationTaskTag( TaskHandle_t xTask );+ * + * Returns the pxHookFunction value assigned to the task xTask. + */ + TaskHookFunction_t xTaskGetApplicationTaskTag( TaskHandle_t xTask ) PRIVILEGED_FUNCTION; + #endif /* configUSE_APPLICATION_TASK_TAG ==1 */ +#endif /* ifdef configUSE_APPLICATION_TASK_TAG */ + +#if( configNUM_THREAD_LOCAL_STORAGE_POINTERS > 0 ) + + /* Each task contains an array of pointers that is dimensioned by the + configNUM_THREAD_LOCAL_STORAGE_POINTERS setting in FreeRTOSConfig.h. The + kernel does not use the pointers itself, so the application writer can use + the pointers for any purpose they wish. The following two functions are + used to set and query a pointer respectively. */ + void vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, BaseType_t xIndex, void *pvValue ) PRIVILEGED_FUNCTION; + void *pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, BaseType_t xIndex ) PRIVILEGED_FUNCTION; + +#endif + +/** + * task.h + *BaseType_t xTaskCallApplicationTaskHook( TaskHandle_t xTask, void *pvParameter );+ * + * Calls the hook function associated with xTask. Passing xTask as NULL has + * the effect of calling the Running tasks (the calling task) hook function. + * + * pvParameter is passed to the hook function for the task to interpret as it + * wants. The return value is the value returned by the task hook function + * registered by the user. + */ +BaseType_t xTaskCallApplicationTaskHook( TaskHandle_t xTask, void *pvParameter ) PRIVILEGED_FUNCTION; + +/** + * xTaskGetIdleTaskHandle() is only available if + * INCLUDE_xTaskGetIdleTaskHandle is set to 1 in FreeRTOSConfig.h. + * + * Simply returns the handle of the idle task. It is not valid to call + * xTaskGetIdleTaskHandle() before the scheduler has been started. + */ +TaskHandle_t xTaskGetIdleTaskHandle( void ) PRIVILEGED_FUNCTION; + +/** + * configUSE_TRACE_FACILITY must be defined as 1 in FreeRTOSConfig.h for + * uxTaskGetSystemState() to be available. + * + * uxTaskGetSystemState() populates an TaskStatus_t structure for each task in + * the system. TaskStatus_t structures contain, among other things, members + * for the task handle, task name, task priority, task state, and total amount + * of run time consumed by the task. See the TaskStatus_t structure + * definition in this file for the full member list. + * + * NOTE: This function is intended for debugging use only as its use results in + * the scheduler remaining suspended for an extended period. + * + * @param pxTaskStatusArray A pointer to an array of TaskStatus_t structures. + * The array must contain at least one TaskStatus_t structure for each task + * that is under the control of the RTOS. The number of tasks under the control + * of the RTOS can be determined using the uxTaskGetNumberOfTasks() API function. + * + * @param uxArraySize The size of the array pointed to by the pxTaskStatusArray + * parameter. The size is specified as the number of indexes in the array, or + * the number of TaskStatus_t structures contained in the array, not by the + * number of bytes in the array. + * + * @param pulTotalRunTime If configGENERATE_RUN_TIME_STATS is set to 1 in + * FreeRTOSConfig.h then *pulTotalRunTime is set by uxTaskGetSystemState() to the + * total run time (as defined by the run time stats clock, see + * http://www.freertos.org/rtos-run-time-stats.html) since the target booted. + * pulTotalRunTime can be set to NULL to omit the total run time information. + * + * @return The number of TaskStatus_t structures that were populated by + * uxTaskGetSystemState(). This should equal the number returned by the + * uxTaskGetNumberOfTasks() API function, but will be zero if the value passed + * in the uxArraySize parameter was too small. + * + * Example usage: ++ // This example demonstrates how a human readable table of run time stats + // information is generated from raw data provided by uxTaskGetSystemState(). + // The human readable table is written to pcWriteBuffer + void vTaskGetRunTimeStats( char *pcWriteBuffer ) + { + TaskStatus_t *pxTaskStatusArray; + volatile UBaseType_t uxArraySize, x; + uint32_t ulTotalRunTime, ulStatsAsPercentage; + + // Make sure the write buffer does not contain a string. + *pcWriteBuffer = 0x00; + + // Take a snapshot of the number of tasks in case it changes while this + // function is executing. + uxArraySize = uxTaskGetNumberOfTasks(); + + // Allocate a TaskStatus_t structure for each task. An array could be + // allocated statically at compile time. + pxTaskStatusArray = pvPortMalloc( uxArraySize * sizeof( TaskStatus_t ) ); + + if( pxTaskStatusArray != NULL ) + { + // Generate raw status information about each task. + uxArraySize = uxTaskGetSystemState( pxTaskStatusArray, uxArraySize, &ulTotalRunTime ); + + // For percentage calculations. + ulTotalRunTime /= 100UL; + + // Avoid divide by zero errors. + if( ulTotalRunTime > 0 ) + { + // For each populated position in the pxTaskStatusArray array, + // format the raw data as human readable ASCII data + for( x = 0; x < uxArraySize; x++ ) + { + // What percentage of the total run time has the task used? + // This will always be rounded down to the nearest integer. + // ulTotalRunTimeDiv100 has already been divided by 100. + ulStatsAsPercentage = pxTaskStatusArray[ x ].ulRunTimeCounter / ulTotalRunTime; + + if( ulStatsAsPercentage > 0UL ) + { + sprintf( pcWriteBuffer, "%s\t\t%lu\t\t%lu%%\r\n", pxTaskStatusArray[ x ].pcTaskName, pxTaskStatusArray[ x ].ulRunTimeCounter, ulStatsAsPercentage ); + } + else + { + // If the percentage is zero here then the task has + // consumed less than 1% of the total run time. + sprintf( pcWriteBuffer, "%s\t\t%lu\t\t<1%%\r\n", pxTaskStatusArray[ x ].pcTaskName, pxTaskStatusArray[ x ].ulRunTimeCounter ); + } + + pcWriteBuffer += strlen( ( char * ) pcWriteBuffer ); + } + } + + // The array is no longer needed, free the memory it consumes. + vPortFree( pxTaskStatusArray ); + } + } ++ */ +UBaseType_t uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, const UBaseType_t uxArraySize, uint32_t * const pulTotalRunTime ) PRIVILEGED_FUNCTION; + +/** + * task. h + *void vTaskList( char *pcWriteBuffer );+ * + * configUSE_TRACE_FACILITY and configUSE_STATS_FORMATTING_FUNCTIONS must + * both be defined as 1 for this function to be available. See the + * configuration section of the FreeRTOS.org website for more information. + * + * NOTE 1: This function will disable interrupts for its duration. It is + * not intended for normal application runtime use but as a debug aid. + * + * Lists all the current tasks, along with their current state and stack + * usage high water mark. + * + * Tasks are reported as blocked ('B'), ready ('R'), deleted ('D') or + * suspended ('S'). + * + * PLEASE NOTE: + * + * This function is provided for convenience only, and is used by many of the + * demo applications. Do not consider it to be part of the scheduler. + * + * vTaskList() calls uxTaskGetSystemState(), then formats part of the + * uxTaskGetSystemState() output into a human readable table that displays task + * names, states and stack usage. + * + * vTaskList() has a dependency on the sprintf() C library function that might + * bloat the code size, use a lot of stack, and provide different results on + * different platforms. An alternative, tiny, third party, and limited + * functionality implementation of sprintf() is provided in many of the + * FreeRTOS/Demo sub-directories in a file called printf-stdarg.c (note + * printf-stdarg.c does not provide a full snprintf() implementation!). + * + * It is recommended that production systems call uxTaskGetSystemState() + * directly to get access to raw stats data, rather than indirectly through a + * call to vTaskList(). + * + * @param pcWriteBuffer A buffer into which the above mentioned details + * will be written, in ASCII form. This buffer is assumed to be large + * enough to contain the generated report. Approximately 40 bytes per + * task should be sufficient. + * + * \defgroup vTaskList vTaskList + * \ingroup TaskUtils + */ +void vTaskList( char * pcWriteBuffer ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ + +/** + * task. h + *void vTaskGetRunTimeStats( char *pcWriteBuffer );+ * + * configGENERATE_RUN_TIME_STATS and configUSE_STATS_FORMATTING_FUNCTIONS + * must both be defined as 1 for this function to be available. The application + * must also then provide definitions for + * portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() and portGET_RUN_TIME_COUNTER_VALUE() + * to configure a peripheral timer/counter and return the timers current count + * value respectively. The counter should be at least 10 times the frequency of + * the tick count. + * + * NOTE 1: This function will disable interrupts for its duration. It is + * not intended for normal application runtime use but as a debug aid. + * + * Setting configGENERATE_RUN_TIME_STATS to 1 will result in a total + * accumulated execution time being stored for each task. The resolution + * of the accumulated time value depends on the frequency of the timer + * configured by the portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() macro. + * Calling vTaskGetRunTimeStats() writes the total execution time of each + * task into a buffer, both as an absolute count value and as a percentage + * of the total system execution time. + * + * NOTE 2: + * + * This function is provided for convenience only, and is used by many of the + * demo applications. Do not consider it to be part of the scheduler. + * + * vTaskGetRunTimeStats() calls uxTaskGetSystemState(), then formats part of the + * uxTaskGetSystemState() output into a human readable table that displays the + * amount of time each task has spent in the Running state in both absolute and + * percentage terms. + * + * vTaskGetRunTimeStats() has a dependency on the sprintf() C library function + * that might bloat the code size, use a lot of stack, and provide different + * results on different platforms. An alternative, tiny, third party, and + * limited functionality implementation of sprintf() is provided in many of the + * FreeRTOS/Demo sub-directories in a file called printf-stdarg.c (note + * printf-stdarg.c does not provide a full snprintf() implementation!). + * + * It is recommended that production systems call uxTaskGetSystemState() directly + * to get access to raw stats data, rather than indirectly through a call to + * vTaskGetRunTimeStats(). + * + * @param pcWriteBuffer A buffer into which the execution times will be + * written, in ASCII form. This buffer is assumed to be large enough to + * contain the generated report. Approximately 40 bytes per task should + * be sufficient. + * + * \defgroup vTaskGetRunTimeStats vTaskGetRunTimeStats + * \ingroup TaskUtils + */ +void vTaskGetRunTimeStats( char *pcWriteBuffer ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ + +/** + * task. h + *BaseType_t xTaskNotify( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction );+ * + * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for this + * function to be available. + * + * When configUSE_TASK_NOTIFICATIONS is set to one each task has its own private + * "notification value", which is a 32-bit unsigned integer (uint32_t). + * + * Events can be sent to a task using an intermediary object. Examples of such + * objects are queues, semaphores, mutexes and event groups. Task notifications + * are a method of sending an event directly to a task without the need for such + * an intermediary object. + * + * A notification sent to a task can optionally perform an action, such as + * update, overwrite or increment the task's notification value. In that way + * task notifications can be used to send data to a task, or be used as light + * weight and fast binary or counting semaphores. + * + * A notification sent to a task will remain pending until it is cleared by the + * task calling xTaskNotifyWait() or ulTaskNotifyTake(). If the task was + * already in the Blocked state to wait for a notification when the notification + * arrives then the task will automatically be removed from the Blocked state + * (unblocked) and the notification cleared. + * + * A task can use xTaskNotifyWait() to [optionally] block to wait for a + * notification to be pending, or ulTaskNotifyTake() to [optionally] block + * to wait for its notification value to have a non-zero value. The task does + * not consume any CPU time while it is in the Blocked state. + * + * See http://www.FreeRTOS.org/RTOS-task-notifications.html for details. + * + * @param xTaskToNotify The handle of the task being notified. The handle to a + * task can be returned from the xTaskCreate() API function used to create the + * task, and the handle of the currently running task can be obtained by calling + * xTaskGetCurrentTaskHandle(). + * + * @param ulValue Data that can be sent with the notification. How the data is + * used depends on the value of the eAction parameter. + * + * @param eAction Specifies how the notification updates the task's notification + * value, if at all. Valid values for eAction are as follows: + * + * eSetBits - + * The task's notification value is bitwise ORed with ulValue. xTaskNofify() + * always returns pdPASS in this case. + * + * eIncrement - + * The task's notification value is incremented. ulValue is not used and + * xTaskNotify() always returns pdPASS in this case. + * + * eSetValueWithOverwrite - + * The task's notification value is set to the value of ulValue, even if the + * task being notified had not yet processed the previous notification (the + * task already had a notification pending). xTaskNotify() always returns + * pdPASS in this case. + * + * eSetValueWithoutOverwrite - + * If the task being notified did not already have a notification pending then + * the task's notification value is set to ulValue and xTaskNotify() will + * return pdPASS. If the task being notified already had a notification + * pending then no action is performed and pdFAIL is returned. + * + * eNoAction - + * The task receives a notification without its notification value being + * updated. ulValue is not used and xTaskNotify() always returns pdPASS in + * this case. + * + * pulPreviousNotificationValue - + * Can be used to pass out the subject task's notification value before any + * bits are modified by the notify function. + * + * @return Dependent on the value of eAction. See the description of the + * eAction parameter. + * + * \defgroup xTaskNotify xTaskNotify + * \ingroup TaskNotifications + */ +BaseType_t xTaskGenericNotify( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue ) PRIVILEGED_FUNCTION; +#define xTaskNotify( xTaskToNotify, ulValue, eAction ) xTaskGenericNotify( ( xTaskToNotify ), ( ulValue ), ( eAction ), NULL ) +#define xTaskNotifyAndQuery( xTaskToNotify, ulValue, eAction, pulPreviousNotifyValue ) xTaskGenericNotify( ( xTaskToNotify ), ( ulValue ), ( eAction ), ( pulPreviousNotifyValue ) ) + +/** + * task. h + *BaseType_t xTaskNotifyFromISR( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, BaseType_t *pxHigherPriorityTaskWoken );+ * + * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for this + * function to be available. + * + * When configUSE_TASK_NOTIFICATIONS is set to one each task has its own private + * "notification value", which is a 32-bit unsigned integer (uint32_t). + * + * A version of xTaskNotify() that can be used from an interrupt service routine + * (ISR). + * + * Events can be sent to a task using an intermediary object. Examples of such + * objects are queues, semaphores, mutexes and event groups. Task notifications + * are a method of sending an event directly to a task without the need for such + * an intermediary object. + * + * A notification sent to a task can optionally perform an action, such as + * update, overwrite or increment the task's notification value. In that way + * task notifications can be used to send data to a task, or be used as light + * weight and fast binary or counting semaphores. + * + * A notification sent to a task will remain pending until it is cleared by the + * task calling xTaskNotifyWait() or ulTaskNotifyTake(). If the task was + * already in the Blocked state to wait for a notification when the notification + * arrives then the task will automatically be removed from the Blocked state + * (unblocked) and the notification cleared. + * + * A task can use xTaskNotifyWait() to [optionally] block to wait for a + * notification to be pending, or ulTaskNotifyTake() to [optionally] block + * to wait for its notification value to have a non-zero value. The task does + * not consume any CPU time while it is in the Blocked state. + * + * See http://www.FreeRTOS.org/RTOS-task-notifications.html for details. + * + * @param xTaskToNotify The handle of the task being notified. The handle to a + * task can be returned from the xTaskCreate() API function used to create the + * task, and the handle of the currently running task can be obtained by calling + * xTaskGetCurrentTaskHandle(). + * + * @param ulValue Data that can be sent with the notification. How the data is + * used depends on the value of the eAction parameter. + * + * @param eAction Specifies how the notification updates the task's notification + * value, if at all. Valid values for eAction are as follows: + * + * eSetBits - + * The task's notification value is bitwise ORed with ulValue. xTaskNofify() + * always returns pdPASS in this case. + * + * eIncrement - + * The task's notification value is incremented. ulValue is not used and + * xTaskNotify() always returns pdPASS in this case. + * + * eSetValueWithOverwrite - + * The task's notification value is set to the value of ulValue, even if the + * task being notified had not yet processed the previous notification (the + * task already had a notification pending). xTaskNotify() always returns + * pdPASS in this case. + * + * eSetValueWithoutOverwrite - + * If the task being notified did not already have a notification pending then + * the task's notification value is set to ulValue and xTaskNotify() will + * return pdPASS. If the task being notified already had a notification + * pending then no action is performed and pdFAIL is returned. + * + * eNoAction - + * The task receives a notification without its notification value being + * updated. ulValue is not used and xTaskNotify() always returns pdPASS in + * this case. + * + * @param pxHigherPriorityTaskWoken xTaskNotifyFromISR() will set + * *pxHigherPriorityTaskWoken to pdTRUE if sending the notification caused the + * task to which the notification was sent to leave the Blocked state, and the + * unblocked task has a priority higher than the currently running task. If + * xTaskNotifyFromISR() sets this value to pdTRUE then a context switch should + * be requested before the interrupt is exited. How a context switch is + * requested from an ISR is dependent on the port - see the documentation page + * for the port in use. + * + * @return Dependent on the value of eAction. See the description of the + * eAction parameter. + * + * \defgroup xTaskNotify xTaskNotify + * \ingroup TaskNotifications + */ +BaseType_t xTaskGenericNotifyFromISR( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue, BaseType_t *pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION; +#define xTaskNotifyFromISR( xTaskToNotify, ulValue, eAction, pxHigherPriorityTaskWoken ) xTaskGenericNotifyFromISR( ( xTaskToNotify ), ( ulValue ), ( eAction ), NULL, ( pxHigherPriorityTaskWoken ) ) +#define xTaskNotifyAndQueryFromISR( xTaskToNotify, ulValue, eAction, pulPreviousNotificationValue, pxHigherPriorityTaskWoken ) xTaskGenericNotifyFromISR( ( xTaskToNotify ), ( ulValue ), ( eAction ), ( pulPreviousNotificationValue ), ( pxHigherPriorityTaskWoken ) ) + +/** + * task. h + *BaseType_t xTaskNotifyWait( uint32_t ulBitsToClearOnEntry, uint32_t ulBitsToClearOnExit, uint32_t *pulNotificationValue, TickType_t xTicksToWait );+ * + * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for this + * function to be available. + * + * When configUSE_TASK_NOTIFICATIONS is set to one each task has its own private + * "notification value", which is a 32-bit unsigned integer (uint32_t). + * + * Events can be sent to a task using an intermediary object. Examples of such + * objects are queues, semaphores, mutexes and event groups. Task notifications + * are a method of sending an event directly to a task without the need for such + * an intermediary object. + * + * A notification sent to a task can optionally perform an action, such as + * update, overwrite or increment the task's notification value. In that way + * task notifications can be used to send data to a task, or be used as light + * weight and fast binary or counting semaphores. + * + * A notification sent to a task will remain pending until it is cleared by the + * task calling xTaskNotifyWait() or ulTaskNotifyTake(). If the task was + * already in the Blocked state to wait for a notification when the notification + * arrives then the task will automatically be removed from the Blocked state + * (unblocked) and the notification cleared. + * + * A task can use xTaskNotifyWait() to [optionally] block to wait for a + * notification to be pending, or ulTaskNotifyTake() to [optionally] block + * to wait for its notification value to have a non-zero value. The task does + * not consume any CPU time while it is in the Blocked state. + * + * See http://www.FreeRTOS.org/RTOS-task-notifications.html for details. + * + * @param ulBitsToClearOnEntry Bits that are set in ulBitsToClearOnEntry value + * will be cleared in the calling task's notification value before the task + * checks to see if any notifications are pending, and optionally blocks if no + * notifications are pending. Setting ulBitsToClearOnEntry to ULONG_MAX (if + * limits.h is included) or 0xffffffffUL (if limits.h is not included) will have + * the effect of resetting the task's notification value to 0. Setting + * ulBitsToClearOnEntry to 0 will leave the task's notification value unchanged. + * + * @param ulBitsToClearOnExit If a notification is pending or received before + * the calling task exits the xTaskNotifyWait() function then the task's + * notification value (see the xTaskNotify() API function) is passed out using + * the pulNotificationValue parameter. Then any bits that are set in + * ulBitsToClearOnExit will be cleared in the task's notification value (note + * *pulNotificationValue is set before any bits are cleared). Setting + * ulBitsToClearOnExit to ULONG_MAX (if limits.h is included) or 0xffffffffUL + * (if limits.h is not included) will have the effect of resetting the task's + * notification value to 0 before the function exits. Setting + * ulBitsToClearOnExit to 0 will leave the task's notification value unchanged + * when the function exits (in which case the value passed out in + * pulNotificationValue will match the task's notification value). + * + * @param pulNotificationValue Used to pass the task's notification value out + * of the function. Note the value passed out will not be effected by the + * clearing of any bits caused by ulBitsToClearOnExit being non-zero. + * + * @param xTicksToWait The maximum amount of time that the task should wait in + * the Blocked state for a notification to be received, should a notification + * not already be pending when xTaskNotifyWait() was called. The task + * will not consume any processing time while it is in the Blocked state. This + * is specified in kernel ticks, the macro pdMS_TO_TICSK( value_in_ms ) can be + * used to convert a time specified in milliseconds to a time specified in + * ticks. + * + * @return If a notification was received (including notifications that were + * already pending when xTaskNotifyWait was called) then pdPASS is + * returned. Otherwise pdFAIL is returned. + * + * \defgroup xTaskNotifyWait xTaskNotifyWait + * \ingroup TaskNotifications + */ +BaseType_t xTaskNotifyWait( uint32_t ulBitsToClearOnEntry, uint32_t ulBitsToClearOnExit, uint32_t *pulNotificationValue, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION; + +/** + * task. h + *BaseType_t xTaskNotifyGive( TaskHandle_t xTaskToNotify );+ * + * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for this macro + * to be available. + * + * When configUSE_TASK_NOTIFICATIONS is set to one each task has its own private + * "notification value", which is a 32-bit unsigned integer (uint32_t). + * + * Events can be sent to a task using an intermediary object. Examples of such + * objects are queues, semaphores, mutexes and event groups. Task notifications + * are a method of sending an event directly to a task without the need for such + * an intermediary object. + * + * A notification sent to a task can optionally perform an action, such as + * update, overwrite or increment the task's notification value. In that way + * task notifications can be used to send data to a task, or be used as light + * weight and fast binary or counting semaphores. + * + * xTaskNotifyGive() is a helper macro intended for use when task notifications + * are used as light weight and faster binary or counting semaphore equivalents. + * Actual FreeRTOS semaphores are given using the xSemaphoreGive() API function, + * the equivalent action that instead uses a task notification is + * xTaskNotifyGive(). + * + * When task notifications are being used as a binary or counting semaphore + * equivalent then the task being notified should wait for the notification + * using the ulTaskNotificationTake() API function rather than the + * xTaskNotifyWait() API function. + * + * See http://www.FreeRTOS.org/RTOS-task-notifications.html for more details. + * + * @param xTaskToNotify The handle of the task being notified. The handle to a + * task can be returned from the xTaskCreate() API function used to create the + * task, and the handle of the currently running task can be obtained by calling + * xTaskGetCurrentTaskHandle(). + * + * @return xTaskNotifyGive() is a macro that calls xTaskNotify() with the + * eAction parameter set to eIncrement - so pdPASS is always returned. + * + * \defgroup xTaskNotifyGive xTaskNotifyGive + * \ingroup TaskNotifications + */ +#define xTaskNotifyGive( xTaskToNotify ) xTaskGenericNotify( ( xTaskToNotify ), ( 0 ), eIncrement, NULL ) + +/** + * task. h + *void vTaskNotifyGiveFromISR( TaskHandle_t xTaskHandle, BaseType_t *pxHigherPriorityTaskWoken ); + * + * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for this macro + * to be available. + * + * When configUSE_TASK_NOTIFICATIONS is set to one each task has its own private + * "notification value", which is a 32-bit unsigned integer (uint32_t). + * + * A version of xTaskNotifyGive() that can be called from an interrupt service + * routine (ISR). + * + * Events can be sent to a task using an intermediary object. Examples of such + * objects are queues, semaphores, mutexes and event groups. Task notifications + * are a method of sending an event directly to a task without the need for such + * an intermediary object. + * + * A notification sent to a task can optionally perform an action, such as + * update, overwrite or increment the task's notification value. In that way + * task notifications can be used to send data to a task, or be used as light + * weight and fast binary or counting semaphores. + * + * vTaskNotifyGiveFromISR() is intended for use when task notifications are + * used as light weight and faster binary or counting semaphore equivalents. + * Actual FreeRTOS semaphores are given from an ISR using the + * xSemaphoreGiveFromISR() API function, the equivalent action that instead uses + * a task notification is vTaskNotifyGiveFromISR(). + * + * When task notifications are being used as a binary or counting semaphore + * equivalent then the task being notified should wait for the notification + * using the ulTaskNotificationTake() API function rather than the + * xTaskNotifyWait() API function. + * + * See http://www.FreeRTOS.org/RTOS-task-notifications.html for more details. + * + * @param xTaskToNotify The handle of the task being notified. The handle to a + * task can be returned from the xTaskCreate() API function used to create the + * task, and the handle of the currently running task can be obtained by calling + * xTaskGetCurrentTaskHandle(). + * + * @param pxHigherPriorityTaskWoken vTaskNotifyGiveFromISR() will set + * *pxHigherPriorityTaskWoken to pdTRUE if sending the notification caused the + * task to which the notification was sent to leave the Blocked state, and the + * unblocked task has a priority higher than the currently running task. If + * vTaskNotifyGiveFromISR() sets this value to pdTRUE then a context switch + * should be requested before the interrupt is exited. How a context switch is + * requested from an ISR is dependent on the port - see the documentation page + * for the port in use. + * + * \defgroup xTaskNotifyWait xTaskNotifyWait + * \ingroup TaskNotifications + */ +void vTaskNotifyGiveFromISR( TaskHandle_t xTaskToNotify, BaseType_t *pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION; + +/** + * task. h + *uint32_t ulTaskNotifyTake( BaseType_t xClearCountOnExit, TickType_t xTicksToWait );+ * + * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for this + * function to be available. + * + * When configUSE_TASK_NOTIFICATIONS is set to one each task has its own private + * "notification value", which is a 32-bit unsigned integer (uint32_t). + * + * Events can be sent to a task using an intermediary object. Examples of such + * objects are queues, semaphores, mutexes and event groups. Task notifications + * are a method of sending an event directly to a task without the need for such + * an intermediary object. + * + * A notification sent to a task can optionally perform an action, such as + * update, overwrite or increment the task's notification value. In that way + * task notifications can be used to send data to a task, or be used as light + * weight and fast binary or counting semaphores. + * + * ulTaskNotifyTake() is intended for use when a task notification is used as a + * faster and lighter weight binary or counting semaphore alternative. Actual + * FreeRTOS semaphores are taken using the xSemaphoreTake() API function, the + * equivalent action that instead uses a task notification is + * ulTaskNotifyTake(). + * + * When a task is using its notification value as a binary or counting semaphore + * other tasks should send notifications to it using the xTaskNotifyGive() + * macro, or xTaskNotify() function with the eAction parameter set to + * eIncrement. + * + * ulTaskNotifyTake() can either clear the task's notification value to + * zero on exit, in which case the notification value acts like a binary + * semaphore, or decrement the task's notification value on exit, in which case + * the notification value acts like a counting semaphore. + * + * A task can use ulTaskNotifyTake() to [optionally] block to wait for a + * the task's notification value to be non-zero. The task does not consume any + * CPU time while it is in the Blocked state. + * + * Where as xTaskNotifyWait() will return when a notification is pending, + * ulTaskNotifyTake() will return when the task's notification value is + * not zero. + * + * See http://www.FreeRTOS.org/RTOS-task-notifications.html for details. + * + * @param xClearCountOnExit if xClearCountOnExit is pdFALSE then the task's + * notification value is decremented when the function exits. In this way the + * notification value acts like a counting semaphore. If xClearCountOnExit is + * not pdFALSE then the task's notification value is cleared to zero when the + * function exits. In this way the notification value acts like a binary + * semaphore. + * + * @param xTicksToWait The maximum amount of time that the task should wait in + * the Blocked state for the task's notification value to be greater than zero, + * should the count not already be greater than zero when + * ulTaskNotifyTake() was called. The task will not consume any processing + * time while it is in the Blocked state. This is specified in kernel ticks, + * the macro pdMS_TO_TICSK( value_in_ms ) can be used to convert a time + * specified in milliseconds to a time specified in ticks. + * + * @return The task's notification count before it is either cleared to zero or + * decremented (see the xClearCountOnExit parameter). + * + * \defgroup ulTaskNotifyTake ulTaskNotifyTake + * \ingroup TaskNotifications + */ +uint32_t ulTaskNotifyTake( BaseType_t xClearCountOnExit, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION; + +/** + * task. h + *BaseType_t xTaskNotifyStateClear( TaskHandle_t xTask );+ * + * If the notification state of the task referenced by the handle xTask is + * eNotified, then set the task's notification state to eNotWaitingNotification. + * The task's notification value is not altered. Set xTask to NULL to clear the + * notification state of the calling task. + * + * @return pdTRUE if the task's notification state was set to + * eNotWaitingNotification, otherwise pdFALSE. + * \defgroup xTaskNotifyStateClear xTaskNotifyStateClear + * \ingroup TaskNotifications + */ +BaseType_t xTaskNotifyStateClear( TaskHandle_t xTask ); + +/*----------------------------------------------------------- + * SCHEDULER INTERNALS AVAILABLE FOR PORTING PURPOSES + *----------------------------------------------------------*/ + +/* + * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE. IT IS ONLY + * INTENDED FOR USE WHEN IMPLEMENTING A PORT OF THE SCHEDULER AND IS + * AN INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER. + * + * Called from the real time kernel tick (either preemptive or cooperative), + * this increments the tick count and checks if any tasks that are blocked + * for a finite period required removing from a blocked list and placing on + * a ready list. If a non-zero value is returned then a context switch is + * required because either: + * + A task was removed from a blocked list because its timeout had expired, + * or + * + Time slicing is in use and there is a task of equal priority to the + * currently running task. + */ +BaseType_t xTaskIncrementTick( void ) PRIVILEGED_FUNCTION; + +/* + * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE. IT IS AN + * INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER. + * + * THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED. + * + * Removes the calling task from the ready list and places it both + * on the list of tasks waiting for a particular event, and the + * list of delayed tasks. The task will be removed from both lists + * and replaced on the ready list should either the event occur (and + * there be no higher priority tasks waiting on the same event) or + * the delay period expires. + * + * The 'unordered' version replaces the event list item value with the + * xItemValue value, and inserts the list item at the end of the list. + * + * The 'ordered' version uses the existing event list item value (which is the + * owning tasks priority) to insert the list item into the event list is task + * priority order. + * + * @param pxEventList The list containing tasks that are blocked waiting + * for the event to occur. + * + * @param xItemValue The item value to use for the event list item when the + * event list is not ordered by task priority. + * + * @param xTicksToWait The maximum amount of time that the task should wait + * for the event to occur. This is specified in kernel ticks,the constant + * portTICK_PERIOD_MS can be used to convert kernel ticks into a real time + * period. + */ +void vTaskPlaceOnEventList( List_t * const pxEventList, const TickType_t xTicksToWait ) PRIVILEGED_FUNCTION; +void vTaskPlaceOnUnorderedEventList( List_t * pxEventList, const TickType_t xItemValue, const TickType_t xTicksToWait ) PRIVILEGED_FUNCTION; + +/* + * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE. IT IS AN + * INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER. + * + * THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED. + * + * This function performs nearly the same function as vTaskPlaceOnEventList(). + * The difference being that this function does not permit tasks to block + * indefinitely, whereas vTaskPlaceOnEventList() does. + * + */ +void vTaskPlaceOnEventListRestricted( List_t * const pxEventList, TickType_t xTicksToWait, const BaseType_t xWaitIndefinitely ) PRIVILEGED_FUNCTION; + +/* + * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE. IT IS AN + * INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER. + * + * THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED. + * + * Removes a task from both the specified event list and the list of blocked + * tasks, and places it on a ready queue. + * + * xTaskRemoveFromEventList()/vTaskRemoveFromUnorderedEventList() will be called + * if either an event occurs to unblock a task, or the block timeout period + * expires. + * + * xTaskRemoveFromEventList() is used when the event list is in task priority + * order. It removes the list item from the head of the event list as that will + * have the highest priority owning task of all the tasks on the event list. + * vTaskRemoveFromUnorderedEventList() is used when the event list is not + * ordered and the event list items hold something other than the owning tasks + * priority. In this case the event list item value is updated to the value + * passed in the xItemValue parameter. + * + * @return pdTRUE if the task being removed has a higher priority than the task + * making the call, otherwise pdFALSE. + */ +BaseType_t xTaskRemoveFromEventList( const List_t * const pxEventList ) PRIVILEGED_FUNCTION; +void vTaskRemoveFromUnorderedEventList( ListItem_t * pxEventListItem, const TickType_t xItemValue ) PRIVILEGED_FUNCTION; + +/* + * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE. IT IS ONLY + * INTENDED FOR USE WHEN IMPLEMENTING A PORT OF THE SCHEDULER AND IS + * AN INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER. + * + * Sets the pointer to the current TCB to the TCB of the highest priority task + * that is ready to run. + */ +void vTaskSwitchContext( void ) PRIVILEGED_FUNCTION; + +/* + * THESE FUNCTIONS MUST NOT BE USED FROM APPLICATION CODE. THEY ARE USED BY + * THE EVENT BITS MODULE. + */ +TickType_t uxTaskResetEventItemValue( void ) PRIVILEGED_FUNCTION; + +/* + * Return the handle of the calling task. + */ +TaskHandle_t xTaskGetCurrentTaskHandle( void ) PRIVILEGED_FUNCTION; + +/* + * Capture the current time status for future reference. + */ +void vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) PRIVILEGED_FUNCTION; + +/* + * Compare the time status now with that previously captured to see if the + * timeout has expired. + */ +BaseType_t xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, TickType_t * const pxTicksToWait ) PRIVILEGED_FUNCTION; + +/* + * Shortcut used by the queue implementation to prevent unnecessary call to + * taskYIELD(); + */ +void vTaskMissedYield( void ) PRIVILEGED_FUNCTION; + +/* + * Returns the scheduler state as taskSCHEDULER_RUNNING, + * taskSCHEDULER_NOT_STARTED or taskSCHEDULER_SUSPENDED. + */ +BaseType_t xTaskGetSchedulerState( void ) PRIVILEGED_FUNCTION; + +/* + * Raises the priority of the mutex holder to that of the calling task should + * the mutex holder have a priority less than the calling task. + */ +BaseType_t xTaskPriorityInherit( TaskHandle_t const pxMutexHolder ) PRIVILEGED_FUNCTION; + +/* + * Set the priority of a task back to its proper priority in the case that it + * inherited a higher priority while it was holding a semaphore. + */ +BaseType_t xTaskPriorityDisinherit( TaskHandle_t const pxMutexHolder ) PRIVILEGED_FUNCTION; + +/* + * If a higher priority task attempting to obtain a mutex caused a lower + * priority task to inherit the higher priority task's priority - but the higher + * priority task then timed out without obtaining the mutex, then the lower + * priority task will disinherit the priority again - but only down as far as + * the highest priority task that is still waiting for the mutex (if there were + * more than one task waiting for the mutex). + */ +void vTaskPriorityDisinheritAfterTimeout( TaskHandle_t const pxMutexHolder, UBaseType_t uxHighestPriorityWaitingTask ) PRIVILEGED_FUNCTION; + +/* + * Get the uxTCBNumber assigned to the task referenced by the xTask parameter. + */ +UBaseType_t uxTaskGetTaskNumber( TaskHandle_t xTask ) PRIVILEGED_FUNCTION; + +/* + * Set the uxTaskNumber of the task referenced by the xTask parameter to + * uxHandle. + */ +void vTaskSetTaskNumber( TaskHandle_t xTask, const UBaseType_t uxHandle ) PRIVILEGED_FUNCTION; + +/* + * Only available when configUSE_TICKLESS_IDLE is set to 1. + * If tickless mode is being used, or a low power mode is implemented, then + * the tick interrupt will not execute during idle periods. When this is the + * case, the tick count value maintained by the scheduler needs to be kept up + * to date with the actual execution time by being skipped forward by a time + * equal to the idle period. + */ +void vTaskStepTick( const TickType_t xTicksToJump ) PRIVILEGED_FUNCTION; + +/* + * Only avilable when configUSE_TICKLESS_IDLE is set to 1. + * Provided for use within portSUPPRESS_TICKS_AND_SLEEP() to allow the port + * specific sleep function to determine if it is ok to proceed with the sleep, + * and if it is ok to proceed, if it is ok to sleep indefinitely. + * + * This function is necessary because portSUPPRESS_TICKS_AND_SLEEP() is only + * called with the scheduler suspended, not from within a critical section. It + * is therefore possible for an interrupt to request a context switch between + * portSUPPRESS_TICKS_AND_SLEEP() and the low power mode actually being + * entered. eTaskConfirmSleepModeStatus() should be called from a short + * critical section between the timer being stopped and the sleep mode being + * entered to ensure it is ok to proceed into the sleep mode. + */ +eSleepModeStatus eTaskConfirmSleepModeStatus( void ) PRIVILEGED_FUNCTION; + +/* + * For internal use only. Increment the mutex held count when a mutex is + * taken and return the handle of the task that has taken the mutex. + */ +void *pvTaskIncrementMutexHeldCount( void ) PRIVILEGED_FUNCTION; + +/* + * For internal use only. Same as vTaskSetTimeOutState(), but without a critial + * section. + */ +void vTaskInternalSetTimeOutState( TimeOut_t * const pxTimeOut ) PRIVILEGED_FUNCTION; + + +#ifdef __cplusplus +} +#endif +#endif /* INC_TASK_H */ + + + diff --git a/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/include/timers.h b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/include/timers.h new file mode 100644 index 0000000..7995ab9 --- /dev/null +++ b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/include/timers.h @@ -0,0 +1,1277 @@ +/* + * FreeRTOS Kernel V10.0.1 + * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + + +#ifndef TIMERS_H +#define TIMERS_H + +#ifndef INC_FREERTOS_H + #error "include FreeRTOS.h must appear in source files before include timers.h" +#endif + +/*lint -save -e537 This headers are only multiply included if the application code +happens to also be including task.h. */ +#include "task.h" +/*lint -restore */ + +#ifdef __cplusplus +extern "C" { +#endif + +/*----------------------------------------------------------- + * MACROS AND DEFINITIONS + *----------------------------------------------------------*/ + +/* IDs for commands that can be sent/received on the timer queue. These are to +be used solely through the macros that make up the public software timer API, +as defined below. The commands that are sent from interrupts must use the +highest numbers as tmrFIRST_FROM_ISR_COMMAND is used to determine if the task +or interrupt version of the queue send function should be used. */ +#define tmrCOMMAND_EXECUTE_CALLBACK_FROM_ISR ( ( BaseType_t ) -2 ) +#define tmrCOMMAND_EXECUTE_CALLBACK ( ( BaseType_t ) -1 ) +#define tmrCOMMAND_START_DONT_TRACE ( ( BaseType_t ) 0 ) +#define tmrCOMMAND_START ( ( BaseType_t ) 1 ) +#define tmrCOMMAND_RESET ( ( BaseType_t ) 2 ) +#define tmrCOMMAND_STOP ( ( BaseType_t ) 3 ) +#define tmrCOMMAND_CHANGE_PERIOD ( ( BaseType_t ) 4 ) +#define tmrCOMMAND_DELETE ( ( BaseType_t ) 5 ) + +#define tmrFIRST_FROM_ISR_COMMAND ( ( BaseType_t ) 6 ) +#define tmrCOMMAND_START_FROM_ISR ( ( BaseType_t ) 6 ) +#define tmrCOMMAND_RESET_FROM_ISR ( ( BaseType_t ) 7 ) +#define tmrCOMMAND_STOP_FROM_ISR ( ( BaseType_t ) 8 ) +#define tmrCOMMAND_CHANGE_PERIOD_FROM_ISR ( ( BaseType_t ) 9 ) + + +/** + * Type by which software timers are referenced. For example, a call to + * xTimerCreate() returns an TimerHandle_t variable that can then be used to + * reference the subject timer in calls to other software timer API functions + * (for example, xTimerStart(), xTimerReset(), etc.). + */ +typedef void * TimerHandle_t; + +/* + * Defines the prototype to which timer callback functions must conform. + */ +typedef void (*TimerCallbackFunction_t)( TimerHandle_t xTimer ); + +/* + * Defines the prototype to which functions used with the + * xTimerPendFunctionCallFromISR() function must conform. + */ +typedef void (*PendedFunction_t)( void *, uint32_t ); + +/** + * TimerHandle_t xTimerCreate( const char * const pcTimerName, + * TickType_t xTimerPeriodInTicks, + * UBaseType_t uxAutoReload, + * void * pvTimerID, + * TimerCallbackFunction_t pxCallbackFunction ); + * + * Creates a new software timer instance, and returns a handle by which the + * created software timer can be referenced. + * + * Internally, within the FreeRTOS implementation, software timers use a block + * of memory, in which the timer data structure is stored. If a software timer + * is created using xTimerCreate() then the required memory is automatically + * dynamically allocated inside the xTimerCreate() function. (see + * http://www.freertos.org/a00111.html). If a software timer is created using + * xTimerCreateStatic() then the application writer must provide the memory that + * will get used by the software timer. xTimerCreateStatic() therefore allows a + * software timer to be created without using any dynamic memory allocation. + * + * Timers are created in the dormant state. The xTimerStart(), xTimerReset(), + * xTimerStartFromISR(), xTimerResetFromISR(), xTimerChangePeriod() and + * xTimerChangePeriodFromISR() API functions can all be used to transition a + * timer into the active state. + * + * @param pcTimerName A text name that is assigned to the timer. This is done + * purely to assist debugging. The kernel itself only ever references a timer + * by its handle, and never by its name. + * + * @param xTimerPeriodInTicks The timer period. The time is defined in tick + * periods so the constant portTICK_PERIOD_MS can be used to convert a time that + * has been specified in milliseconds. For example, if the timer must expire + * after 100 ticks, then xTimerPeriodInTicks should be set to 100. + * Alternatively, if the timer must expire after 500ms, then xPeriod can be set + * to ( 500 / portTICK_PERIOD_MS ) provided configTICK_RATE_HZ is less than or + * equal to 1000. + * + * @param uxAutoReload If uxAutoReload is set to pdTRUE then the timer will + * expire repeatedly with a frequency set by the xTimerPeriodInTicks parameter. + * If uxAutoReload is set to pdFALSE then the timer will be a one-shot timer and + * enter the dormant state after it expires. + * + * @param pvTimerID An identifier that is assigned to the timer being created. + * Typically this would be used in the timer callback function to identify which + * timer expired when the same callback function is assigned to more than one + * timer. + * + * @param pxCallbackFunction The function to call when the timer expires. + * Callback functions must have the prototype defined by TimerCallbackFunction_t, + * which is "void vCallbackFunction( TimerHandle_t xTimer );". + * + * @return If the timer is successfully created then a handle to the newly + * created timer is returned. If the timer cannot be created (because either + * there is insufficient FreeRTOS heap remaining to allocate the timer + * structures, or the timer period was set to 0) then NULL is returned. + * + * Example usage: + * @verbatim + * #define NUM_TIMERS 5 + * + * // An array to hold handles to the created timers. + * TimerHandle_t xTimers[ NUM_TIMERS ]; + * + * // An array to hold a count of the number of times each timer expires. + * int32_t lExpireCounters[ NUM_TIMERS ] = { 0 }; + * + * // Define a callback function that will be used by multiple timer instances. + * // The callback function does nothing but count the number of times the + * // associated timer expires, and stop the timer once the timer has expired + * // 10 times. + * void vTimerCallback( TimerHandle_t pxTimer ) + * { + * int32_t lArrayIndex; + * const int32_t xMaxExpiryCountBeforeStopping = 10; + * + * // Optionally do something if the pxTimer parameter is NULL. + * configASSERT( pxTimer ); + * + * // Which timer expired? + * lArrayIndex = ( int32_t ) pvTimerGetTimerID( pxTimer ); + * + * // Increment the number of times that pxTimer has expired. + * lExpireCounters[ lArrayIndex ] += 1; + * + * // If the timer has expired 10 times then stop it from running. + * if( lExpireCounters[ lArrayIndex ] == xMaxExpiryCountBeforeStopping ) + * { + * // Do not use a block time if calling a timer API function from a + * // timer callback function, as doing so could cause a deadlock! + * xTimerStop( pxTimer, 0 ); + * } + * } + * + * void main( void ) + * { + * int32_t x; + * + * // Create then start some timers. Starting the timers before the scheduler + * // has been started means the timers will start running immediately that + * // the scheduler starts. + * for( x = 0; x < NUM_TIMERS; x++ ) + * { + * xTimers[ x ] = xTimerCreate( "Timer", // Just a text name, not used by the kernel. + * ( 100 * x ), // The timer period in ticks. + * pdTRUE, // The timers will auto-reload themselves when they expire. + * ( void * ) x, // Assign each timer a unique id equal to its array index. + * vTimerCallback // Each timer calls the same callback when it expires. + * ); + * + * if( xTimers[ x ] == NULL ) + * { + * // The timer was not created. + * } + * else + * { + * // Start the timer. No block time is specified, and even if one was + * // it would be ignored because the scheduler has not yet been + * // started. + * if( xTimerStart( xTimers[ x ], 0 ) != pdPASS ) + * { + * // The timer could not be set into the Active state. + * } + * } + * } + * + * // ... + * // Create tasks here. + * // ... + * + * // Starting the scheduler will start the timers running as they have already + * // been set into the active state. + * vTaskStartScheduler(); + * + * // Should not reach here. + * for( ;; ); + * } + * @endverbatim + */ +#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) + TimerHandle_t xTimerCreate( const char * const pcTimerName, /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ + const TickType_t xTimerPeriodInTicks, + const UBaseType_t uxAutoReload, + void * const pvTimerID, + TimerCallbackFunction_t pxCallbackFunction ) PRIVILEGED_FUNCTION; +#endif + +/** + * TimerHandle_t xTimerCreateStatic(const char * const pcTimerName, + * TickType_t xTimerPeriodInTicks, + * UBaseType_t uxAutoReload, + * void * pvTimerID, + * TimerCallbackFunction_t pxCallbackFunction, + * StaticTimer_t *pxTimerBuffer ); + * + * Creates a new software timer instance, and returns a handle by which the + * created software timer can be referenced. + * + * Internally, within the FreeRTOS implementation, software timers use a block + * of memory, in which the timer data structure is stored. If a software timer + * is created using xTimerCreate() then the required memory is automatically + * dynamically allocated inside the xTimerCreate() function. (see + * http://www.freertos.org/a00111.html). If a software timer is created using + * xTimerCreateStatic() then the application writer must provide the memory that + * will get used by the software timer. xTimerCreateStatic() therefore allows a + * software timer to be created without using any dynamic memory allocation. + * + * Timers are created in the dormant state. The xTimerStart(), xTimerReset(), + * xTimerStartFromISR(), xTimerResetFromISR(), xTimerChangePeriod() and + * xTimerChangePeriodFromISR() API functions can all be used to transition a + * timer into the active state. + * + * @param pcTimerName A text name that is assigned to the timer. This is done + * purely to assist debugging. The kernel itself only ever references a timer + * by its handle, and never by its name. + * + * @param xTimerPeriodInTicks The timer period. The time is defined in tick + * periods so the constant portTICK_PERIOD_MS can be used to convert a time that + * has been specified in milliseconds. For example, if the timer must expire + * after 100 ticks, then xTimerPeriodInTicks should be set to 100. + * Alternatively, if the timer must expire after 500ms, then xPeriod can be set + * to ( 500 / portTICK_PERIOD_MS ) provided configTICK_RATE_HZ is less than or + * equal to 1000. + * + * @param uxAutoReload If uxAutoReload is set to pdTRUE then the timer will + * expire repeatedly with a frequency set by the xTimerPeriodInTicks parameter. + * If uxAutoReload is set to pdFALSE then the timer will be a one-shot timer and + * enter the dormant state after it expires. + * + * @param pvTimerID An identifier that is assigned to the timer being created. + * Typically this would be used in the timer callback function to identify which + * timer expired when the same callback function is assigned to more than one + * timer. + * + * @param pxCallbackFunction The function to call when the timer expires. + * Callback functions must have the prototype defined by TimerCallbackFunction_t, + * which is "void vCallbackFunction( TimerHandle_t xTimer );". + * + * @param pxTimerBuffer Must point to a variable of type StaticTimer_t, which + * will be then be used to hold the software timer's data structures, removing + * the need for the memory to be allocated dynamically. + * + * @return If the timer is created then a handle to the created timer is + * returned. If pxTimerBuffer was NULL then NULL is returned. + * + * Example usage: + * @verbatim + * + * // The buffer used to hold the software timer's data structure. + * static StaticTimer_t xTimerBuffer; + * + * // A variable that will be incremented by the software timer's callback + * // function. + * UBaseType_t uxVariableToIncrement = 0; + * + * // A software timer callback function that increments a variable passed to + * // it when the software timer was created. After the 5th increment the + * // callback function stops the software timer. + * static void prvTimerCallback( TimerHandle_t xExpiredTimer ) + * { + * UBaseType_t *puxVariableToIncrement; + * BaseType_t xReturned; + * + * // Obtain the address of the variable to increment from the timer ID. + * puxVariableToIncrement = ( UBaseType_t * ) pvTimerGetTimerID( xExpiredTimer ); + * + * // Increment the variable to show the timer callback has executed. + * ( *puxVariableToIncrement )++; + * + * // If this callback has executed the required number of times, stop the + * // timer. + * if( *puxVariableToIncrement == 5 ) + * { + * // This is called from a timer callback so must not block. + * xTimerStop( xExpiredTimer, staticDONT_BLOCK ); + * } + * } + * + * + * void main( void ) + * { + * // Create the software time. xTimerCreateStatic() has an extra parameter + * // than the normal xTimerCreate() API function. The parameter is a pointer + * // to the StaticTimer_t structure that will hold the software timer + * // structure. If the parameter is passed as NULL then the structure will be + * // allocated dynamically, just as if xTimerCreate() had been called. + * xTimer = xTimerCreateStatic( "T1", // Text name for the task. Helps debugging only. Not used by FreeRTOS. + * xTimerPeriod, // The period of the timer in ticks. + * pdTRUE, // This is an auto-reload timer. + * ( void * ) &uxVariableToIncrement, // A variable incremented by the software timer's callback function + * prvTimerCallback, // The function to execute when the timer expires. + * &xTimerBuffer ); // The buffer that will hold the software timer structure. + * + * // The scheduler has not started yet so a block time is not used. + * xReturned = xTimerStart( xTimer, 0 ); + * + * // ... + * // Create tasks here. + * // ... + * + * // Starting the scheduler will start the timers running as they have already + * // been set into the active state. + * vTaskStartScheduler(); + * + * // Should not reach here. + * for( ;; ); + * } + * @endverbatim + */ +#if( configSUPPORT_STATIC_ALLOCATION == 1 ) + TimerHandle_t xTimerCreateStatic( const char * const pcTimerName, /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ + const TickType_t xTimerPeriodInTicks, + const UBaseType_t uxAutoReload, + void * const pvTimerID, + TimerCallbackFunction_t pxCallbackFunction, + StaticTimer_t *pxTimerBuffer ) PRIVILEGED_FUNCTION; +#endif /* configSUPPORT_STATIC_ALLOCATION */ + +/** + * void *pvTimerGetTimerID( TimerHandle_t xTimer ); + * + * Returns the ID assigned to the timer. + * + * IDs are assigned to timers using the pvTimerID parameter of the call to + * xTimerCreated() that was used to create the timer, and by calling the + * vTimerSetTimerID() API function. + * + * If the same callback function is assigned to multiple timers then the timer + * ID can be used as time specific (timer local) storage. + * + * @param xTimer The timer being queried. + * + * @return The ID assigned to the timer being queried. + * + * Example usage: + * + * See the xTimerCreate() API function example usage scenario. + */ +void *pvTimerGetTimerID( const TimerHandle_t xTimer ) PRIVILEGED_FUNCTION; + +/** + * void vTimerSetTimerID( TimerHandle_t xTimer, void *pvNewID ); + * + * Sets the ID assigned to the timer. + * + * IDs are assigned to timers using the pvTimerID parameter of the call to + * xTimerCreated() that was used to create the timer. + * + * If the same callback function is assigned to multiple timers then the timer + * ID can be used as time specific (timer local) storage. + * + * @param xTimer The timer being updated. + * + * @param pvNewID The ID to assign to the timer. + * + * Example usage: + * + * See the xTimerCreate() API function example usage scenario. + */ +void vTimerSetTimerID( TimerHandle_t xTimer, void *pvNewID ) PRIVILEGED_FUNCTION; + +/** + * BaseType_t xTimerIsTimerActive( TimerHandle_t xTimer ); + * + * Queries a timer to see if it is active or dormant. + * + * A timer will be dormant if: + * 1) It has been created but not started, or + * 2) It is an expired one-shot timer that has not been restarted. + * + * Timers are created in the dormant state. The xTimerStart(), xTimerReset(), + * xTimerStartFromISR(), xTimerResetFromISR(), xTimerChangePeriod() and + * xTimerChangePeriodFromISR() API functions can all be used to transition a timer into the + * active state. + * + * @param xTimer The timer being queried. + * + * @return pdFALSE will be returned if the timer is dormant. A value other than + * pdFALSE will be returned if the timer is active. + * + * Example usage: + * @verbatim + * // This function assumes xTimer has already been created. + * void vAFunction( TimerHandle_t xTimer ) + * { + * if( xTimerIsTimerActive( xTimer ) != pdFALSE ) // or more simply and equivalently "if( xTimerIsTimerActive( xTimer ) )" + * { + * // xTimer is active, do something. + * } + * else + * { + * // xTimer is not active, do something else. + * } + * } + * @endverbatim + */ +BaseType_t xTimerIsTimerActive( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION; + +/** + * TaskHandle_t xTimerGetTimerDaemonTaskHandle( void ); + * + * Simply returns the handle of the timer service/daemon task. It it not valid + * to call xTimerGetTimerDaemonTaskHandle() before the scheduler has been started. + */ +TaskHandle_t xTimerGetTimerDaemonTaskHandle( void ) PRIVILEGED_FUNCTION; + +/** + * BaseType_t xTimerStart( TimerHandle_t xTimer, TickType_t xTicksToWait ); + * + * Timer functionality is provided by a timer service/daemon task. Many of the + * public FreeRTOS timer API functions send commands to the timer service task + * through a queue called the timer command queue. The timer command queue is + * private to the kernel itself and is not directly accessible to application + * code. The length of the timer command queue is set by the + * configTIMER_QUEUE_LENGTH configuration constant. + * + * xTimerStart() starts a timer that was previously created using the + * xTimerCreate() API function. If the timer had already been started and was + * already in the active state, then xTimerStart() has equivalent functionality + * to the xTimerReset() API function. + * + * Starting a timer ensures the timer is in the active state. If the timer + * is not stopped, deleted, or reset in the mean time, the callback function + * associated with the timer will get called 'n' ticks after xTimerStart() was + * called, where 'n' is the timers defined period. + * + * It is valid to call xTimerStart() before the scheduler has been started, but + * when this is done the timer will not actually start until the scheduler is + * started, and the timers expiry time will be relative to when the scheduler is + * started, not relative to when xTimerStart() was called. + * + * The configUSE_TIMERS configuration constant must be set to 1 for xTimerStart() + * to be available. + * + * @param xTimer The handle of the timer being started/restarted. + * + * @param xTicksToWait Specifies the time, in ticks, that the calling task should + * be held in the Blocked state to wait for the start command to be successfully + * sent to the timer command queue, should the queue already be full when + * xTimerStart() was called. xTicksToWait is ignored if xTimerStart() is called + * before the scheduler is started. + * + * @return pdFAIL will be returned if the start command could not be sent to + * the timer command queue even after xTicksToWait ticks had passed. pdPASS will + * be returned if the command was successfully sent to the timer command queue. + * When the command is actually processed will depend on the priority of the + * timer service/daemon task relative to other tasks in the system, although the + * timers expiry time is relative to when xTimerStart() is actually called. The + * timer service/daemon task priority is set by the configTIMER_TASK_PRIORITY + * configuration constant. + * + * Example usage: + * + * See the xTimerCreate() API function example usage scenario. + * + */ +#define xTimerStart( xTimer, xTicksToWait ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_START, ( xTaskGetTickCount() ), NULL, ( xTicksToWait ) ) + +/** + * BaseType_t xTimerStop( TimerHandle_t xTimer, TickType_t xTicksToWait ); + * + * Timer functionality is provided by a timer service/daemon task. Many of the + * public FreeRTOS timer API functions send commands to the timer service task + * through a queue called the timer command queue. The timer command queue is + * private to the kernel itself and is not directly accessible to application + * code. The length of the timer command queue is set by the + * configTIMER_QUEUE_LENGTH configuration constant. + * + * xTimerStop() stops a timer that was previously started using either of the + * The xTimerStart(), xTimerReset(), xTimerStartFromISR(), xTimerResetFromISR(), + * xTimerChangePeriod() or xTimerChangePeriodFromISR() API functions. + * + * Stopping a timer ensures the timer is not in the active state. + * + * The configUSE_TIMERS configuration constant must be set to 1 for xTimerStop() + * to be available. + * + * @param xTimer The handle of the timer being stopped. + * + * @param xTicksToWait Specifies the time, in ticks, that the calling task should + * be held in the Blocked state to wait for the stop command to be successfully + * sent to the timer command queue, should the queue already be full when + * xTimerStop() was called. xTicksToWait is ignored if xTimerStop() is called + * before the scheduler is started. + * + * @return pdFAIL will be returned if the stop command could not be sent to + * the timer command queue even after xTicksToWait ticks had passed. pdPASS will + * be returned if the command was successfully sent to the timer command queue. + * When the command is actually processed will depend on the priority of the + * timer service/daemon task relative to other tasks in the system. The timer + * service/daemon task priority is set by the configTIMER_TASK_PRIORITY + * configuration constant. + * + * Example usage: + * + * See the xTimerCreate() API function example usage scenario. + * + */ +#define xTimerStop( xTimer, xTicksToWait ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_STOP, 0U, NULL, ( xTicksToWait ) ) + +/** + * BaseType_t xTimerChangePeriod( TimerHandle_t xTimer, + * TickType_t xNewPeriod, + * TickType_t xTicksToWait ); + * + * Timer functionality is provided by a timer service/daemon task. Many of the + * public FreeRTOS timer API functions send commands to the timer service task + * through a queue called the timer command queue. The timer command queue is + * private to the kernel itself and is not directly accessible to application + * code. The length of the timer command queue is set by the + * configTIMER_QUEUE_LENGTH configuration constant. + * + * xTimerChangePeriod() changes the period of a timer that was previously + * created using the xTimerCreate() API function. + * + * xTimerChangePeriod() can be called to change the period of an active or + * dormant state timer. + * + * The configUSE_TIMERS configuration constant must be set to 1 for + * xTimerChangePeriod() to be available. + * + * @param xTimer The handle of the timer that is having its period changed. + * + * @param xNewPeriod The new period for xTimer. Timer periods are specified in + * tick periods, so the constant portTICK_PERIOD_MS can be used to convert a time + * that has been specified in milliseconds. For example, if the timer must + * expire after 100 ticks, then xNewPeriod should be set to 100. Alternatively, + * if the timer must expire after 500ms, then xNewPeriod can be set to + * ( 500 / portTICK_PERIOD_MS ) provided configTICK_RATE_HZ is less than + * or equal to 1000. + * + * @param xTicksToWait Specifies the time, in ticks, that the calling task should + * be held in the Blocked state to wait for the change period command to be + * successfully sent to the timer command queue, should the queue already be + * full when xTimerChangePeriod() was called. xTicksToWait is ignored if + * xTimerChangePeriod() is called before the scheduler is started. + * + * @return pdFAIL will be returned if the change period command could not be + * sent to the timer command queue even after xTicksToWait ticks had passed. + * pdPASS will be returned if the command was successfully sent to the timer + * command queue. When the command is actually processed will depend on the + * priority of the timer service/daemon task relative to other tasks in the + * system. The timer service/daemon task priority is set by the + * configTIMER_TASK_PRIORITY configuration constant. + * + * Example usage: + * @verbatim + * // This function assumes xTimer has already been created. If the timer + * // referenced by xTimer is already active when it is called, then the timer + * // is deleted. If the timer referenced by xTimer is not active when it is + * // called, then the period of the timer is set to 500ms and the timer is + * // started. + * void vAFunction( TimerHandle_t xTimer ) + * { + * if( xTimerIsTimerActive( xTimer ) != pdFALSE ) // or more simply and equivalently "if( xTimerIsTimerActive( xTimer ) )" + * { + * // xTimer is already active - delete it. + * xTimerDelete( xTimer ); + * } + * else + * { + * // xTimer is not active, change its period to 500ms. This will also + * // cause the timer to start. Block for a maximum of 100 ticks if the + * // change period command cannot immediately be sent to the timer + * // command queue. + * if( xTimerChangePeriod( xTimer, 500 / portTICK_PERIOD_MS, 100 ) == pdPASS ) + * { + * // The command was successfully sent. + * } + * else + * { + * // The command could not be sent, even after waiting for 100 ticks + * // to pass. Take appropriate action here. + * } + * } + * } + * @endverbatim + */ + #define xTimerChangePeriod( xTimer, xNewPeriod, xTicksToWait ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_CHANGE_PERIOD, ( xNewPeriod ), NULL, ( xTicksToWait ) ) + +/** + * BaseType_t xTimerDelete( TimerHandle_t xTimer, TickType_t xTicksToWait ); + * + * Timer functionality is provided by a timer service/daemon task. Many of the + * public FreeRTOS timer API functions send commands to the timer service task + * through a queue called the timer command queue. The timer command queue is + * private to the kernel itself and is not directly accessible to application + * code. The length of the timer command queue is set by the + * configTIMER_QUEUE_LENGTH configuration constant. + * + * xTimerDelete() deletes a timer that was previously created using the + * xTimerCreate() API function. + * + * The configUSE_TIMERS configuration constant must be set to 1 for + * xTimerDelete() to be available. + * + * @param xTimer The handle of the timer being deleted. + * + * @param xTicksToWait Specifies the time, in ticks, that the calling task should + * be held in the Blocked state to wait for the delete command to be + * successfully sent to the timer command queue, should the queue already be + * full when xTimerDelete() was called. xTicksToWait is ignored if xTimerDelete() + * is called before the scheduler is started. + * + * @return pdFAIL will be returned if the delete command could not be sent to + * the timer command queue even after xTicksToWait ticks had passed. pdPASS will + * be returned if the command was successfully sent to the timer command queue. + * When the command is actually processed will depend on the priority of the + * timer service/daemon task relative to other tasks in the system. The timer + * service/daemon task priority is set by the configTIMER_TASK_PRIORITY + * configuration constant. + * + * Example usage: + * + * See the xTimerChangePeriod() API function example usage scenario. + */ +#define xTimerDelete( xTimer, xTicksToWait ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_DELETE, 0U, NULL, ( xTicksToWait ) ) + +/** + * BaseType_t xTimerReset( TimerHandle_t xTimer, TickType_t xTicksToWait ); + * + * Timer functionality is provided by a timer service/daemon task. Many of the + * public FreeRTOS timer API functions send commands to the timer service task + * through a queue called the timer command queue. The timer command queue is + * private to the kernel itself and is not directly accessible to application + * code. The length of the timer command queue is set by the + * configTIMER_QUEUE_LENGTH configuration constant. + * + * xTimerReset() re-starts a timer that was previously created using the + * xTimerCreate() API function. If the timer had already been started and was + * already in the active state, then xTimerReset() will cause the timer to + * re-evaluate its expiry time so that it is relative to when xTimerReset() was + * called. If the timer was in the dormant state then xTimerReset() has + * equivalent functionality to the xTimerStart() API function. + * + * Resetting a timer ensures the timer is in the active state. If the timer + * is not stopped, deleted, or reset in the mean time, the callback function + * associated with the timer will get called 'n' ticks after xTimerReset() was + * called, where 'n' is the timers defined period. + * + * It is valid to call xTimerReset() before the scheduler has been started, but + * when this is done the timer will not actually start until the scheduler is + * started, and the timers expiry time will be relative to when the scheduler is + * started, not relative to when xTimerReset() was called. + * + * The configUSE_TIMERS configuration constant must be set to 1 for xTimerReset() + * to be available. + * + * @param xTimer The handle of the timer being reset/started/restarted. + * + * @param xTicksToWait Specifies the time, in ticks, that the calling task should + * be held in the Blocked state to wait for the reset command to be successfully + * sent to the timer command queue, should the queue already be full when + * xTimerReset() was called. xTicksToWait is ignored if xTimerReset() is called + * before the scheduler is started. + * + * @return pdFAIL will be returned if the reset command could not be sent to + * the timer command queue even after xTicksToWait ticks had passed. pdPASS will + * be returned if the command was successfully sent to the timer command queue. + * When the command is actually processed will depend on the priority of the + * timer service/daemon task relative to other tasks in the system, although the + * timers expiry time is relative to when xTimerStart() is actually called. The + * timer service/daemon task priority is set by the configTIMER_TASK_PRIORITY + * configuration constant. + * + * Example usage: + * @verbatim + * // When a key is pressed, an LCD back-light is switched on. If 5 seconds pass + * // without a key being pressed, then the LCD back-light is switched off. In + * // this case, the timer is a one-shot timer. + * + * TimerHandle_t xBacklightTimer = NULL; + * + * // The callback function assigned to the one-shot timer. In this case the + * // parameter is not used. + * void vBacklightTimerCallback( TimerHandle_t pxTimer ) + * { + * // The timer expired, therefore 5 seconds must have passed since a key + * // was pressed. Switch off the LCD back-light. + * vSetBacklightState( BACKLIGHT_OFF ); + * } + * + * // The key press event handler. + * void vKeyPressEventHandler( char cKey ) + * { + * // Ensure the LCD back-light is on, then reset the timer that is + * // responsible for turning the back-light off after 5 seconds of + * // key inactivity. Wait 10 ticks for the command to be successfully sent + * // if it cannot be sent immediately. + * vSetBacklightState( BACKLIGHT_ON ); + * if( xTimerReset( xBacklightTimer, 100 ) != pdPASS ) + * { + * // The reset command was not executed successfully. Take appropriate + * // action here. + * } + * + * // Perform the rest of the key processing here. + * } + * + * void main( void ) + * { + * int32_t x; + * + * // Create then start the one-shot timer that is responsible for turning + * // the back-light off if no keys are pressed within a 5 second period. + * xBacklightTimer = xTimerCreate( "BacklightTimer", // Just a text name, not used by the kernel. + * ( 5000 / portTICK_PERIOD_MS), // The timer period in ticks. + * pdFALSE, // The timer is a one-shot timer. + * 0, // The id is not used by the callback so can take any value. + * vBacklightTimerCallback // The callback function that switches the LCD back-light off. + * ); + * + * if( xBacklightTimer == NULL ) + * { + * // The timer was not created. + * } + * else + * { + * // Start the timer. No block time is specified, and even if one was + * // it would be ignored because the scheduler has not yet been + * // started. + * if( xTimerStart( xBacklightTimer, 0 ) != pdPASS ) + * { + * // The timer could not be set into the Active state. + * } + * } + * + * // ... + * // Create tasks here. + * // ... + * + * // Starting the scheduler will start the timer running as it has already + * // been set into the active state. + * vTaskStartScheduler(); + * + * // Should not reach here. + * for( ;; ); + * } + * @endverbatim + */ +#define xTimerReset( xTimer, xTicksToWait ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_RESET, ( xTaskGetTickCount() ), NULL, ( xTicksToWait ) ) + +/** + * BaseType_t xTimerStartFromISR( TimerHandle_t xTimer, + * BaseType_t *pxHigherPriorityTaskWoken ); + * + * A version of xTimerStart() that can be called from an interrupt service + * routine. + * + * @param xTimer The handle of the timer being started/restarted. + * + * @param pxHigherPriorityTaskWoken The timer service/daemon task spends most + * of its time in the Blocked state, waiting for messages to arrive on the timer + * command queue. Calling xTimerStartFromISR() writes a message to the timer + * command queue, so has the potential to transition the timer service/daemon + * task out of the Blocked state. If calling xTimerStartFromISR() causes the + * timer service/daemon task to leave the Blocked state, and the timer service/ + * daemon task has a priority equal to or greater than the currently executing + * task (the task that was interrupted), then *pxHigherPriorityTaskWoken will + * get set to pdTRUE internally within the xTimerStartFromISR() function. If + * xTimerStartFromISR() sets this value to pdTRUE then a context switch should + * be performed before the interrupt exits. + * + * @return pdFAIL will be returned if the start command could not be sent to + * the timer command queue. pdPASS will be returned if the command was + * successfully sent to the timer command queue. When the command is actually + * processed will depend on the priority of the timer service/daemon task + * relative to other tasks in the system, although the timers expiry time is + * relative to when xTimerStartFromISR() is actually called. The timer + * service/daemon task priority is set by the configTIMER_TASK_PRIORITY + * configuration constant. + * + * Example usage: + * @verbatim + * // This scenario assumes xBacklightTimer has already been created. When a + * // key is pressed, an LCD back-light is switched on. If 5 seconds pass + * // without a key being pressed, then the LCD back-light is switched off. In + * // this case, the timer is a one-shot timer, and unlike the example given for + * // the xTimerReset() function, the key press event handler is an interrupt + * // service routine. + * + * // The callback function assigned to the one-shot timer. In this case the + * // parameter is not used. + * void vBacklightTimerCallback( TimerHandle_t pxTimer ) + * { + * // The timer expired, therefore 5 seconds must have passed since a key + * // was pressed. Switch off the LCD back-light. + * vSetBacklightState( BACKLIGHT_OFF ); + * } + * + * // The key press interrupt service routine. + * void vKeyPressEventInterruptHandler( void ) + * { + * BaseType_t xHigherPriorityTaskWoken = pdFALSE; + * + * // Ensure the LCD back-light is on, then restart the timer that is + * // responsible for turning the back-light off after 5 seconds of + * // key inactivity. This is an interrupt service routine so can only + * // call FreeRTOS API functions that end in "FromISR". + * vSetBacklightState( BACKLIGHT_ON ); + * + * // xTimerStartFromISR() or xTimerResetFromISR() could be called here + * // as both cause the timer to re-calculate its expiry time. + * // xHigherPriorityTaskWoken was initialised to pdFALSE when it was + * // declared (in this function). + * if( xTimerStartFromISR( xBacklightTimer, &xHigherPriorityTaskWoken ) != pdPASS ) + * { + * // The start command was not executed successfully. Take appropriate + * // action here. + * } + * + * // Perform the rest of the key processing here. + * + * // If xHigherPriorityTaskWoken equals pdTRUE, then a context switch + * // should be performed. The syntax required to perform a context switch + * // from inside an ISR varies from port to port, and from compiler to + * // compiler. Inspect the demos for the port you are using to find the + * // actual syntax required. + * if( xHigherPriorityTaskWoken != pdFALSE ) + * { + * // Call the interrupt safe yield function here (actual function + * // depends on the FreeRTOS port being used). + * } + * } + * @endverbatim + */ +#define xTimerStartFromISR( xTimer, pxHigherPriorityTaskWoken ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_START_FROM_ISR, ( xTaskGetTickCountFromISR() ), ( pxHigherPriorityTaskWoken ), 0U ) + +/** + * BaseType_t xTimerStopFromISR( TimerHandle_t xTimer, + * BaseType_t *pxHigherPriorityTaskWoken ); + * + * A version of xTimerStop() that can be called from an interrupt service + * routine. + * + * @param xTimer The handle of the timer being stopped. + * + * @param pxHigherPriorityTaskWoken The timer service/daemon task spends most + * of its time in the Blocked state, waiting for messages to arrive on the timer + * command queue. Calling xTimerStopFromISR() writes a message to the timer + * command queue, so has the potential to transition the timer service/daemon + * task out of the Blocked state. If calling xTimerStopFromISR() causes the + * timer service/daemon task to leave the Blocked state, and the timer service/ + * daemon task has a priority equal to or greater than the currently executing + * task (the task that was interrupted), then *pxHigherPriorityTaskWoken will + * get set to pdTRUE internally within the xTimerStopFromISR() function. If + * xTimerStopFromISR() sets this value to pdTRUE then a context switch should + * be performed before the interrupt exits. + * + * @return pdFAIL will be returned if the stop command could not be sent to + * the timer command queue. pdPASS will be returned if the command was + * successfully sent to the timer command queue. When the command is actually + * processed will depend on the priority of the timer service/daemon task + * relative to other tasks in the system. The timer service/daemon task + * priority is set by the configTIMER_TASK_PRIORITY configuration constant. + * + * Example usage: + * @verbatim + * // This scenario assumes xTimer has already been created and started. When + * // an interrupt occurs, the timer should be simply stopped. + * + * // The interrupt service routine that stops the timer. + * void vAnExampleInterruptServiceRoutine( void ) + * { + * BaseType_t xHigherPriorityTaskWoken = pdFALSE; + * + * // The interrupt has occurred - simply stop the timer. + * // xHigherPriorityTaskWoken was set to pdFALSE where it was defined + * // (within this function). As this is an interrupt service routine, only + * // FreeRTOS API functions that end in "FromISR" can be used. + * if( xTimerStopFromISR( xTimer, &xHigherPriorityTaskWoken ) != pdPASS ) + * { + * // The stop command was not executed successfully. Take appropriate + * // action here. + * } + * + * // If xHigherPriorityTaskWoken equals pdTRUE, then a context switch + * // should be performed. The syntax required to perform a context switch + * // from inside an ISR varies from port to port, and from compiler to + * // compiler. Inspect the demos for the port you are using to find the + * // actual syntax required. + * if( xHigherPriorityTaskWoken != pdFALSE ) + * { + * // Call the interrupt safe yield function here (actual function + * // depends on the FreeRTOS port being used). + * } + * } + * @endverbatim + */ +#define xTimerStopFromISR( xTimer, pxHigherPriorityTaskWoken ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_STOP_FROM_ISR, 0, ( pxHigherPriorityTaskWoken ), 0U ) + +/** + * BaseType_t xTimerChangePeriodFromISR( TimerHandle_t xTimer, + * TickType_t xNewPeriod, + * BaseType_t *pxHigherPriorityTaskWoken ); + * + * A version of xTimerChangePeriod() that can be called from an interrupt + * service routine. + * + * @param xTimer The handle of the timer that is having its period changed. + * + * @param xNewPeriod The new period for xTimer. Timer periods are specified in + * tick periods, so the constant portTICK_PERIOD_MS can be used to convert a time + * that has been specified in milliseconds. For example, if the timer must + * expire after 100 ticks, then xNewPeriod should be set to 100. Alternatively, + * if the timer must expire after 500ms, then xNewPeriod can be set to + * ( 500 / portTICK_PERIOD_MS ) provided configTICK_RATE_HZ is less than + * or equal to 1000. + * + * @param pxHigherPriorityTaskWoken The timer service/daemon task spends most + * of its time in the Blocked state, waiting for messages to arrive on the timer + * command queue. Calling xTimerChangePeriodFromISR() writes a message to the + * timer command queue, so has the potential to transition the timer service/ + * daemon task out of the Blocked state. If calling xTimerChangePeriodFromISR() + * causes the timer service/daemon task to leave the Blocked state, and the + * timer service/daemon task has a priority equal to or greater than the + * currently executing task (the task that was interrupted), then + * *pxHigherPriorityTaskWoken will get set to pdTRUE internally within the + * xTimerChangePeriodFromISR() function. If xTimerChangePeriodFromISR() sets + * this value to pdTRUE then a context switch should be performed before the + * interrupt exits. + * + * @return pdFAIL will be returned if the command to change the timers period + * could not be sent to the timer command queue. pdPASS will be returned if the + * command was successfully sent to the timer command queue. When the command + * is actually processed will depend on the priority of the timer service/daemon + * task relative to other tasks in the system. The timer service/daemon task + * priority is set by the configTIMER_TASK_PRIORITY configuration constant. + * + * Example usage: + * @verbatim + * // This scenario assumes xTimer has already been created and started. When + * // an interrupt occurs, the period of xTimer should be changed to 500ms. + * + * // The interrupt service routine that changes the period of xTimer. + * void vAnExampleInterruptServiceRoutine( void ) + * { + * BaseType_t xHigherPriorityTaskWoken = pdFALSE; + * + * // The interrupt has occurred - change the period of xTimer to 500ms. + * // xHigherPriorityTaskWoken was set to pdFALSE where it was defined + * // (within this function). As this is an interrupt service routine, only + * // FreeRTOS API functions that end in "FromISR" can be used. + * if( xTimerChangePeriodFromISR( xTimer, &xHigherPriorityTaskWoken ) != pdPASS ) + * { + * // The command to change the timers period was not executed + * // successfully. Take appropriate action here. + * } + * + * // If xHigherPriorityTaskWoken equals pdTRUE, then a context switch + * // should be performed. The syntax required to perform a context switch + * // from inside an ISR varies from port to port, and from compiler to + * // compiler. Inspect the demos for the port you are using to find the + * // actual syntax required. + * if( xHigherPriorityTaskWoken != pdFALSE ) + * { + * // Call the interrupt safe yield function here (actual function + * // depends on the FreeRTOS port being used). + * } + * } + * @endverbatim + */ +#define xTimerChangePeriodFromISR( xTimer, xNewPeriod, pxHigherPriorityTaskWoken ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_CHANGE_PERIOD_FROM_ISR, ( xNewPeriod ), ( pxHigherPriorityTaskWoken ), 0U ) + +/** + * BaseType_t xTimerResetFromISR( TimerHandle_t xTimer, + * BaseType_t *pxHigherPriorityTaskWoken ); + * + * A version of xTimerReset() that can be called from an interrupt service + * routine. + * + * @param xTimer The handle of the timer that is to be started, reset, or + * restarted. + * + * @param pxHigherPriorityTaskWoken The timer service/daemon task spends most + * of its time in the Blocked state, waiting for messages to arrive on the timer + * command queue. Calling xTimerResetFromISR() writes a message to the timer + * command queue, so has the potential to transition the timer service/daemon + * task out of the Blocked state. If calling xTimerResetFromISR() causes the + * timer service/daemon task to leave the Blocked state, and the timer service/ + * daemon task has a priority equal to or greater than the currently executing + * task (the task that was interrupted), then *pxHigherPriorityTaskWoken will + * get set to pdTRUE internally within the xTimerResetFromISR() function. If + * xTimerResetFromISR() sets this value to pdTRUE then a context switch should + * be performed before the interrupt exits. + * + * @return pdFAIL will be returned if the reset command could not be sent to + * the timer command queue. pdPASS will be returned if the command was + * successfully sent to the timer command queue. When the command is actually + * processed will depend on the priority of the timer service/daemon task + * relative to other tasks in the system, although the timers expiry time is + * relative to when xTimerResetFromISR() is actually called. The timer service/daemon + * task priority is set by the configTIMER_TASK_PRIORITY configuration constant. + * + * Example usage: + * @verbatim + * // This scenario assumes xBacklightTimer has already been created. When a + * // key is pressed, an LCD back-light is switched on. If 5 seconds pass + * // without a key being pressed, then the LCD back-light is switched off. In + * // this case, the timer is a one-shot timer, and unlike the example given for + * // the xTimerReset() function, the key press event handler is an interrupt + * // service routine. + * + * // The callback function assigned to the one-shot timer. In this case the + * // parameter is not used. + * void vBacklightTimerCallback( TimerHandle_t pxTimer ) + * { + * // The timer expired, therefore 5 seconds must have passed since a key + * // was pressed. Switch off the LCD back-light. + * vSetBacklightState( BACKLIGHT_OFF ); + * } + * + * // The key press interrupt service routine. + * void vKeyPressEventInterruptHandler( void ) + * { + * BaseType_t xHigherPriorityTaskWoken = pdFALSE; + * + * // Ensure the LCD back-light is on, then reset the timer that is + * // responsible for turning the back-light off after 5 seconds of + * // key inactivity. This is an interrupt service routine so can only + * // call FreeRTOS API functions that end in "FromISR". + * vSetBacklightState( BACKLIGHT_ON ); + * + * // xTimerStartFromISR() or xTimerResetFromISR() could be called here + * // as both cause the timer to re-calculate its expiry time. + * // xHigherPriorityTaskWoken was initialised to pdFALSE when it was + * // declared (in this function). + * if( xTimerResetFromISR( xBacklightTimer, &xHigherPriorityTaskWoken ) != pdPASS ) + * { + * // The reset command was not executed successfully. Take appropriate + * // action here. + * } + * + * // Perform the rest of the key processing here. + * + * // If xHigherPriorityTaskWoken equals pdTRUE, then a context switch + * // should be performed. The syntax required to perform a context switch + * // from inside an ISR varies from port to port, and from compiler to + * // compiler. Inspect the demos for the port you are using to find the + * // actual syntax required. + * if( xHigherPriorityTaskWoken != pdFALSE ) + * { + * // Call the interrupt safe yield function here (actual function + * // depends on the FreeRTOS port being used). + * } + * } + * @endverbatim + */ +#define xTimerResetFromISR( xTimer, pxHigherPriorityTaskWoken ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_RESET_FROM_ISR, ( xTaskGetTickCountFromISR() ), ( pxHigherPriorityTaskWoken ), 0U ) + + +/** + * BaseType_t xTimerPendFunctionCallFromISR( PendedFunction_t xFunctionToPend, + * void *pvParameter1, + * uint32_t ulParameter2, + * BaseType_t *pxHigherPriorityTaskWoken ); + * + * + * Used from application interrupt service routines to defer the execution of a + * function to the RTOS daemon task (the timer service task, hence this function + * is implemented in timers.c and is prefixed with 'Timer'). + * + * Ideally an interrupt service routine (ISR) is kept as short as possible, but + * sometimes an ISR either has a lot of processing to do, or needs to perform + * processing that is not deterministic. In these cases + * xTimerPendFunctionCallFromISR() can be used to defer processing of a function + * to the RTOS daemon task. + * + * A mechanism is provided that allows the interrupt to return directly to the + * task that will subsequently execute the pended callback function. This + * allows the callback function to execute contiguously in time with the + * interrupt - just as if the callback had executed in the interrupt itself. + * + * @param xFunctionToPend The function to execute from the timer service/ + * daemon task. The function must conform to the PendedFunction_t + * prototype. + * + * @param pvParameter1 The value of the callback function's first parameter. + * The parameter has a void * type to allow it to be used to pass any type. + * For example, unsigned longs can be cast to a void *, or the void * can be + * used to point to a structure. + * + * @param ulParameter2 The value of the callback function's second parameter. + * + * @param pxHigherPriorityTaskWoken As mentioned above, calling this function + * will result in a message being sent to the timer daemon task. If the + * priority of the timer daemon task (which is set using + * configTIMER_TASK_PRIORITY in FreeRTOSConfig.h) is higher than the priority of + * the currently running task (the task the interrupt interrupted) then + * *pxHigherPriorityTaskWoken will be set to pdTRUE within + * xTimerPendFunctionCallFromISR(), indicating that a context switch should be + * requested before the interrupt exits. For that reason + * *pxHigherPriorityTaskWoken must be initialised to pdFALSE. See the + * example code below. + * + * @return pdPASS is returned if the message was successfully sent to the + * timer daemon task, otherwise pdFALSE is returned. + * + * Example usage: + * @verbatim + * + * // The callback function that will execute in the context of the daemon task. + * // Note callback functions must all use this same prototype. + * void vProcessInterface( void *pvParameter1, uint32_t ulParameter2 ) + * { + * BaseType_t xInterfaceToService; + * + * // The interface that requires servicing is passed in the second + * // parameter. The first parameter is not used in this case. + * xInterfaceToService = ( BaseType_t ) ulParameter2; + * + * // ...Perform the processing here... + * } + * + * // An ISR that receives data packets from multiple interfaces + * void vAnISR( void ) + * { + * BaseType_t xInterfaceToService, xHigherPriorityTaskWoken; + * + * // Query the hardware to determine which interface needs processing. + * xInterfaceToService = prvCheckInterfaces(); + * + * // The actual processing is to be deferred to a task. Request the + * // vProcessInterface() callback function is executed, passing in the + * // number of the interface that needs processing. The interface to + * // service is passed in the second parameter. The first parameter is + * // not used in this case. + * xHigherPriorityTaskWoken = pdFALSE; + * xTimerPendFunctionCallFromISR( vProcessInterface, NULL, ( uint32_t ) xInterfaceToService, &xHigherPriorityTaskWoken ); + * + * // If xHigherPriorityTaskWoken is now set to pdTRUE then a context + * // switch should be requested. The macro used is port specific and will + * // be either portYIELD_FROM_ISR() or portEND_SWITCHING_ISR() - refer to + * // the documentation page for the port being used. + * portYIELD_FROM_ISR( xHigherPriorityTaskWoken ); + * + * } + * @endverbatim + */ +BaseType_t xTimerPendFunctionCallFromISR( PendedFunction_t xFunctionToPend, void *pvParameter1, uint32_t ulParameter2, BaseType_t *pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION; + + /** + * BaseType_t xTimerPendFunctionCall( PendedFunction_t xFunctionToPend, + * void *pvParameter1, + * uint32_t ulParameter2, + * TickType_t xTicksToWait ); + * + * + * Used to defer the execution of a function to the RTOS daemon task (the timer + * service task, hence this function is implemented in timers.c and is prefixed + * with 'Timer'). + * + * @param xFunctionToPend The function to execute from the timer service/ + * daemon task. The function must conform to the PendedFunction_t + * prototype. + * + * @param pvParameter1 The value of the callback function's first parameter. + * The parameter has a void * type to allow it to be used to pass any type. + * For example, unsigned longs can be cast to a void *, or the void * can be + * used to point to a structure. + * + * @param ulParameter2 The value of the callback function's second parameter. + * + * @param xTicksToWait Calling this function will result in a message being + * sent to the timer daemon task on a queue. xTicksToWait is the amount of + * time the calling task should remain in the Blocked state (so not using any + * processing time) for space to become available on the timer queue if the + * queue is found to be full. + * + * @return pdPASS is returned if the message was successfully sent to the + * timer daemon task, otherwise pdFALSE is returned. + * + */ +BaseType_t xTimerPendFunctionCall( PendedFunction_t xFunctionToPend, void *pvParameter1, uint32_t ulParameter2, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION; + +/** + * const char * const pcTimerGetName( TimerHandle_t xTimer ); + * + * Returns the name that was assigned to a timer when the timer was created. + * + * @param xTimer The handle of the timer being queried. + * + * @return The name assigned to the timer specified by the xTimer parameter. + */ +const char * pcTimerGetName( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ + +/** + * TickType_t xTimerGetPeriod( TimerHandle_t xTimer ); + * + * Returns the period of a timer. + * + * @param xTimer The handle of the timer being queried. + * + * @return The period of the timer in ticks. + */ +TickType_t xTimerGetPeriod( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION; + +/** +* TickType_t xTimerGetExpiryTime( TimerHandle_t xTimer ); +* +* Returns the time in ticks at which the timer will expire. If this is less +* than the current tick count then the expiry time has overflowed from the +* current time. +* +* @param xTimer The handle of the timer being queried. +* +* @return If the timer is running then the time in ticks at which the timer +* will next expire is returned. If the timer is not running then the return +* value is undefined. +*/ +TickType_t xTimerGetExpiryTime( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION; + +/* + * Functions beyond this part are not part of the public API and are intended + * for use by the kernel only. + */ +BaseType_t xTimerCreateTimerTask( void ) PRIVILEGED_FUNCTION; +BaseType_t xTimerGenericCommand( TimerHandle_t xTimer, const BaseType_t xCommandID, const TickType_t xOptionalValue, BaseType_t * const pxHigherPriorityTaskWoken, const TickType_t xTicksToWait ) PRIVILEGED_FUNCTION; + +#if( configUSE_TRACE_FACILITY == 1 ) + void vTimerSetTimerNumber( TimerHandle_t xTimer, UBaseType_t uxTimerNumber ) PRIVILEGED_FUNCTION; + UBaseType_t uxTimerGetTimerNumber( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION; +#endif + +#ifdef __cplusplus +} +#endif +#endif /* TIMERS_H */ + + + diff --git a/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/list.c b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/list.c new file mode 100644 index 0000000..bc8636c --- /dev/null +++ b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/list.c @@ -0,0 +1,198 @@ +/* + * FreeRTOS Kernel V10.0.1 + * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + + +#include+#include "FreeRTOS.h" +#include "list.h" + +/*----------------------------------------------------------- + * PUBLIC LIST API documented in list.h + *----------------------------------------------------------*/ + +void vListInitialise( List_t * const pxList ) +{ + /* The list structure contains a list item which is used to mark the + end of the list. To initialise the list the list end is inserted + as the only list entry. */ + pxList->pxIndex = ( ListItem_t * ) &( pxList->xListEnd ); /*lint !e826 !e740 The mini list structure is used as the list end to save RAM. This is checked and valid. */ + + /* The list end value is the highest possible value in the list to + ensure it remains at the end of the list. */ + pxList->xListEnd.xItemValue = portMAX_DELAY; + + /* The list end next and previous pointers point to itself so we know + when the list is empty. */ + pxList->xListEnd.pxNext = ( ListItem_t * ) &( pxList->xListEnd ); /*lint !e826 !e740 The mini list structure is used as the list end to save RAM. This is checked and valid. */ + pxList->xListEnd.pxPrevious = ( ListItem_t * ) &( pxList->xListEnd );/*lint !e826 !e740 The mini list structure is used as the list end to save RAM. This is checked and valid. */ + + pxList->uxNumberOfItems = ( UBaseType_t ) 0U; + + /* Write known values into the list if + configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */ + listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList ); + listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList ); +} +/*-----------------------------------------------------------*/ + +void vListInitialiseItem( ListItem_t * const pxItem ) +{ + /* Make sure the list item is not recorded as being on a list. */ + pxItem->pvContainer = NULL; + + /* Write known values into the list item if + configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */ + listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem ); + listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem ); +} +/*-----------------------------------------------------------*/ + +void vListInsertEnd( List_t * const pxList, ListItem_t * const pxNewListItem ) +{ +ListItem_t * const pxIndex = pxList->pxIndex; + + /* Only effective when configASSERT() is also defined, these tests may catch + the list data structures being overwritten in memory. They will not catch + data errors caused by incorrect configuration or use of FreeRTOS. */ + listTEST_LIST_INTEGRITY( pxList ); + listTEST_LIST_ITEM_INTEGRITY( pxNewListItem ); + + /* Insert a new list item into pxList, but rather than sort the list, + makes the new list item the last item to be removed by a call to + listGET_OWNER_OF_NEXT_ENTRY(). */ + pxNewListItem->pxNext = pxIndex; + pxNewListItem->pxPrevious = pxIndex->pxPrevious; + + /* Only used during decision coverage testing. */ + mtCOVERAGE_TEST_DELAY(); + + pxIndex->pxPrevious->pxNext = pxNewListItem; + pxIndex->pxPrevious = pxNewListItem; + + /* Remember which list the item is in. */ + pxNewListItem->pvContainer = ( void * ) pxList; + + ( pxList->uxNumberOfItems )++; +} +/*-----------------------------------------------------------*/ + +void vListInsert( List_t * const pxList, ListItem_t * const pxNewListItem ) +{ +ListItem_t *pxIterator; +const TickType_t xValueOfInsertion = pxNewListItem->xItemValue; + + /* Only effective when configASSERT() is also defined, these tests may catch + the list data structures being overwritten in memory. They will not catch + data errors caused by incorrect configuration or use of FreeRTOS. */ + listTEST_LIST_INTEGRITY( pxList ); + listTEST_LIST_ITEM_INTEGRITY( pxNewListItem ); + + /* Insert the new list item into the list, sorted in xItemValue order. + + If the list already contains a list item with the same item value then the + new list item should be placed after it. This ensures that TCB's which are + stored in ready lists (all of which have the same xItemValue value) get a + share of the CPU. However, if the xItemValue is the same as the back marker + the iteration loop below will not end. Therefore the value is checked + first, and the algorithm slightly modified if necessary. */ + if( xValueOfInsertion == portMAX_DELAY ) + { + pxIterator = pxList->xListEnd.pxPrevious; + } + else + { + /* *** NOTE *********************************************************** + If you find your application is crashing here then likely causes are + listed below. In addition see http://www.freertos.org/FAQHelp.html for + more tips, and ensure configASSERT() is defined! + http://www.freertos.org/a00110.html#configASSERT + + 1) Stack overflow - + see http://www.freertos.org/Stacks-and-stack-overflow-checking.html + 2) Incorrect interrupt priority assignment, especially on Cortex-M + parts where numerically high priority values denote low actual + interrupt priorities, which can seem counter intuitive. See + http://www.freertos.org/RTOS-Cortex-M3-M4.html and the definition + of configMAX_SYSCALL_INTERRUPT_PRIORITY on + http://www.freertos.org/a00110.html + 3) Calling an API function from within a critical section or when + the scheduler is suspended, or calling an API function that does + not end in "FromISR" from an interrupt. + 4) Using a queue or semaphore before it has been initialised or + before the scheduler has been started (are interrupts firing + before vTaskStartScheduler() has been called?). + **********************************************************************/ + + for( pxIterator = ( ListItem_t * ) &( pxList->xListEnd ); pxIterator->pxNext->xItemValue <= xValueOfInsertion; pxIterator = pxIterator->pxNext ) /*lint !e826 !e740 The mini list structure is used as the list end to save RAM. This is checked and valid. */ + { + /* There is nothing to do here, just iterating to the wanted + insertion position. */ + } + } + + pxNewListItem->pxNext = pxIterator->pxNext; + pxNewListItem->pxNext->pxPrevious = pxNewListItem; + pxNewListItem->pxPrevious = pxIterator; + pxIterator->pxNext = pxNewListItem; + + /* Remember which list the item is in. This allows fast removal of the + item later. */ + pxNewListItem->pvContainer = ( void * ) pxList; + + ( pxList->uxNumberOfItems )++; +} +/*-----------------------------------------------------------*/ + +UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove ) +{ +/* The list item knows which list it is in. Obtain the list from the list +item. */ +List_t * const pxList = ( List_t * ) pxItemToRemove->pvContainer; + + pxItemToRemove->pxNext->pxPrevious = pxItemToRemove->pxPrevious; + pxItemToRemove->pxPrevious->pxNext = pxItemToRemove->pxNext; + + /* Only used during decision coverage testing. */ + mtCOVERAGE_TEST_DELAY(); + + /* Make sure the index is left pointing to a valid item. */ + if( pxList->pxIndex == pxItemToRemove ) + { + pxList->pxIndex = pxItemToRemove->pxPrevious; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + + pxItemToRemove->pvContainer = NULL; + ( pxList->uxNumberOfItems )--; + + return pxList->uxNumberOfItems; +} +/*-----------------------------------------------------------*/ + diff --git a/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/portable/Common/mpu_wrappers.c b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/portable/Common/mpu_wrappers.c new file mode 100644 index 0000000..6872b74 --- /dev/null +++ b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/portable/Common/mpu_wrappers.c @@ -0,0 +1,1290 @@ +/* + * FreeRTOS Kernel V10.0.1 + * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/* + * Implementation of the wrapper functions used to raise the processor privilege + * before calling a standard FreeRTOS API function. + */ + +/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining +all the API functions to use the MPU wrappers. That should only be done when +task.h is included from an application file. */ +#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE + +/* Scheduler includes. */ +#include "FreeRTOS.h" +#include "task.h" +#include "queue.h" +#include "timers.h" +#include "event_groups.h" +#include "stream_buffer.h" +#include "mpu_prototypes.h" + +#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE + +/* + * Checks to see if being called from the context of an unprivileged task, and + * if so raises the privilege level and returns false - otherwise does nothing + * other than return true. + */ +extern BaseType_t xPortRaisePrivilege( void ); + +/*-----------------------------------------------------------*/ + +#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) + BaseType_t MPU_xTaskCreateRestricted( const TaskParameters_t * const pxTaskDefinition, TaskHandle_t *pxCreatedTask ) + { + BaseType_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xTaskCreateRestricted( pxTaskDefinition, pxCreatedTask ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; + } +#endif /* conifgSUPPORT_DYNAMIC_ALLOCATION */ +/*-----------------------------------------------------------*/ + +#if( configSUPPORT_STATIC_ALLOCATION == 1 ) + BaseType_t MPU_xTaskCreateRestrictedStatic( const TaskParameters_t * const pxTaskDefinition, TaskHandle_t *pxCreatedTask ) + { + BaseType_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xTaskCreateRestrictedStatic( pxTaskDefinition, pxCreatedTask ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; + } +#endif /* conifgSUPPORT_DYNAMIC_ALLOCATION */ +/*-----------------------------------------------------------*/ + +#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) + BaseType_t MPU_xTaskCreate( TaskFunction_t pvTaskCode, const char * const pcName, uint16_t usStackDepth, void *pvParameters, UBaseType_t uxPriority, TaskHandle_t *pxCreatedTask ) + { + BaseType_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xTaskCreate( pvTaskCode, pcName, usStackDepth, pvParameters, uxPriority, pxCreatedTask ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; + } +#endif /* configSUPPORT_DYNAMIC_ALLOCATION */ +/*-----------------------------------------------------------*/ + +#if( configSUPPORT_STATIC_ALLOCATION == 1 ) + TaskHandle_t MPU_xTaskCreateStatic( TaskFunction_t pxTaskCode, const char * const pcName, const uint32_t ulStackDepth, void * const pvParameters, UBaseType_t uxPriority, StackType_t * const puxStackBuffer, StaticTask_t * const pxTaskBuffer ) + { + TaskHandle_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xTaskCreateStatic( pxTaskCode, pcName, ulStackDepth, pvParameters, uxPriority, puxStackBuffer, pxTaskBuffer ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; + } +#endif /* configSUPPORT_STATIC_ALLOCATION */ +/*-----------------------------------------------------------*/ + +void MPU_vTaskAllocateMPURegions( TaskHandle_t xTask, const MemoryRegion_t * const xRegions ) +{ +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + vTaskAllocateMPURegions( xTask, xRegions ); + vPortResetPrivilege( xRunningPrivileged ); +} +/*-----------------------------------------------------------*/ + +#if ( INCLUDE_vTaskDelete == 1 ) + void MPU_vTaskDelete( TaskHandle_t pxTaskToDelete ) + { + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + vTaskDelete( pxTaskToDelete ); + vPortResetPrivilege( xRunningPrivileged ); + } +#endif +/*-----------------------------------------------------------*/ + +#if ( INCLUDE_vTaskDelayUntil == 1 ) + void MPU_vTaskDelayUntil( TickType_t * const pxPreviousWakeTime, TickType_t xTimeIncrement ) + { + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + vTaskDelayUntil( pxPreviousWakeTime, xTimeIncrement ); + vPortResetPrivilege( xRunningPrivileged ); + } +#endif +/*-----------------------------------------------------------*/ + +#if ( INCLUDE_xTaskAbortDelay == 1 ) + BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) + { + BaseType_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xTaskAbortDelay( xTask ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if ( INCLUDE_vTaskDelay == 1 ) + void MPU_vTaskDelay( TickType_t xTicksToDelay ) + { + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + vTaskDelay( xTicksToDelay ); + vPortResetPrivilege( xRunningPrivileged ); + } +#endif +/*-----------------------------------------------------------*/ + +#if ( INCLUDE_uxTaskPriorityGet == 1 ) + UBaseType_t MPU_uxTaskPriorityGet( TaskHandle_t pxTask ) + { + UBaseType_t uxReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + uxReturn = uxTaskPriorityGet( pxTask ); + vPortResetPrivilege( xRunningPrivileged ); + return uxReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if ( INCLUDE_vTaskPrioritySet == 1 ) + void MPU_vTaskPrioritySet( TaskHandle_t pxTask, UBaseType_t uxNewPriority ) + { + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + vTaskPrioritySet( pxTask, uxNewPriority ); + vPortResetPrivilege( xRunningPrivileged ); + } +#endif +/*-----------------------------------------------------------*/ + +#if ( INCLUDE_eTaskGetState == 1 ) + eTaskState MPU_eTaskGetState( TaskHandle_t pxTask ) + { + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + eTaskState eReturn; + + eReturn = eTaskGetState( pxTask ); + vPortResetPrivilege( xRunningPrivileged ); + return eReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if( configUSE_TRACE_FACILITY == 1 ) + void MPU_vTaskGetInfo( TaskHandle_t xTask, TaskStatus_t *pxTaskStatus, BaseType_t xGetFreeStackSpace, eTaskState eState ) + { + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + vTaskGetInfo( xTask, pxTaskStatus, xGetFreeStackSpace, eState ); + vPortResetPrivilege( xRunningPrivileged ); + } +#endif +/*-----------------------------------------------------------*/ + +#if ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) + TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) + { + TaskHandle_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xTaskGetIdleTaskHandle(); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if ( INCLUDE_vTaskSuspend == 1 ) + void MPU_vTaskSuspend( TaskHandle_t pxTaskToSuspend ) + { + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + vTaskSuspend( pxTaskToSuspend ); + vPortResetPrivilege( xRunningPrivileged ); + } +#endif +/*-----------------------------------------------------------*/ + +#if ( INCLUDE_vTaskSuspend == 1 ) + void MPU_vTaskResume( TaskHandle_t pxTaskToResume ) + { + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + vTaskResume( pxTaskToResume ); + vPortResetPrivilege( xRunningPrivileged ); + } +#endif +/*-----------------------------------------------------------*/ + +void MPU_vTaskSuspendAll( void ) +{ +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + vTaskSuspendAll(); + vPortResetPrivilege( xRunningPrivileged ); +} +/*-----------------------------------------------------------*/ + +BaseType_t MPU_xTaskResumeAll( void ) +{ +BaseType_t xReturn; +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xTaskResumeAll(); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; +} +/*-----------------------------------------------------------*/ + +TickType_t MPU_xTaskGetTickCount( void ) +{ +TickType_t xReturn; +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xTaskGetTickCount(); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; +} +/*-----------------------------------------------------------*/ + +UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) +{ +UBaseType_t uxReturn; +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + uxReturn = uxTaskGetNumberOfTasks(); + vPortResetPrivilege( xRunningPrivileged ); + return uxReturn; +} +/*-----------------------------------------------------------*/ + +char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) +{ +char *pcReturn; +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + pcReturn = pcTaskGetName( xTaskToQuery ); + vPortResetPrivilege( xRunningPrivileged ); + return pcReturn; +} +/*-----------------------------------------------------------*/ + +#if ( INCLUDE_xTaskGetHandle == 1 ) + TaskHandle_t MPU_xTaskGetHandle( const char *pcNameToQuery ) + { + TaskHandle_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xTaskGetHandle( pcNameToQuery ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if ( ( configUSE_TRACE_FACILITY == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) + void MPU_vTaskList( char *pcWriteBuffer ) + { + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + vTaskList( pcWriteBuffer ); + vPortResetPrivilege( xRunningPrivileged ); + } +#endif +/*-----------------------------------------------------------*/ + +#if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) + void MPU_vTaskGetRunTimeStats( char *pcWriteBuffer ) + { + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + vTaskGetRunTimeStats( pcWriteBuffer ); + vPortResetPrivilege( xRunningPrivileged ); + } +#endif +/*-----------------------------------------------------------*/ + +#if ( configUSE_APPLICATION_TASK_TAG == 1 ) + void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, TaskHookFunction_t pxTagValue ) + { + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + vTaskSetApplicationTaskTag( xTask, pxTagValue ); + vPortResetPrivilege( xRunningPrivileged ); + } +#endif +/*-----------------------------------------------------------*/ + +#if ( configUSE_APPLICATION_TASK_TAG == 1 ) + TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) + { + TaskHookFunction_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xTaskGetApplicationTaskTag( xTask ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) + void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, BaseType_t xIndex, void *pvValue ) + { + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + vTaskSetThreadLocalStoragePointer( xTaskToSet, xIndex, pvValue ); + vPortResetPrivilege( xRunningPrivileged ); + } +#endif +/*-----------------------------------------------------------*/ + +#if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 ) + void *MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, BaseType_t xIndex ) + { + void *pvReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + pvReturn = pvTaskGetThreadLocalStoragePointer( xTaskToQuery, xIndex ); + vPortResetPrivilege( xRunningPrivileged ); + return pvReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if ( configUSE_APPLICATION_TASK_TAG == 1 ) + BaseType_t MPU_xTaskCallApplicationTaskHook( TaskHandle_t xTask, void *pvParameter ) + { + BaseType_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xTaskCallApplicationTaskHook( xTask, pvParameter ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if ( configUSE_TRACE_FACILITY == 1 ) + UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t *pxTaskStatusArray, UBaseType_t uxArraySize, uint32_t *pulTotalRunTime ) + { + UBaseType_t uxReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + uxReturn = uxTaskGetSystemState( pxTaskStatusArray, uxArraySize, pulTotalRunTime ); + vPortResetPrivilege( xRunningPrivileged ); + return uxReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) + UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) + { + UBaseType_t uxReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + uxReturn = uxTaskGetStackHighWaterMark( xTask ); + vPortResetPrivilege( xRunningPrivileged ); + return uxReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) + TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) + { + TaskHandle_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xTaskGetCurrentTaskHandle(); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if ( INCLUDE_xTaskGetSchedulerState == 1 ) + BaseType_t MPU_xTaskGetSchedulerState( void ) + { + BaseType_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xTaskGetSchedulerState(); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) +{ +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + vTaskSetTimeOutState( pxTimeOut ); + vPortResetPrivilege( xRunningPrivileged ); +} +/*-----------------------------------------------------------*/ + +BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, TickType_t * const pxTicksToWait ) +{ +BaseType_t xReturn; +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xTaskCheckForTimeOut( pxTimeOut, pxTicksToWait ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; +} +/*-----------------------------------------------------------*/ + +#if( configUSE_TASK_NOTIFICATIONS == 1 ) + BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue ) + { + BaseType_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xTaskGenericNotify( xTaskToNotify, ulValue, eAction, pulPreviousNotificationValue ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if( configUSE_TASK_NOTIFICATIONS == 1 ) + BaseType_t MPU_xTaskNotifyWait( uint32_t ulBitsToClearOnEntry, uint32_t ulBitsToClearOnExit, uint32_t *pulNotificationValue, TickType_t xTicksToWait ) + { + BaseType_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xTaskNotifyWait( ulBitsToClearOnEntry, ulBitsToClearOnExit, pulNotificationValue, xTicksToWait ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if( configUSE_TASK_NOTIFICATIONS == 1 ) + uint32_t MPU_ulTaskNotifyTake( BaseType_t xClearCountOnExit, TickType_t xTicksToWait ) + { + uint32_t ulReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + ulReturn = ulTaskNotifyTake( xClearCountOnExit, xTicksToWait ); + vPortResetPrivilege( xRunningPrivileged ); + return ulReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if( configUSE_TASK_NOTIFICATIONS == 1 ) + BaseType_t MPU_xTaskNotifyStateClear( TaskHandle_t xTask ) + { + BaseType_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xTaskNotifyStateClear( xTask ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) + QueueHandle_t MPU_xQueueGenericCreate( UBaseType_t uxQueueLength, UBaseType_t uxItemSize, uint8_t ucQueueType ) + { + QueueHandle_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xQueueGenericCreate( uxQueueLength, uxItemSize, ucQueueType ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if( configSUPPORT_STATIC_ALLOCATION == 1 ) + QueueHandle_t MPU_xQueueGenericCreateStatic( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, StaticQueue_t *pxStaticQueue, const uint8_t ucQueueType ) + { + QueueHandle_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xQueueGenericCreateStatic( uxQueueLength, uxItemSize, pucQueueStorage, pxStaticQueue, ucQueueType ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +BaseType_t MPU_xQueueGenericReset( QueueHandle_t pxQueue, BaseType_t xNewQueue ) +{ +BaseType_t xReturn; +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xQueueGenericReset( pxQueue, xNewQueue ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; +} +/*-----------------------------------------------------------*/ + +BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, BaseType_t xCopyPosition ) +{ +BaseType_t xReturn; +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xQueueGenericSend( xQueue, pvItemToQueue, xTicksToWait, xCopyPosition ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; +} +/*-----------------------------------------------------------*/ + +UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t pxQueue ) +{ +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); +UBaseType_t uxReturn; + + uxReturn = uxQueueMessagesWaiting( pxQueue ); + vPortResetPrivilege( xRunningPrivileged ); + return uxReturn; +} +/*-----------------------------------------------------------*/ + +UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) +{ +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); +UBaseType_t uxReturn; + + uxReturn = uxQueueSpacesAvailable( xQueue ); + vPortResetPrivilege( xRunningPrivileged ); + return uxReturn; +} +/*-----------------------------------------------------------*/ + +BaseType_t MPU_xQueueReceive( QueueHandle_t pxQueue, void * const pvBuffer, TickType_t xTicksToWait ) +{ +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); +BaseType_t xReturn; + + xReturn = xQueueReceive( pxQueue, pvBuffer, xTicksToWait ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; +} +/*-----------------------------------------------------------*/ + +BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait ) +{ +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); +BaseType_t xReturn; + + xReturn = xQueuePeek( xQueue, pvBuffer, xTicksToWait ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; +} +/*-----------------------------------------------------------*/ + +BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, TickType_t xTicksToWait ) +{ +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); +BaseType_t xReturn; + + xReturn = xQueueSemaphoreTake( xQueue, xTicksToWait ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; +} +/*-----------------------------------------------------------*/ + +BaseType_t MPU_xQueuePeekFromISR( QueueHandle_t pxQueue, void * const pvBuffer ) +{ +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); +BaseType_t xReturn; + + xReturn = xQueuePeekFromISR( pxQueue, pvBuffer ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; +} +/*-----------------------------------------------------------*/ + +void* MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) +{ +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); +void * xReturn; + + xReturn = ( void * ) xQueueGetMutexHolder( xSemaphore ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; +} +/*-----------------------------------------------------------*/ + +#if( ( configUSE_MUTEXES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) + QueueHandle_t MPU_xQueueCreateMutex( const uint8_t ucQueueType ) + { + QueueHandle_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xQueueCreateMutex( ucQueueType ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if( ( configUSE_MUTEXES == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) ) + QueueHandle_t MPU_xQueueCreateMutexStatic( const uint8_t ucQueueType, StaticQueue_t *pxStaticQueue ) + { + QueueHandle_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xQueueCreateMutexStatic( ucQueueType, pxStaticQueue ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) + QueueHandle_t MPU_xQueueCreateCountingSemaphore( UBaseType_t uxCountValue, UBaseType_t uxInitialCount ) + { + QueueHandle_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xQueueCreateCountingSemaphore( uxCountValue, uxInitialCount ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) ) + + QueueHandle_t MPU_xQueueCreateCountingSemaphoreStatic( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount, StaticQueue_t *pxStaticQueue ) + { + QueueHandle_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xQueueCreateCountingSemaphoreStatic( uxMaxCount, uxInitialCount, pxStaticQueue ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if ( configUSE_RECURSIVE_MUTEXES == 1 ) + BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, TickType_t xBlockTime ) + { + BaseType_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xQueueTakeMutexRecursive( xMutex, xBlockTime ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if ( configUSE_RECURSIVE_MUTEXES == 1 ) + BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t xMutex ) + { + BaseType_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xQueueGiveMutexRecursive( xMutex ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if( ( configUSE_QUEUE_SETS == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) + QueueSetHandle_t MPU_xQueueCreateSet( UBaseType_t uxEventQueueLength ) + { + QueueSetHandle_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xQueueCreateSet( uxEventQueueLength ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if ( configUSE_QUEUE_SETS == 1 ) + QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, TickType_t xBlockTimeTicks ) + { + QueueSetMemberHandle_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xQueueSelectFromSet( xQueueSet, xBlockTimeTicks ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if ( configUSE_QUEUE_SETS == 1 ) + BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet ) + { + BaseType_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xQueueAddToSet( xQueueOrSemaphore, xQueueSet ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if ( configUSE_QUEUE_SETS == 1 ) + BaseType_t MPU_xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet ) + { + BaseType_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xQueueRemoveFromSet( xQueueOrSemaphore, xQueueSet ); + vPortResetPrivilege( xRunningPrivileged ); + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if configQUEUE_REGISTRY_SIZE > 0 + void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, const char *pcName ) + { + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + vQueueAddToRegistry( xQueue, pcName ); + + vPortResetPrivilege( xRunningPrivileged ); + } +#endif +/*-----------------------------------------------------------*/ + +#if configQUEUE_REGISTRY_SIZE > 0 + void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) + { + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + vQueueUnregisterQueue( xQueue ); + + vPortResetPrivilege( xRunningPrivileged ); + } +#endif +/*-----------------------------------------------------------*/ + +#if configQUEUE_REGISTRY_SIZE > 0 + const char *MPU_pcQueueGetName( QueueHandle_t xQueue ) + { + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + const char *pcReturn; + + pcReturn = pcQueueGetName( xQueue ); + + vPortResetPrivilege( xRunningPrivileged ); + return pcReturn; + } +#endif +/*-----------------------------------------------------------*/ + +void MPU_vQueueDelete( QueueHandle_t xQueue ) +{ +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + vQueueDelete( xQueue ); + + vPortResetPrivilege( xRunningPrivileged ); +} +/*-----------------------------------------------------------*/ + +#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) + void *MPU_pvPortMalloc( size_t xSize ) + { + void *pvReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + pvReturn = pvPortMalloc( xSize ); + + vPortResetPrivilege( xRunningPrivileged ); + + return pvReturn; + } +#endif /* configSUPPORT_DYNAMIC_ALLOCATION */ +/*-----------------------------------------------------------*/ + +#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) + void MPU_vPortFree( void *pv ) + { + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + vPortFree( pv ); + + vPortResetPrivilege( xRunningPrivileged ); + } +#endif /* configSUPPORT_DYNAMIC_ALLOCATION */ +/*-----------------------------------------------------------*/ + +#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) + void MPU_vPortInitialiseBlocks( void ) + { + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + vPortInitialiseBlocks(); + + vPortResetPrivilege( xRunningPrivileged ); + } +#endif /* configSUPPORT_DYNAMIC_ALLOCATION */ +/*-----------------------------------------------------------*/ + +#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) + size_t MPU_xPortGetFreeHeapSize( void ) + { + size_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xPortGetFreeHeapSize(); + + vPortResetPrivilege( xRunningPrivileged ); + + return xReturn; + } +#endif /* configSUPPORT_DYNAMIC_ALLOCATION */ +/*-----------------------------------------------------------*/ + +#if( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configUSE_TIMERS == 1 ) ) + TimerHandle_t MPU_xTimerCreate( const char * const pcTimerName, const TickType_t xTimerPeriodInTicks, const UBaseType_t uxAutoReload, void * const pvTimerID, TimerCallbackFunction_t pxCallbackFunction ) + { + TimerHandle_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xTimerCreate( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction ); + vPortResetPrivilege( xRunningPrivileged ); + + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configUSE_TIMERS == 1 ) ) + TimerHandle_t MPU_xTimerCreateStatic( const char * const pcTimerName, const TickType_t xTimerPeriodInTicks, const UBaseType_t uxAutoReload, void * const pvTimerID, TimerCallbackFunction_t pxCallbackFunction, StaticTimer_t *pxTimerBuffer ) + { + TimerHandle_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xTimerCreateStatic( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction, pxTimerBuffer ); + vPortResetPrivilege( xRunningPrivileged ); + + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if( configUSE_TIMERS == 1 ) + void *MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) + { + void * pvReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + pvReturn = pvTimerGetTimerID( xTimer ); + vPortResetPrivilege( xRunningPrivileged ); + + return pvReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if( configUSE_TIMERS == 1 ) + void MPU_vTimerSetTimerID( TimerHandle_t xTimer, void *pvNewID ) + { + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + vTimerSetTimerID( xTimer, pvNewID ); + vPortResetPrivilege( xRunningPrivileged ); + } +#endif +/*-----------------------------------------------------------*/ + +#if( configUSE_TIMERS == 1 ) + BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) + { + BaseType_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xTimerIsTimerActive( xTimer ); + vPortResetPrivilege( xRunningPrivileged ); + + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if( configUSE_TIMERS == 1 ) + TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) + { + TaskHandle_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xTimerGetTimerDaemonTaskHandle(); + vPortResetPrivilege( xRunningPrivileged ); + + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if( ( INCLUDE_xTimerPendFunctionCall == 1 ) && ( configUSE_TIMERS == 1 ) ) + BaseType_t MPU_xTimerPendFunctionCall( PendedFunction_t xFunctionToPend, void *pvParameter1, uint32_t ulParameter2, TickType_t xTicksToWait ) + { + BaseType_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xTimerPendFunctionCall( xFunctionToPend, pvParameter1, ulParameter2, xTicksToWait ); + vPortResetPrivilege( xRunningPrivileged ); + + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if( configUSE_TIMERS == 1 ) + const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) + { + const char * pcReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + pcReturn = pcTimerGetName( xTimer ); + vPortResetPrivilege( xRunningPrivileged ); + + return pcReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if( configUSE_TIMERS == 1 ) + TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) + { + TickType_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xTimerGetPeriod( xTimer ); + vPortResetPrivilege( xRunningPrivileged ); + + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if( configUSE_TIMERS == 1 ) + TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) + { + TickType_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xTimerGetExpiryTime( xTimer ); + vPortResetPrivilege( xRunningPrivileged ); + + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if( configUSE_TIMERS == 1 ) + BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer, const BaseType_t xCommandID, const TickType_t xOptionalValue, BaseType_t * const pxHigherPriorityTaskWoken, const TickType_t xTicksToWait ) + { + BaseType_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xTimerGenericCommand( xTimer, xCommandID, xOptionalValue, pxHigherPriorityTaskWoken, xTicksToWait ); + vPortResetPrivilege( xRunningPrivileged ); + + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) + EventGroupHandle_t MPU_xEventGroupCreate( void ) + { + EventGroupHandle_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xEventGroupCreate(); + vPortResetPrivilege( xRunningPrivileged ); + + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +#if( configSUPPORT_STATIC_ALLOCATION == 1 ) + EventGroupHandle_t MPU_xEventGroupCreateStatic( StaticEventGroup_t *pxEventGroupBuffer ) + { + EventGroupHandle_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xEventGroupCreateStatic( pxEventGroupBuffer ); + vPortResetPrivilege( xRunningPrivileged ); + + return xReturn; + } +#endif +/*-----------------------------------------------------------*/ + +EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToWaitFor, const BaseType_t xClearOnExit, const BaseType_t xWaitForAllBits, TickType_t xTicksToWait ) +{ +EventBits_t xReturn; +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xEventGroupWaitBits( xEventGroup, uxBitsToWaitFor, xClearOnExit, xWaitForAllBits, xTicksToWait ); + vPortResetPrivilege( xRunningPrivileged ); + + return xReturn; +} +/*-----------------------------------------------------------*/ + +EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear ) +{ +EventBits_t xReturn; +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xEventGroupClearBits( xEventGroup, uxBitsToClear ); + vPortResetPrivilege( xRunningPrivileged ); + + return xReturn; +} +/*-----------------------------------------------------------*/ + +EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet ) +{ +EventBits_t xReturn; +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xEventGroupSetBits( xEventGroup, uxBitsToSet ); + vPortResetPrivilege( xRunningPrivileged ); + + return xReturn; +} +/*-----------------------------------------------------------*/ + +EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, TickType_t xTicksToWait ) +{ +EventBits_t xReturn; +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xEventGroupSync( xEventGroup, uxBitsToSet, uxBitsToWaitFor, xTicksToWait ); + vPortResetPrivilege( xRunningPrivileged ); + + return xReturn; +} +/*-----------------------------------------------------------*/ + +void MPU_vEventGroupDelete( EventGroupHandle_t xEventGroup ) +{ +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + vEventGroupDelete( xEventGroup ); + vPortResetPrivilege( xRunningPrivileged ); +} +/*-----------------------------------------------------------*/ + +size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, const void *pvTxData, size_t xDataLengthBytes, TickType_t xTicksToWait ) +{ +size_t xReturn; +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xStreamBufferSend( xStreamBuffer, pvTxData, xDataLengthBytes, xTicksToWait ); + vPortResetPrivilege( xRunningPrivileged ); + + return xReturn; +} +/*-----------------------------------------------------------*/ + +size_t MPU_xStreamBufferSendFromISR( StreamBufferHandle_t xStreamBuffer, const void *pvTxData, size_t xDataLengthBytes, BaseType_t * const pxHigherPriorityTaskWoken ) +{ +size_t xReturn; +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xStreamBufferSendFromISR( xStreamBuffer, pvTxData, xDataLengthBytes, pxHigherPriorityTaskWoken ); + vPortResetPrivilege( xRunningPrivileged ); + + return xReturn; +} +/*-----------------------------------------------------------*/ + +size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, void *pvRxData, size_t xBufferLengthBytes, TickType_t xTicksToWait ) +{ +size_t xReturn; +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xStreamBufferReceive( xStreamBuffer, pvRxData, xBufferLengthBytes, xTicksToWait ); + vPortResetPrivilege( xRunningPrivileged ); + + return xReturn; +} +/*-----------------------------------------------------------*/ + +size_t MPU_xStreamBufferReceiveFromISR( StreamBufferHandle_t xStreamBuffer, void *pvRxData, size_t xBufferLengthBytes, BaseType_t * const pxHigherPriorityTaskWoken ) +{ +size_t xReturn; +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xStreamBufferReceiveFromISR( xStreamBuffer, pvRxData, xBufferLengthBytes, pxHigherPriorityTaskWoken ); + vPortResetPrivilege( xRunningPrivileged ); + + return xReturn; +} +/*-----------------------------------------------------------*/ + +void MPU_vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer ) +{ +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + vStreamBufferDelete( xStreamBuffer ); + vPortResetPrivilege( xRunningPrivileged ); +} +/*-----------------------------------------------------------*/ + +BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) +{ +BaseType_t xReturn; +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xStreamBufferIsFull( xStreamBuffer ); + vPortResetPrivilege( xRunningPrivileged ); + + return xReturn; +} +/*-----------------------------------------------------------*/ + +BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) +{ +BaseType_t xReturn; +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xStreamBufferIsEmpty( xStreamBuffer ); + vPortResetPrivilege( xRunningPrivileged ); + + return xReturn; +} +/*-----------------------------------------------------------*/ + +BaseType_t MPU_xStreamBufferReset( StreamBufferHandle_t xStreamBuffer ) +{ +BaseType_t xReturn; +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xStreamBufferReset( xStreamBuffer ); + vPortResetPrivilege( xRunningPrivileged ); + + return xReturn; +} +/*-----------------------------------------------------------*/ + +size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) +{ +size_t xReturn; +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xStreamBufferSpacesAvailable( xStreamBuffer ); + vPortResetPrivilege( xRunningPrivileged ); + + return xReturn; +} +/*-----------------------------------------------------------*/ + +size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) +{ +size_t xReturn; +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xStreamBufferBytesAvailable( xStreamBuffer ); + vPortResetPrivilege( xRunningPrivileged ); + + return xReturn; +} +/*-----------------------------------------------------------*/ + +BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, size_t xTriggerLevel ) +{ +BaseType_t xReturn; +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xStreamBufferSetTriggerLevel( xStreamBuffer, xTriggerLevel ); + vPortResetPrivilege( xRunningPrivileged ); + + return xReturn; +} +/*-----------------------------------------------------------*/ + +#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) + StreamBufferHandle_t MPU_xStreamBufferGenericCreate( size_t xBufferSizeBytes, size_t xTriggerLevelBytes, BaseType_t xIsMessageBuffer ) + { + StreamBufferHandle_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xStreamBufferGenericCreate( xBufferSizeBytes, xTriggerLevelBytes, xIsMessageBuffer ); + vPortResetPrivilege( xRunningPrivileged ); + + return xReturn; + } +#endif /* configSUPPORT_DYNAMIC_ALLOCATION */ +/*-----------------------------------------------------------*/ + +#if( configSUPPORT_STATIC_ALLOCATION == 1 ) + StreamBufferHandle_t MPU_xStreamBufferGenericCreateStatic( size_t xBufferSizeBytes, size_t xTriggerLevelBytes, BaseType_t xIsMessageBuffer, uint8_t * const pucStreamBufferStorageArea, StaticStreamBuffer_t * const pxStaticStreamBuffer ) + { + StreamBufferHandle_t xReturn; + BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + xReturn = xStreamBufferGenericCreateStatic( xBufferSizeBytes, xTriggerLevelBytes, xIsMessageBuffer, pucStreamBufferStorageArea, pxStaticStreamBuffer ); + vPortResetPrivilege( xRunningPrivileged ); + + return xReturn; + } +#endif /* configSUPPORT_STATIC_ALLOCATION */ +/*-----------------------------------------------------------*/ + + +/* Functions that the application writer wants to execute in privileged mode +can be defined in application_defined_privileged_functions.h. The functions +must take the same format as those above whereby the privilege state on exit +equals the privilege state on entry. For example: + +void MPU_FunctionName( [parameters ] ) +{ +BaseType_t xRunningPrivileged = xPortRaisePrivilege(); + + FunctionName( [parameters ] ); + + vPortResetPrivilege( xRunningPrivileged ); +} +*/ + +#if configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS == 1 + #include "application_defined_privileged_functions.h" +#endif diff --git a/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM0/port.c b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM0/port.c new file mode 100644 index 0000000..aaa1801 --- /dev/null +++ b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM0/port.c @@ -0,0 +1,416 @@ +/* + * FreeRTOS Kernel V10.0.1 + * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/*----------------------------------------------------------- + * Implementation of functions defined in portable.h for the ARM CM0 port. + *----------------------------------------------------------*/ + +/* IAR includes. */ +#include "intrinsics.h" + +/* Scheduler includes. */ +#include "FreeRTOS.h" +#include "task.h" + +#ifndef configSYSTICK_CLOCK_HZ + #define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ +#endif + +/* Constants required to manipulate the NVIC. */ +/* Constants required to manipulate the NVIC. */ +#define portNVIC_SYSTICK_CTRL ( * ( ( volatile uint32_t * ) 0xe000e010 ) ) +#define portNVIC_SYSTICK_LOAD ( * ( ( volatile uint32_t * ) 0xe000e014 ) ) +#define portNVIC_SYSTICK_CURRENT_VALUE ( * ( ( volatile uint32_t * ) 0xe000e018 ) ) +#define portNVIC_SYSPRI2 ( * ( ( volatile uint32_t * ) 0xe000ed20 ) ) +#define portNVIC_SYSTICK_CLK 0x00000004 +#define portNVIC_SYSTICK_INT 0x00000002 +#define portNVIC_SYSTICK_ENABLE 0x00000001 +#define portNVIC_SYSTICK_COUNT_FLAG ( 1UL << 16UL ) +#define portMIN_INTERRUPT_PRIORITY ( 255UL ) +#define portNVIC_PENDSV_PRI ( portMIN_INTERRUPT_PRIORITY << 16UL ) +#define portNVIC_SYSTICK_PRI ( portMIN_INTERRUPT_PRIORITY << 24UL ) + +/* Constants required to set up the initial stack. */ +#define portINITIAL_XPSR ( 0x01000000 ) + +/* For backward compatibility, ensure configKERNEL_INTERRUPT_PRIORITY is +defined. The value 255 should also ensure backward compatibility. +FreeRTOS.org versions prior to V4.3.0 did not include this definition. */ +#ifndef configKERNEL_INTERRUPT_PRIORITY + #define configKERNEL_INTERRUPT_PRIORITY 0 +#endif + +/* The systick is a 24-bit counter. */ +#define portMAX_24_BIT_NUMBER ( 0xffffffUL ) + +/* A fiddle factor to estimate the number of SysTick counts that would have +occurred while the SysTick counter is stopped during tickless idle +calculations. */ +#define portMISSED_COUNTS_FACTOR ( 45UL ) + +/* Each task maintains its own interrupt status in the critical nesting +variable. */ +static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; + +/* + * Setup the timer to generate the tick interrupts. + */ +static void prvSetupTimerInterrupt( void ); + +/* + * Exception handlers. + */ +void xPortSysTickHandler( void ); + +/* + * Start first task is a separate function so it can be tested in isolation. + */ +extern void vPortStartFirstTask( void ); + +/* + * Used to catch tasks that attempt to return from their implementing function. + */ +static void prvTaskExitError( void ); + +/*-----------------------------------------------------------*/ + +/* + * The number of SysTick increments that make up one tick period. + */ +#if configUSE_TICKLESS_IDLE == 1 + static unsigned long ulTimerCountsForOneTick = 0; +#endif /* configUSE_TICKLESS_IDLE */ + +/* + * The maximum number of tick periods that can be suppressed is limited by the + * 24 bit resolution of the SysTick timer. + */ +#if configUSE_TICKLESS_IDLE == 1 + static unsigned long xMaximumPossibleSuppressedTicks = 0; +#endif /* configUSE_TICKLESS_IDLE */ + +/* + * Compensate for the CPU cycles that pass while the SysTick is stopped (low + * power functionality only. + */ +#if configUSE_TICKLESS_IDLE == 1 + static unsigned long ulStoppedTimerCompensation = 0; +#endif /* configUSE_TICKLESS_IDLE */ + +/* + * See header file for description. + */ +StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters ) +{ + /* Simulate the stack frame as it would be created by a context switch + interrupt. */ + pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ + *pxTopOfStack = portINITIAL_XPSR; /* xPSR */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pxCode; /* PC */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) prvTaskExitError; /* LR */ + pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ + *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */ + pxTopOfStack -= 8; /* R11..R4. */ + + return pxTopOfStack; +} +/*-----------------------------------------------------------*/ + +static void prvTaskExitError( void ) +{ + /* A function that implements a task must not exit or attempt to return to + its caller as there is nothing to return to. If a task wants to exit it + should instead call vTaskDelete( NULL ). + + Artificially force an assert() to be triggered if configASSERT() is + defined, then stop here so application writers can catch the error. */ + configASSERT( uxCriticalNesting == ~0UL ); + portDISABLE_INTERRUPTS(); + for( ;; ); +} +/*-----------------------------------------------------------*/ + +/* + * See header file for description. + */ +BaseType_t xPortStartScheduler( void ) +{ + /* Make PendSV and SysTick the lowest priority interrupts. */ + portNVIC_SYSPRI2 |= portNVIC_PENDSV_PRI; + portNVIC_SYSPRI2 |= portNVIC_SYSTICK_PRI; + + /* Start the timer that generates the tick ISR. Interrupts are disabled + here already. */ + prvSetupTimerInterrupt(); + + /* Initialise the critical nesting count ready for the first task. */ + uxCriticalNesting = 0; + + /* Start the first task. */ + vPortStartFirstTask(); + + /* Should not get here! */ + return 0; +} +/*-----------------------------------------------------------*/ + +void vPortEndScheduler( void ) +{ + /* Not implemented in ports where there is nothing to return to. + Artificially force an assert. */ + configASSERT( uxCriticalNesting == 1000UL ); +} +/*-----------------------------------------------------------*/ + +void vPortYield( void ) +{ + /* Set a PendSV to request a context switch. */ + *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET; + + /* Barriers are normally not required but do ensure the code is completely + within the specified behaviour for the architecture. */ + __DSB(); + __ISB(); +} +/*-----------------------------------------------------------*/ + +void vPortEnterCritical( void ) +{ + portDISABLE_INTERRUPTS(); + uxCriticalNesting++; + __DSB(); + __ISB(); +} +/*-----------------------------------------------------------*/ + +void vPortExitCritical( void ) +{ + configASSERT( uxCriticalNesting ); + uxCriticalNesting--; + if( uxCriticalNesting == 0 ) + { + portENABLE_INTERRUPTS(); + } +} +/*-----------------------------------------------------------*/ + +void xPortSysTickHandler( void ) +{ +uint32_t ulPreviousMask; + + ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR(); + { + /* Increment the RTOS tick. */ + if( xTaskIncrementTick() != pdFALSE ) + { + /* Pend a context switch. */ + *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET; + } + } + portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask ); +} +/*-----------------------------------------------------------*/ + +#if configUSE_TICKLESS_IDLE == 1 + + __weak void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime ) + { + uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickCTRL; + TickType_t xModifiableIdleTime; + + /* Make sure the SysTick reload value does not overflow the counter. */ + if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks ) + { + xExpectedIdleTime = xMaximumPossibleSuppressedTicks; + } + + /* Stop the SysTick momentarily. The time the SysTick is stopped for + is accounted for as best it can be, but using the tickless mode will + inevitably result in some tiny drift of the time maintained by the + kernel with respect to calendar time. */ + portNVIC_SYSTICK_CTRL &= ~portNVIC_SYSTICK_ENABLE; + + /* Calculate the reload value required to wait xExpectedIdleTime + tick periods. -1 is used because this code will execute part way + through one of the tick periods. */ + ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); + if( ulReloadValue > ulStoppedTimerCompensation ) + { + ulReloadValue -= ulStoppedTimerCompensation; + } + + /* Enter a critical section but don't use the taskENTER_CRITICAL() + method as that will mask interrupts that should exit sleep mode. */ + __disable_interrupt(); + + /* If a context switch is pending or a task is waiting for the scheduler + to be unsuspended then abandon the low power entry. */ + if( eTaskConfirmSleepModeStatus() == eAbortSleep ) + { + /* Restart from whatever is left in the count register to complete + this tick period. */ + portNVIC_SYSTICK_LOAD = portNVIC_SYSTICK_CURRENT_VALUE; + + /* Restart SysTick. */ + portNVIC_SYSTICK_CTRL |= portNVIC_SYSTICK_ENABLE; + + /* Reset the reload register to the value required for normal tick + periods. */ + portNVIC_SYSTICK_LOAD = ulTimerCountsForOneTick - 1UL; + + /* Re-enable interrupts - see comments above __disable_interrupt() + call above. */ + __enable_interrupt(); + } + else + { + /* Set the new reload value. */ + portNVIC_SYSTICK_LOAD = ulReloadValue; + + /* Clear the SysTick count flag and set the count value back to + zero. */ + portNVIC_SYSTICK_CURRENT_VALUE = 0UL; + + /* Restart SysTick. */ + portNVIC_SYSTICK_CTRL |= portNVIC_SYSTICK_ENABLE; + + /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can + set its parameter to 0 to indicate that its implementation contains + its own wait for interrupt or wait for event instruction, and so wfi + should not be executed again. However, the original expected idle + time variable must remain unmodified, so a copy is taken. */ + xModifiableIdleTime = xExpectedIdleTime; + configPRE_SLEEP_PROCESSING( &xModifiableIdleTime ); + if( xModifiableIdleTime > 0 ) + { + __DSB(); + __WFI(); + __ISB(); + } + configPOST_SLEEP_PROCESSING( &xExpectedIdleTime ); + + /* Stop SysTick. Again, the time the SysTick is stopped for is + accounted for as best it can be, but using the tickless mode will + inevitably result in some tiny drift of the time maintained by the + kernel with respect to calendar time. */ + ulSysTickCTRL = portNVIC_SYSTICK_CTRL; + portNVIC_SYSTICK_CTRL = ( ulSysTickCTRL & ~portNVIC_SYSTICK_ENABLE ); + + /* Re-enable interrupts - see comments above __disable_interrupt() + call above. */ + __enable_interrupt(); + + if( ( ulSysTickCTRL & portNVIC_SYSTICK_COUNT_FLAG ) != 0 ) + { + uint32_t ulCalculatedLoadValue; + + /* The tick interrupt has already executed, and the SysTick + count reloaded with ulReloadValue. Reset the + portNVIC_SYSTICK_LOAD_REG with whatever remains of this tick + period. */ + ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE ); + + /* Don't allow a tiny value, or values that have somehow + underflowed because the post sleep hook did something + that took too long. */ + if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) ) + { + ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ); + } + + portNVIC_SYSTICK_LOAD = ulCalculatedLoadValue; + + /* The tick interrupt handler will already have pended the tick + processing in the kernel. As the pending tick will be + processed as soon as this function exits, the tick value + maintained by the tick is stepped forward by one less than the + time spent waiting. */ + ulCompleteTickPeriods = xExpectedIdleTime - 1UL; + } + else + { + /* Something other than the tick interrupt ended the sleep. + Work out how long the sleep lasted rounded to complete tick + periods (not the ulReload value which accounted for part + ticks). */ + ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE; + + /* How many complete tick periods passed while the processor + was waiting? */ + ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick; + + /* The reload value is set to whatever fraction of a single tick + period remains. */ + portNVIC_SYSTICK_LOAD = ( ( ulCompleteTickPeriods + 1 ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements; + } + + /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG + again, then set portNVIC_SYSTICK_LOAD_REG back to its standard + value. The critical section is used to ensure the tick interrupt + can only execute once in the case that the reload register is near + zero. */ + portNVIC_SYSTICK_CURRENT_VALUE = 0UL; + portENTER_CRITICAL(); + { + portNVIC_SYSTICK_CTRL |= portNVIC_SYSTICK_ENABLE; + vTaskStepTick( ulCompleteTickPeriods ); + portNVIC_SYSTICK_LOAD = ulTimerCountsForOneTick - 1UL; + } + portEXIT_CRITICAL(); + } + } + +#endif /* #if configUSE_TICKLESS_IDLE */ +/*-----------------------------------------------------------*/ + +/* + * Setup the systick timer to generate the tick interrupts at the required + * frequency. + */ +static void prvSetupTimerInterrupt( void ) +{ + /* Calculate the constants required to configure the tick interrupt. */ + #if configUSE_TICKLESS_IDLE == 1 + { + ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ); + xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick; + ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ ); + } + #endif /* configUSE_TICKLESS_IDLE */ + + /* Stop and reset the SysTick. */ + portNVIC_SYSTICK_CTRL = 0UL; + portNVIC_SYSTICK_CURRENT_VALUE = 0UL; + + /* Configure SysTick to interrupt at the requested rate. */ + portNVIC_SYSTICK_LOAD = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; + portNVIC_SYSTICK_CTRL = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE; +} +/*-----------------------------------------------------------*/ + diff --git a/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM0/portasm.s b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM0/portasm.s new file mode 100644 index 0000000..ec98a86 --- /dev/null +++ b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM0/portasm.s @@ -0,0 +1,131 @@ +/* + * FreeRTOS Kernel V10.0.1 + * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#include + + RSEG CODE:CODE(2) + thumb + + EXTERN vPortYieldFromISR + EXTERN pxCurrentTCB + EXTERN vTaskSwitchContext + + PUBLIC vSetMSP + PUBLIC xPortPendSVHandler + PUBLIC vPortSVCHandler + PUBLIC vPortStartFirstTask + PUBLIC ulSetInterruptMaskFromISR + PUBLIC vClearInterruptMaskFromISR + +/*-----------------------------------------------------------*/ + +vSetMSP + msr msp, r0 + bx lr + +/*-----------------------------------------------------------*/ + +xPortPendSVHandler: + mrs r0, psp + + ldr r3, =pxCurrentTCB /* Get the location of the current TCB. */ + ldr r2, [r3] + + subs r0, r0, #32 /* Make space for the remaining low registers. */ + str r0, [r2] /* Save the new top of stack. */ + stmia r0!, {r4-r7} /* Store the low registers that are not saved automatically. */ + mov r4, r8 /* Store the high registers. */ + mov r5, r9 + mov r6, r10 + mov r7, r11 + stmia r0!, {r4-r7} + + push {r3, r14} + cpsid i + bl vTaskSwitchContext + cpsie i + pop {r2, r3} /* lr goes in r3. r2 now holds tcb pointer. */ + + ldr r1, [r2] + ldr r0, [r1] /* The first item in pxCurrentTCB is the task top of stack. */ + adds r0, r0, #16 /* Move to the high registers. */ + ldmia r0!, {r4-r7} /* Pop the high registers. */ + mov r8, r4 + mov r9, r5 + mov r10, r6 + mov r11, r7 + + msr psp, r0 /* Remember the new top of stack for the task. */ + + subs r0, r0, #32 /* Go back for the low registers that are not automatically restored. */ + ldmia r0!, {r4-r7} /* Pop low registers. */ + + bx r3 + +/*-----------------------------------------------------------*/ + +vPortSVCHandler; + /* This function is no longer used, but retained for backward + compatibility. */ + bx lr + +/*-----------------------------------------------------------*/ + +vPortStartFirstTask + /* The MSP stack is not reset as, unlike on M3/4 parts, there is no vector + table offset register that can be used to locate the initial stack value. + Not all M0 parts have the application vector table at address 0. */ + + ldr r3, =pxCurrentTCB /* Obtain location of pxCurrentTCB. */ + ldr r1, [r3] + ldr r0, [r1] /* The first item in pxCurrentTCB is the task top of stack. */ + adds r0, #32 /* Discard everything up to r0. */ + msr psp, r0 /* This is now the new top of stack to use in the task. */ + movs r0, #2 /* Switch to the psp stack. */ + msr CONTROL, r0 + isb + pop {r0-r5} /* Pop the registers that are saved automatically. */ + mov lr, r5 /* lr is now in r5. */ + pop {r3} /* The return address is now in r3. */ + pop {r2} /* Pop and discard the XPSR. */ + cpsie i /* The first task has its context and interrupts can be enabled. */ + bx r3 /* Jump to the user defined task code. */ + +/*-----------------------------------------------------------*/ + +ulSetInterruptMaskFromISR + mrs r0, PRIMASK + cpsid i + bx lr + +/*-----------------------------------------------------------*/ + +vClearInterruptMaskFromISR + msr PRIMASK, r0 + bx lr + + END diff --git a/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM0/portmacro.h b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM0/portmacro.h new file mode 100644 index 0000000..02e2cbd --- /dev/null +++ b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/portable/IAR/ARM_CM0/portmacro.h @@ -0,0 +1,128 @@ +/* + * FreeRTOS Kernel V10.0.1 + * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + + +#ifndef PORTMACRO_H +#define PORTMACRO_H + +#ifdef __cplusplus +extern "C" { +#endif + +/*----------------------------------------------------------- + * Port specific definitions. + * + * The settings in this file configure FreeRTOS correctly for the + * given hardware and compiler. + * + * These settings should not be altered. + *----------------------------------------------------------- + */ + +/* Type definitions. */ +#define portCHAR char +#define portFLOAT float +#define portDOUBLE double +#define portLONG long +#define portSHORT short +#define portSTACK_TYPE uint32_t +#define portBASE_TYPE long + +typedef portSTACK_TYPE StackType_t; +typedef long BaseType_t; +typedef unsigned long UBaseType_t; + + +#if( configUSE_16_BIT_TICKS == 1 ) + typedef uint16_t TickType_t; + #define portMAX_DELAY ( TickType_t ) 0xffff +#else + typedef uint32_t TickType_t; + #define portMAX_DELAY ( TickType_t ) 0xffffffffUL + + /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do + not need to be guarded with a critical section. */ + #define portTICK_TYPE_IS_ATOMIC 1 +#endif +/*-----------------------------------------------------------*/ + +/* Architecture specifics. */ +#define portSTACK_GROWTH ( -1 ) +#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ ) +#define portBYTE_ALIGNMENT 8 +/*-----------------------------------------------------------*/ + + +/* Scheduler utilities. */ +extern void vPortYield( void ); +#define portNVIC_INT_CTRL ( ( volatile uint32_t *) 0xe000ed04 ) +#define portNVIC_PENDSVSET 0x10000000 +#define portYIELD() vPortYield() +#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET +#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) +/*-----------------------------------------------------------*/ + + +/* Critical section management. */ + +extern void vPortEnterCritical( void ); +extern void vPortExitCritical( void ); +extern uint32_t ulSetInterruptMaskFromISR( void ); +extern void vClearInterruptMaskFromISR( uint32_t ulMask ); + +#define portDISABLE_INTERRUPTS() __asm volatile( "cpsid i" ) +#define portENABLE_INTERRUPTS() __asm volatile( "cpsie i" ) +#define portENTER_CRITICAL() vPortEnterCritical() +#define portEXIT_CRITICAL() vPortExitCritical() +#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMaskFromISR() +#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vClearInterruptMaskFromISR( x ) + +/*-----------------------------------------------------------*/ + +/* Tickless idle/low power functionality. */ +#ifndef portSUPPRESS_TICKS_AND_SLEEP + extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime ); + #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime ) +#endif +/*-----------------------------------------------------------*/ +/* Task function macros as described on the FreeRTOS.org WEB site. */ +#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters ) +#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters ) + +#define portNOP() + +/* Suppress warnings that are generated by the IAR tools, but cannot be fixed in +the source code because to do so would cause other compilers to generate +warnings. */ +#pragma diag_suppress=Pa082 + +#ifdef __cplusplus +} +#endif + +#endif /* PORTMACRO_H */ + diff --git a/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/portable/Keil/See-also-the-RVDS-directory.txt b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/portable/Keil/See-also-the-RVDS-directory.txt new file mode 100644 index 0000000..bd7fab7 --- /dev/null +++ b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/portable/Keil/See-also-the-RVDS-directory.txt @@ -0,0 +1 @@ +Nothing to see here. \ No newline at end of file diff --git a/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/ReadMe.url b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/ReadMe.url new file mode 100644 index 0000000..6c23737 --- /dev/null +++ b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/ReadMe.url @@ -0,0 +1,5 @@ +[{000214A0-0000-0000-C000-000000000046}] +Prop3=19,2 +[InternetShortcut] +URL=http://www.freertos.org/a00111.html +IDList= diff --git a/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_1.c b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_1.c new file mode 100644 index 0000000..7ff6dfa --- /dev/null +++ b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_1.c @@ -0,0 +1,147 @@ +/* + * FreeRTOS Kernel V10.0.1 + * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + + +/* + * The simplest possible implementation of pvPortMalloc(). Note that this + * implementation does NOT allow allocated memory to be freed again. + * + * See heap_2.c, heap_3.c and heap_4.c for alternative implementations, and the + * memory management pages of http://www.FreeRTOS.org for more information. + */ +#include + +/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining +all the API functions to use the MPU wrappers. That should only be done when +task.h is included from an application file. */ +#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE + +#include "FreeRTOS.h" +#include "task.h" + +#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE + +#if( configSUPPORT_DYNAMIC_ALLOCATION == 0 ) + #error This file must not be used if configSUPPORT_DYNAMIC_ALLOCATION is 0 +#endif + +/* A few bytes might be lost to byte aligning the heap start address. */ +#define configADJUSTED_HEAP_SIZE ( configTOTAL_HEAP_SIZE - portBYTE_ALIGNMENT ) + +/* Allocate the memory for the heap. */ +/* Allocate the memory for the heap. */ +#if( configAPPLICATION_ALLOCATED_HEAP == 1 ) + /* The application writer has already defined the array used for the RTOS + heap - probably so it can be placed in a special segment or address. */ + extern uint8_t ucHeap[ configTOTAL_HEAP_SIZE ]; +#else + static uint8_t ucHeap[ configTOTAL_HEAP_SIZE ]; +#endif /* configAPPLICATION_ALLOCATED_HEAP */ + +/* Index into the ucHeap array. */ +static size_t xNextFreeByte = ( size_t ) 0; + +/*-----------------------------------------------------------*/ + +void *pvPortMalloc( size_t xWantedSize ) +{ +void *pvReturn = NULL; +static uint8_t *pucAlignedHeap = NULL; + + /* Ensure that blocks are always aligned to the required number of bytes. */ + #if( portBYTE_ALIGNMENT != 1 ) + { + if( xWantedSize & portBYTE_ALIGNMENT_MASK ) + { + /* Byte alignment required. */ + xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & portBYTE_ALIGNMENT_MASK ) ); + } + } + #endif + + vTaskSuspendAll(); + { + if( pucAlignedHeap == NULL ) + { + /* Ensure the heap starts on a correctly aligned boundary. */ + pucAlignedHeap = ( uint8_t * ) ( ( ( portPOINTER_SIZE_TYPE ) &ucHeap[ portBYTE_ALIGNMENT ] ) & ( ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) ) ); + } + + /* Check there is enough room left for the allocation. */ + if( ( ( xNextFreeByte + xWantedSize ) < configADJUSTED_HEAP_SIZE ) && + ( ( xNextFreeByte + xWantedSize ) > xNextFreeByte ) )/* Check for overflow. */ + { + /* Return the next free byte then increment the index past this + block. */ + pvReturn = pucAlignedHeap + xNextFreeByte; + xNextFreeByte += xWantedSize; + } + + traceMALLOC( pvReturn, xWantedSize ); + } + ( void ) xTaskResumeAll(); + + #if( configUSE_MALLOC_FAILED_HOOK == 1 ) + { + if( pvReturn == NULL ) + { + extern void vApplicationMallocFailedHook( void ); + vApplicationMallocFailedHook(); + } + } + #endif + + return pvReturn; +} +/*-----------------------------------------------------------*/ + +void vPortFree( void *pv ) +{ + /* Memory cannot be freed using this scheme. See heap_2.c, heap_3.c and + heap_4.c for alternative implementations, and the memory management pages of + http://www.FreeRTOS.org for more information. */ + ( void ) pv; + + /* Force an assert as it is invalid to call this function. */ + configASSERT( pv == NULL ); +} +/*-----------------------------------------------------------*/ + +void vPortInitialiseBlocks( void ) +{ + /* Only required when static memory is not cleared. */ + xNextFreeByte = ( size_t ) 0; +} +/*-----------------------------------------------------------*/ + +size_t xPortGetFreeHeapSize( void ) +{ + return ( configADJUSTED_HEAP_SIZE - xNextFreeByte ); +} + + + diff --git a/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_2.c b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_2.c new file mode 100644 index 0000000..941b4f2 --- /dev/null +++ b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_2.c @@ -0,0 +1,272 @@ +/* + * FreeRTOS Kernel V10.0.1 + * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/* + * A sample implementation of pvPortMalloc() and vPortFree() that permits + * allocated blocks to be freed, but does not combine adjacent free blocks + * into a single larger block (and so will fragment memory). See heap_4.c for + * an equivalent that does combine adjacent blocks into single larger blocks. + * + * See heap_1.c, heap_3.c and heap_4.c for alternative implementations, and the + * memory management pages of http://www.FreeRTOS.org for more information. + */ +#include + +/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining +all the API functions to use the MPU wrappers. That should only be done when +task.h is included from an application file. */ +#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE + +#include "FreeRTOS.h" +#include "task.h" + +#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE + +#if( configSUPPORT_DYNAMIC_ALLOCATION == 0 ) + #error This file must not be used if configSUPPORT_DYNAMIC_ALLOCATION is 0 +#endif + +/* A few bytes might be lost to byte aligning the heap start address. */ +#define configADJUSTED_HEAP_SIZE ( configTOTAL_HEAP_SIZE - portBYTE_ALIGNMENT ) + +/* + * Initialises the heap structures before their first use. + */ +static void prvHeapInit( void ); + +/* Allocate the memory for the heap. */ +#if( configAPPLICATION_ALLOCATED_HEAP == 1 ) + /* The application writer has already defined the array used for the RTOS + heap - probably so it can be placed in a special segment or address. */ + extern uint8_t ucHeap[ configTOTAL_HEAP_SIZE ]; +#else + static uint8_t ucHeap[ configTOTAL_HEAP_SIZE ]; +#endif /* configAPPLICATION_ALLOCATED_HEAP */ + + +/* Define the linked list structure. This is used to link free blocks in order +of their size. */ +typedef struct A_BLOCK_LINK +{ + struct A_BLOCK_LINK *pxNextFreeBlock; /*<< The next free block in the list. */ + size_t xBlockSize; /*<< The size of the free block. */ +} BlockLink_t; + + +static const uint16_t heapSTRUCT_SIZE = ( ( sizeof ( BlockLink_t ) + ( portBYTE_ALIGNMENT - 1 ) ) & ~portBYTE_ALIGNMENT_MASK ); +#define heapMINIMUM_BLOCK_SIZE ( ( size_t ) ( heapSTRUCT_SIZE * 2 ) ) + +/* Create a couple of list links to mark the start and end of the list. */ +static BlockLink_t xStart, xEnd; + +/* Keeps track of the number of free bytes remaining, but says nothing about +fragmentation. */ +static size_t xFreeBytesRemaining = configADJUSTED_HEAP_SIZE; + +/* STATIC FUNCTIONS ARE DEFINED AS MACROS TO MINIMIZE THE FUNCTION CALL DEPTH. */ + +/* + * Insert a block into the list of free blocks - which is ordered by size of + * the block. Small blocks at the start of the list and large blocks at the end + * of the list. + */ +#define prvInsertBlockIntoFreeList( pxBlockToInsert ) \ +{ \ +BlockLink_t *pxIterator; \ +size_t xBlockSize; \ + \ + xBlockSize = pxBlockToInsert->xBlockSize; \ + \ + /* Iterate through the list until a block is found that has a larger size */ \ + /* than the block we are inserting. */ \ + for( pxIterator = &xStart; pxIterator->pxNextFreeBlock->xBlockSize < xBlockSize; pxIterator = pxIterator->pxNextFreeBlock ) \ + { \ + /* There is nothing to do here - just iterate to the correct position. */ \ + } \ + \ + /* Update the list to include the block being inserted in the correct */ \ + /* position. */ \ + pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock; \ + pxIterator->pxNextFreeBlock = pxBlockToInsert; \ +} +/*-----------------------------------------------------------*/ + +void *pvPortMalloc( size_t xWantedSize ) +{ +BlockLink_t *pxBlock, *pxPreviousBlock, *pxNewBlockLink; +static BaseType_t xHeapHasBeenInitialised = pdFALSE; +void *pvReturn = NULL; + + vTaskSuspendAll(); + { + /* If this is the first call to malloc then the heap will require + initialisation to setup the list of free blocks. */ + if( xHeapHasBeenInitialised == pdFALSE ) + { + prvHeapInit(); + xHeapHasBeenInitialised = pdTRUE; + } + + /* The wanted size is increased so it can contain a BlockLink_t + structure in addition to the requested amount of bytes. */ + if( xWantedSize > 0 ) + { + xWantedSize += heapSTRUCT_SIZE; + + /* Ensure that blocks are always aligned to the required number of bytes. */ + if( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) != 0 ) + { + /* Byte alignment required. */ + xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & portBYTE_ALIGNMENT_MASK ) ); + } + } + + if( ( xWantedSize > 0 ) && ( xWantedSize < configADJUSTED_HEAP_SIZE ) ) + { + /* Blocks are stored in byte order - traverse the list from the start + (smallest) block until one of adequate size is found. */ + pxPreviousBlock = &xStart; + pxBlock = xStart.pxNextFreeBlock; + while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) ) + { + pxPreviousBlock = pxBlock; + pxBlock = pxBlock->pxNextFreeBlock; + } + + /* If we found the end marker then a block of adequate size was not found. */ + if( pxBlock != &xEnd ) + { + /* Return the memory space - jumping over the BlockLink_t structure + at its start. */ + pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + heapSTRUCT_SIZE ); + + /* This block is being returned for use so must be taken out of the + list of free blocks. */ + pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock; + + /* If the block is larger than required it can be split into two. */ + if( ( pxBlock->xBlockSize - xWantedSize ) > heapMINIMUM_BLOCK_SIZE ) + { + /* This block is to be split into two. Create a new block + following the number of bytes requested. The void cast is + used to prevent byte alignment warnings from the compiler. */ + pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize ); + + /* Calculate the sizes of two blocks split from the single + block. */ + pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize; + pxBlock->xBlockSize = xWantedSize; + + /* Insert the new block into the list of free blocks. */ + prvInsertBlockIntoFreeList( ( pxNewBlockLink ) ); + } + + xFreeBytesRemaining -= pxBlock->xBlockSize; + } + } + + traceMALLOC( pvReturn, xWantedSize ); + } + ( void ) xTaskResumeAll(); + + #if( configUSE_MALLOC_FAILED_HOOK == 1 ) + { + if( pvReturn == NULL ) + { + extern void vApplicationMallocFailedHook( void ); + vApplicationMallocFailedHook(); + } + } + #endif + + return pvReturn; +} +/*-----------------------------------------------------------*/ + +void vPortFree( void *pv ) +{ +uint8_t *puc = ( uint8_t * ) pv; +BlockLink_t *pxLink; + + if( pv != NULL ) + { + /* The memory being freed will have an BlockLink_t structure immediately + before it. */ + puc -= heapSTRUCT_SIZE; + + /* This unexpected casting is to keep some compilers from issuing + byte alignment warnings. */ + pxLink = ( void * ) puc; + + vTaskSuspendAll(); + { + /* Add this block to the list of free blocks. */ + prvInsertBlockIntoFreeList( ( ( BlockLink_t * ) pxLink ) ); + xFreeBytesRemaining += pxLink->xBlockSize; + traceFREE( pv, pxLink->xBlockSize ); + } + ( void ) xTaskResumeAll(); + } +} +/*-----------------------------------------------------------*/ + +size_t xPortGetFreeHeapSize( void ) +{ + return xFreeBytesRemaining; +} +/*-----------------------------------------------------------*/ + +void vPortInitialiseBlocks( void ) +{ + /* This just exists to keep the linker quiet. */ +} +/*-----------------------------------------------------------*/ + +static void prvHeapInit( void ) +{ +BlockLink_t *pxFirstFreeBlock; +uint8_t *pucAlignedHeap; + + /* Ensure the heap starts on a correctly aligned boundary. */ + pucAlignedHeap = ( uint8_t * ) ( ( ( portPOINTER_SIZE_TYPE ) &ucHeap[ portBYTE_ALIGNMENT ] ) & ( ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) ) ); + + /* xStart is used to hold a pointer to the first item in the list of free + blocks. The void cast is used to prevent compiler warnings. */ + xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap; + xStart.xBlockSize = ( size_t ) 0; + + /* xEnd is used to mark the end of the list of free blocks. */ + xEnd.xBlockSize = configADJUSTED_HEAP_SIZE; + xEnd.pxNextFreeBlock = NULL; + + /* To start with there is a single free block that is sized to take up the + entire heap space. */ + pxFirstFreeBlock = ( void * ) pucAlignedHeap; + pxFirstFreeBlock->xBlockSize = configADJUSTED_HEAP_SIZE; + pxFirstFreeBlock->pxNextFreeBlock = &xEnd; +} +/*-----------------------------------------------------------*/ diff --git a/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_3.c b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_3.c new file mode 100644 index 0000000..c8c3f54 --- /dev/null +++ b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_3.c @@ -0,0 +1,97 @@ +/* + * FreeRTOS Kernel V10.0.1 + * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + + +/* + * Implementation of pvPortMalloc() and vPortFree() that relies on the + * compilers own malloc() and free() implementations. + * + * This file can only be used if the linker is configured to to generate + * a heap memory area. + * + * See heap_1.c, heap_2.c and heap_4.c for alternative implementations, and the + * memory management pages of http://www.FreeRTOS.org for more information. + */ + +#include + +/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining +all the API functions to use the MPU wrappers. That should only be done when +task.h is included from an application file. */ +#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE + +#include "FreeRTOS.h" +#include "task.h" + +#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE + +#if( configSUPPORT_DYNAMIC_ALLOCATION == 0 ) + #error This file must not be used if configSUPPORT_DYNAMIC_ALLOCATION is 0 +#endif + +/*-----------------------------------------------------------*/ + +void *pvPortMalloc( size_t xWantedSize ) +{ +void *pvReturn; + + vTaskSuspendAll(); + { + pvReturn = malloc( xWantedSize ); + traceMALLOC( pvReturn, xWantedSize ); + } + ( void ) xTaskResumeAll(); + + #if( configUSE_MALLOC_FAILED_HOOK == 1 ) + { + if( pvReturn == NULL ) + { + extern void vApplicationMallocFailedHook( void ); + vApplicationMallocFailedHook(); + } + } + #endif + + return pvReturn; +} +/*-----------------------------------------------------------*/ + +void vPortFree( void *pv ) +{ + if( pv ) + { + vTaskSuspendAll(); + { + free( pv ); + traceFREE( pv, 0 ); + } + ( void ) xTaskResumeAll(); + } +} + + + diff --git a/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c new file mode 100644 index 0000000..94bf5bb --- /dev/null +++ b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c @@ -0,0 +1,436 @@ +/* + * FreeRTOS Kernel V10.0.1 + * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/* + * A sample implementation of pvPortMalloc() and vPortFree() that combines + * (coalescences) adjacent memory blocks as they are freed, and in so doing + * limits memory fragmentation. + * + * See heap_1.c, heap_2.c and heap_3.c for alternative implementations, and the + * memory management pages of http://www.FreeRTOS.org for more information. + */ +#include + +/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining +all the API functions to use the MPU wrappers. That should only be done when +task.h is included from an application file. */ +#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE + +#include "FreeRTOS.h" +#include "task.h" + +#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE + +#if( configSUPPORT_DYNAMIC_ALLOCATION == 0 ) + #error This file must not be used if configSUPPORT_DYNAMIC_ALLOCATION is 0 +#endif + +/* Block sizes must not get too small. */ +#define heapMINIMUM_BLOCK_SIZE ( ( size_t ) ( xHeapStructSize << 1 ) ) + +/* Assumes 8bit bytes! */ +#define heapBITS_PER_BYTE ( ( size_t ) 8 ) + +/* Allocate the memory for the heap. */ +#if( configAPPLICATION_ALLOCATED_HEAP == 1 ) + /* The application writer has already defined the array used for the RTOS + heap - probably so it can be placed in a special segment or address. */ + extern uint8_t ucHeap[ configTOTAL_HEAP_SIZE ]; +#else + static uint8_t ucHeap[ configTOTAL_HEAP_SIZE ]; +#endif /* configAPPLICATION_ALLOCATED_HEAP */ + +/* Define the linked list structure. This is used to link free blocks in order +of their memory address. */ +typedef struct A_BLOCK_LINK +{ + struct A_BLOCK_LINK *pxNextFreeBlock; /*<< The next free block in the list. */ + size_t xBlockSize; /*<< The size of the free block. */ +} BlockLink_t; + +/*-----------------------------------------------------------*/ + +/* + * Inserts a block of memory that is being freed into the correct position in + * the list of free memory blocks. The block being freed will be merged with + * the block in front it and/or the block behind it if the memory blocks are + * adjacent to each other. + */ +static void prvInsertBlockIntoFreeList( BlockLink_t *pxBlockToInsert ); + +/* + * Called automatically to setup the required heap structures the first time + * pvPortMalloc() is called. + */ +static void prvHeapInit( void ); + +/*-----------------------------------------------------------*/ + +/* The size of the structure placed at the beginning of each allocated memory +block must by correctly byte aligned. */ +static const size_t xHeapStructSize = ( sizeof( BlockLink_t ) + ( ( size_t ) ( portBYTE_ALIGNMENT - 1 ) ) ) & ~( ( size_t ) portBYTE_ALIGNMENT_MASK ); + +/* Create a couple of list links to mark the start and end of the list. */ +static BlockLink_t xStart, *pxEnd = NULL; + +/* Keeps track of the number of free bytes remaining, but says nothing about +fragmentation. */ +static size_t xFreeBytesRemaining = 0U; +static size_t xMinimumEverFreeBytesRemaining = 0U; + +/* Gets set to the top bit of an size_t type. When this bit in the xBlockSize +member of an BlockLink_t structure is set then the block belongs to the +application. When the bit is free the block is still part of the free heap +space. */ +static size_t xBlockAllocatedBit = 0; + +/*-----------------------------------------------------------*/ + +void *pvPortMalloc( size_t xWantedSize ) +{ +BlockLink_t *pxBlock, *pxPreviousBlock, *pxNewBlockLink; +void *pvReturn = NULL; + + vTaskSuspendAll(); + { + /* If this is the first call to malloc then the heap will require + initialisation to setup the list of free blocks. */ + if( pxEnd == NULL ) + { + prvHeapInit(); + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + + /* Check the requested block size is not so large that the top bit is + set. The top bit of the block size member of the BlockLink_t structure + is used to determine who owns the block - the application or the + kernel, so it must be free. */ + if( ( xWantedSize & xBlockAllocatedBit ) == 0 ) + { + /* The wanted size is increased so it can contain a BlockLink_t + structure in addition to the requested amount of bytes. */ + if( xWantedSize > 0 ) + { + xWantedSize += xHeapStructSize; + + /* Ensure that blocks are always aligned to the required number + of bytes. */ + if( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) != 0x00 ) + { + /* Byte alignment required. */ + xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & portBYTE_ALIGNMENT_MASK ) ); + configASSERT( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) == 0 ); + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + + if( ( xWantedSize > 0 ) && ( xWantedSize <= xFreeBytesRemaining ) ) + { + /* Traverse the list from the start (lowest address) block until + one of adequate size is found. */ + pxPreviousBlock = &xStart; + pxBlock = xStart.pxNextFreeBlock; + while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) ) + { + pxPreviousBlock = pxBlock; + pxBlock = pxBlock->pxNextFreeBlock; + } + + /* If the end marker was reached then a block of adequate size + was not found. */ + if( pxBlock != pxEnd ) + { + /* Return the memory space pointed to - jumping over the + BlockLink_t structure at its start. */ + pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + xHeapStructSize ); + + /* This block is being returned for use so must be taken out + of the list of free blocks. */ + pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock; + + /* If the block is larger than required it can be split into + two. */ + if( ( pxBlock->xBlockSize - xWantedSize ) > heapMINIMUM_BLOCK_SIZE ) + { + /* This block is to be split into two. Create a new + block following the number of bytes requested. The void + cast is used to prevent byte alignment warnings from the + compiler. */ + pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize ); + configASSERT( ( ( ( size_t ) pxNewBlockLink ) & portBYTE_ALIGNMENT_MASK ) == 0 ); + + /* Calculate the sizes of two blocks split from the + single block. */ + pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize; + pxBlock->xBlockSize = xWantedSize; + + /* Insert the new block into the list of free blocks. */ + prvInsertBlockIntoFreeList( pxNewBlockLink ); + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + + xFreeBytesRemaining -= pxBlock->xBlockSize; + + if( xFreeBytesRemaining < xMinimumEverFreeBytesRemaining ) + { + xMinimumEverFreeBytesRemaining = xFreeBytesRemaining; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + + /* The block is being returned - it is allocated and owned + by the application and has no "next" block. */ + pxBlock->xBlockSize |= xBlockAllocatedBit; + pxBlock->pxNextFreeBlock = NULL; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + + traceMALLOC( pvReturn, xWantedSize ); + } + ( void ) xTaskResumeAll(); + + #if( configUSE_MALLOC_FAILED_HOOK == 1 ) + { + if( pvReturn == NULL ) + { + extern void vApplicationMallocFailedHook( void ); + vApplicationMallocFailedHook(); + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + #endif + + configASSERT( ( ( ( size_t ) pvReturn ) & ( size_t ) portBYTE_ALIGNMENT_MASK ) == 0 ); + return pvReturn; +} +/*-----------------------------------------------------------*/ + +void vPortFree( void *pv ) +{ +uint8_t *puc = ( uint8_t * ) pv; +BlockLink_t *pxLink; + + if( pv != NULL ) + { + /* The memory being freed will have an BlockLink_t structure immediately + before it. */ + puc -= xHeapStructSize; + + /* This casting is to keep the compiler from issuing warnings. */ + pxLink = ( void * ) puc; + + /* Check the block is actually allocated. */ + configASSERT( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 ); + configASSERT( pxLink->pxNextFreeBlock == NULL ); + + if( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 ) + { + if( pxLink->pxNextFreeBlock == NULL ) + { + /* The block is being returned to the heap - it is no longer + allocated. */ + pxLink->xBlockSize &= ~xBlockAllocatedBit; + + vTaskSuspendAll(); + { + /* Add this block to the list of free blocks. */ + xFreeBytesRemaining += pxLink->xBlockSize; + traceFREE( pv, pxLink->xBlockSize ); + prvInsertBlockIntoFreeList( ( ( BlockLink_t * ) pxLink ) ); + } + ( void ) xTaskResumeAll(); + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } +} +/*-----------------------------------------------------------*/ + +size_t xPortGetFreeHeapSize( void ) +{ + return xFreeBytesRemaining; +} +/*-----------------------------------------------------------*/ + +size_t xPortGetMinimumEverFreeHeapSize( void ) +{ + return xMinimumEverFreeBytesRemaining; +} +/*-----------------------------------------------------------*/ + +void vPortInitialiseBlocks( void ) +{ + /* This just exists to keep the linker quiet. */ +} +/*-----------------------------------------------------------*/ + +static void prvHeapInit( void ) +{ +BlockLink_t *pxFirstFreeBlock; +uint8_t *pucAlignedHeap; +size_t uxAddress; +size_t xTotalHeapSize = configTOTAL_HEAP_SIZE; + + /* Ensure the heap starts on a correctly aligned boundary. */ + uxAddress = ( size_t ) ucHeap; + + if( ( uxAddress & portBYTE_ALIGNMENT_MASK ) != 0 ) + { + uxAddress += ( portBYTE_ALIGNMENT - 1 ); + uxAddress &= ~( ( size_t ) portBYTE_ALIGNMENT_MASK ); + xTotalHeapSize -= uxAddress - ( size_t ) ucHeap; + } + + pucAlignedHeap = ( uint8_t * ) uxAddress; + + /* xStart is used to hold a pointer to the first item in the list of free + blocks. The void cast is used to prevent compiler warnings. */ + xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap; + xStart.xBlockSize = ( size_t ) 0; + + /* pxEnd is used to mark the end of the list of free blocks and is inserted + at the end of the heap space. */ + uxAddress = ( ( size_t ) pucAlignedHeap ) + xTotalHeapSize; + uxAddress -= xHeapStructSize; + uxAddress &= ~( ( size_t ) portBYTE_ALIGNMENT_MASK ); + pxEnd = ( void * ) uxAddress; + pxEnd->xBlockSize = 0; + pxEnd->pxNextFreeBlock = NULL; + + /* To start with there is a single free block that is sized to take up the + entire heap space, minus the space taken by pxEnd. */ + pxFirstFreeBlock = ( void * ) pucAlignedHeap; + pxFirstFreeBlock->xBlockSize = uxAddress - ( size_t ) pxFirstFreeBlock; + pxFirstFreeBlock->pxNextFreeBlock = pxEnd; + + /* Only one block exists - and it covers the entire usable heap space. */ + xMinimumEverFreeBytesRemaining = pxFirstFreeBlock->xBlockSize; + xFreeBytesRemaining = pxFirstFreeBlock->xBlockSize; + + /* Work out the position of the top bit in a size_t variable. */ + xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * heapBITS_PER_BYTE ) - 1 ); +} +/*-----------------------------------------------------------*/ + +static void prvInsertBlockIntoFreeList( BlockLink_t *pxBlockToInsert ) +{ +BlockLink_t *pxIterator; +uint8_t *puc; + + /* Iterate through the list until a block is found that has a higher address + than the block being inserted. */ + for( pxIterator = &xStart; pxIterator->pxNextFreeBlock < pxBlockToInsert; pxIterator = pxIterator->pxNextFreeBlock ) + { + /* Nothing to do here, just iterate to the right position. */ + } + + /* Do the block being inserted, and the block it is being inserted after + make a contiguous block of memory? */ + puc = ( uint8_t * ) pxIterator; + if( ( puc + pxIterator->xBlockSize ) == ( uint8_t * ) pxBlockToInsert ) + { + pxIterator->xBlockSize += pxBlockToInsert->xBlockSize; + pxBlockToInsert = pxIterator; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + + /* Do the block being inserted, and the block it is being inserted before + make a contiguous block of memory? */ + puc = ( uint8_t * ) pxBlockToInsert; + if( ( puc + pxBlockToInsert->xBlockSize ) == ( uint8_t * ) pxIterator->pxNextFreeBlock ) + { + if( pxIterator->pxNextFreeBlock != pxEnd ) + { + /* Form one big block from the two blocks. */ + pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize; + pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock->pxNextFreeBlock; + } + else + { + pxBlockToInsert->pxNextFreeBlock = pxEnd; + } + } + else + { + pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock; + } + + /* If the block being inserted plugged a gab, so was merged with the block + before and the block after, then it's pxNextFreeBlock pointer will have + already been set, and should not be set here as that would make it point + to itself. */ + if( pxIterator != pxBlockToInsert ) + { + pxIterator->pxNextFreeBlock = pxBlockToInsert; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } +} + diff --git a/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_5.c b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_5.c new file mode 100644 index 0000000..51c53a9 --- /dev/null +++ b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_5.c @@ -0,0 +1,485 @@ +/* + * FreeRTOS Kernel V10.0.1 + * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/* + * A sample implementation of pvPortMalloc() that allows the heap to be defined + * across multiple non-contigous blocks and combines (coalescences) adjacent + * memory blocks as they are freed. + * + * See heap_1.c, heap_2.c, heap_3.c and heap_4.c for alternative + * implementations, and the memory management pages of http://www.FreeRTOS.org + * for more information. + * + * Usage notes: + * + * vPortDefineHeapRegions() ***must*** be called before pvPortMalloc(). + * pvPortMalloc() will be called if any task objects (tasks, queues, event + * groups, etc.) are created, therefore vPortDefineHeapRegions() ***must*** be + * called before any other objects are defined. + * + * vPortDefineHeapRegions() takes a single parameter. The parameter is an array + * of HeapRegion_t structures. HeapRegion_t is defined in portable.h as + * + * typedef struct HeapRegion + * { + * uint8_t *pucStartAddress; << Start address of a block of memory that will be part of the heap. + * size_t xSizeInBytes; << Size of the block of memory. + * } HeapRegion_t; + * + * The array is terminated using a NULL zero sized region definition, and the + * memory regions defined in the array ***must*** appear in address order from + * low address to high address. So the following is a valid example of how + * to use the function. + * + * HeapRegion_t xHeapRegions[] = + * { + * { ( uint8_t * ) 0x80000000UL, 0x10000 }, << Defines a block of 0x10000 bytes starting at address 0x80000000 + * { ( uint8_t * ) 0x90000000UL, 0xa0000 }, << Defines a block of 0xa0000 bytes starting at address of 0x90000000 + * { NULL, 0 } << Terminates the array. + * }; + * + * vPortDefineHeapRegions( xHeapRegions ); << Pass the array into vPortDefineHeapRegions(). + * + * Note 0x80000000 is the lower address so appears in the array first. + * + */ +#include + +/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining +all the API functions to use the MPU wrappers. That should only be done when +task.h is included from an application file. */ +#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE + +#include "FreeRTOS.h" +#include "task.h" + +#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE + +#if( configSUPPORT_DYNAMIC_ALLOCATION == 0 ) + #error This file must not be used if configSUPPORT_DYNAMIC_ALLOCATION is 0 +#endif + +/* Block sizes must not get too small. */ +#define heapMINIMUM_BLOCK_SIZE ( ( size_t ) ( xHeapStructSize << 1 ) ) + +/* Assumes 8bit bytes! */ +#define heapBITS_PER_BYTE ( ( size_t ) 8 ) + +/* Define the linked list structure. This is used to link free blocks in order +of their memory address. */ +typedef struct A_BLOCK_LINK +{ + struct A_BLOCK_LINK *pxNextFreeBlock; /*<< The next free block in the list. */ + size_t xBlockSize; /*<< The size of the free block. */ +} BlockLink_t; + +/*-----------------------------------------------------------*/ + +/* + * Inserts a block of memory that is being freed into the correct position in + * the list of free memory blocks. The block being freed will be merged with + * the block in front it and/or the block behind it if the memory blocks are + * adjacent to each other. + */ +static void prvInsertBlockIntoFreeList( BlockLink_t *pxBlockToInsert ); + +/*-----------------------------------------------------------*/ + +/* The size of the structure placed at the beginning of each allocated memory +block must by correctly byte aligned. */ +static const size_t xHeapStructSize = ( sizeof( BlockLink_t ) + ( ( size_t ) ( portBYTE_ALIGNMENT - 1 ) ) ) & ~( ( size_t ) portBYTE_ALIGNMENT_MASK ); + +/* Create a couple of list links to mark the start and end of the list. */ +static BlockLink_t xStart, *pxEnd = NULL; + +/* Keeps track of the number of free bytes remaining, but says nothing about +fragmentation. */ +static size_t xFreeBytesRemaining = 0U; +static size_t xMinimumEverFreeBytesRemaining = 0U; + +/* Gets set to the top bit of an size_t type. When this bit in the xBlockSize +member of an BlockLink_t structure is set then the block belongs to the +application. When the bit is free the block is still part of the free heap +space. */ +static size_t xBlockAllocatedBit = 0; + +/*-----------------------------------------------------------*/ + +void *pvPortMalloc( size_t xWantedSize ) +{ +BlockLink_t *pxBlock, *pxPreviousBlock, *pxNewBlockLink; +void *pvReturn = NULL; + + /* The heap must be initialised before the first call to + prvPortMalloc(). */ + configASSERT( pxEnd ); + + vTaskSuspendAll(); + { + /* Check the requested block size is not so large that the top bit is + set. The top bit of the block size member of the BlockLink_t structure + is used to determine who owns the block - the application or the + kernel, so it must be free. */ + if( ( xWantedSize & xBlockAllocatedBit ) == 0 ) + { + /* The wanted size is increased so it can contain a BlockLink_t + structure in addition to the requested amount of bytes. */ + if( xWantedSize > 0 ) + { + xWantedSize += xHeapStructSize; + + /* Ensure that blocks are always aligned to the required number + of bytes. */ + if( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) != 0x00 ) + { + /* Byte alignment required. */ + xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & portBYTE_ALIGNMENT_MASK ) ); + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + + if( ( xWantedSize > 0 ) && ( xWantedSize <= xFreeBytesRemaining ) ) + { + /* Traverse the list from the start (lowest address) block until + one of adequate size is found. */ + pxPreviousBlock = &xStart; + pxBlock = xStart.pxNextFreeBlock; + while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) ) + { + pxPreviousBlock = pxBlock; + pxBlock = pxBlock->pxNextFreeBlock; + } + + /* If the end marker was reached then a block of adequate size + was not found. */ + if( pxBlock != pxEnd ) + { + /* Return the memory space pointed to - jumping over the + BlockLink_t structure at its start. */ + pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + xHeapStructSize ); + + /* This block is being returned for use so must be taken out + of the list of free blocks. */ + pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock; + + /* If the block is larger than required it can be split into + two. */ + if( ( pxBlock->xBlockSize - xWantedSize ) > heapMINIMUM_BLOCK_SIZE ) + { + /* This block is to be split into two. Create a new + block following the number of bytes requested. The void + cast is used to prevent byte alignment warnings from the + compiler. */ + pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize ); + + /* Calculate the sizes of two blocks split from the + single block. */ + pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize; + pxBlock->xBlockSize = xWantedSize; + + /* Insert the new block into the list of free blocks. */ + prvInsertBlockIntoFreeList( ( pxNewBlockLink ) ); + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + + xFreeBytesRemaining -= pxBlock->xBlockSize; + + if( xFreeBytesRemaining < xMinimumEverFreeBytesRemaining ) + { + xMinimumEverFreeBytesRemaining = xFreeBytesRemaining; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + + /* The block is being returned - it is allocated and owned + by the application and has no "next" block. */ + pxBlock->xBlockSize |= xBlockAllocatedBit; + pxBlock->pxNextFreeBlock = NULL; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + + traceMALLOC( pvReturn, xWantedSize ); + } + ( void ) xTaskResumeAll(); + + #if( configUSE_MALLOC_FAILED_HOOK == 1 ) + { + if( pvReturn == NULL ) + { + extern void vApplicationMallocFailedHook( void ); + vApplicationMallocFailedHook(); + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + #endif + + return pvReturn; +} +/*-----------------------------------------------------------*/ + +void vPortFree( void *pv ) +{ +uint8_t *puc = ( uint8_t * ) pv; +BlockLink_t *pxLink; + + if( pv != NULL ) + { + /* The memory being freed will have an BlockLink_t structure immediately + before it. */ + puc -= xHeapStructSize; + + /* This casting is to keep the compiler from issuing warnings. */ + pxLink = ( void * ) puc; + + /* Check the block is actually allocated. */ + configASSERT( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 ); + configASSERT( pxLink->pxNextFreeBlock == NULL ); + + if( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 ) + { + if( pxLink->pxNextFreeBlock == NULL ) + { + /* The block is being returned to the heap - it is no longer + allocated. */ + pxLink->xBlockSize &= ~xBlockAllocatedBit; + + vTaskSuspendAll(); + { + /* Add this block to the list of free blocks. */ + xFreeBytesRemaining += pxLink->xBlockSize; + traceFREE( pv, pxLink->xBlockSize ); + prvInsertBlockIntoFreeList( ( ( BlockLink_t * ) pxLink ) ); + } + ( void ) xTaskResumeAll(); + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } +} +/*-----------------------------------------------------------*/ + +size_t xPortGetFreeHeapSize( void ) +{ + return xFreeBytesRemaining; +} +/*-----------------------------------------------------------*/ + +size_t xPortGetMinimumEverFreeHeapSize( void ) +{ + return xMinimumEverFreeBytesRemaining; +} +/*-----------------------------------------------------------*/ + +static void prvInsertBlockIntoFreeList( BlockLink_t *pxBlockToInsert ) +{ +BlockLink_t *pxIterator; +uint8_t *puc; + + /* Iterate through the list until a block is found that has a higher address + than the block being inserted. */ + for( pxIterator = &xStart; pxIterator->pxNextFreeBlock < pxBlockToInsert; pxIterator = pxIterator->pxNextFreeBlock ) + { + /* Nothing to do here, just iterate to the right position. */ + } + + /* Do the block being inserted, and the block it is being inserted after + make a contiguous block of memory? */ + puc = ( uint8_t * ) pxIterator; + if( ( puc + pxIterator->xBlockSize ) == ( uint8_t * ) pxBlockToInsert ) + { + pxIterator->xBlockSize += pxBlockToInsert->xBlockSize; + pxBlockToInsert = pxIterator; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + + /* Do the block being inserted, and the block it is being inserted before + make a contiguous block of memory? */ + puc = ( uint8_t * ) pxBlockToInsert; + if( ( puc + pxBlockToInsert->xBlockSize ) == ( uint8_t * ) pxIterator->pxNextFreeBlock ) + { + if( pxIterator->pxNextFreeBlock != pxEnd ) + { + /* Form one big block from the two blocks. */ + pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize; + pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock->pxNextFreeBlock; + } + else + { + pxBlockToInsert->pxNextFreeBlock = pxEnd; + } + } + else + { + pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock; + } + + /* If the block being inserted plugged a gab, so was merged with the block + before and the block after, then it's pxNextFreeBlock pointer will have + already been set, and should not be set here as that would make it point + to itself. */ + if( pxIterator != pxBlockToInsert ) + { + pxIterator->pxNextFreeBlock = pxBlockToInsert; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } +} +/*-----------------------------------------------------------*/ + +void vPortDefineHeapRegions( const HeapRegion_t * const pxHeapRegions ) +{ +BlockLink_t *pxFirstFreeBlockInRegion = NULL, *pxPreviousFreeBlock; +size_t xAlignedHeap; +size_t xTotalRegionSize, xTotalHeapSize = 0; +BaseType_t xDefinedRegions = 0; +size_t xAddress; +const HeapRegion_t *pxHeapRegion; + + /* Can only call once! */ + configASSERT( pxEnd == NULL ); + + pxHeapRegion = &( pxHeapRegions[ xDefinedRegions ] ); + + while( pxHeapRegion->xSizeInBytes > 0 ) + { + xTotalRegionSize = pxHeapRegion->xSizeInBytes; + + /* Ensure the heap region starts on a correctly aligned boundary. */ + xAddress = ( size_t ) pxHeapRegion->pucStartAddress; + if( ( xAddress & portBYTE_ALIGNMENT_MASK ) != 0 ) + { + xAddress += ( portBYTE_ALIGNMENT - 1 ); + xAddress &= ~portBYTE_ALIGNMENT_MASK; + + /* Adjust the size for the bytes lost to alignment. */ + xTotalRegionSize -= xAddress - ( size_t ) pxHeapRegion->pucStartAddress; + } + + xAlignedHeap = xAddress; + + /* Set xStart if it has not already been set. */ + if( xDefinedRegions == 0 ) + { + /* xStart is used to hold a pointer to the first item in the list of + free blocks. The void cast is used to prevent compiler warnings. */ + xStart.pxNextFreeBlock = ( BlockLink_t * ) xAlignedHeap; + xStart.xBlockSize = ( size_t ) 0; + } + else + { + /* Should only get here if one region has already been added to the + heap. */ + configASSERT( pxEnd != NULL ); + + /* Check blocks are passed in with increasing start addresses. */ + configASSERT( xAddress > ( size_t ) pxEnd ); + } + + /* Remember the location of the end marker in the previous region, if + any. */ + pxPreviousFreeBlock = pxEnd; + + /* pxEnd is used to mark the end of the list of free blocks and is + inserted at the end of the region space. */ + xAddress = xAlignedHeap + xTotalRegionSize; + xAddress -= xHeapStructSize; + xAddress &= ~portBYTE_ALIGNMENT_MASK; + pxEnd = ( BlockLink_t * ) xAddress; + pxEnd->xBlockSize = 0; + pxEnd->pxNextFreeBlock = NULL; + + /* To start with there is a single free block in this region that is + sized to take up the entire heap region minus the space taken by the + free block structure. */ + pxFirstFreeBlockInRegion = ( BlockLink_t * ) xAlignedHeap; + pxFirstFreeBlockInRegion->xBlockSize = xAddress - ( size_t ) pxFirstFreeBlockInRegion; + pxFirstFreeBlockInRegion->pxNextFreeBlock = pxEnd; + + /* If this is not the first region that makes up the entire heap space + then link the previous region to this region. */ + if( pxPreviousFreeBlock != NULL ) + { + pxPreviousFreeBlock->pxNextFreeBlock = pxFirstFreeBlockInRegion; + } + + xTotalHeapSize += pxFirstFreeBlockInRegion->xBlockSize; + + /* Move onto the next HeapRegion_t structure. */ + xDefinedRegions++; + pxHeapRegion = &( pxHeapRegions[ xDefinedRegions ] ); + } + + xMinimumEverFreeBytesRemaining = xTotalHeapSize; + xFreeBytesRemaining = xTotalHeapSize; + + /* Check something was actually defined before it is accessed. */ + configASSERT( xTotalHeapSize ); + + /* Work out the position of the top bit in a size_t variable. */ + xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * heapBITS_PER_BYTE ) - 1 ); +} + diff --git a/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM0/port.c b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM0/port.c new file mode 100644 index 0000000..37eff67 --- /dev/null +++ b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM0/port.c @@ -0,0 +1,510 @@ +/* + * FreeRTOS Kernel V10.0.1 + * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/*----------------------------------------------------------- + * Implementation of functions defined in portable.h for the ARM CM0 port. + *----------------------------------------------------------*/ + +/* Scheduler includes. */ +#include "FreeRTOS.h" +#include "task.h" + +#ifndef configSYSTICK_CLOCK_HZ + #define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ +#endif + +/* Constants required to manipulate the NVIC. */ +#define portNVIC_SYSTICK_CTRL ( *( ( volatile uint32_t *) 0xe000e010 )) +#define portNVIC_SYSTICK_LOAD ( *( ( volatile uint32_t *) 0xe000e014 )) +#define portNVIC_SYSTICK_CURRENT_VALUE ( * ( ( volatile uint32_t * ) 0xe000e018 ) ) +#define portNVIC_INT_CTRL ( ( volatile uint32_t *) 0xe000ed04 ) +#define portNVIC_SYSPRI2 ( ( volatile uint32_t *) 0xe000ed20 ) +#define portNVIC_SYSTICK_CLK 0x00000004 +#define portNVIC_SYSTICK_INT 0x00000002 +#define portNVIC_SYSTICK_ENABLE 0x00000001 +#define portNVIC_SYSTICK_COUNT_FLAG ( 1UL << 16UL ) +#define portNVIC_PENDSVSET 0x10000000 +#define portMIN_INTERRUPT_PRIORITY ( 255UL ) +#define portNVIC_PENDSV_PRI ( portMIN_INTERRUPT_PRIORITY << 16UL ) +#define portNVIC_SYSTICK_PRI ( portMIN_INTERRUPT_PRIORITY << 24UL ) + +/* Constants required to set up the initial stack. */ +#define portINITIAL_XPSR ( 0x01000000 ) + +/* Constants used with memory barrier intrinsics. */ +#define portSY_FULL_READ_WRITE ( 15 ) + +/* The systick is a 24-bit counter. */ +#define portMAX_24_BIT_NUMBER ( 0xffffffUL ) + +/* A fiddle factor to estimate the number of SysTick counts that would have +occurred while the SysTick counter is stopped during tickless idle +calculations. */ +#define portMISSED_COUNTS_FACTOR ( 45UL ) + +/* Each task maintains its own interrupt status in the critical nesting +variable. */ +static UBaseType_t uxCriticalNesting = 0xaaaaaaaa; + +/* + * Setup the timer to generate the tick interrupts. + */ +static void prvSetupTimerInterrupt( void ); + +/* + * Exception handlers. + */ +void xPortPendSVHandler( void ); +void xPortSysTickHandler( void ); +void vPortSVCHandler( void ); + +/* + * Start first task is a separate function so it can be tested in isolation. + */ +static void prvPortStartFirstTask( void ); + +/* + * Used to catch tasks that attempt to return from their implementing function. + */ +static void prvTaskExitError( void ); + +/*-----------------------------------------------------------*/ + +/* + * The number of SysTick increments that make up one tick period. + */ +#if configUSE_TICKLESS_IDLE == 1 + static unsigned long ulTimerCountsForOneTick = 0; +#endif /* configUSE_TICKLESS_IDLE */ + +/* + * The maximum number of tick periods that can be suppressed is limited by the + * 24 bit resolution of the SysTick timer. + */ +#if configUSE_TICKLESS_IDLE == 1 + static unsigned long xMaximumPossibleSuppressedTicks = 0; +#endif /* configUSE_TICKLESS_IDLE */ + +/* + * Compensate for the CPU cycles that pass while the SysTick is stopped (low + * power functionality only. + */ +#if configUSE_TICKLESS_IDLE == 1 + static unsigned long ulStoppedTimerCompensation = 0; +#endif /* configUSE_TICKLESS_IDLE */ + +/* + * See header file for description. + */ +StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters ) +{ + /* Simulate the stack frame as it would be created by a context switch + interrupt. */ + pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */ + *pxTopOfStack = portINITIAL_XPSR; /* xPSR */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) pxCode; /* PC */ + pxTopOfStack--; + *pxTopOfStack = ( StackType_t ) prvTaskExitError; /* LR */ + pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ + *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */ + pxTopOfStack -= 8; /* R11..R4. */ + + return pxTopOfStack; +} +/*-----------------------------------------------------------*/ + +static void prvTaskExitError( void ) +{ + /* A function that implements a task must not exit or attempt to return to + its caller as there is nothing to return to. If a task wants to exit it + should instead call vTaskDelete( NULL ). + + Artificially force an assert() to be triggered if configASSERT() is + defined, then stop here so application writers can catch the error. */ + configASSERT( uxCriticalNesting == ~0UL ); + portDISABLE_INTERRUPTS(); + for( ;; ); +} +/*-----------------------------------------------------------*/ + +void vPortSVCHandler( void ) +{ + /* This function is no longer used, but retained for backward + compatibility. */ +} +/*-----------------------------------------------------------*/ + +__asm void prvPortStartFirstTask( void ) +{ + extern pxCurrentTCB; + + PRESERVE8 + + /* The MSP stack is not reset as, unlike on M3/4 parts, there is no vector + table offset register that can be used to locate the initial stack value. + Not all M0 parts have the application vector table at address 0. */ + + ldr r3, =pxCurrentTCB /* Obtain location of pxCurrentTCB. */ + ldr r1, [r3] + ldr r0, [r1] /* The first item in pxCurrentTCB is the task top of stack. */ + adds r0, #32 /* Discard everything up to r0. */ + msr psp, r0 /* This is now the new top of stack to use in the task. */ + movs r0, #2 /* Switch to the psp stack. */ + msr CONTROL, r0 + isb + pop {r0-r5} /* Pop the registers that are saved automatically. */ + mov lr, r5 /* lr is now in r5. */ + pop {r3} /* The return address is now in r3. */ + pop {r2} /* Pop and discard the XPSR. */ + cpsie i /* The first task has its context and interrupts can be enabled. */ + bx r3 /* Finally, jump to the user defined task code. */ + + ALIGN +} +/*-----------------------------------------------------------*/ + +/* + * See header file for description. + */ +BaseType_t xPortStartScheduler( void ) +{ + /* Make PendSV, CallSV and SysTick the same priroity as the kernel. */ + *(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI; + *(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI; + + /* Start the timer that generates the tick ISR. Interrupts are disabled + here already. */ + prvSetupTimerInterrupt(); + + /* Initialise the critical nesting count ready for the first task. */ + uxCriticalNesting = 0; + + /* Start the first task. */ + prvPortStartFirstTask(); + + /* Should not get here! */ + return 0; +} +/*-----------------------------------------------------------*/ + +void vPortEndScheduler( void ) +{ + /* Not implemented in ports where there is nothing to return to. + Artificially force an assert. */ + configASSERT( uxCriticalNesting == 1000UL ); +} +/*-----------------------------------------------------------*/ + +void vPortYield( void ) +{ + /* Set a PendSV to request a context switch. */ + *( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET; + + /* Barriers are normally not required but do ensure the code is completely + within the specified behaviour for the architecture. */ + __dsb( portSY_FULL_READ_WRITE ); + __isb( portSY_FULL_READ_WRITE ); +} +/*-----------------------------------------------------------*/ + +void vPortEnterCritical( void ) +{ + portDISABLE_INTERRUPTS(); + uxCriticalNesting++; + __dsb( portSY_FULL_READ_WRITE ); + __isb( portSY_FULL_READ_WRITE ); +} +/*-----------------------------------------------------------*/ + +void vPortExitCritical( void ) +{ + configASSERT( uxCriticalNesting ); + uxCriticalNesting--; + if( uxCriticalNesting == 0 ) + { + portENABLE_INTERRUPTS(); + } +} +/*-----------------------------------------------------------*/ + +__asm uint32_t ulSetInterruptMaskFromISR( void ) +{ + mrs r0, PRIMASK + cpsid i + bx lr +} +/*-----------------------------------------------------------*/ + +__asm void vClearInterruptMaskFromISR( uint32_t ulMask ) +{ + msr PRIMASK, r0 + bx lr +} +/*-----------------------------------------------------------*/ + +__asm void xPortPendSVHandler( void ) +{ + extern vTaskSwitchContext + extern pxCurrentTCB + + PRESERVE8 + + mrs r0, psp + + ldr r3, =pxCurrentTCB /* Get the location of the current TCB. */ + ldr r2, [r3] + + subs r0, #32 /* Make space for the remaining low registers. */ + str r0, [r2] /* Save the new top of stack. */ + stmia r0!, {r4-r7} /* Store the low registers that are not saved automatically. */ + mov r4, r8 /* Store the high registers. */ + mov r5, r9 + mov r6, r10 + mov r7, r11 + stmia r0!, {r4-r7} + + push {r3, r14} + cpsid i + bl vTaskSwitchContext + cpsie i + pop {r2, r3} /* lr goes in r3. r2 now holds tcb pointer. */ + + ldr r1, [r2] + ldr r0, [r1] /* The first item in pxCurrentTCB is the task top of stack. */ + adds r0, #16 /* Move to the high registers. */ + ldmia r0!, {r4-r7} /* Pop the high registers. */ + mov r8, r4 + mov r9, r5 + mov r10, r6 + mov r11, r7 + + msr psp, r0 /* Remember the new top of stack for the task. */ + + subs r0, #32 /* Go back for the low registers that are not automatically restored. */ + ldmia r0!, {r4-r7} /* Pop low registers. */ + + bx r3 + ALIGN +} +/*-----------------------------------------------------------*/ + +void xPortSysTickHandler( void ) +{ +uint32_t ulPreviousMask; + + ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR(); + { + /* Increment the RTOS tick. */ + if( xTaskIncrementTick() != pdFALSE ) + { + /* Pend a context switch. */ + *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET; + } + } + portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask ); +} +/*-----------------------------------------------------------*/ + +#if configUSE_TICKLESS_IDLE == 1 + + __weak void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime ) + { + uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements, ulSysTickCTRL; + TickType_t xModifiableIdleTime; + + /* Make sure the SysTick reload value does not overflow the counter. */ + if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks ) + { + xExpectedIdleTime = xMaximumPossibleSuppressedTicks; + } + + /* Stop the SysTick momentarily. The time the SysTick is stopped for + is accounted for as best it can be, but using the tickless mode will + inevitably result in some tiny drift of the time maintained by the + kernel with respect to calendar time. */ + portNVIC_SYSTICK_CTRL &= ~portNVIC_SYSTICK_ENABLE; + + /* Calculate the reload value required to wait xExpectedIdleTime + tick periods. -1 is used because this code will execute part way + through one of the tick periods. */ + ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); + if( ulReloadValue > ulStoppedTimerCompensation ) + { + ulReloadValue -= ulStoppedTimerCompensation; + } + + /* Enter a critical section but don't use the taskENTER_CRITICAL() + method as that will mask interrupts that should exit sleep mode. */ + __disable_irq(); + + /* If a context switch is pending or a task is waiting for the scheduler + to be unsuspended then abandon the low power entry. */ + if( eTaskConfirmSleepModeStatus() == eAbortSleep ) + { + /* Restart from whatever is left in the count register to complete + this tick period. */ + portNVIC_SYSTICK_LOAD = portNVIC_SYSTICK_CURRENT_VALUE; + + /* Restart SysTick. */ + portNVIC_SYSTICK_CTRL |= portNVIC_SYSTICK_ENABLE; + + /* Reset the reload register to the value required for normal tick + periods. */ + portNVIC_SYSTICK_LOAD = ulTimerCountsForOneTick - 1UL; + + /* Re-enable interrupts - see comments above __disable_irq() call + above. */ + __enable_irq(); + } + else + { + /* Set the new reload value. */ + portNVIC_SYSTICK_LOAD = ulReloadValue; + + /* Clear the SysTick count flag and set the count value back to + zero. */ + portNVIC_SYSTICK_CURRENT_VALUE = 0UL; + + /* Restart SysTick. */ + portNVIC_SYSTICK_CTRL |= portNVIC_SYSTICK_ENABLE; + + /* Sleep until something happens. configPRE_SLEEP_PROCESSING() can + set its parameter to 0 to indicate that its implementation contains + its own wait for interrupt or wait for event instruction, and so wfi + should not be executed again. However, the original expected idle + time variable must remain unmodified, so a copy is taken. */ + xModifiableIdleTime = xExpectedIdleTime; + configPRE_SLEEP_PROCESSING( &xModifiableIdleTime ); + if( xModifiableIdleTime > 0 ) + { + __dsb( portSY_FULL_READ_WRITE ); + __wfi(); + __isb( portSY_FULL_READ_WRITE ); + } + configPOST_SLEEP_PROCESSING( &xExpectedIdleTime ); + + /* Stop SysTick. Again, the time the SysTick is stopped for is + accounted for as best it can be, but using the tickless mode will + inevitably result in some tiny drift of the time maintained by the + kernel with respect to calendar time. */ + ulSysTickCTRL = portNVIC_SYSTICK_CTRL; + portNVIC_SYSTICK_CTRL = ( ulSysTickCTRL & ~portNVIC_SYSTICK_ENABLE ); + + /* Re-enable interrupts - see comments above __disable_irq() call + above. */ + __enable_irq(); + + if( ( ulSysTickCTRL & portNVIC_SYSTICK_COUNT_FLAG ) != 0 ) + { + uint32_t ulCalculatedLoadValue; + + /* The tick interrupt has already executed, and the SysTick + count reloaded with ulReloadValue. Reset the + portNVIC_SYSTICK_LOAD with whatever remains of this tick + period. */ + ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE ); + + /* Don't allow a tiny value, or values that have somehow + underflowed because the post sleep hook did something + that took too long. */ + if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) ) + { + ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ); + } + + portNVIC_SYSTICK_LOAD = ulCalculatedLoadValue; + + /* The tick interrupt handler will already have pended the tick + processing in the kernel. As the pending tick will be + processed as soon as this function exits, the tick value + maintained by the tick is stepped forward by one less than the + time spent waiting. */ + ulCompleteTickPeriods = xExpectedIdleTime - 1UL; + } + else + { + /* Something other than the tick interrupt ended the sleep. + Work out how long the sleep lasted rounded to complete tick + periods (not the ulReload value which accounted for part + ticks). */ + ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE; + + /* How many complete tick periods passed while the processor + was waiting? */ + ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick; + + /* The reload value is set to whatever fraction of a single tick + period remains. */ + portNVIC_SYSTICK_LOAD = ( ( ulCompleteTickPeriods + 1 ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements; + } + + /* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD + again, then set portNVIC_SYSTICK_LOAD back to its standard + value. The critical section is used to ensure the tick interrupt + can only execute once in the case that the reload register is near + zero. */ + portNVIC_SYSTICK_CURRENT_VALUE = 0UL; + portENTER_CRITICAL(); + { + portNVIC_SYSTICK_CTRL |= portNVIC_SYSTICK_ENABLE; + vTaskStepTick( ulCompleteTickPeriods ); + portNVIC_SYSTICK_LOAD = ulTimerCountsForOneTick - 1UL; + } + portEXIT_CRITICAL(); + } + } + +#endif /* #if configUSE_TICKLESS_IDLE */ + +/*-----------------------------------------------------------*/ + +/* + * Setup the systick timer to generate the tick interrupts at the required + * frequency. + */ +void prvSetupTimerInterrupt( void ) +{ + /* Calculate the constants required to configure the tick interrupt. */ + #if configUSE_TICKLESS_IDLE == 1 + { + ulTimerCountsForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ); + xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick; + ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ ); + } + #endif /* configUSE_TICKLESS_IDLE */ + + /* Stop and reset the SysTick. */ + portNVIC_SYSTICK_CTRL = 0UL; + portNVIC_SYSTICK_CURRENT_VALUE = 0UL; + + /* Configure SysTick to interrupt at the requested rate. */ + portNVIC_SYSTICK_LOAD = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; + portNVIC_SYSTICK_CTRL = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE; +} +/*-----------------------------------------------------------*/ + diff --git a/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM0/portmacro.h b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM0/portmacro.h new file mode 100644 index 0000000..dddec5a --- /dev/null +++ b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM0/portmacro.h @@ -0,0 +1,114 @@ +/* + * FreeRTOS Kernel V10.0.1 + * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + + +#ifndef PORTMACRO_H +#define PORTMACRO_H + +#ifdef __cplusplus +extern "C" { +#endif + +/*----------------------------------------------------------- + * Port specific definitions. + * + * The settings in this file configure FreeRTOS correctly for the + * given hardware and compiler. + * + * These settings should not be altered. + *----------------------------------------------------------- + */ + +/* Type definitions. */ +#define portCHAR char +#define portFLOAT float +#define portDOUBLE double +#define portLONG long +#define portSHORT short +#define portSTACK_TYPE uint32_t +#define portBASE_TYPE long + +typedef portSTACK_TYPE StackType_t; +typedef long BaseType_t; +typedef unsigned long UBaseType_t; + +#if( configUSE_16_BIT_TICKS == 1 ) + typedef uint16_t TickType_t; + #define portMAX_DELAY ( TickType_t ) 0xffff +#else + typedef uint32_t TickType_t; + #define portMAX_DELAY ( TickType_t ) 0xffffffffUL + + /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do + not need to be guarded with a critical section. */ + #define portTICK_TYPE_IS_ATOMIC 1 +#endif +/*-----------------------------------------------------------*/ + +/* Architecture specifics. */ +#define portSTACK_GROWTH ( -1 ) +#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ ) +#define portBYTE_ALIGNMENT 8 +/*-----------------------------------------------------------*/ + + +/* Scheduler utilities. */ +extern void vPortYield( void ); +#define portNVIC_INT_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000ed04 ) ) +#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) +#define portYIELD() vPortYield() +#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT +#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x ) +/*-----------------------------------------------------------*/ + +/* Critical section management. */ +extern void vPortEnterCritical( void ); +extern void vPortExitCritical( void ); +extern uint32_t ulSetInterruptMaskFromISR( void ); +extern void vClearInterruptMaskFromISR( uint32_t ulMask ); + +#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMaskFromISR() +#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vClearInterruptMaskFromISR( x ) +#define portDISABLE_INTERRUPTS() __disable_irq() +#define portENABLE_INTERRUPTS() __enable_irq() +#define portENTER_CRITICAL() vPortEnterCritical() +#define portEXIT_CRITICAL() vPortExitCritical() + +/*-----------------------------------------------------------*/ + +/* Task function macros as described on the FreeRTOS.org WEB site. */ +#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters ) +#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters ) + +#define portNOP() + +#ifdef __cplusplus +} +#endif + +#endif /* PORTMACRO_H */ + diff --git a/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/portable/readme.txt b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/portable/readme.txt new file mode 100644 index 0000000..b68d2d5 --- /dev/null +++ b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/portable/readme.txt @@ -0,0 +1,20 @@ +Each real time kernel port consists of three files that contain the core kernel +components and are common to every port, and one or more files that are +specific to a particular microcontroller and/or compiler. + + ++ The FreeRTOS/Source/Portable/MemMang directory contains the five sample +memory allocators as described on the http://www.FreeRTOS.org WEB site. + ++ The other directories each contain files specific to a particular +microcontroller or compiler, where the directory name denotes the compiler +specific files the directory contains. + + + +For example, if you are interested in the [compiler] port for the [architecture] +microcontroller, then the port specific files are contained in +FreeRTOS/Source/Portable/[compiler]/[architecture] directory. If this is the +only port you are interested in then all the other directories can be +ignored. + diff --git a/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/queue.c b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/queue.c new file mode 100644 index 0000000..bce014d --- /dev/null +++ b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/queue.c @@ -0,0 +1,2908 @@ +/* + * FreeRTOS Kernel V10.0.1 + * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#include +#include + +/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining +all the API functions to use the MPU wrappers. That should only be done when +task.h is included from an application file. */ +#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE + +#include "FreeRTOS.h" +#include "task.h" +#include "queue.h" + +#if ( configUSE_CO_ROUTINES == 1 ) + #include "croutine.h" +#endif + +/* Lint e961 and e750 are suppressed as a MISRA exception justified because the +MPU ports require MPU_WRAPPERS_INCLUDED_FROM_API_FILE to be defined for the +header files above, but not in this file, in order to generate the correct +privileged Vs unprivileged linkage and placement. */ +#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /*lint !e961 !e750. */ + + +/* Constants used with the cRxLock and cTxLock structure members. */ +#define queueUNLOCKED ( ( int8_t ) -1 ) +#define queueLOCKED_UNMODIFIED ( ( int8_t ) 0 ) + +/* When the Queue_t structure is used to represent a base queue its pcHead and +pcTail members are used as pointers into the queue storage area. When the +Queue_t structure is used to represent a mutex pcHead and pcTail pointers are +not necessary, and the pcHead pointer is set to NULL to indicate that the +pcTail pointer actually points to the mutex holder (if any). Map alternative +names to the pcHead and pcTail structure members to ensure the readability of +the code is maintained despite this dual use of two structure members. An +alternative implementation would be to use a union, but use of a union is +against the coding standard (although an exception to the standard has been +permitted where the dual use also significantly changes the type of the +structure member). */ +#define pxMutexHolder pcTail +#define uxQueueType pcHead +#define queueQUEUE_IS_MUTEX NULL + +/* Semaphores do not actually store or copy data, so have an item size of +zero. */ +#define queueSEMAPHORE_QUEUE_ITEM_LENGTH ( ( UBaseType_t ) 0 ) +#define queueMUTEX_GIVE_BLOCK_TIME ( ( TickType_t ) 0U ) + +#if( configUSE_PREEMPTION == 0 ) + /* If the cooperative scheduler is being used then a yield should not be + performed just because a higher priority task has been woken. */ + #define queueYIELD_IF_USING_PREEMPTION() +#else + #define queueYIELD_IF_USING_PREEMPTION() portYIELD_WITHIN_API() +#endif + +/* + * Definition of the queue used by the scheduler. + * Items are queued by copy, not reference. See the following link for the + * rationale: http://www.freertos.org/Embedded-RTOS-Queues.html + */ +typedef struct QueueDefinition +{ + int8_t *pcHead; /*< Points to the beginning of the queue storage area. */ + int8_t *pcTail; /*< Points to the byte at the end of the queue storage area. Once more byte is allocated than necessary to store the queue items, this is used as a marker. */ + int8_t *pcWriteTo; /*< Points to the free next place in the storage area. */ + + union /* Use of a union is an exception to the coding standard to ensure two mutually exclusive structure members don't appear simultaneously (wasting RAM). */ + { + int8_t *pcReadFrom; /*< Points to the last place that a queued item was read from when the structure is used as a queue. */ + UBaseType_t uxRecursiveCallCount;/*< Maintains a count of the number of times a recursive mutex has been recursively 'taken' when the structure is used as a mutex. */ + } u; + + List_t xTasksWaitingToSend; /*< List of tasks that are blocked waiting to post onto this queue. Stored in priority order. */ + List_t xTasksWaitingToReceive; /*< List of tasks that are blocked waiting to read from this queue. Stored in priority order. */ + + volatile UBaseType_t uxMessagesWaiting;/*< The number of items currently in the queue. */ + UBaseType_t uxLength; /*< The length of the queue defined as the number of items it will hold, not the number of bytes. */ + UBaseType_t uxItemSize; /*< The size of each items that the queue will hold. */ + + volatile int8_t cRxLock; /*< Stores the number of items received from the queue (removed from the queue) while the queue was locked. Set to queueUNLOCKED when the queue is not locked. */ + volatile int8_t cTxLock; /*< Stores the number of items transmitted to the queue (added to the queue) while the queue was locked. Set to queueUNLOCKED when the queue is not locked. */ + + #if( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) + uint8_t ucStaticallyAllocated; /*< Set to pdTRUE if the memory used by the queue was statically allocated to ensure no attempt is made to free the memory. */ + #endif + + #if ( configUSE_QUEUE_SETS == 1 ) + struct QueueDefinition *pxQueueSetContainer; + #endif + + #if ( configUSE_TRACE_FACILITY == 1 ) + UBaseType_t uxQueueNumber; + uint8_t ucQueueType; + #endif + +} xQUEUE; + +/* The old xQUEUE name is maintained above then typedefed to the new Queue_t +name below to enable the use of older kernel aware debuggers. */ +typedef xQUEUE Queue_t; + +/*-----------------------------------------------------------*/ + +/* + * The queue registry is just a means for kernel aware debuggers to locate + * queue structures. It has no other purpose so is an optional component. + */ +#if ( configQUEUE_REGISTRY_SIZE > 0 ) + + /* The type stored within the queue registry array. This allows a name + to be assigned to each queue making kernel aware debugging a little + more user friendly. */ + typedef struct QUEUE_REGISTRY_ITEM + { + const char *pcQueueName; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ + QueueHandle_t xHandle; + } xQueueRegistryItem; + + /* The old xQueueRegistryItem name is maintained above then typedefed to the + new xQueueRegistryItem name below to enable the use of older kernel aware + debuggers. */ + typedef xQueueRegistryItem QueueRegistryItem_t; + + /* The queue registry is simply an array of QueueRegistryItem_t structures. + The pcQueueName member of a structure being NULL is indicative of the + array position being vacant. */ + PRIVILEGED_DATA QueueRegistryItem_t xQueueRegistry[ configQUEUE_REGISTRY_SIZE ]; + +#endif /* configQUEUE_REGISTRY_SIZE */ + +/* + * Unlocks a queue locked by a call to prvLockQueue. Locking a queue does not + * prevent an ISR from adding or removing items to the queue, but does prevent + * an ISR from removing tasks from the queue event lists. If an ISR finds a + * queue is locked it will instead increment the appropriate queue lock count + * to indicate that a task may require unblocking. When the queue in unlocked + * these lock counts are inspected, and the appropriate action taken. + */ +static void prvUnlockQueue( Queue_t * const pxQueue ) PRIVILEGED_FUNCTION; + +/* + * Uses a critical section to determine if there is any data in a queue. + * + * @return pdTRUE if the queue contains no items, otherwise pdFALSE. + */ +static BaseType_t prvIsQueueEmpty( const Queue_t *pxQueue ) PRIVILEGED_FUNCTION; + +/* + * Uses a critical section to determine if there is any space in a queue. + * + * @return pdTRUE if there is no space, otherwise pdFALSE; + */ +static BaseType_t prvIsQueueFull( const Queue_t *pxQueue ) PRIVILEGED_FUNCTION; + +/* + * Copies an item into the queue, either at the front of the queue or the + * back of the queue. + */ +static BaseType_t prvCopyDataToQueue( Queue_t * const pxQueue, const void *pvItemToQueue, const BaseType_t xPosition ) PRIVILEGED_FUNCTION; + +/* + * Copies an item out of a queue. + */ +static void prvCopyDataFromQueue( Queue_t * const pxQueue, void * const pvBuffer ) PRIVILEGED_FUNCTION; + +#if ( configUSE_QUEUE_SETS == 1 ) + /* + * Checks to see if a queue is a member of a queue set, and if so, notifies + * the queue set that the queue contains data. + */ + static BaseType_t prvNotifyQueueSetContainer( const Queue_t * const pxQueue, const BaseType_t xCopyPosition ) PRIVILEGED_FUNCTION; +#endif + +/* + * Called after a Queue_t structure has been allocated either statically or + * dynamically to fill in the structure's members. + */ +static void prvInitialiseNewQueue( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, const uint8_t ucQueueType, Queue_t *pxNewQueue ) PRIVILEGED_FUNCTION; + +/* + * Mutexes are a special type of queue. When a mutex is created, first the + * queue is created, then prvInitialiseMutex() is called to configure the queue + * as a mutex. + */ +#if( configUSE_MUTEXES == 1 ) + static void prvInitialiseMutex( Queue_t *pxNewQueue ) PRIVILEGED_FUNCTION; +#endif + +#if( configUSE_MUTEXES == 1 ) + /* + * If a task waiting for a mutex causes the mutex holder to inherit a + * priority, but the waiting task times out, then the holder should + * disinherit the priority - but only down to the highest priority of any + * other tasks that are waiting for the same mutex. This function returns + * that priority. + */ + static UBaseType_t prvGetDisinheritPriorityAfterTimeout( const Queue_t * const pxQueue ) PRIVILEGED_FUNCTION; +#endif +/*-----------------------------------------------------------*/ + +/* + * Macro to mark a queue as locked. Locking a queue prevents an ISR from + * accessing the queue event lists. + */ +#define prvLockQueue( pxQueue ) \ + taskENTER_CRITICAL(); \ + { \ + if( ( pxQueue )->cRxLock == queueUNLOCKED ) \ + { \ + ( pxQueue )->cRxLock = queueLOCKED_UNMODIFIED; \ + } \ + if( ( pxQueue )->cTxLock == queueUNLOCKED ) \ + { \ + ( pxQueue )->cTxLock = queueLOCKED_UNMODIFIED; \ + } \ + } \ + taskEXIT_CRITICAL() +/*-----------------------------------------------------------*/ + +BaseType_t xQueueGenericReset( QueueHandle_t xQueue, BaseType_t xNewQueue ) +{ +Queue_t * const pxQueue = ( Queue_t * ) xQueue; + + configASSERT( pxQueue ); + + taskENTER_CRITICAL(); + { + pxQueue->pcTail = pxQueue->pcHead + ( pxQueue->uxLength * pxQueue->uxItemSize ); + pxQueue->uxMessagesWaiting = ( UBaseType_t ) 0U; + pxQueue->pcWriteTo = pxQueue->pcHead; + pxQueue->u.pcReadFrom = pxQueue->pcHead + ( ( pxQueue->uxLength - ( UBaseType_t ) 1U ) * pxQueue->uxItemSize ); + pxQueue->cRxLock = queueUNLOCKED; + pxQueue->cTxLock = queueUNLOCKED; + + if( xNewQueue == pdFALSE ) + { + /* If there are tasks blocked waiting to read from the queue, then + the tasks will remain blocked as after this function exits the queue + will still be empty. If there are tasks blocked waiting to write to + the queue, then one should be unblocked as after this function exits + it will be possible to write to it. */ + if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE ) + { + if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE ) + { + queueYIELD_IF_USING_PREEMPTION(); + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + /* Ensure the event queues start in the correct state. */ + vListInitialise( &( pxQueue->xTasksWaitingToSend ) ); + vListInitialise( &( pxQueue->xTasksWaitingToReceive ) ); + } + } + taskEXIT_CRITICAL(); + + /* A value is returned for calling semantic consistency with previous + versions. */ + return pdPASS; +} +/*-----------------------------------------------------------*/ + +#if( configSUPPORT_STATIC_ALLOCATION == 1 ) + + QueueHandle_t xQueueGenericCreateStatic( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, StaticQueue_t *pxStaticQueue, const uint8_t ucQueueType ) + { + Queue_t *pxNewQueue; + + configASSERT( uxQueueLength > ( UBaseType_t ) 0 ); + + /* The StaticQueue_t structure and the queue storage area must be + supplied. */ + configASSERT( pxStaticQueue != NULL ); + + /* A queue storage area should be provided if the item size is not 0, and + should not be provided if the item size is 0. */ + configASSERT( !( ( pucQueueStorage != NULL ) && ( uxItemSize == 0 ) ) ); + configASSERT( !( ( pucQueueStorage == NULL ) && ( uxItemSize != 0 ) ) ); + + #if( configASSERT_DEFINED == 1 ) + { + /* Sanity check that the size of the structure used to declare a + variable of type StaticQueue_t or StaticSemaphore_t equals the size of + the real queue and semaphore structures. */ + volatile size_t xSize = sizeof( StaticQueue_t ); + configASSERT( xSize == sizeof( Queue_t ) ); + } + #endif /* configASSERT_DEFINED */ + + /* The address of a statically allocated queue was passed in, use it. + The address of a statically allocated storage area was also passed in + but is already set. */ + pxNewQueue = ( Queue_t * ) pxStaticQueue; /*lint !e740 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. */ + + if( pxNewQueue != NULL ) + { + #if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) + { + /* Queues can be allocated wither statically or dynamically, so + note this queue was allocated statically in case the queue is + later deleted. */ + pxNewQueue->ucStaticallyAllocated = pdTRUE; + } + #endif /* configSUPPORT_DYNAMIC_ALLOCATION */ + + prvInitialiseNewQueue( uxQueueLength, uxItemSize, pucQueueStorage, ucQueueType, pxNewQueue ); + } + else + { + traceQUEUE_CREATE_FAILED( ucQueueType ); + } + + return pxNewQueue; + } + +#endif /* configSUPPORT_STATIC_ALLOCATION */ +/*-----------------------------------------------------------*/ + +#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) + + QueueHandle_t xQueueGenericCreate( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, const uint8_t ucQueueType ) + { + Queue_t *pxNewQueue; + size_t xQueueSizeInBytes; + uint8_t *pucQueueStorage; + + configASSERT( uxQueueLength > ( UBaseType_t ) 0 ); + + if( uxItemSize == ( UBaseType_t ) 0 ) + { + /* There is not going to be a queue storage area. */ + xQueueSizeInBytes = ( size_t ) 0; + } + else + { + /* Allocate enough space to hold the maximum number of items that + can be in the queue at any time. */ + xQueueSizeInBytes = ( size_t ) ( uxQueueLength * uxItemSize ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */ + } + + pxNewQueue = ( Queue_t * ) pvPortMalloc( sizeof( Queue_t ) + xQueueSizeInBytes ); + + if( pxNewQueue != NULL ) + { + /* Jump past the queue structure to find the location of the queue + storage area. */ + pucQueueStorage = ( ( uint8_t * ) pxNewQueue ) + sizeof( Queue_t ); + + #if( configSUPPORT_STATIC_ALLOCATION == 1 ) + { + /* Queues can be created either statically or dynamically, so + note this task was created dynamically in case it is later + deleted. */ + pxNewQueue->ucStaticallyAllocated = pdFALSE; + } + #endif /* configSUPPORT_STATIC_ALLOCATION */ + + prvInitialiseNewQueue( uxQueueLength, uxItemSize, pucQueueStorage, ucQueueType, pxNewQueue ); + } + else + { + traceQUEUE_CREATE_FAILED( ucQueueType ); + } + + return pxNewQueue; + } + +#endif /* configSUPPORT_STATIC_ALLOCATION */ +/*-----------------------------------------------------------*/ + +static void prvInitialiseNewQueue( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, const uint8_t ucQueueType, Queue_t *pxNewQueue ) +{ + /* Remove compiler warnings about unused parameters should + configUSE_TRACE_FACILITY not be set to 1. */ + ( void ) ucQueueType; + + if( uxItemSize == ( UBaseType_t ) 0 ) + { + /* No RAM was allocated for the queue storage area, but PC head cannot + be set to NULL because NULL is used as a key to say the queue is used as + a mutex. Therefore just set pcHead to point to the queue as a benign + value that is known to be within the memory map. */ + pxNewQueue->pcHead = ( int8_t * ) pxNewQueue; + } + else + { + /* Set the head to the start of the queue storage area. */ + pxNewQueue->pcHead = ( int8_t * ) pucQueueStorage; + } + + /* Initialise the queue members as described where the queue type is + defined. */ + pxNewQueue->uxLength = uxQueueLength; + pxNewQueue->uxItemSize = uxItemSize; + ( void ) xQueueGenericReset( pxNewQueue, pdTRUE ); + + #if ( configUSE_TRACE_FACILITY == 1 ) + { + pxNewQueue->ucQueueType = ucQueueType; + } + #endif /* configUSE_TRACE_FACILITY */ + + #if( configUSE_QUEUE_SETS == 1 ) + { + pxNewQueue->pxQueueSetContainer = NULL; + } + #endif /* configUSE_QUEUE_SETS */ + + traceQUEUE_CREATE( pxNewQueue ); +} +/*-----------------------------------------------------------*/ + +#if( configUSE_MUTEXES == 1 ) + + static void prvInitialiseMutex( Queue_t *pxNewQueue ) + { + if( pxNewQueue != NULL ) + { + /* The queue create function will set all the queue structure members + correctly for a generic queue, but this function is creating a + mutex. Overwrite those members that need to be set differently - + in particular the information required for priority inheritance. */ + pxNewQueue->pxMutexHolder = NULL; + pxNewQueue->uxQueueType = queueQUEUE_IS_MUTEX; + + /* In case this is a recursive mutex. */ + pxNewQueue->u.uxRecursiveCallCount = 0; + + traceCREATE_MUTEX( pxNewQueue ); + + /* Start with the semaphore in the expected state. */ + ( void ) xQueueGenericSend( pxNewQueue, NULL, ( TickType_t ) 0U, queueSEND_TO_BACK ); + } + else + { + traceCREATE_MUTEX_FAILED(); + } + } + +#endif /* configUSE_MUTEXES */ +/*-----------------------------------------------------------*/ + +#if( ( configUSE_MUTEXES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) + + QueueHandle_t xQueueCreateMutex( const uint8_t ucQueueType ) + { + Queue_t *pxNewQueue; + const UBaseType_t uxMutexLength = ( UBaseType_t ) 1, uxMutexSize = ( UBaseType_t ) 0; + + pxNewQueue = ( Queue_t * ) xQueueGenericCreate( uxMutexLength, uxMutexSize, ucQueueType ); + prvInitialiseMutex( pxNewQueue ); + + return pxNewQueue; + } + +#endif /* configUSE_MUTEXES */ +/*-----------------------------------------------------------*/ + +#if( ( configUSE_MUTEXES == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) ) + + QueueHandle_t xQueueCreateMutexStatic( const uint8_t ucQueueType, StaticQueue_t *pxStaticQueue ) + { + Queue_t *pxNewQueue; + const UBaseType_t uxMutexLength = ( UBaseType_t ) 1, uxMutexSize = ( UBaseType_t ) 0; + + /* Prevent compiler warnings about unused parameters if + configUSE_TRACE_FACILITY does not equal 1. */ + ( void ) ucQueueType; + + pxNewQueue = ( Queue_t * ) xQueueGenericCreateStatic( uxMutexLength, uxMutexSize, NULL, pxStaticQueue, ucQueueType ); + prvInitialiseMutex( pxNewQueue ); + + return pxNewQueue; + } + +#endif /* configUSE_MUTEXES */ +/*-----------------------------------------------------------*/ + +#if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) + + void* xQueueGetMutexHolder( QueueHandle_t xSemaphore ) + { + void *pxReturn; + + /* This function is called by xSemaphoreGetMutexHolder(), and should not + be called directly. Note: This is a good way of determining if the + calling task is the mutex holder, but not a good way of determining the + identity of the mutex holder, as the holder may change between the + following critical section exiting and the function returning. */ + taskENTER_CRITICAL(); + { + if( ( ( Queue_t * ) xSemaphore )->uxQueueType == queueQUEUE_IS_MUTEX ) + { + pxReturn = ( void * ) ( ( Queue_t * ) xSemaphore )->pxMutexHolder; + } + else + { + pxReturn = NULL; + } + } + taskEXIT_CRITICAL(); + + return pxReturn; + } /*lint !e818 xSemaphore cannot be a pointer to const because it is a typedef. */ + +#endif +/*-----------------------------------------------------------*/ + +#if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) ) + + void* xQueueGetMutexHolderFromISR( QueueHandle_t xSemaphore ) + { + void *pxReturn; + + configASSERT( xSemaphore ); + + /* Mutexes cannot be used in interrupt service routines, so the mutex + holder should not change in an ISR, and therefore a critical section is + not required here. */ + if( ( ( Queue_t * ) xSemaphore )->uxQueueType == queueQUEUE_IS_MUTEX ) + { + pxReturn = ( void * ) ( ( Queue_t * ) xSemaphore )->pxMutexHolder; + } + else + { + pxReturn = NULL; + } + + return pxReturn; + } /*lint !e818 xSemaphore cannot be a pointer to const because it is a typedef. */ + +#endif +/*-----------------------------------------------------------*/ + +#if ( configUSE_RECURSIVE_MUTEXES == 1 ) + + BaseType_t xQueueGiveMutexRecursive( QueueHandle_t xMutex ) + { + BaseType_t xReturn; + Queue_t * const pxMutex = ( Queue_t * ) xMutex; + + configASSERT( pxMutex ); + + /* If this is the task that holds the mutex then pxMutexHolder will not + change outside of this task. If this task does not hold the mutex then + pxMutexHolder can never coincidentally equal the tasks handle, and as + this is the only condition we are interested in it does not matter if + pxMutexHolder is accessed simultaneously by another task. Therefore no + mutual exclusion is required to test the pxMutexHolder variable. */ + if( pxMutex->pxMutexHolder == ( void * ) xTaskGetCurrentTaskHandle() ) /*lint !e961 Not a redundant cast as TaskHandle_t is a typedef. */ + { + traceGIVE_MUTEX_RECURSIVE( pxMutex ); + + /* uxRecursiveCallCount cannot be zero if pxMutexHolder is equal to + the task handle, therefore no underflow check is required. Also, + uxRecursiveCallCount is only modified by the mutex holder, and as + there can only be one, no mutual exclusion is required to modify the + uxRecursiveCallCount member. */ + ( pxMutex->u.uxRecursiveCallCount )--; + + /* Has the recursive call count unwound to 0? */ + if( pxMutex->u.uxRecursiveCallCount == ( UBaseType_t ) 0 ) + { + /* Return the mutex. This will automatically unblock any other + task that might be waiting to access the mutex. */ + ( void ) xQueueGenericSend( pxMutex, NULL, queueMUTEX_GIVE_BLOCK_TIME, queueSEND_TO_BACK ); + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + + xReturn = pdPASS; + } + else + { + /* The mutex cannot be given because the calling task is not the + holder. */ + xReturn = pdFAIL; + + traceGIVE_MUTEX_RECURSIVE_FAILED( pxMutex ); + } + + return xReturn; + } + +#endif /* configUSE_RECURSIVE_MUTEXES */ +/*-----------------------------------------------------------*/ + +#if ( configUSE_RECURSIVE_MUTEXES == 1 ) + + BaseType_t xQueueTakeMutexRecursive( QueueHandle_t xMutex, TickType_t xTicksToWait ) + { + BaseType_t xReturn; + Queue_t * const pxMutex = ( Queue_t * ) xMutex; + + configASSERT( pxMutex ); + + /* Comments regarding mutual exclusion as per those within + xQueueGiveMutexRecursive(). */ + + traceTAKE_MUTEX_RECURSIVE( pxMutex ); + + if( pxMutex->pxMutexHolder == ( void * ) xTaskGetCurrentTaskHandle() ) /*lint !e961 Cast is not redundant as TaskHandle_t is a typedef. */ + { + ( pxMutex->u.uxRecursiveCallCount )++; + xReturn = pdPASS; + } + else + { + xReturn = xQueueSemaphoreTake( pxMutex, xTicksToWait ); + + /* pdPASS will only be returned if the mutex was successfully + obtained. The calling task may have entered the Blocked state + before reaching here. */ + if( xReturn != pdFAIL ) + { + ( pxMutex->u.uxRecursiveCallCount )++; + } + else + { + traceTAKE_MUTEX_RECURSIVE_FAILED( pxMutex ); + } + } + + return xReturn; + } + +#endif /* configUSE_RECURSIVE_MUTEXES */ +/*-----------------------------------------------------------*/ + +#if( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) ) + + QueueHandle_t xQueueCreateCountingSemaphoreStatic( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount, StaticQueue_t *pxStaticQueue ) + { + QueueHandle_t xHandle; + + configASSERT( uxMaxCount != 0 ); + configASSERT( uxInitialCount <= uxMaxCount ); + + xHandle = xQueueGenericCreateStatic( uxMaxCount, queueSEMAPHORE_QUEUE_ITEM_LENGTH, NULL, pxStaticQueue, queueQUEUE_TYPE_COUNTING_SEMAPHORE ); + + if( xHandle != NULL ) + { + ( ( Queue_t * ) xHandle )->uxMessagesWaiting = uxInitialCount; + + traceCREATE_COUNTING_SEMAPHORE(); + } + else + { + traceCREATE_COUNTING_SEMAPHORE_FAILED(); + } + + return xHandle; + } + +#endif /* ( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) */ +/*-----------------------------------------------------------*/ + +#if( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) + + QueueHandle_t xQueueCreateCountingSemaphore( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount ) + { + QueueHandle_t xHandle; + + configASSERT( uxMaxCount != 0 ); + configASSERT( uxInitialCount <= uxMaxCount ); + + xHandle = xQueueGenericCreate( uxMaxCount, queueSEMAPHORE_QUEUE_ITEM_LENGTH, queueQUEUE_TYPE_COUNTING_SEMAPHORE ); + + if( xHandle != NULL ) + { + ( ( Queue_t * ) xHandle )->uxMessagesWaiting = uxInitialCount; + + traceCREATE_COUNTING_SEMAPHORE(); + } + else + { + traceCREATE_COUNTING_SEMAPHORE_FAILED(); + } + + return xHandle; + } + +#endif /* ( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) */ +/*-----------------------------------------------------------*/ + +BaseType_t xQueueGenericSend( QueueHandle_t xQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, const BaseType_t xCopyPosition ) +{ +BaseType_t xEntryTimeSet = pdFALSE, xYieldRequired; +TimeOut_t xTimeOut; +Queue_t * const pxQueue = ( Queue_t * ) xQueue; + + configASSERT( pxQueue ); + configASSERT( !( ( pvItemToQueue == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) ); + configASSERT( !( ( xCopyPosition == queueOVERWRITE ) && ( pxQueue->uxLength != 1 ) ) ); + #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) ) + { + configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) ); + } + #endif + + + /* This function relaxes the coding standard somewhat to allow return + statements within the function itself. This is done in the interest + of execution time efficiency. */ + for( ;; ) + { + taskENTER_CRITICAL(); + { + /* Is there room on the queue now? The running task must be the + highest priority task wanting to access the queue. If the head item + in the queue is to be overwritten then it does not matter if the + queue is full. */ + if( ( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) || ( xCopyPosition == queueOVERWRITE ) ) + { + traceQUEUE_SEND( pxQueue ); + xYieldRequired = prvCopyDataToQueue( pxQueue, pvItemToQueue, xCopyPosition ); + + #if ( configUSE_QUEUE_SETS == 1 ) + { + if( pxQueue->pxQueueSetContainer != NULL ) + { + if( prvNotifyQueueSetContainer( pxQueue, xCopyPosition ) != pdFALSE ) + { + /* The queue is a member of a queue set, and posting + to the queue set caused a higher priority task to + unblock. A context switch is required. */ + queueYIELD_IF_USING_PREEMPTION(); + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + /* If there was a task waiting for data to arrive on the + queue then unblock it now. */ + if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE ) + { + if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE ) + { + /* The unblocked task has a priority higher than + our own so yield immediately. Yes it is ok to + do this from within the critical section - the + kernel takes care of that. */ + queueYIELD_IF_USING_PREEMPTION(); + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else if( xYieldRequired != pdFALSE ) + { + /* This path is a special case that will only get + executed if the task was holding multiple mutexes + and the mutexes were given back in an order that is + different to that in which they were taken. */ + queueYIELD_IF_USING_PREEMPTION(); + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + } + #else /* configUSE_QUEUE_SETS */ + { + /* If there was a task waiting for data to arrive on the + queue then unblock it now. */ + if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE ) + { + if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE ) + { + /* The unblocked task has a priority higher than + our own so yield immediately. Yes it is ok to do + this from within the critical section - the kernel + takes care of that. */ + queueYIELD_IF_USING_PREEMPTION(); + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else if( xYieldRequired != pdFALSE ) + { + /* This path is a special case that will only get + executed if the task was holding multiple mutexes and + the mutexes were given back in an order that is + different to that in which they were taken. */ + queueYIELD_IF_USING_PREEMPTION(); + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + #endif /* configUSE_QUEUE_SETS */ + + taskEXIT_CRITICAL(); + return pdPASS; + } + else + { + if( xTicksToWait == ( TickType_t ) 0 ) + { + /* The queue was full and no block time is specified (or + the block time has expired) so leave now. */ + taskEXIT_CRITICAL(); + + /* Return to the original privilege level before exiting + the function. */ + traceQUEUE_SEND_FAILED( pxQueue ); + return errQUEUE_FULL; + } + else if( xEntryTimeSet == pdFALSE ) + { + /* The queue was full and a block time was specified so + configure the timeout structure. */ + vTaskInternalSetTimeOutState( &xTimeOut ); + xEntryTimeSet = pdTRUE; + } + else + { + /* Entry time was already set. */ + mtCOVERAGE_TEST_MARKER(); + } + } + } + taskEXIT_CRITICAL(); + + /* Interrupts and other tasks can send to and receive from the queue + now the critical section has been exited. */ + + vTaskSuspendAll(); + prvLockQueue( pxQueue ); + + /* Update the timeout state to see if it has expired yet. */ + if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE ) + { + if( prvIsQueueFull( pxQueue ) != pdFALSE ) + { + traceBLOCKING_ON_QUEUE_SEND( pxQueue ); + vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToSend ), xTicksToWait ); + + /* Unlocking the queue means queue events can effect the + event list. It is possible that interrupts occurring now + remove this task from the event list again - but as the + scheduler is suspended the task will go onto the pending + ready last instead of the actual ready list. */ + prvUnlockQueue( pxQueue ); + + /* Resuming the scheduler will move tasks from the pending + ready list into the ready list - so it is feasible that this + task is already in a ready list before it yields - in which + case the yield will not cause a context switch unless there + is also a higher priority task in the pending ready list. */ + if( xTaskResumeAll() == pdFALSE ) + { + portYIELD_WITHIN_API(); + } + } + else + { + /* Try again. */ + prvUnlockQueue( pxQueue ); + ( void ) xTaskResumeAll(); + } + } + else + { + /* The timeout has expired. */ + prvUnlockQueue( pxQueue ); + ( void ) xTaskResumeAll(); + + traceQUEUE_SEND_FAILED( pxQueue ); + return errQUEUE_FULL; + } + } +} +/*-----------------------------------------------------------*/ + +BaseType_t xQueueGenericSendFromISR( QueueHandle_t xQueue, const void * const pvItemToQueue, BaseType_t * const pxHigherPriorityTaskWoken, const BaseType_t xCopyPosition ) +{ +BaseType_t xReturn; +UBaseType_t uxSavedInterruptStatus; +Queue_t * const pxQueue = ( Queue_t * ) xQueue; + + configASSERT( pxQueue ); + configASSERT( !( ( pvItemToQueue == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) ); + configASSERT( !( ( xCopyPosition == queueOVERWRITE ) && ( pxQueue->uxLength != 1 ) ) ); + + /* RTOS ports that support interrupt nesting have the concept of a maximum + system call (or maximum API call) interrupt priority. Interrupts that are + above the maximum system call priority are kept permanently enabled, even + when the RTOS kernel is in a critical section, but cannot make any calls to + FreeRTOS API functions. If configASSERT() is defined in FreeRTOSConfig.h + then portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion + failure if a FreeRTOS API function is called from an interrupt that has been + assigned a priority above the configured maximum system call priority. + Only FreeRTOS functions that end in FromISR can be called from interrupts + that have been assigned a priority at or (logically) below the maximum + system call interrupt priority. FreeRTOS maintains a separate interrupt + safe API to ensure interrupt entry is as fast and as simple as possible. + More information (albeit Cortex-M specific) is provided on the following + link: http://www.freertos.org/RTOS-Cortex-M3-M4.html */ + portASSERT_IF_INTERRUPT_PRIORITY_INVALID(); + + /* Similar to xQueueGenericSend, except without blocking if there is no room + in the queue. Also don't directly wake a task that was blocked on a queue + read, instead return a flag to say whether a context switch is required or + not (i.e. has a task with a higher priority than us been woken by this + post). */ + uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR(); + { + if( ( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) || ( xCopyPosition == queueOVERWRITE ) ) + { + const int8_t cTxLock = pxQueue->cTxLock; + + traceQUEUE_SEND_FROM_ISR( pxQueue ); + + /* Semaphores use xQueueGiveFromISR(), so pxQueue will not be a + semaphore or mutex. That means prvCopyDataToQueue() cannot result + in a task disinheriting a priority and prvCopyDataToQueue() can be + called here even though the disinherit function does not check if + the scheduler is suspended before accessing the ready lists. */ + ( void ) prvCopyDataToQueue( pxQueue, pvItemToQueue, xCopyPosition ); + + /* The event list is not altered if the queue is locked. This will + be done when the queue is unlocked later. */ + if( cTxLock == queueUNLOCKED ) + { + #if ( configUSE_QUEUE_SETS == 1 ) + { + if( pxQueue->pxQueueSetContainer != NULL ) + { + if( prvNotifyQueueSetContainer( pxQueue, xCopyPosition ) != pdFALSE ) + { + /* The queue is a member of a queue set, and posting + to the queue set caused a higher priority task to + unblock. A context switch is required. */ + if( pxHigherPriorityTaskWoken != NULL ) + { + *pxHigherPriorityTaskWoken = pdTRUE; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE ) + { + if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE ) + { + /* The task waiting has a higher priority so + record that a context switch is required. */ + if( pxHigherPriorityTaskWoken != NULL ) + { + *pxHigherPriorityTaskWoken = pdTRUE; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + } + #else /* configUSE_QUEUE_SETS */ + { + if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE ) + { + if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE ) + { + /* The task waiting has a higher priority so record that a + context switch is required. */ + if( pxHigherPriorityTaskWoken != NULL ) + { + *pxHigherPriorityTaskWoken = pdTRUE; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + #endif /* configUSE_QUEUE_SETS */ + } + else + { + /* Increment the lock count so the task that unlocks the queue + knows that data was posted while it was locked. */ + pxQueue->cTxLock = ( int8_t ) ( cTxLock + 1 ); + } + + xReturn = pdPASS; + } + else + { + traceQUEUE_SEND_FROM_ISR_FAILED( pxQueue ); + xReturn = errQUEUE_FULL; + } + } + portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ); + + return xReturn; +} +/*-----------------------------------------------------------*/ + +BaseType_t xQueueGiveFromISR( QueueHandle_t xQueue, BaseType_t * const pxHigherPriorityTaskWoken ) +{ +BaseType_t xReturn; +UBaseType_t uxSavedInterruptStatus; +Queue_t * const pxQueue = ( Queue_t * ) xQueue; + + /* Similar to xQueueGenericSendFromISR() but used with semaphores where the + item size is 0. Don't directly wake a task that was blocked on a queue + read, instead return a flag to say whether a context switch is required or + not (i.e. has a task with a higher priority than us been woken by this + post). */ + + configASSERT( pxQueue ); + + /* xQueueGenericSendFromISR() should be used instead of xQueueGiveFromISR() + if the item size is not 0. */ + configASSERT( pxQueue->uxItemSize == 0 ); + + /* Normally a mutex would not be given from an interrupt, especially if + there is a mutex holder, as priority inheritance makes no sense for an + interrupts, only tasks. */ + configASSERT( !( ( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX ) && ( pxQueue->pxMutexHolder != NULL ) ) ); + + /* RTOS ports that support interrupt nesting have the concept of a maximum + system call (or maximum API call) interrupt priority. Interrupts that are + above the maximum system call priority are kept permanently enabled, even + when the RTOS kernel is in a critical section, but cannot make any calls to + FreeRTOS API functions. If configASSERT() is defined in FreeRTOSConfig.h + then portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion + failure if a FreeRTOS API function is called from an interrupt that has been + assigned a priority above the configured maximum system call priority. + Only FreeRTOS functions that end in FromISR can be called from interrupts + that have been assigned a priority at or (logically) below the maximum + system call interrupt priority. FreeRTOS maintains a separate interrupt + safe API to ensure interrupt entry is as fast and as simple as possible. + More information (albeit Cortex-M specific) is provided on the following + link: http://www.freertos.org/RTOS-Cortex-M3-M4.html */ + portASSERT_IF_INTERRUPT_PRIORITY_INVALID(); + + uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR(); + { + const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting; + + /* When the queue is used to implement a semaphore no data is ever + moved through the queue but it is still valid to see if the queue 'has + space'. */ + if( uxMessagesWaiting < pxQueue->uxLength ) + { + const int8_t cTxLock = pxQueue->cTxLock; + + traceQUEUE_SEND_FROM_ISR( pxQueue ); + + /* A task can only have an inherited priority if it is a mutex + holder - and if there is a mutex holder then the mutex cannot be + given from an ISR. As this is the ISR version of the function it + can be assumed there is no mutex holder and no need to determine if + priority disinheritance is needed. Simply increase the count of + messages (semaphores) available. */ + pxQueue->uxMessagesWaiting = uxMessagesWaiting + ( UBaseType_t ) 1; + + /* The event list is not altered if the queue is locked. This will + be done when the queue is unlocked later. */ + if( cTxLock == queueUNLOCKED ) + { + #if ( configUSE_QUEUE_SETS == 1 ) + { + if( pxQueue->pxQueueSetContainer != NULL ) + { + if( prvNotifyQueueSetContainer( pxQueue, queueSEND_TO_BACK ) != pdFALSE ) + { + /* The semaphore is a member of a queue set, and + posting to the queue set caused a higher priority + task to unblock. A context switch is required. */ + if( pxHigherPriorityTaskWoken != NULL ) + { + *pxHigherPriorityTaskWoken = pdTRUE; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE ) + { + if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE ) + { + /* The task waiting has a higher priority so + record that a context switch is required. */ + if( pxHigherPriorityTaskWoken != NULL ) + { + *pxHigherPriorityTaskWoken = pdTRUE; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + } + #else /* configUSE_QUEUE_SETS */ + { + if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE ) + { + if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE ) + { + /* The task waiting has a higher priority so record that a + context switch is required. */ + if( pxHigherPriorityTaskWoken != NULL ) + { + *pxHigherPriorityTaskWoken = pdTRUE; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + #endif /* configUSE_QUEUE_SETS */ + } + else + { + /* Increment the lock count so the task that unlocks the queue + knows that data was posted while it was locked. */ + pxQueue->cTxLock = ( int8_t ) ( cTxLock + 1 ); + } + + xReturn = pdPASS; + } + else + { + traceQUEUE_SEND_FROM_ISR_FAILED( pxQueue ); + xReturn = errQUEUE_FULL; + } + } + portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ); + + return xReturn; +} +/*-----------------------------------------------------------*/ + +BaseType_t xQueueReceive( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait ) +{ +BaseType_t xEntryTimeSet = pdFALSE; +TimeOut_t xTimeOut; +Queue_t * const pxQueue = ( Queue_t * ) xQueue; + + /* Check the pointer is not NULL. */ + configASSERT( ( pxQueue ) ); + + /* The buffer into which data is received can only be NULL if the data size + is zero (so no data is copied into the buffer. */ + configASSERT( !( ( ( pvBuffer ) == NULL ) && ( ( pxQueue )->uxItemSize != ( UBaseType_t ) 0U ) ) ); + + /* Cannot block if the scheduler is suspended. */ + #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) ) + { + configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) ); + } + #endif + + /* This function relaxes the coding standard somewhat to allow return + statements within the function itself. This is done in the interest + of execution time efficiency. */ + + for( ;; ) + { + taskENTER_CRITICAL(); + { + const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting; + + /* Is there data in the queue now? To be running the calling task + must be the highest priority task wanting to access the queue. */ + if( uxMessagesWaiting > ( UBaseType_t ) 0 ) + { + /* Data available, remove one item. */ + prvCopyDataFromQueue( pxQueue, pvBuffer ); + traceQUEUE_RECEIVE( pxQueue ); + pxQueue->uxMessagesWaiting = uxMessagesWaiting - ( UBaseType_t ) 1; + + /* There is now space in the queue, were any tasks waiting to + post to the queue? If so, unblock the highest priority waiting + task. */ + if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE ) + { + if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE ) + { + queueYIELD_IF_USING_PREEMPTION(); + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + + taskEXIT_CRITICAL(); + return pdPASS; + } + else + { + if( xTicksToWait == ( TickType_t ) 0 ) + { + /* The queue was empty and no block time is specified (or + the block time has expired) so leave now. */ + taskEXIT_CRITICAL(); + traceQUEUE_RECEIVE_FAILED( pxQueue ); + return errQUEUE_EMPTY; + } + else if( xEntryTimeSet == pdFALSE ) + { + /* The queue was empty and a block time was specified so + configure the timeout structure. */ + vTaskInternalSetTimeOutState( &xTimeOut ); + xEntryTimeSet = pdTRUE; + } + else + { + /* Entry time was already set. */ + mtCOVERAGE_TEST_MARKER(); + } + } + } + taskEXIT_CRITICAL(); + + /* Interrupts and other tasks can send to and receive from the queue + now the critical section has been exited. */ + + vTaskSuspendAll(); + prvLockQueue( pxQueue ); + + /* Update the timeout state to see if it has expired yet. */ + if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE ) + { + /* The timeout has not expired. If the queue is still empty place + the task on the list of tasks waiting to receive from the queue. */ + if( prvIsQueueEmpty( pxQueue ) != pdFALSE ) + { + traceBLOCKING_ON_QUEUE_RECEIVE( pxQueue ); + vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait ); + prvUnlockQueue( pxQueue ); + if( xTaskResumeAll() == pdFALSE ) + { + portYIELD_WITHIN_API(); + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + /* The queue contains data again. Loop back to try and read the + data. */ + prvUnlockQueue( pxQueue ); + ( void ) xTaskResumeAll(); + } + } + else + { + /* Timed out. If there is no data in the queue exit, otherwise loop + back and attempt to read the data. */ + prvUnlockQueue( pxQueue ); + ( void ) xTaskResumeAll(); + + if( prvIsQueueEmpty( pxQueue ) != pdFALSE ) + { + traceQUEUE_RECEIVE_FAILED( pxQueue ); + return errQUEUE_EMPTY; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + } +} +/*-----------------------------------------------------------*/ + +BaseType_t xQueueSemaphoreTake( QueueHandle_t xQueue, TickType_t xTicksToWait ) +{ +BaseType_t xEntryTimeSet = pdFALSE; +TimeOut_t xTimeOut; +Queue_t * const pxQueue = ( Queue_t * ) xQueue; + +#if( configUSE_MUTEXES == 1 ) + BaseType_t xInheritanceOccurred = pdFALSE; +#endif + + /* Check the queue pointer is not NULL. */ + configASSERT( ( pxQueue ) ); + + /* Check this really is a semaphore, in which case the item size will be + 0. */ + configASSERT( pxQueue->uxItemSize == 0 ); + + /* Cannot block if the scheduler is suspended. */ + #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) ) + { + configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) ); + } + #endif + + + /* This function relaxes the coding standard somewhat to allow return + statements within the function itself. This is done in the interest + of execution time efficiency. */ + + for( ;; ) + { + taskENTER_CRITICAL(); + { + /* Semaphores are queues with an item size of 0, and where the + number of messages in the queue is the semaphore's count value. */ + const UBaseType_t uxSemaphoreCount = pxQueue->uxMessagesWaiting; + + /* Is there data in the queue now? To be running the calling task + must be the highest priority task wanting to access the queue. */ + if( uxSemaphoreCount > ( UBaseType_t ) 0 ) + { + traceQUEUE_RECEIVE( pxQueue ); + + /* Semaphores are queues with a data size of zero and where the + messages waiting is the semaphore's count. Reduce the count. */ + pxQueue->uxMessagesWaiting = uxSemaphoreCount - ( UBaseType_t ) 1; + + #if ( configUSE_MUTEXES == 1 ) + { + if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX ) + { + /* Record the information required to implement + priority inheritance should it become necessary. */ + pxQueue->pxMutexHolder = ( int8_t * ) pvTaskIncrementMutexHeldCount(); /*lint !e961 Cast is not redundant as TaskHandle_t is a typedef. */ + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + #endif /* configUSE_MUTEXES */ + + /* Check to see if other tasks are blocked waiting to give the + semaphore, and if so, unblock the highest priority such task. */ + if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE ) + { + if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE ) + { + queueYIELD_IF_USING_PREEMPTION(); + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + + taskEXIT_CRITICAL(); + return pdPASS; + } + else + { + if( xTicksToWait == ( TickType_t ) 0 ) + { + /* For inheritance to have occurred there must have been an + initial timeout, and an adjusted timeout cannot become 0, as + if it were 0 the function would have exited. */ + #if( configUSE_MUTEXES == 1 ) + { + configASSERT( xInheritanceOccurred == pdFALSE ); + } + #endif /* configUSE_MUTEXES */ + + /* The semaphore count was 0 and no block time is specified + (or the block time has expired) so exit now. */ + taskEXIT_CRITICAL(); + traceQUEUE_RECEIVE_FAILED( pxQueue ); + return errQUEUE_EMPTY; + } + else if( xEntryTimeSet == pdFALSE ) + { + /* The semaphore count was 0 and a block time was specified + so configure the timeout structure ready to block. */ + vTaskInternalSetTimeOutState( &xTimeOut ); + xEntryTimeSet = pdTRUE; + } + else + { + /* Entry time was already set. */ + mtCOVERAGE_TEST_MARKER(); + } + } + } + taskEXIT_CRITICAL(); + + /* Interrupts and other tasks can give to and take from the semaphore + now the critical section has been exited. */ + + vTaskSuspendAll(); + prvLockQueue( pxQueue ); + + /* Update the timeout state to see if it has expired yet. */ + if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE ) + { + /* A block time is specified and not expired. If the semaphore + count is 0 then enter the Blocked state to wait for a semaphore to + become available. As semaphores are implemented with queues the + queue being empty is equivalent to the semaphore count being 0. */ + if( prvIsQueueEmpty( pxQueue ) != pdFALSE ) + { + traceBLOCKING_ON_QUEUE_RECEIVE( pxQueue ); + + #if ( configUSE_MUTEXES == 1 ) + { + if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX ) + { + taskENTER_CRITICAL(); + { + xInheritanceOccurred = xTaskPriorityInherit( ( void * ) pxQueue->pxMutexHolder ); + } + taskEXIT_CRITICAL(); + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + #endif + + vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait ); + prvUnlockQueue( pxQueue ); + if( xTaskResumeAll() == pdFALSE ) + { + portYIELD_WITHIN_API(); + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + /* There was no timeout and the semaphore count was not 0, so + attempt to take the semaphore again. */ + prvUnlockQueue( pxQueue ); + ( void ) xTaskResumeAll(); + } + } + else + { + /* Timed out. */ + prvUnlockQueue( pxQueue ); + ( void ) xTaskResumeAll(); + + /* If the semaphore count is 0 exit now as the timeout has + expired. Otherwise return to attempt to take the semaphore that is + known to be available. As semaphores are implemented by queues the + queue being empty is equivalent to the semaphore count being 0. */ + if( prvIsQueueEmpty( pxQueue ) != pdFALSE ) + { + #if ( configUSE_MUTEXES == 1 ) + { + /* xInheritanceOccurred could only have be set if + pxQueue->uxQueueType == queueQUEUE_IS_MUTEX so no need to + test the mutex type again to check it is actually a mutex. */ + if( xInheritanceOccurred != pdFALSE ) + { + taskENTER_CRITICAL(); + { + UBaseType_t uxHighestWaitingPriority; + + /* This task blocking on the mutex caused another + task to inherit this task's priority. Now this task + has timed out the priority should be disinherited + again, but only as low as the next highest priority + task that is waiting for the same mutex. */ + uxHighestWaitingPriority = prvGetDisinheritPriorityAfterTimeout( pxQueue ); + vTaskPriorityDisinheritAfterTimeout( ( void * ) pxQueue->pxMutexHolder, uxHighestWaitingPriority ); + } + taskEXIT_CRITICAL(); + } + } + #endif /* configUSE_MUTEXES */ + + traceQUEUE_RECEIVE_FAILED( pxQueue ); + return errQUEUE_EMPTY; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + } +} +/*-----------------------------------------------------------*/ + +BaseType_t xQueuePeek( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait ) +{ +BaseType_t xEntryTimeSet = pdFALSE; +TimeOut_t xTimeOut; +int8_t *pcOriginalReadPosition; +Queue_t * const pxQueue = ( Queue_t * ) xQueue; + + /* Check the pointer is not NULL. */ + configASSERT( ( pxQueue ) ); + + /* The buffer into which data is received can only be NULL if the data size + is zero (so no data is copied into the buffer. */ + configASSERT( !( ( ( pvBuffer ) == NULL ) && ( ( pxQueue )->uxItemSize != ( UBaseType_t ) 0U ) ) ); + + /* Cannot block if the scheduler is suspended. */ + #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) ) + { + configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) ); + } + #endif + + + /* This function relaxes the coding standard somewhat to allow return + statements within the function itself. This is done in the interest + of execution time efficiency. */ + + for( ;; ) + { + taskENTER_CRITICAL(); + { + const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting; + + /* Is there data in the queue now? To be running the calling task + must be the highest priority task wanting to access the queue. */ + if( uxMessagesWaiting > ( UBaseType_t ) 0 ) + { + /* Remember the read position so it can be reset after the data + is read from the queue as this function is only peeking the + data, not removing it. */ + pcOriginalReadPosition = pxQueue->u.pcReadFrom; + + prvCopyDataFromQueue( pxQueue, pvBuffer ); + traceQUEUE_PEEK( pxQueue ); + + /* The data is not being removed, so reset the read pointer. */ + pxQueue->u.pcReadFrom = pcOriginalReadPosition; + + /* The data is being left in the queue, so see if there are + any other tasks waiting for the data. */ + if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE ) + { + if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE ) + { + /* The task waiting has a higher priority than this task. */ + queueYIELD_IF_USING_PREEMPTION(); + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + + taskEXIT_CRITICAL(); + return pdPASS; + } + else + { + if( xTicksToWait == ( TickType_t ) 0 ) + { + /* The queue was empty and no block time is specified (or + the block time has expired) so leave now. */ + taskEXIT_CRITICAL(); + traceQUEUE_PEEK_FAILED( pxQueue ); + return errQUEUE_EMPTY; + } + else if( xEntryTimeSet == pdFALSE ) + { + /* The queue was empty and a block time was specified so + configure the timeout structure ready to enter the blocked + state. */ + vTaskInternalSetTimeOutState( &xTimeOut ); + xEntryTimeSet = pdTRUE; + } + else + { + /* Entry time was already set. */ + mtCOVERAGE_TEST_MARKER(); + } + } + } + taskEXIT_CRITICAL(); + + /* Interrupts and other tasks can send to and receive from the queue + now the critical section has been exited. */ + + vTaskSuspendAll(); + prvLockQueue( pxQueue ); + + /* Update the timeout state to see if it has expired yet. */ + if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE ) + { + /* Timeout has not expired yet, check to see if there is data in the + queue now, and if not enter the Blocked state to wait for data. */ + if( prvIsQueueEmpty( pxQueue ) != pdFALSE ) + { + traceBLOCKING_ON_QUEUE_PEEK( pxQueue ); + vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait ); + prvUnlockQueue( pxQueue ); + if( xTaskResumeAll() == pdFALSE ) + { + portYIELD_WITHIN_API(); + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + /* There is data in the queue now, so don't enter the blocked + state, instead return to try and obtain the data. */ + prvUnlockQueue( pxQueue ); + ( void ) xTaskResumeAll(); + } + } + else + { + /* The timeout has expired. If there is still no data in the queue + exit, otherwise go back and try to read the data again. */ + prvUnlockQueue( pxQueue ); + ( void ) xTaskResumeAll(); + + if( prvIsQueueEmpty( pxQueue ) != pdFALSE ) + { + traceQUEUE_PEEK_FAILED( pxQueue ); + return errQUEUE_EMPTY; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + } +} +/*-----------------------------------------------------------*/ + +BaseType_t xQueueReceiveFromISR( QueueHandle_t xQueue, void * const pvBuffer, BaseType_t * const pxHigherPriorityTaskWoken ) +{ +BaseType_t xReturn; +UBaseType_t uxSavedInterruptStatus; +Queue_t * const pxQueue = ( Queue_t * ) xQueue; + + configASSERT( pxQueue ); + configASSERT( !( ( pvBuffer == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) ); + + /* RTOS ports that support interrupt nesting have the concept of a maximum + system call (or maximum API call) interrupt priority. Interrupts that are + above the maximum system call priority are kept permanently enabled, even + when the RTOS kernel is in a critical section, but cannot make any calls to + FreeRTOS API functions. If configASSERT() is defined in FreeRTOSConfig.h + then portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion + failure if a FreeRTOS API function is called from an interrupt that has been + assigned a priority above the configured maximum system call priority. + Only FreeRTOS functions that end in FromISR can be called from interrupts + that have been assigned a priority at or (logically) below the maximum + system call interrupt priority. FreeRTOS maintains a separate interrupt + safe API to ensure interrupt entry is as fast and as simple as possible. + More information (albeit Cortex-M specific) is provided on the following + link: http://www.freertos.org/RTOS-Cortex-M3-M4.html */ + portASSERT_IF_INTERRUPT_PRIORITY_INVALID(); + + uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR(); + { + const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting; + + /* Cannot block in an ISR, so check there is data available. */ + if( uxMessagesWaiting > ( UBaseType_t ) 0 ) + { + const int8_t cRxLock = pxQueue->cRxLock; + + traceQUEUE_RECEIVE_FROM_ISR( pxQueue ); + + prvCopyDataFromQueue( pxQueue, pvBuffer ); + pxQueue->uxMessagesWaiting = uxMessagesWaiting - ( UBaseType_t ) 1; + + /* If the queue is locked the event list will not be modified. + Instead update the lock count so the task that unlocks the queue + will know that an ISR has removed data while the queue was + locked. */ + if( cRxLock == queueUNLOCKED ) + { + if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE ) + { + if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE ) + { + /* The task waiting has a higher priority than us so + force a context switch. */ + if( pxHigherPriorityTaskWoken != NULL ) + { + *pxHigherPriorityTaskWoken = pdTRUE; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + /* Increment the lock count so the task that unlocks the queue + knows that data was removed while it was locked. */ + pxQueue->cRxLock = ( int8_t ) ( cRxLock + 1 ); + } + + xReturn = pdPASS; + } + else + { + xReturn = pdFAIL; + traceQUEUE_RECEIVE_FROM_ISR_FAILED( pxQueue ); + } + } + portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ); + + return xReturn; +} +/*-----------------------------------------------------------*/ + +BaseType_t xQueuePeekFromISR( QueueHandle_t xQueue, void * const pvBuffer ) +{ +BaseType_t xReturn; +UBaseType_t uxSavedInterruptStatus; +int8_t *pcOriginalReadPosition; +Queue_t * const pxQueue = ( Queue_t * ) xQueue; + + configASSERT( pxQueue ); + configASSERT( !( ( pvBuffer == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) ); + configASSERT( pxQueue->uxItemSize != 0 ); /* Can't peek a semaphore. */ + + /* RTOS ports that support interrupt nesting have the concept of a maximum + system call (or maximum API call) interrupt priority. Interrupts that are + above the maximum system call priority are kept permanently enabled, even + when the RTOS kernel is in a critical section, but cannot make any calls to + FreeRTOS API functions. If configASSERT() is defined in FreeRTOSConfig.h + then portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion + failure if a FreeRTOS API function is called from an interrupt that has been + assigned a priority above the configured maximum system call priority. + Only FreeRTOS functions that end in FromISR can be called from interrupts + that have been assigned a priority at or (logically) below the maximum + system call interrupt priority. FreeRTOS maintains a separate interrupt + safe API to ensure interrupt entry is as fast and as simple as possible. + More information (albeit Cortex-M specific) is provided on the following + link: http://www.freertos.org/RTOS-Cortex-M3-M4.html */ + portASSERT_IF_INTERRUPT_PRIORITY_INVALID(); + + uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR(); + { + /* Cannot block in an ISR, so check there is data available. */ + if( pxQueue->uxMessagesWaiting > ( UBaseType_t ) 0 ) + { + traceQUEUE_PEEK_FROM_ISR( pxQueue ); + + /* Remember the read position so it can be reset as nothing is + actually being removed from the queue. */ + pcOriginalReadPosition = pxQueue->u.pcReadFrom; + prvCopyDataFromQueue( pxQueue, pvBuffer ); + pxQueue->u.pcReadFrom = pcOriginalReadPosition; + + xReturn = pdPASS; + } + else + { + xReturn = pdFAIL; + traceQUEUE_PEEK_FROM_ISR_FAILED( pxQueue ); + } + } + portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ); + + return xReturn; +} +/*-----------------------------------------------------------*/ + +UBaseType_t uxQueueMessagesWaiting( const QueueHandle_t xQueue ) +{ +UBaseType_t uxReturn; + + configASSERT( xQueue ); + + taskENTER_CRITICAL(); + { + uxReturn = ( ( Queue_t * ) xQueue )->uxMessagesWaiting; + } + taskEXIT_CRITICAL(); + + return uxReturn; +} /*lint !e818 Pointer cannot be declared const as xQueue is a typedef not pointer. */ +/*-----------------------------------------------------------*/ + +UBaseType_t uxQueueSpacesAvailable( const QueueHandle_t xQueue ) +{ +UBaseType_t uxReturn; +Queue_t *pxQueue; + + pxQueue = ( Queue_t * ) xQueue; + configASSERT( pxQueue ); + + taskENTER_CRITICAL(); + { + uxReturn = pxQueue->uxLength - pxQueue->uxMessagesWaiting; + } + taskEXIT_CRITICAL(); + + return uxReturn; +} /*lint !e818 Pointer cannot be declared const as xQueue is a typedef not pointer. */ +/*-----------------------------------------------------------*/ + +UBaseType_t uxQueueMessagesWaitingFromISR( const QueueHandle_t xQueue ) +{ +UBaseType_t uxReturn; + + configASSERT( xQueue ); + + uxReturn = ( ( Queue_t * ) xQueue )->uxMessagesWaiting; + + return uxReturn; +} /*lint !e818 Pointer cannot be declared const as xQueue is a typedef not pointer. */ +/*-----------------------------------------------------------*/ + +void vQueueDelete( QueueHandle_t xQueue ) +{ +Queue_t * const pxQueue = ( Queue_t * ) xQueue; + + configASSERT( pxQueue ); + traceQUEUE_DELETE( pxQueue ); + + #if ( configQUEUE_REGISTRY_SIZE > 0 ) + { + vQueueUnregisterQueue( pxQueue ); + } + #endif + + #if( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 0 ) ) + { + /* The queue can only have been allocated dynamically - free it + again. */ + vPortFree( pxQueue ); + } + #elif( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) ) + { + /* The queue could have been allocated statically or dynamically, so + check before attempting to free the memory. */ + if( pxQueue->ucStaticallyAllocated == ( uint8_t ) pdFALSE ) + { + vPortFree( pxQueue ); + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + #else + { + /* The queue must have been statically allocated, so is not going to be + deleted. Avoid compiler warnings about the unused parameter. */ + ( void ) pxQueue; + } + #endif /* configSUPPORT_DYNAMIC_ALLOCATION */ +} +/*-----------------------------------------------------------*/ + +#if ( configUSE_TRACE_FACILITY == 1 ) + + UBaseType_t uxQueueGetQueueNumber( QueueHandle_t xQueue ) + { + return ( ( Queue_t * ) xQueue )->uxQueueNumber; + } + +#endif /* configUSE_TRACE_FACILITY */ +/*-----------------------------------------------------------*/ + +#if ( configUSE_TRACE_FACILITY == 1 ) + + void vQueueSetQueueNumber( QueueHandle_t xQueue, UBaseType_t uxQueueNumber ) + { + ( ( Queue_t * ) xQueue )->uxQueueNumber = uxQueueNumber; + } + +#endif /* configUSE_TRACE_FACILITY */ +/*-----------------------------------------------------------*/ + +#if ( configUSE_TRACE_FACILITY == 1 ) + + uint8_t ucQueueGetQueueType( QueueHandle_t xQueue ) + { + return ( ( Queue_t * ) xQueue )->ucQueueType; + } + +#endif /* configUSE_TRACE_FACILITY */ +/*-----------------------------------------------------------*/ + +#if( configUSE_MUTEXES == 1 ) + + static UBaseType_t prvGetDisinheritPriorityAfterTimeout( const Queue_t * const pxQueue ) + { + UBaseType_t uxHighestPriorityOfWaitingTasks; + + /* If a task waiting for a mutex causes the mutex holder to inherit a + priority, but the waiting task times out, then the holder should + disinherit the priority - but only down to the highest priority of any + other tasks that are waiting for the same mutex. For this purpose, + return the priority of the highest priority task that is waiting for the + mutex. */ + if( listCURRENT_LIST_LENGTH( &( pxQueue->xTasksWaitingToReceive ) ) > 0 ) + { + uxHighestPriorityOfWaitingTasks = configMAX_PRIORITIES - listGET_ITEM_VALUE_OF_HEAD_ENTRY( &( pxQueue->xTasksWaitingToReceive ) ); + } + else + { + uxHighestPriorityOfWaitingTasks = tskIDLE_PRIORITY; + } + + return uxHighestPriorityOfWaitingTasks; + } + +#endif /* configUSE_MUTEXES */ +/*-----------------------------------------------------------*/ + +static BaseType_t prvCopyDataToQueue( Queue_t * const pxQueue, const void *pvItemToQueue, const BaseType_t xPosition ) +{ +BaseType_t xReturn = pdFALSE; +UBaseType_t uxMessagesWaiting; + + /* This function is called from a critical section. */ + + uxMessagesWaiting = pxQueue->uxMessagesWaiting; + + if( pxQueue->uxItemSize == ( UBaseType_t ) 0 ) + { + #if ( configUSE_MUTEXES == 1 ) + { + if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX ) + { + /* The mutex is no longer being held. */ + xReturn = xTaskPriorityDisinherit( ( void * ) pxQueue->pxMutexHolder ); + pxQueue->pxMutexHolder = NULL; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + #endif /* configUSE_MUTEXES */ + } + else if( xPosition == queueSEND_TO_BACK ) + { + ( void ) memcpy( ( void * ) pxQueue->pcWriteTo, pvItemToQueue, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 !e418 MISRA exception as the casts are only redundant for some ports, plus previous logic ensures a null pointer can only be passed to memcpy() if the copy size is 0. */ + pxQueue->pcWriteTo += pxQueue->uxItemSize; + if( pxQueue->pcWriteTo >= pxQueue->pcTail ) /*lint !e946 MISRA exception justified as comparison of pointers is the cleanest solution. */ + { + pxQueue->pcWriteTo = pxQueue->pcHead; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + ( void ) memcpy( ( void * ) pxQueue->u.pcReadFrom, pvItemToQueue, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */ + pxQueue->u.pcReadFrom -= pxQueue->uxItemSize; + if( pxQueue->u.pcReadFrom < pxQueue->pcHead ) /*lint !e946 MISRA exception justified as comparison of pointers is the cleanest solution. */ + { + pxQueue->u.pcReadFrom = ( pxQueue->pcTail - pxQueue->uxItemSize ); + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + + if( xPosition == queueOVERWRITE ) + { + if( uxMessagesWaiting > ( UBaseType_t ) 0 ) + { + /* An item is not being added but overwritten, so subtract + one from the recorded number of items in the queue so when + one is added again below the number of recorded items remains + correct. */ + --uxMessagesWaiting; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + + pxQueue->uxMessagesWaiting = uxMessagesWaiting + ( UBaseType_t ) 1; + + return xReturn; +} +/*-----------------------------------------------------------*/ + +static void prvCopyDataFromQueue( Queue_t * const pxQueue, void * const pvBuffer ) +{ + if( pxQueue->uxItemSize != ( UBaseType_t ) 0 ) + { + pxQueue->u.pcReadFrom += pxQueue->uxItemSize; + if( pxQueue->u.pcReadFrom >= pxQueue->pcTail ) /*lint !e946 MISRA exception justified as use of the relational operator is the cleanest solutions. */ + { + pxQueue->u.pcReadFrom = pxQueue->pcHead; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + ( void ) memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->u.pcReadFrom, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 !e418 MISRA exception as the casts are only redundant for some ports. Also previous logic ensures a null pointer can only be passed to memcpy() when the count is 0. */ + } +} +/*-----------------------------------------------------------*/ + +static void prvUnlockQueue( Queue_t * const pxQueue ) +{ + /* THIS FUNCTION MUST BE CALLED WITH THE SCHEDULER SUSPENDED. */ + + /* The lock counts contains the number of extra data items placed or + removed from the queue while the queue was locked. When a queue is + locked items can be added or removed, but the event lists cannot be + updated. */ + taskENTER_CRITICAL(); + { + int8_t cTxLock = pxQueue->cTxLock; + + /* See if data was added to the queue while it was locked. */ + while( cTxLock > queueLOCKED_UNMODIFIED ) + { + /* Data was posted while the queue was locked. Are any tasks + blocked waiting for data to become available? */ + #if ( configUSE_QUEUE_SETS == 1 ) + { + if( pxQueue->pxQueueSetContainer != NULL ) + { + if( prvNotifyQueueSetContainer( pxQueue, queueSEND_TO_BACK ) != pdFALSE ) + { + /* The queue is a member of a queue set, and posting to + the queue set caused a higher priority task to unblock. + A context switch is required. */ + vTaskMissedYield(); + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + /* Tasks that are removed from the event list will get + added to the pending ready list as the scheduler is still + suspended. */ + if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE ) + { + if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE ) + { + /* The task waiting has a higher priority so record that a + context switch is required. */ + vTaskMissedYield(); + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + break; + } + } + } + #else /* configUSE_QUEUE_SETS */ + { + /* Tasks that are removed from the event list will get added to + the pending ready list as the scheduler is still suspended. */ + if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE ) + { + if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE ) + { + /* The task waiting has a higher priority so record that + a context switch is required. */ + vTaskMissedYield(); + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + break; + } + } + #endif /* configUSE_QUEUE_SETS */ + + --cTxLock; + } + + pxQueue->cTxLock = queueUNLOCKED; + } + taskEXIT_CRITICAL(); + + /* Do the same for the Rx lock. */ + taskENTER_CRITICAL(); + { + int8_t cRxLock = pxQueue->cRxLock; + + while( cRxLock > queueLOCKED_UNMODIFIED ) + { + if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE ) + { + if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE ) + { + vTaskMissedYield(); + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + + --cRxLock; + } + else + { + break; + } + } + + pxQueue->cRxLock = queueUNLOCKED; + } + taskEXIT_CRITICAL(); +} +/*-----------------------------------------------------------*/ + +static BaseType_t prvIsQueueEmpty( const Queue_t *pxQueue ) +{ +BaseType_t xReturn; + + taskENTER_CRITICAL(); + { + if( pxQueue->uxMessagesWaiting == ( UBaseType_t ) 0 ) + { + xReturn = pdTRUE; + } + else + { + xReturn = pdFALSE; + } + } + taskEXIT_CRITICAL(); + + return xReturn; +} +/*-----------------------------------------------------------*/ + +BaseType_t xQueueIsQueueEmptyFromISR( const QueueHandle_t xQueue ) +{ +BaseType_t xReturn; + + configASSERT( xQueue ); + if( ( ( Queue_t * ) xQueue )->uxMessagesWaiting == ( UBaseType_t ) 0 ) + { + xReturn = pdTRUE; + } + else + { + xReturn = pdFALSE; + } + + return xReturn; +} /*lint !e818 xQueue could not be pointer to const because it is a typedef. */ +/*-----------------------------------------------------------*/ + +static BaseType_t prvIsQueueFull( const Queue_t *pxQueue ) +{ +BaseType_t xReturn; + + taskENTER_CRITICAL(); + { + if( pxQueue->uxMessagesWaiting == pxQueue->uxLength ) + { + xReturn = pdTRUE; + } + else + { + xReturn = pdFALSE; + } + } + taskEXIT_CRITICAL(); + + return xReturn; +} +/*-----------------------------------------------------------*/ + +BaseType_t xQueueIsQueueFullFromISR( const QueueHandle_t xQueue ) +{ +BaseType_t xReturn; + + configASSERT( xQueue ); + if( ( ( Queue_t * ) xQueue )->uxMessagesWaiting == ( ( Queue_t * ) xQueue )->uxLength ) + { + xReturn = pdTRUE; + } + else + { + xReturn = pdFALSE; + } + + return xReturn; +} /*lint !e818 xQueue could not be pointer to const because it is a typedef. */ +/*-----------------------------------------------------------*/ + +#if ( configUSE_CO_ROUTINES == 1 ) + + BaseType_t xQueueCRSend( QueueHandle_t xQueue, const void *pvItemToQueue, TickType_t xTicksToWait ) + { + BaseType_t xReturn; + Queue_t * const pxQueue = ( Queue_t * ) xQueue; + + /* If the queue is already full we may have to block. A critical section + is required to prevent an interrupt removing something from the queue + between the check to see if the queue is full and blocking on the queue. */ + portDISABLE_INTERRUPTS(); + { + if( prvIsQueueFull( pxQueue ) != pdFALSE ) + { + /* The queue is full - do we want to block or just leave without + posting? */ + if( xTicksToWait > ( TickType_t ) 0 ) + { + /* As this is called from a coroutine we cannot block directly, but + return indicating that we need to block. */ + vCoRoutineAddToDelayedList( xTicksToWait, &( pxQueue->xTasksWaitingToSend ) ); + portENABLE_INTERRUPTS(); + return errQUEUE_BLOCKED; + } + else + { + portENABLE_INTERRUPTS(); + return errQUEUE_FULL; + } + } + } + portENABLE_INTERRUPTS(); + + portDISABLE_INTERRUPTS(); + { + if( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) + { + /* There is room in the queue, copy the data into the queue. */ + prvCopyDataToQueue( pxQueue, pvItemToQueue, queueSEND_TO_BACK ); + xReturn = pdPASS; + + /* Were any co-routines waiting for data to become available? */ + if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE ) + { + /* In this instance the co-routine could be placed directly + into the ready list as we are within a critical section. + Instead the same pending ready list mechanism is used as if + the event were caused from within an interrupt. */ + if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE ) + { + /* The co-routine waiting has a higher priority so record + that a yield might be appropriate. */ + xReturn = errQUEUE_YIELD; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + xReturn = errQUEUE_FULL; + } + } + portENABLE_INTERRUPTS(); + + return xReturn; + } + +#endif /* configUSE_CO_ROUTINES */ +/*-----------------------------------------------------------*/ + +#if ( configUSE_CO_ROUTINES == 1 ) + + BaseType_t xQueueCRReceive( QueueHandle_t xQueue, void *pvBuffer, TickType_t xTicksToWait ) + { + BaseType_t xReturn; + Queue_t * const pxQueue = ( Queue_t * ) xQueue; + + /* If the queue is already empty we may have to block. A critical section + is required to prevent an interrupt adding something to the queue + between the check to see if the queue is empty and blocking on the queue. */ + portDISABLE_INTERRUPTS(); + { + if( pxQueue->uxMessagesWaiting == ( UBaseType_t ) 0 ) + { + /* There are no messages in the queue, do we want to block or just + leave with nothing? */ + if( xTicksToWait > ( TickType_t ) 0 ) + { + /* As this is a co-routine we cannot block directly, but return + indicating that we need to block. */ + vCoRoutineAddToDelayedList( xTicksToWait, &( pxQueue->xTasksWaitingToReceive ) ); + portENABLE_INTERRUPTS(); + return errQUEUE_BLOCKED; + } + else + { + portENABLE_INTERRUPTS(); + return errQUEUE_FULL; + } + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + portENABLE_INTERRUPTS(); + + portDISABLE_INTERRUPTS(); + { + if( pxQueue->uxMessagesWaiting > ( UBaseType_t ) 0 ) + { + /* Data is available from the queue. */ + pxQueue->u.pcReadFrom += pxQueue->uxItemSize; + if( pxQueue->u.pcReadFrom >= pxQueue->pcTail ) + { + pxQueue->u.pcReadFrom = pxQueue->pcHead; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + --( pxQueue->uxMessagesWaiting ); + ( void ) memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->u.pcReadFrom, ( unsigned ) pxQueue->uxItemSize ); + + xReturn = pdPASS; + + /* Were any co-routines waiting for space to become available? */ + if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE ) + { + /* In this instance the co-routine could be placed directly + into the ready list as we are within a critical section. + Instead the same pending ready list mechanism is used as if + the event were caused from within an interrupt. */ + if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE ) + { + xReturn = errQUEUE_YIELD; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + xReturn = pdFAIL; + } + } + portENABLE_INTERRUPTS(); + + return xReturn; + } + +#endif /* configUSE_CO_ROUTINES */ +/*-----------------------------------------------------------*/ + +#if ( configUSE_CO_ROUTINES == 1 ) + + BaseType_t xQueueCRSendFromISR( QueueHandle_t xQueue, const void *pvItemToQueue, BaseType_t xCoRoutinePreviouslyWoken ) + { + Queue_t * const pxQueue = ( Queue_t * ) xQueue; + + /* Cannot block within an ISR so if there is no space on the queue then + exit without doing anything. */ + if( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) + { + prvCopyDataToQueue( pxQueue, pvItemToQueue, queueSEND_TO_BACK ); + + /* We only want to wake one co-routine per ISR, so check that a + co-routine has not already been woken. */ + if( xCoRoutinePreviouslyWoken == pdFALSE ) + { + if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE ) + { + if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE ) + { + return pdTRUE; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + + return xCoRoutinePreviouslyWoken; + } + +#endif /* configUSE_CO_ROUTINES */ +/*-----------------------------------------------------------*/ + +#if ( configUSE_CO_ROUTINES == 1 ) + + BaseType_t xQueueCRReceiveFromISR( QueueHandle_t xQueue, void *pvBuffer, BaseType_t *pxCoRoutineWoken ) + { + BaseType_t xReturn; + Queue_t * const pxQueue = ( Queue_t * ) xQueue; + + /* We cannot block from an ISR, so check there is data available. If + not then just leave without doing anything. */ + if( pxQueue->uxMessagesWaiting > ( UBaseType_t ) 0 ) + { + /* Copy the data from the queue. */ + pxQueue->u.pcReadFrom += pxQueue->uxItemSize; + if( pxQueue->u.pcReadFrom >= pxQueue->pcTail ) + { + pxQueue->u.pcReadFrom = pxQueue->pcHead; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + --( pxQueue->uxMessagesWaiting ); + ( void ) memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->u.pcReadFrom, ( unsigned ) pxQueue->uxItemSize ); + + if( ( *pxCoRoutineWoken ) == pdFALSE ) + { + if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE ) + { + if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE ) + { + *pxCoRoutineWoken = pdTRUE; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + + xReturn = pdPASS; + } + else + { + xReturn = pdFAIL; + } + + return xReturn; + } + +#endif /* configUSE_CO_ROUTINES */ +/*-----------------------------------------------------------*/ + +#if ( configQUEUE_REGISTRY_SIZE > 0 ) + + void vQueueAddToRegistry( QueueHandle_t xQueue, const char *pcQueueName ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ + { + UBaseType_t ux; + + /* See if there is an empty space in the registry. A NULL name denotes + a free slot. */ + for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ ) + { + if( xQueueRegistry[ ux ].pcQueueName == NULL ) + { + /* Store the information on this queue. */ + xQueueRegistry[ ux ].pcQueueName = pcQueueName; + xQueueRegistry[ ux ].xHandle = xQueue; + + traceQUEUE_REGISTRY_ADD( xQueue, pcQueueName ); + break; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + } + +#endif /* configQUEUE_REGISTRY_SIZE */ +/*-----------------------------------------------------------*/ + +#if ( configQUEUE_REGISTRY_SIZE > 0 ) + + const char *pcQueueGetName( QueueHandle_t xQueue ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ + { + UBaseType_t ux; + const char *pcReturn = NULL; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ + + /* Note there is nothing here to protect against another task adding or + removing entries from the registry while it is being searched. */ + for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ ) + { + if( xQueueRegistry[ ux ].xHandle == xQueue ) + { + pcReturn = xQueueRegistry[ ux ].pcQueueName; + break; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + + return pcReturn; + } /*lint !e818 xQueue cannot be a pointer to const because it is a typedef. */ + +#endif /* configQUEUE_REGISTRY_SIZE */ +/*-----------------------------------------------------------*/ + +#if ( configQUEUE_REGISTRY_SIZE > 0 ) + + void vQueueUnregisterQueue( QueueHandle_t xQueue ) + { + UBaseType_t ux; + + /* See if the handle of the queue being unregistered in actually in the + registry. */ + for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ ) + { + if( xQueueRegistry[ ux ].xHandle == xQueue ) + { + /* Set the name to NULL to show that this slot if free again. */ + xQueueRegistry[ ux ].pcQueueName = NULL; + + /* Set the handle to NULL to ensure the same queue handle cannot + appear in the registry twice if it is added, removed, then + added again. */ + xQueueRegistry[ ux ].xHandle = ( QueueHandle_t ) 0; + break; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + + } /*lint !e818 xQueue could not be pointer to const because it is a typedef. */ + +#endif /* configQUEUE_REGISTRY_SIZE */ +/*-----------------------------------------------------------*/ + +#if ( configUSE_TIMERS == 1 ) + + void vQueueWaitForMessageRestricted( QueueHandle_t xQueue, TickType_t xTicksToWait, const BaseType_t xWaitIndefinitely ) + { + Queue_t * const pxQueue = ( Queue_t * ) xQueue; + + /* This function should not be called by application code hence the + 'Restricted' in its name. It is not part of the public API. It is + designed for use by kernel code, and has special calling requirements. + It can result in vListInsert() being called on a list that can only + possibly ever have one item in it, so the list will be fast, but even + so it should be called with the scheduler locked and not from a critical + section. */ + + /* Only do anything if there are no messages in the queue. This function + will not actually cause the task to block, just place it on a blocked + list. It will not block until the scheduler is unlocked - at which + time a yield will be performed. If an item is added to the queue while + the queue is locked, and the calling task blocks on the queue, then the + calling task will be immediately unblocked when the queue is unlocked. */ + prvLockQueue( pxQueue ); + if( pxQueue->uxMessagesWaiting == ( UBaseType_t ) 0U ) + { + /* There is nothing in the queue, block for the specified period. */ + vTaskPlaceOnEventListRestricted( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait, xWaitIndefinitely ); + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + prvUnlockQueue( pxQueue ); + } + +#endif /* configUSE_TIMERS */ +/*-----------------------------------------------------------*/ + +#if( ( configUSE_QUEUE_SETS == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) + + QueueSetHandle_t xQueueCreateSet( const UBaseType_t uxEventQueueLength ) + { + QueueSetHandle_t pxQueue; + + pxQueue = xQueueGenericCreate( uxEventQueueLength, ( UBaseType_t ) sizeof( Queue_t * ), queueQUEUE_TYPE_SET ); + + return pxQueue; + } + +#endif /* configUSE_QUEUE_SETS */ +/*-----------------------------------------------------------*/ + +#if ( configUSE_QUEUE_SETS == 1 ) + + BaseType_t xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet ) + { + BaseType_t xReturn; + + taskENTER_CRITICAL(); + { + if( ( ( Queue_t * ) xQueueOrSemaphore )->pxQueueSetContainer != NULL ) + { + /* Cannot add a queue/semaphore to more than one queue set. */ + xReturn = pdFAIL; + } + else if( ( ( Queue_t * ) xQueueOrSemaphore )->uxMessagesWaiting != ( UBaseType_t ) 0 ) + { + /* Cannot add a queue/semaphore to a queue set if there are already + items in the queue/semaphore. */ + xReturn = pdFAIL; + } + else + { + ( ( Queue_t * ) xQueueOrSemaphore )->pxQueueSetContainer = xQueueSet; + xReturn = pdPASS; + } + } + taskEXIT_CRITICAL(); + + return xReturn; + } + +#endif /* configUSE_QUEUE_SETS */ +/*-----------------------------------------------------------*/ + +#if ( configUSE_QUEUE_SETS == 1 ) + + BaseType_t xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet ) + { + BaseType_t xReturn; + Queue_t * const pxQueueOrSemaphore = ( Queue_t * ) xQueueOrSemaphore; + + if( pxQueueOrSemaphore->pxQueueSetContainer != xQueueSet ) + { + /* The queue was not a member of the set. */ + xReturn = pdFAIL; + } + else if( pxQueueOrSemaphore->uxMessagesWaiting != ( UBaseType_t ) 0 ) + { + /* It is dangerous to remove a queue from a set when the queue is + not empty because the queue set will still hold pending events for + the queue. */ + xReturn = pdFAIL; + } + else + { + taskENTER_CRITICAL(); + { + /* The queue is no longer contained in the set. */ + pxQueueOrSemaphore->pxQueueSetContainer = NULL; + } + taskEXIT_CRITICAL(); + xReturn = pdPASS; + } + + return xReturn; + } /*lint !e818 xQueueSet could not be declared as pointing to const as it is a typedef. */ + +#endif /* configUSE_QUEUE_SETS */ +/*-----------------------------------------------------------*/ + +#if ( configUSE_QUEUE_SETS == 1 ) + + QueueSetMemberHandle_t xQueueSelectFromSet( QueueSetHandle_t xQueueSet, TickType_t const xTicksToWait ) + { + QueueSetMemberHandle_t xReturn = NULL; + + ( void ) xQueueReceive( ( QueueHandle_t ) xQueueSet, &xReturn, xTicksToWait ); /*lint !e961 Casting from one typedef to another is not redundant. */ + return xReturn; + } + +#endif /* configUSE_QUEUE_SETS */ +/*-----------------------------------------------------------*/ + +#if ( configUSE_QUEUE_SETS == 1 ) + + QueueSetMemberHandle_t xQueueSelectFromSetFromISR( QueueSetHandle_t xQueueSet ) + { + QueueSetMemberHandle_t xReturn = NULL; + + ( void ) xQueueReceiveFromISR( ( QueueHandle_t ) xQueueSet, &xReturn, NULL ); /*lint !e961 Casting from one typedef to another is not redundant. */ + return xReturn; + } + +#endif /* configUSE_QUEUE_SETS */ +/*-----------------------------------------------------------*/ + +#if ( configUSE_QUEUE_SETS == 1 ) + + static BaseType_t prvNotifyQueueSetContainer( const Queue_t * const pxQueue, const BaseType_t xCopyPosition ) + { + Queue_t *pxQueueSetContainer = pxQueue->pxQueueSetContainer; + BaseType_t xReturn = pdFALSE; + + /* This function must be called form a critical section. */ + + configASSERT( pxQueueSetContainer ); + configASSERT( pxQueueSetContainer->uxMessagesWaiting < pxQueueSetContainer->uxLength ); + + if( pxQueueSetContainer->uxMessagesWaiting < pxQueueSetContainer->uxLength ) + { + const int8_t cTxLock = pxQueueSetContainer->cTxLock; + + traceQUEUE_SEND( pxQueueSetContainer ); + + /* The data copied is the handle of the queue that contains data. */ + xReturn = prvCopyDataToQueue( pxQueueSetContainer, &pxQueue, xCopyPosition ); + + if( cTxLock == queueUNLOCKED ) + { + if( listLIST_IS_EMPTY( &( pxQueueSetContainer->xTasksWaitingToReceive ) ) == pdFALSE ) + { + if( xTaskRemoveFromEventList( &( pxQueueSetContainer->xTasksWaitingToReceive ) ) != pdFALSE ) + { + /* The task waiting has a higher priority. */ + xReturn = pdTRUE; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + pxQueueSetContainer->cTxLock = ( int8_t ) ( cTxLock + 1 ); + } + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + + return xReturn; + } + +#endif /* configUSE_QUEUE_SETS */ + + + + + + + + + + + + diff --git a/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/readme.txt b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/readme.txt new file mode 100644 index 0000000..58480c5 --- /dev/null +++ b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/readme.txt @@ -0,0 +1,17 @@ +Each real time kernel port consists of three files that contain the core kernel +components and are common to every port, and one or more files that are +specific to a particular microcontroller and or compiler. + ++ The FreeRTOS/Source directory contains the three files that are common to +every port - list.c, queue.c and tasks.c. The kernel is contained within these +three files. croutine.c implements the optional co-routine functionality - which +is normally only used on very memory limited systems. + ++ The FreeRTOS/Source/Portable directory contains the files that are specific to +a particular microcontroller and or compiler. + ++ The FreeRTOS/Source/include directory contains the real time kernel header +files. + +See the readme file in the FreeRTOS/Source/Portable directory for more +information. \ No newline at end of file diff --git a/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c new file mode 100644 index 0000000..c60045f --- /dev/null +++ b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c @@ -0,0 +1,1199 @@ +/* + * FreeRTOS Kernel V10.0.1 + * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/* Standard includes. */ +#include +#include + +/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining +all the API functions to use the MPU wrappers. That should only be done when +task.h is included from an application file. */ +#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE + +/* FreeRTOS includes. */ +#include "FreeRTOS.h" +#include "task.h" +#include "stream_buffer.h" + +#if( configUSE_TASK_NOTIFICATIONS != 1 ) + #error configUSE_TASK_NOTIFICATIONS must be set to 1 to build stream_buffer.c +#endif + +/* Lint e961 and e750 are suppressed as a MISRA exception justified because the +MPU ports require MPU_WRAPPERS_INCLUDED_FROM_API_FILE to be defined for the +header files above, but not in this file, in order to generate the correct +privileged Vs unprivileged linkage and placement. */ +#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /*lint !e961 !e750. */ + +/* If the user has not provided application specific Rx notification macros, +or #defined the notification macros away, them provide default implementations +that uses task notifications. */ +/*lint -save -e9026 Function like macros allowed and needed here so they can be overidden. */ +#ifndef sbRECEIVE_COMPLETED + #define sbRECEIVE_COMPLETED( pxStreamBuffer ) \ + vTaskSuspendAll(); \ + { \ + if( ( pxStreamBuffer )->xTaskWaitingToSend != NULL ) \ + { \ + ( void ) xTaskNotify( ( pxStreamBuffer )->xTaskWaitingToSend, \ + ( uint32_t ) 0, \ + eNoAction ); \ + ( pxStreamBuffer )->xTaskWaitingToSend = NULL; \ + } \ + } \ + ( void ) xTaskResumeAll(); +#endif /* sbRECEIVE_COMPLETED */ + +#ifndef sbRECEIVE_COMPLETED_FROM_ISR + #define sbRECEIVE_COMPLETED_FROM_ISR( pxStreamBuffer, \ + pxHigherPriorityTaskWoken ) \ + { \ + UBaseType_t uxSavedInterruptStatus; \ + \ + uxSavedInterruptStatus = ( UBaseType_t ) portSET_INTERRUPT_MASK_FROM_ISR(); \ + { \ + if( ( pxStreamBuffer )->xTaskWaitingToSend != NULL ) \ + { \ + ( void ) xTaskNotifyFromISR( ( pxStreamBuffer )->xTaskWaitingToSend, \ + ( uint32_t ) 0, \ + eNoAction, \ + pxHigherPriorityTaskWoken ); \ + ( pxStreamBuffer )->xTaskWaitingToSend = NULL; \ + } \ + } \ + portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ); \ + } +#endif /* sbRECEIVE_COMPLETED_FROM_ISR */ + +/* If the user has not provided an application specific Tx notification macro, +or #defined the notification macro away, them provide a default implementation +that uses task notifications. */ +#ifndef sbSEND_COMPLETED + #define sbSEND_COMPLETED( pxStreamBuffer ) \ + vTaskSuspendAll(); \ + { \ + if( ( pxStreamBuffer )->xTaskWaitingToReceive != NULL ) \ + { \ + ( void ) xTaskNotify( ( pxStreamBuffer )->xTaskWaitingToReceive, \ + ( uint32_t ) 0, \ + eNoAction ); \ + ( pxStreamBuffer )->xTaskWaitingToReceive = NULL; \ + } \ + } \ + ( void ) xTaskResumeAll(); +#endif /* sbSEND_COMPLETED */ + +#ifndef sbSEND_COMPLETE_FROM_ISR + #define sbSEND_COMPLETE_FROM_ISR( pxStreamBuffer, pxHigherPriorityTaskWoken ) \ + { \ + UBaseType_t uxSavedInterruptStatus; \ + \ + uxSavedInterruptStatus = ( UBaseType_t ) portSET_INTERRUPT_MASK_FROM_ISR(); \ + { \ + if( ( pxStreamBuffer )->xTaskWaitingToReceive != NULL ) \ + { \ + ( void ) xTaskNotifyFromISR( ( pxStreamBuffer )->xTaskWaitingToReceive, \ + ( uint32_t ) 0, \ + eNoAction, \ + pxHigherPriorityTaskWoken ); \ + ( pxStreamBuffer )->xTaskWaitingToReceive = NULL; \ + } \ + } \ + portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ); \ + } +#endif /* sbSEND_COMPLETE_FROM_ISR */ +/*lint -restore (9026) */ + +/* The number of bytes used to hold the length of a message in the buffer. */ +#define sbBYTES_TO_STORE_MESSAGE_LENGTH ( sizeof( size_t ) ) + +/* Bits stored in the ucFlags field of the stream buffer. */ +#define sbFLAGS_IS_MESSAGE_BUFFER ( ( uint8_t ) 1 ) /* Set if the stream buffer was created as a message buffer, in which case it holds discrete messages rather than a stream. */ +#define sbFLAGS_IS_STATICALLY_ALLOCATED ( ( uint8_t ) 2 ) /* Set if the stream buffer was created using statically allocated memory. */ + +/*-----------------------------------------------------------*/ + +/* Structure that hold state information on the buffer. */ +typedef struct xSTREAM_BUFFER /*lint !e9058 Style convention uses tag. */ +{ + volatile size_t xTail; /* Index to the next item to read within the buffer. */ + volatile size_t xHead; /* Index to the next item to write within the buffer. */ + size_t xLength; /* The length of the buffer pointed to by pucBuffer. */ + size_t xTriggerLevelBytes; /* The number of bytes that must be in the stream buffer before a task that is waiting for data is unblocked. */ + volatile TaskHandle_t xTaskWaitingToReceive; /* Holds the handle of a task waiting for data, or NULL if no tasks are waiting. */ + volatile TaskHandle_t xTaskWaitingToSend; /* Holds the handle of a task waiting to send data to a message buffer that is full. */ + uint8_t *pucBuffer; /* Points to the buffer itself - that is - the RAM that stores the data passed through the buffer. */ + uint8_t ucFlags; + + #if ( configUSE_TRACE_FACILITY == 1 ) + UBaseType_t uxStreamBufferNumber; /* Used for tracing purposes. */ + #endif +} StreamBuffer_t; + +/* + * The number of bytes available to be read from the buffer. + */ +static size_t prvBytesInBuffer( const StreamBuffer_t * const pxStreamBuffer ) PRIVILEGED_FUNCTION; + +/* + * Add xCount bytes from pucData into the pxStreamBuffer message buffer. + * Returns the number of bytes written, which will either equal xCount in the + * success case, or 0 if there was not enough space in the buffer (in which case + * no data is written into the buffer). + */ +static size_t prvWriteBytesToBuffer( StreamBuffer_t * const pxStreamBuffer, const uint8_t *pucData, size_t xCount ) PRIVILEGED_FUNCTION; + +/* + * If the stream buffer is being used as a message buffer, then reads an entire + * message out of the buffer. If the stream buffer is being used as a stream + * buffer then read as many bytes as possible from the buffer. + * prvReadBytesFromBuffer() is called to actually extract the bytes from the + * buffer's data storage area. + */ +static size_t prvReadMessageFromBuffer( StreamBuffer_t *pxStreamBuffer, + void *pvRxData, + size_t xBufferLengthBytes, + size_t xBytesAvailable, + size_t xBytesToStoreMessageLength ) PRIVILEGED_FUNCTION; + +/* + * If the stream buffer is being used as a message buffer, then writes an entire + * message to the buffer. If the stream buffer is being used as a stream + * buffer then write as many bytes as possible to the buffer. + * prvWriteBytestoBuffer() is called to actually send the bytes to the buffer's + * data storage area. + */ +static size_t prvWriteMessageToBuffer( StreamBuffer_t * const pxStreamBuffer, + const void * pvTxData, + size_t xDataLengthBytes, + size_t xSpace, + size_t xRequiredSpace ) PRIVILEGED_FUNCTION; + +/* + * Read xMaxCount bytes from the pxStreamBuffer message buffer and write them + * to pucData. + */ +static size_t prvReadBytesFromBuffer( StreamBuffer_t *pxStreamBuffer, + uint8_t *pucData, + size_t xMaxCount, + size_t xBytesAvailable ); PRIVILEGED_FUNCTION + +/* + * Called by both pxStreamBufferCreate() and pxStreamBufferCreateStatic() to + * initialise the members of the newly created stream buffer structure. + */ +static void prvInitialiseNewStreamBuffer( StreamBuffer_t * const pxStreamBuffer, + uint8_t * const pucBuffer, + size_t xBufferSizeBytes, + size_t xTriggerLevelBytes, + BaseType_t xIsMessageBuffer ) PRIVILEGED_FUNCTION; + +/*-----------------------------------------------------------*/ + +#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) + + StreamBufferHandle_t xStreamBufferGenericCreate( size_t xBufferSizeBytes, size_t xTriggerLevelBytes, BaseType_t xIsMessageBuffer ) + { + uint8_t *pucAllocatedMemory; + + /* In case the stream buffer is going to be used as a message buffer + (that is, it will hold discrete messages with a little meta data that + says how big the next message is) check the buffer will be large enough + to hold at least one message. */ + configASSERT( xBufferSizeBytes > sbBYTES_TO_STORE_MESSAGE_LENGTH ); + configASSERT( xTriggerLevelBytes <= xBufferSizeBytes ); + + /* A trigger level of 0 would cause a waiting task to unblock even when + the buffer was empty. */ + if( xTriggerLevelBytes == ( size_t ) 0 ) + { + xTriggerLevelBytes = ( size_t ) 1; /*lint !e9044 Parameter modified to ensure it doesn't have a dangerous value. */ + } + + /* A stream buffer requires a StreamBuffer_t structure and a buffer. + Both are allocated in a single call to pvPortMalloc(). The + StreamBuffer_t structure is placed at the start of the allocated memory + and the buffer follows immediately after. The requested size is + incremented so the free space is returned as the user would expect - + this is a quirk of the implementation that means otherwise the free + space would be reported as one byte smaller than would be logically + expected. */ + xBufferSizeBytes++; + pucAllocatedMemory = ( uint8_t * ) pvPortMalloc( xBufferSizeBytes + sizeof( StreamBuffer_t ) ); /*lint !e9079 malloc() only returns void*. */ + + if( pucAllocatedMemory != NULL ) + { + prvInitialiseNewStreamBuffer( ( StreamBuffer_t * ) pucAllocatedMemory, /* Structure at the start of the allocated memory. */ /*lint !e9087 Safe cast as allocated memory is aligned. */ /*lint !e826 Area is not too small and alignment is guaranteed provided malloc() behaves as expected and returns aligned buffer. */ + pucAllocatedMemory + sizeof( StreamBuffer_t ), /* Storage area follows. */ /*lint !e9016 Indexing past structure valid for uint8_t pointer, also storage area has no alignment requirement. */ + xBufferSizeBytes, + xTriggerLevelBytes, + xIsMessageBuffer ); + + traceSTREAM_BUFFER_CREATE( ( ( StreamBuffer_t * ) pucAllocatedMemory ), xIsMessageBuffer ); + } + else + { + traceSTREAM_BUFFER_CREATE_FAILED( xIsMessageBuffer ); + } + + return ( StreamBufferHandle_t * ) pucAllocatedMemory; /*lint !e9087 !e826 Safe cast as allocated memory is aligned. */ + } + +#endif /* configSUPPORT_DYNAMIC_ALLOCATION */ +/*-----------------------------------------------------------*/ + +#if( configSUPPORT_STATIC_ALLOCATION == 1 ) + + StreamBufferHandle_t xStreamBufferGenericCreateStatic( size_t xBufferSizeBytes, + size_t xTriggerLevelBytes, + BaseType_t xIsMessageBuffer, + uint8_t * const pucStreamBufferStorageArea, + StaticStreamBuffer_t * const pxStaticStreamBuffer ) + { + StreamBuffer_t * const pxStreamBuffer = ( StreamBuffer_t * ) pxStaticStreamBuffer; /*lint !e740 !e9087 Safe cast as StaticStreamBuffer_t is opaque Streambuffer_t. */ + StreamBufferHandle_t xReturn; + + configASSERT( pucStreamBufferStorageArea ); + configASSERT( pxStaticStreamBuffer ); + configASSERT( xTriggerLevelBytes <= xBufferSizeBytes ); + + /* A trigger level of 0 would cause a waiting task to unblock even when + the buffer was empty. */ + if( xTriggerLevelBytes == ( size_t ) 0 ) + { + xTriggerLevelBytes = ( size_t ) 1; /*lint !e9044 Function parameter deliberately modified to ensure it is in range. */ + } + + /* In case the stream buffer is going to be used as a message buffer + (that is, it will hold discrete messages with a little meta data that + says how big the next message is) check the buffer will be large enough + to hold at least one message. */ + configASSERT( xBufferSizeBytes > sbBYTES_TO_STORE_MESSAGE_LENGTH ); + + #if( configASSERT_DEFINED == 1 ) + { + /* Sanity check that the size of the structure used to declare a + variable of type StaticStreamBuffer_t equals the size of the real + message buffer structure. */ + volatile size_t xSize = sizeof( StaticStreamBuffer_t ); + configASSERT( xSize == sizeof( StreamBuffer_t ) ); + } + #endif /* configASSERT_DEFINED */ + + if( ( pucStreamBufferStorageArea != NULL ) && ( pxStaticStreamBuffer != NULL ) ) + { + prvInitialiseNewStreamBuffer( pxStreamBuffer, + pucStreamBufferStorageArea, + xBufferSizeBytes, + xTriggerLevelBytes, + xIsMessageBuffer ); + + /* Remember this was statically allocated in case it is ever deleted + again. */ + pxStreamBuffer->ucFlags |= sbFLAGS_IS_STATICALLY_ALLOCATED; + + traceSTREAM_BUFFER_CREATE( pxStreamBuffer, xIsMessageBuffer ); + + xReturn = ( StreamBufferHandle_t ) pxStaticStreamBuffer; /*lint !e9087 Data hiding requires cast to opaque type. */ + } + else + { + xReturn = NULL; + traceSTREAM_BUFFER_CREATE_STATIC_FAILED( xReturn, xIsMessageBuffer ); + } + + return xReturn; + } + +#endif /* ( configSUPPORT_STATIC_ALLOCATION == 1 ) */ +/*-----------------------------------------------------------*/ + +void vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer ) +{ +StreamBuffer_t * pxStreamBuffer = ( StreamBuffer_t * ) xStreamBuffer; /*lint !e9087 !e9079 Safe cast as StreamBufferHandle_t is opaque Streambuffer_t. */ + + configASSERT( pxStreamBuffer ); + + traceSTREAM_BUFFER_DELETE( xStreamBuffer ); + + if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_STATICALLY_ALLOCATED ) == ( uint8_t ) pdFALSE ) + { + #if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) + { + /* Both the structure and the buffer were allocated using a single call + to pvPortMalloc(), hence only one call to vPortFree() is required. */ + vPortFree( ( void * ) pxStreamBuffer ); /*lint !e9087 Standard free() semantics require void *, plus pxStreamBuffer was allocated by pvPortMalloc(). */ + } + #else + { + /* Should not be possible to get here, ucFlags must be corrupt. + Force an assert. */ + configASSERT( xStreamBuffer == ( StreamBufferHandle_t ) ~0 ); + } + #endif + } + else + { + /* The structure and buffer were not allocated dynamically and cannot be + freed - just scrub the structure so future use will assert. */ + memset( pxStreamBuffer, 0x00, sizeof( StreamBuffer_t ) ); + } +} +/*-----------------------------------------------------------*/ + +BaseType_t xStreamBufferReset( StreamBufferHandle_t xStreamBuffer ) +{ +StreamBuffer_t * const pxStreamBuffer = ( StreamBuffer_t * ) xStreamBuffer; /*lint !e9087 !e9079 Safe cast as StreamBufferHandle_t is opaque Streambuffer_t. */ +BaseType_t xReturn = pdFAIL, xIsMessageBuffer; + +#if( configUSE_TRACE_FACILITY == 1 ) + UBaseType_t uxStreamBufferNumber; +#endif + + configASSERT( pxStreamBuffer ); + + #if( configUSE_TRACE_FACILITY == 1 ) + { + /* Store the stream buffer number so it can be restored after the + reset. */ + uxStreamBufferNumber = pxStreamBuffer->uxStreamBufferNumber; + } + #endif + + /* Can only reset a message buffer if there are no tasks blocked on it. */ + if( pxStreamBuffer->xTaskWaitingToReceive == NULL ) + { + if( pxStreamBuffer->xTaskWaitingToSend == NULL ) + { + if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) != ( uint8_t ) 0 ) + { + xIsMessageBuffer = pdTRUE; + } + else + { + xIsMessageBuffer = pdFALSE; + } + + prvInitialiseNewStreamBuffer( pxStreamBuffer, + pxStreamBuffer->pucBuffer, + pxStreamBuffer->xLength, + pxStreamBuffer->xTriggerLevelBytes, + xIsMessageBuffer ); + xReturn = pdPASS; + + #if( configUSE_TRACE_FACILITY == 1 ) + { + pxStreamBuffer->uxStreamBufferNumber = uxStreamBufferNumber; + } + #endif + + traceSTREAM_BUFFER_RESET( xStreamBuffer ); + } + } + + return xReturn; +} +/*-----------------------------------------------------------*/ + +BaseType_t xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, size_t xTriggerLevel ) +{ +StreamBuffer_t * const pxStreamBuffer = ( StreamBuffer_t * ) xStreamBuffer; /*lint !e9087 !e9079 Safe cast as StreamBufferHandle_t is opaque Streambuffer_t. */ +BaseType_t xReturn; + + configASSERT( pxStreamBuffer ); + + /* It is not valid for the trigger level to be 0. */ + if( xTriggerLevel == ( size_t ) 0 ) + { + xTriggerLevel = ( size_t ) 1; /*lint !e9044 Parameter modified to ensure it doesn't have a dangerous value. */ + } + + /* The trigger level is the number of bytes that must be in the stream + buffer before a task that is waiting for data is unblocked. */ + if( xTriggerLevel <= pxStreamBuffer->xLength ) + { + pxStreamBuffer->xTriggerLevelBytes = xTriggerLevel; + xReturn = pdPASS; + } + else + { + xReturn = pdFALSE; + } + + return xReturn; +} +/*-----------------------------------------------------------*/ + +size_t xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) +{ +const StreamBuffer_t * const pxStreamBuffer = ( StreamBuffer_t * ) xStreamBuffer; /*lint !e9087 !e9079 Safe cast as StreamBufferHandle_t is opaque Streambuffer_t. */ +size_t xSpace; + + configASSERT( pxStreamBuffer ); + + xSpace = pxStreamBuffer->xLength + pxStreamBuffer->xTail; + xSpace -= pxStreamBuffer->xHead; + xSpace -= ( size_t ) 1; + + if( xSpace >= pxStreamBuffer->xLength ) + { + xSpace -= pxStreamBuffer->xLength; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + + return xSpace; +} +/*-----------------------------------------------------------*/ + +size_t xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) +{ +const StreamBuffer_t * const pxStreamBuffer = ( StreamBuffer_t * ) xStreamBuffer; /*lint !e9087 !e9079 Safe cast as StreamBufferHandle_t is opaque Streambuffer_t. */ +size_t xReturn; + + configASSERT( pxStreamBuffer ); + + xReturn = prvBytesInBuffer( pxStreamBuffer ); + return xReturn; +} +/*-----------------------------------------------------------*/ + +size_t xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, + const void *pvTxData, + size_t xDataLengthBytes, + TickType_t xTicksToWait ) +{ +StreamBuffer_t * const pxStreamBuffer = ( StreamBuffer_t * ) xStreamBuffer; /*lint !e9087 !e9079 Safe cast as StreamBufferHandle_t is opaque Streambuffer_t. */ +size_t xReturn, xSpace = 0; +size_t xRequiredSpace = xDataLengthBytes; +TimeOut_t xTimeOut; + + configASSERT( pvTxData ); + configASSERT( pxStreamBuffer ); + + /* This send function is used to write to both message buffers and stream + buffers. If this is a message buffer then the space needed must be + increased by the amount of bytes needed to store the length of the + message. */ + if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) != ( uint8_t ) 0 ) + { + xRequiredSpace += sbBYTES_TO_STORE_MESSAGE_LENGTH; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + + if( xTicksToWait != ( TickType_t ) 0 ) + { + vTaskSetTimeOutState( &xTimeOut ); + + do + { + /* Wait until the required number of bytes are free in the message + buffer. */ + taskENTER_CRITICAL(); + { + xSpace = xStreamBufferSpacesAvailable( pxStreamBuffer ); + + if( xSpace < xRequiredSpace ) + { + /* Clear notification state as going to wait for space. */ + ( void ) xTaskNotifyStateClear( NULL ); + + /* Should only be one writer. */ + configASSERT( pxStreamBuffer->xTaskWaitingToSend == NULL ); + pxStreamBuffer->xTaskWaitingToSend = xTaskGetCurrentTaskHandle(); + } + else + { + taskEXIT_CRITICAL(); + break; + } + } + taskEXIT_CRITICAL(); + + traceBLOCKING_ON_STREAM_BUFFER_SEND( xStreamBuffer ); + ( void ) xTaskNotifyWait( ( uint32_t ) 0, UINT32_MAX, NULL, xTicksToWait ); + pxStreamBuffer->xTaskWaitingToSend = NULL; + + } while( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE ); + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + + if( xSpace == ( size_t ) 0 ) + { + xSpace = xStreamBufferSpacesAvailable( pxStreamBuffer ); + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + + xReturn = prvWriteMessageToBuffer( pxStreamBuffer, pvTxData, xDataLengthBytes, xSpace, xRequiredSpace ); + + if( xReturn > ( size_t ) 0 ) + { + traceSTREAM_BUFFER_SEND( xStreamBuffer, xReturn ); + + /* Was a task waiting for the data? */ + if( prvBytesInBuffer( pxStreamBuffer ) >= pxStreamBuffer->xTriggerLevelBytes ) + { + sbSEND_COMPLETED( pxStreamBuffer ); + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + mtCOVERAGE_TEST_MARKER(); + traceSTREAM_BUFFER_SEND_FAILED( xStreamBuffer ); + } + + return xReturn; +} +/*-----------------------------------------------------------*/ + +size_t xStreamBufferSendFromISR( StreamBufferHandle_t xStreamBuffer, + const void *pvTxData, + size_t xDataLengthBytes, + BaseType_t * const pxHigherPriorityTaskWoken ) +{ +StreamBuffer_t * const pxStreamBuffer = ( StreamBuffer_t * ) xStreamBuffer; /*lint !e9087 !e9079 Safe cast as StreamBufferHandle_t is opaque Streambuffer_t. */ +size_t xReturn, xSpace; +size_t xRequiredSpace = xDataLengthBytes; + + configASSERT( pvTxData ); + configASSERT( pxStreamBuffer ); + + /* This send function is used to write to both message buffers and stream + buffers. If this is a message buffer then the space needed must be + increased by the amount of bytes needed to store the length of the + message. */ + if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) != ( uint8_t ) 0 ) + { + xRequiredSpace += sbBYTES_TO_STORE_MESSAGE_LENGTH; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + + xSpace = xStreamBufferSpacesAvailable( pxStreamBuffer ); + xReturn = prvWriteMessageToBuffer( pxStreamBuffer, pvTxData, xDataLengthBytes, xSpace, xRequiredSpace ); + + if( xReturn > ( size_t ) 0 ) + { + /* Was a task waiting for the data? */ + if( prvBytesInBuffer( pxStreamBuffer ) >= pxStreamBuffer->xTriggerLevelBytes ) + { + sbSEND_COMPLETE_FROM_ISR( pxStreamBuffer, pxHigherPriorityTaskWoken ); + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + + traceSTREAM_BUFFER_SEND_FROM_ISR( xStreamBuffer, xReturn ); + + return xReturn; +} +/*-----------------------------------------------------------*/ + +static size_t prvWriteMessageToBuffer( StreamBuffer_t * const pxStreamBuffer, + const void * pvTxData, + size_t xDataLengthBytes, + size_t xSpace, + size_t xRequiredSpace ) +{ + BaseType_t xShouldWrite; + size_t xReturn; + + if( xSpace == ( size_t ) 0 ) + { + /* Doesn't matter if this is a stream buffer or a message buffer, there + is no space to write. */ + xShouldWrite = pdFALSE; + } + else if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) == ( uint8_t ) 0 ) + { + /* This is a stream buffer, as opposed to a message buffer, so writing a + stream of bytes rather than discrete messages. Write as many bytes as + possible. */ + xShouldWrite = pdTRUE; + xDataLengthBytes = configMIN( xDataLengthBytes, xSpace ); /*lint !e9044 Function parameter modified to ensure it is capped to available space. */ + } + else if( xSpace >= xRequiredSpace ) + { + /* This is a message buffer, as opposed to a stream buffer, and there + is enough space to write both the message length and the message itself + into the buffer. Start by writing the length of the data, the data + itself will be written later in this function. */ + xShouldWrite = pdTRUE; + ( void ) prvWriteBytesToBuffer( pxStreamBuffer, ( const uint8_t * ) &( xDataLengthBytes ), sbBYTES_TO_STORE_MESSAGE_LENGTH ); + } + else + { + /* There is space available, but not enough space. */ + xShouldWrite = pdFALSE; + } + + if( xShouldWrite != pdFALSE ) + { + /* Writes the data itself. */ + xReturn = prvWriteBytesToBuffer( pxStreamBuffer, ( const uint8_t * ) pvTxData, xDataLengthBytes ); /*lint !e9079 Storage buffer is implemented as uint8_t for ease of sizing, alighment and access. */ + } + else + { + xReturn = 0; + } + + return xReturn; +} +/*-----------------------------------------------------------*/ + +size_t xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, + void *pvRxData, + size_t xBufferLengthBytes, + TickType_t xTicksToWait ) +{ +StreamBuffer_t * const pxStreamBuffer = ( StreamBuffer_t * ) xStreamBuffer; /*lint !e9087 !e9079 Safe cast as StreamBufferHandle_t is opaque Streambuffer_t. */ +size_t xReceivedLength = 0, xBytesAvailable, xBytesToStoreMessageLength; + + configASSERT( pvRxData ); + configASSERT( pxStreamBuffer ); + + /* This receive function is used by both message buffers, which store + discrete messages, and stream buffers, which store a continuous stream of + bytes. Discrete messages include an additional + sbBYTES_TO_STORE_MESSAGE_LENGTH bytes that hold the length of the + message. */ + if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) != ( uint8_t ) 0 ) + { + xBytesToStoreMessageLength = sbBYTES_TO_STORE_MESSAGE_LENGTH; + } + else + { + xBytesToStoreMessageLength = 0; + } + + if( xTicksToWait != ( TickType_t ) 0 ) + { + /* Checking if there is data and clearing the notification state must be + performed atomically. */ + taskENTER_CRITICAL(); + { + xBytesAvailable = prvBytesInBuffer( pxStreamBuffer ); + + /* If this function was invoked by a message buffer read then + xBytesToStoreMessageLength holds the number of bytes used to hold + the length of the next discrete message. If this function was + invoked by a stream buffer read then xBytesToStoreMessageLength will + be 0. */ + if( xBytesAvailable <= xBytesToStoreMessageLength ) + { + /* Clear notification state as going to wait for data. */ + ( void ) xTaskNotifyStateClear( NULL ); + + /* Should only be one reader. */ + configASSERT( pxStreamBuffer->xTaskWaitingToReceive == NULL ); + pxStreamBuffer->xTaskWaitingToReceive = xTaskGetCurrentTaskHandle(); + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + taskEXIT_CRITICAL(); + + if( xBytesAvailable <= xBytesToStoreMessageLength ) + { + /* Wait for data to be available. */ + traceBLOCKING_ON_STREAM_BUFFER_RECEIVE( xStreamBuffer ); + ( void ) xTaskNotifyWait( ( uint32_t ) 0, UINT32_MAX, NULL, xTicksToWait ); + pxStreamBuffer->xTaskWaitingToReceive = NULL; + + /* Recheck the data available after blocking. */ + xBytesAvailable = prvBytesInBuffer( pxStreamBuffer ); + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + xBytesAvailable = prvBytesInBuffer( pxStreamBuffer ); + } + + /* Whether receiving a discrete message (where xBytesToStoreMessageLength + holds the number of bytes used to store the message length) or a stream of + bytes (where xBytesToStoreMessageLength is zero), the number of bytes + available must be greater than xBytesToStoreMessageLength to be able to + read bytes from the buffer. */ + if( xBytesAvailable > xBytesToStoreMessageLength ) + { + xReceivedLength = prvReadMessageFromBuffer( pxStreamBuffer, pvRxData, xBufferLengthBytes, xBytesAvailable, xBytesToStoreMessageLength ); + + /* Was a task waiting for space in the buffer? */ + if( xReceivedLength != ( size_t ) 0 ) + { + traceSTREAM_BUFFER_RECEIVE( xStreamBuffer, xReceivedLength ); + sbRECEIVE_COMPLETED( pxStreamBuffer ); + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + traceSTREAM_BUFFER_RECEIVE_FAILED( xStreamBuffer ); + mtCOVERAGE_TEST_MARKER(); + } + + return xReceivedLength; +} +/*-----------------------------------------------------------*/ + +size_t xStreamBufferReceiveFromISR( StreamBufferHandle_t xStreamBuffer, + void *pvRxData, + size_t xBufferLengthBytes, + BaseType_t * const pxHigherPriorityTaskWoken ) +{ +StreamBuffer_t * const pxStreamBuffer = ( StreamBuffer_t * ) xStreamBuffer; /*lint !e9087 !e9079 Safe cast as StreamBufferHandle_t is opaque Streambuffer_t. */ +size_t xReceivedLength = 0, xBytesAvailable, xBytesToStoreMessageLength; + + configASSERT( pvRxData ); + configASSERT( pxStreamBuffer ); + + /* This receive function is used by both message buffers, which store + discrete messages, and stream buffers, which store a continuous stream of + bytes. Discrete messages include an additional + sbBYTES_TO_STORE_MESSAGE_LENGTH bytes that hold the length of the + message. */ + if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) != ( uint8_t ) 0 ) + { + xBytesToStoreMessageLength = sbBYTES_TO_STORE_MESSAGE_LENGTH; + } + else + { + xBytesToStoreMessageLength = 0; + } + + xBytesAvailable = prvBytesInBuffer( pxStreamBuffer ); + + /* Whether receiving a discrete message (where xBytesToStoreMessageLength + holds the number of bytes used to store the message length) or a stream of + bytes (where xBytesToStoreMessageLength is zero), the number of bytes + available must be greater than xBytesToStoreMessageLength to be able to + read bytes from the buffer. */ + if( xBytesAvailable > xBytesToStoreMessageLength ) + { + xReceivedLength = prvReadMessageFromBuffer( pxStreamBuffer, pvRxData, xBufferLengthBytes, xBytesAvailable, xBytesToStoreMessageLength ); + + /* Was a task waiting for space in the buffer? */ + if( xReceivedLength != ( size_t ) 0 ) + { + sbRECEIVE_COMPLETED_FROM_ISR( pxStreamBuffer, pxHigherPriorityTaskWoken ); + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + + traceSTREAM_BUFFER_RECEIVE_FROM_ISR( xStreamBuffer, xReceivedLength ); + + return xReceivedLength; +} +/*-----------------------------------------------------------*/ + +static size_t prvReadMessageFromBuffer( StreamBuffer_t *pxStreamBuffer, + void *pvRxData, + size_t xBufferLengthBytes, + size_t xBytesAvailable, + size_t xBytesToStoreMessageLength ) +{ +size_t xOriginalTail, xReceivedLength, xNextMessageLength; + + if( xBytesToStoreMessageLength != ( size_t ) 0 ) + { + /* A discrete message is being received. First receive the length + of the message. A copy of the tail is stored so the buffer can be + returned to its prior state if the length of the message is too + large for the provided buffer. */ + xOriginalTail = pxStreamBuffer->xTail; + ( void ) prvReadBytesFromBuffer( pxStreamBuffer, ( uint8_t * ) &xNextMessageLength, xBytesToStoreMessageLength, xBytesAvailable ); + + /* Reduce the number of bytes available by the number of bytes just + read out. */ + xBytesAvailable -= xBytesToStoreMessageLength; + + /* Check there is enough space in the buffer provided by the + user. */ + if( xNextMessageLength > xBufferLengthBytes ) + { + /* The user has provided insufficient space to read the message + so return the buffer to its previous state (so the length of + the message is in the buffer again). */ + pxStreamBuffer->xTail = xOriginalTail; + xNextMessageLength = 0; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + /* A stream of bytes is being received (as opposed to a discrete + message), so read as many bytes as possible. */ + xNextMessageLength = xBufferLengthBytes; + } + + /* Read the actual data. */ + xReceivedLength = prvReadBytesFromBuffer( pxStreamBuffer, ( uint8_t * ) pvRxData, xNextMessageLength, xBytesAvailable ); /*lint !e9079 Data storage area is implemented as uint8_t array for ease of sizing, indexing and alignment. */ + + return xReceivedLength; +} +/*-----------------------------------------------------------*/ + +BaseType_t xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) +{ +const StreamBuffer_t * const pxStreamBuffer = ( StreamBuffer_t * ) xStreamBuffer; /*lint !e9087 !e9079 Safe cast as StreamBufferHandle_t is opaque Streambuffer_t. */ +BaseType_t xReturn; +size_t xTail; + + configASSERT( pxStreamBuffer ); + + /* True if no bytes are available. */ + xTail = pxStreamBuffer->xTail; + if( pxStreamBuffer->xHead == xTail ) + { + xReturn = pdTRUE; + } + else + { + xReturn = pdFALSE; + } + + return xReturn; +} +/*-----------------------------------------------------------*/ + +BaseType_t xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) +{ +BaseType_t xReturn; +size_t xBytesToStoreMessageLength; +const StreamBuffer_t * const pxStreamBuffer = ( StreamBuffer_t * ) xStreamBuffer; /*lint !e9087 !e9079 Safe cast as StreamBufferHandle_t is opaque Streambuffer_t. */ + + configASSERT( pxStreamBuffer ); + + /* This generic version of the receive function is used by both message + buffers, which store discrete messages, and stream buffers, which store a + continuous stream of bytes. Discrete messages include an additional + sbBYTES_TO_STORE_MESSAGE_LENGTH bytes that hold the length of the message. */ + if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) != ( uint8_t ) 0 ) + { + xBytesToStoreMessageLength = sbBYTES_TO_STORE_MESSAGE_LENGTH; + } + else + { + xBytesToStoreMessageLength = 0; + } + + /* True if the available space equals zero. */ + if( xStreamBufferSpacesAvailable( xStreamBuffer ) <= xBytesToStoreMessageLength ) + { + xReturn = pdTRUE; + } + else + { + xReturn = pdFALSE; + } + + return xReturn; +} +/*-----------------------------------------------------------*/ + +BaseType_t xStreamBufferSendCompletedFromISR( StreamBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken ) +{ +StreamBuffer_t * const pxStreamBuffer = ( StreamBuffer_t * ) xStreamBuffer; /*lint !e9087 !e9079 Safe cast as StreamBufferHandle_t is opaque Streambuffer_t. */ +BaseType_t xReturn; +UBaseType_t uxSavedInterruptStatus; + + configASSERT( pxStreamBuffer ); + + uxSavedInterruptStatus = ( UBaseType_t ) portSET_INTERRUPT_MASK_FROM_ISR(); + { + if( ( pxStreamBuffer )->xTaskWaitingToReceive != NULL ) + { + ( void ) xTaskNotifyFromISR( ( pxStreamBuffer )->xTaskWaitingToReceive, + ( uint32_t ) 0, + eNoAction, + pxHigherPriorityTaskWoken ); + ( pxStreamBuffer )->xTaskWaitingToReceive = NULL; + xReturn = pdTRUE; + } + else + { + xReturn = pdFALSE; + } + } + portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ); + + return xReturn; +} +/*-----------------------------------------------------------*/ + +BaseType_t xStreamBufferReceiveCompletedFromISR( StreamBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken ) +{ +StreamBuffer_t * const pxStreamBuffer = ( StreamBuffer_t * ) xStreamBuffer; /*lint !e9087 !e9079 Safe cast as StreamBufferHandle_t is opaque Streambuffer_t. */ +BaseType_t xReturn; +UBaseType_t uxSavedInterruptStatus; + + configASSERT( pxStreamBuffer ); + + uxSavedInterruptStatus = ( UBaseType_t ) portSET_INTERRUPT_MASK_FROM_ISR(); + { + if( ( pxStreamBuffer )->xTaskWaitingToSend != NULL ) + { + ( void ) xTaskNotifyFromISR( ( pxStreamBuffer )->xTaskWaitingToSend, + ( uint32_t ) 0, + eNoAction, + pxHigherPriorityTaskWoken ); + ( pxStreamBuffer )->xTaskWaitingToSend = NULL; + xReturn = pdTRUE; + } + else + { + xReturn = pdFALSE; + } + } + portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ); + + return xReturn; +} +/*-----------------------------------------------------------*/ + +static size_t prvWriteBytesToBuffer( StreamBuffer_t * const pxStreamBuffer, const uint8_t *pucData, size_t xCount ) +{ +size_t xNextHead, xFirstLength; + + configASSERT( xCount > ( size_t ) 0 ); + + xNextHead = pxStreamBuffer->xHead; + + /* Calculate the number of bytes that can be added in the first write - + which may be less than the total number of bytes that need to be added if + the buffer will wrap back to the beginning. */ + xFirstLength = configMIN( pxStreamBuffer->xLength - xNextHead, xCount ); + + /* Write as many bytes as can be written in the first write. */ + configASSERT( ( xNextHead + xFirstLength ) <= pxStreamBuffer->xLength ); + memcpy( ( void* ) ( &( pxStreamBuffer->pucBuffer[ xNextHead ] ) ), ( const void * ) pucData, xFirstLength ); /*lint !e9087 memcpy() requires void *. */ + + /* If the number of bytes written was less than the number that could be + written in the first write... */ + if( xCount > xFirstLength ) + { + /* ...then write the remaining bytes to the start of the buffer. */ + configASSERT( ( xCount - xFirstLength ) <= pxStreamBuffer->xLength ); + memcpy( ( void * ) pxStreamBuffer->pucBuffer, ( const void * ) &( pucData[ xFirstLength ] ), xCount - xFirstLength ); /*lint !e9087 memcpy() requires void *. */ + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + + xNextHead += xCount; + if( xNextHead >= pxStreamBuffer->xLength ) + { + xNextHead -= pxStreamBuffer->xLength; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + + pxStreamBuffer->xHead = xNextHead; + + return xCount; +} +/*-----------------------------------------------------------*/ + +static size_t prvReadBytesFromBuffer( StreamBuffer_t *pxStreamBuffer, uint8_t *pucData, size_t xMaxCount, size_t xBytesAvailable ) +{ +size_t xCount, xFirstLength, xNextTail; + + /* Use the minimum of the wanted bytes and the available bytes. */ + xCount = configMIN( xBytesAvailable, xMaxCount ); + + if( xCount > ( size_t ) 0 ) + { + xNextTail = pxStreamBuffer->xTail; + + /* Calculate the number of bytes that can be read - which may be + less than the number wanted if the data wraps around to the start of + the buffer. */ + xFirstLength = configMIN( pxStreamBuffer->xLength - xNextTail, xCount ); + + /* Obtain the number of bytes it is possible to obtain in the first + read. Asserts check bounds of read and write. */ + configASSERT( xFirstLength <= xMaxCount ); + configASSERT( ( xNextTail + xFirstLength ) <= pxStreamBuffer->xLength ); + memcpy( ( void * ) pucData, ( const void * ) &( pxStreamBuffer->pucBuffer[ xNextTail ] ), xFirstLength ); /*lint !e9087 memcpy() requires void *. */ + + /* If the total number of wanted bytes is greater than the number + that could be read in the first read... */ + if( xCount > xFirstLength ) + { + /*...then read the remaining bytes from the start of the buffer. */ + configASSERT( xCount <= xMaxCount ); + memcpy( ( void * ) &( pucData[ xFirstLength ] ), ( void * ) ( pxStreamBuffer->pucBuffer ), xCount - xFirstLength ); /*lint !e9087 memcpy() requires void *. */ + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + + /* Move the tail pointer to effectively remove the data read from + the buffer. */ + xNextTail += xCount; + + if( xNextTail >= pxStreamBuffer->xLength ) + { + xNextTail -= pxStreamBuffer->xLength; + } + + pxStreamBuffer->xTail = xNextTail; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + + return xCount; +} +/*-----------------------------------------------------------*/ + +static size_t prvBytesInBuffer( const StreamBuffer_t * const pxStreamBuffer ) +{ +/* Returns the distance between xTail and xHead. */ +size_t xCount; + + xCount = pxStreamBuffer->xLength + pxStreamBuffer->xHead; + xCount -= pxStreamBuffer->xTail; + if ( xCount >= pxStreamBuffer->xLength ) + { + xCount -= pxStreamBuffer->xLength; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + + return xCount; +} +/*-----------------------------------------------------------*/ + +static void prvInitialiseNewStreamBuffer( StreamBuffer_t * const pxStreamBuffer, + uint8_t * const pucBuffer, + size_t xBufferSizeBytes, + size_t xTriggerLevelBytes, + BaseType_t xIsMessageBuffer ) +{ + /* Assert here is deliberately writing to the entire buffer to ensure it can + be written to without generating exceptions, and is setting the buffer to a + known value to assist in development/debugging. */ + #if( configASSERT_DEFINED == 1 ) + { + /* The value written just has to be identifiable when looking at the + memory. Don't use 0xA5 as that is the stack fill value and could + result in confusion as to what is actually being observed. */ + const BaseType_t xWriteValue = 0x55; + configASSERT( memset( pucBuffer, ( int ) xWriteValue, xBufferSizeBytes ) == pucBuffer ); + } + #endif + + memset( ( void * ) pxStreamBuffer, 0x00, sizeof( StreamBuffer_t ) ); /*lint !e9087 memset() requires void *. */ + pxStreamBuffer->pucBuffer = pucBuffer; + pxStreamBuffer->xLength = xBufferSizeBytes; + pxStreamBuffer->xTriggerLevelBytes = xTriggerLevelBytes; + + if( xIsMessageBuffer != pdFALSE ) + { + pxStreamBuffer->ucFlags |= sbFLAGS_IS_MESSAGE_BUFFER; + } +} + +#if ( configUSE_TRACE_FACILITY == 1 ) + + UBaseType_t uxStreamBufferGetStreamBufferNumber( StreamBufferHandle_t xStreamBuffer ) + { + return ( ( StreamBuffer_t * ) xStreamBuffer )->uxStreamBufferNumber; + } + +#endif /* configUSE_TRACE_FACILITY */ +/*-----------------------------------------------------------*/ + +#if ( configUSE_TRACE_FACILITY == 1 ) + + void vStreamBufferSetStreamBufferNumber( StreamBufferHandle_t xStreamBuffer, UBaseType_t uxStreamBufferNumber ) + { + ( ( StreamBuffer_t * ) xStreamBuffer )->uxStreamBufferNumber = uxStreamBufferNumber; + } + +#endif /* configUSE_TRACE_FACILITY */ +/*-----------------------------------------------------------*/ + +#if ( configUSE_TRACE_FACILITY == 1 ) + + uint8_t ucStreamBufferGetStreamBufferType( StreamBufferHandle_t xStreamBuffer ) + { + return ( ( StreamBuffer_t * )xStreamBuffer )->ucFlags | sbFLAGS_IS_MESSAGE_BUFFER; + } + +#endif /* configUSE_TRACE_FACILITY */ +/*-----------------------------------------------------------*/ diff --git a/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/tasks.c b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/tasks.c new file mode 100644 index 0000000..bb69765 --- /dev/null +++ b/nations-tec/N32WB03x_SDK_V2.0.0/middlewares/Third_Party/FreeRTOS/Source/tasks.c @@ -0,0 +1,5039 @@ +/* + * FreeRTOS Kernel V10.0.1 + * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/* Standard includes. */ +#include +#include + +/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining +all the API functions to use the MPU wrappers. That should only be done when +task.h is included from an application file. */ +#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE + +/* FreeRTOS includes. */ +#include "FreeRTOS.h" +#include "task.h" +#include "timers.h" +#include "stack_macros.h" + +/* Lint e961 and e750 are suppressed as a MISRA exception justified because the +MPU ports require MPU_WRAPPERS_INCLUDED_FROM_API_FILE to be defined for the +header files above, but not in this file, in order to generate the correct +privileged Vs unprivileged linkage and placement. */ +#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /*lint !e961 !e750. */ + +/* Set configUSE_STATS_FORMATTING_FUNCTIONS to 2 to include the stats formatting +functions but without including stdio.h here. */ +#if ( configUSE_STATS_FORMATTING_FUNCTIONS == 1 ) + /* At the bottom of this file are two optional functions that can be used + to generate human readable text from the raw data generated by the + uxTaskGetSystemState() function. Note the formatting functions are provided + for convenience only, and are NOT considered part of the kernel. */ + #include