208 lines
8.6 KiB
C
208 lines
8.6 KiB
C
/**
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* Copyright (c) 2022, Nations Technologies Inc.
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*
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* All rights reserved.
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*
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* This software is the exclusive property of Nations Technologies Inc. (Hereinafter
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* referred to as NATIONS). This software, and the product of NATIONS described herein
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* (Hereinafter referred to as the Product) are owned by NATIONS under the laws and treaties
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* of the People's Republic of China and other applicable jurisdictions worldwide.
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*
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* NATIONS does not grant any license under its patents, copyrights, trademarks, or other
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* intellectual property rights. Names and brands of third party may be mentioned or referred
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* thereto (if any) for identification purposes only.
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*
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* NATIONS reserves the right to make changes, corrections, enhancements, modifications, and
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* improvements to this software at any time without notice. Please contact NATIONS and obtain
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* the latest version of this software before placing orders.
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* Although NATIONS has attempted to provide accurate and reliable information, NATIONS assumes
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* no responsibility for the accuracy and reliability of this software.
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*
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* It is the responsibility of the user of this software to properly design, program, and test
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* the functionality and safety of any application made of this information and any resulting product.
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* In no event shall NATIONS be liable for any direct, indirect, incidental, special,exemplary, or
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* consequential damages arising in any way out of the use of this software or the Product.
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*
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* NATIONS Products are neither intended nor warranted for usage in systems or equipment, any
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* malfunction or failure of which may cause loss of human life, bodily injury or severe property
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* damage. Such applications are deemed, "Insecure Usage".
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*
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* All Insecure Usage shall be made at user's risk. User shall indemnify NATIONS and hold NATIONS
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* harmless from and against all claims, costs, damages, and other liabilities, arising from or related
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* to any customer's Insecure Usage.
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* Any express or implied warranty with regard to this software or the Product, including,but not
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* limited to, the warranties of merchantability, fitness for a particular purpose and non-infringement
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* are disclaimed to the fullest extent permitted by law.
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* Unless otherwise explicitly permitted by NATIONS, anyone may not duplicate, modify, transcribe
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* or otherwise distribute this software for any purposes, in whole or in part.
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*
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* NATIONS products and technologies shall not be used for or incorporated into any products or systems
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* whose manufacture, use, or sale is prohibited under any applicable domestic or foreign laws or regulations.
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* User shall comply with any applicable export control laws and regulations promulgated and administered by
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* the governments of any countries asserting jurisdiction over the parties or transactions.
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**/
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/**
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*\*\file n32g003_spi.h
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*\*\author Nations
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*\*\version v1.0.0
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*\*\copyright Copyright (c) 2022, Nations Technologies Inc. All rights reserved.
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**/
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#ifndef __N32G003_SPI_H__
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#define __N32G003_SPI_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include "n32g003.h"
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/** SPI Init structure definition **/
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typedef struct
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{
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uint16_t DataDirection; /* Specifies the SPI unidirectional or bidirectional data mode */
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uint16_t SpiMode; /* Specifies the SPI operating mode */
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uint16_t DataLen; /* Specifies the SPI data size */
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uint16_t CLKPOL; /* Specifies the serial clock steady state */
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uint16_t CLKPHA; /* Specifies the clock active edge for the bit capture */
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uint16_t NSS; /* Specifies whether the NSS signal is managed by
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hardware (NSS pin) or by software using the SSI bit */
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uint16_t BaudRatePres; /* Specifies the Baud Rate prescaler value which will be
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used to configure the transmit and receive SCK clock */
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uint16_t FirstBit; /* Specifies whether data transfers start from MSB or LSB bit */
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} SPI_InitType;
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/** SPI_data_direction **/
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#define SPI_DATADIRECTION_MASK (~(SPI_CTRL1_RONLY | SPI_CTRL1_BIDIROEN | SPI_CTRL1_BIDIRMODE)) /* direction [15:14] and [10] bits Mask */
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#define SPI_DIR_DOUBLELINE_FULLDUPLEX ((uint16_t)0x0000)
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#define SPI_DIR_DOUBLELINE_RONLY_TX ((uint16_t)0x0000)
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#define SPI_DIR_DOUBLELINE_RONLY_RX (SPI_CTRL1_RONLY)
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#define SPI_DIR_SINGLELINE_RX (SPI_CTRL1_BIDIRMODE)
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#define SPI_DIR_SINGLELINE_TX (SPI_CTRL1_BIDIRMODE | SPI_CTRL1_BIDIROEN)
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/** SPI mode **/
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#define SPI_MODE_MASK (~SPI_CTRL1_MSEL) /* MSEL bits Mask */
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#define SPI_MODE_MASTER (SPI_CTRL1_MSEL)
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#define SPI_MODE_SLAVE ((uint16_t)0x0000)
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/** SPI_data_size **/
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#define SPI_DATALEN_MASK (~SPI_CTRL1_DATFF) /* DATFF bits Mask */
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#define SPI_DATA_SIZE_16BITS (SPI_CTRL1_DATFF)
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#define SPI_DATA_SIZE_8BITS ((uint16_t)0x0000)
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/** SPI_Clock_Polarity **/
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#define SPI_CLKPOL_MASK (~SPI_CTRL1_CLKPOL) /* CLKPOL bits Mask */
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#define SPI_CLKPOL_LOW ((uint16_t)0x0000)
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#define SPI_CLKPOL_HIGH (SPI_CTRL1_CLKPOL)
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/** SPI_Clock_Phase **/
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#define SPI_CLKPHA_MASK (~SPI_CTRL1_CLKPHA) /* CLKPHA bits Mask */
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#define SPI_CLKPHA_FIRST_EDGE ((uint16_t)0x0000)
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#define SPI_CLKPHA_SECOND_EDGE (SPI_CTRL1_CLKPHA)
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/** SPI_Slave_Select_management **/
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#define SPI_NSS_MASK (~SPI_CTRL1_SSMEN) /* SSMEN bits Mask */
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#define SPI_NSS_SOFT (SPI_CTRL1_SSMEN)
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#define SPI_NSS_HARD ((uint16_t)0x0000)
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#define SPI_NSS_OUTPUT_ENABLE SPI_CTRL2_SSOEN
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#define SPI_NSS_OUTPUT_DISABLE (~SPI_CTRL2_SSOEN)
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/** SPI_BaudRate_Prescaler **/
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#define SPI_BAUDRATEPRES_MASK (~SPI_CTRL1_BR) /* BR[2:0] bits Mask */
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#define SPI_BR_PRESCALER_2 ((uint16_t)0x0000)
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#define SPI_BR_PRESCALER_4 (SPI_CTRL1_BR0)
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#define SPI_BR_PRESCALER_8 (SPI_CTRL1_BR1)
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#define SPI_BR_PRESCALER_16 (SPI_CTRL1_BR1 | SPI_CTRL1_BR0)
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#define SPI_BR_PRESCALER_32 (SPI_CTRL1_BR2)
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#define SPI_BR_PRESCALER_64 (SPI_CTRL1_BR2 | SPI_CTRL1_BR0)
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#define SPI_BR_PRESCALER_128 (SPI_CTRL1_BR2 | SPI_CTRL1_BR1)
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#define SPI_BR_PRESCALER_256 (SPI_CTRL1_BR2 | SPI_CTRL1_BR1 | SPI_CTRL1_BR0)
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/** SPI_MSB_LSB_transmission **/
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#define SPI_FIRSTBIT_MASK (~SPI_CTRL1_LSBFF) /* LSBFF bits Mask */
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#define SPI_FB_MSB ((uint16_t)0x0000)
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#define SPI_FB_LSB (SPI_CTRL1_LSBFF)
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/** SPI Converter **/
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#define SPI_TURN_ON (SPI_CTRL1_SPIEN) /* SPIEN ON bit */
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#define SPI_TURN_OFF (~SPI_CTRL1_SPIEN) /* SPIEN ON bit Mask */
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/** SPI_NSS_internal_software_management **/
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#define SPI_NSS_HIGH (SPI_CTRL1_SSEL)
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#define SPI_NSS_LOW (~SPI_CTRL1_SSEL)
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/** SPI_flags_definition **/
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#define SPI_FLAG_RNE (SPI_STS_RNE)
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#define SPI_FLAG_TE (SPI_STS_TE)
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#define SPI_FLAG_MODERR (SPI_STS_MODERR)
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#define SPI_FLAG_OVER (SPI_STS_OVER)
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#define SPI_FLAG_BUSY (SPI_STS_BUSY)
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#define SPI_INT_RNE (SPI_CTRL2_RNEINTEN)
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#define SPI_INT_TE (SPI_CTRL2_TEINTEN)
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#define SPI_INT_ERR (SPI_CTRL2_ERRINTEN)
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#define SPI_INT_FLAG_RNE (SPI_STS_RNE)
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#define SPI_INT_FLAG_TE (SPI_STS_TE)
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#define SPI_INT_FLAG_MODERR (SPI_STS_MODERR)
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#define SPI_INT_FLAG_OVER (SPI_STS_OVER)
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#define SPI_INT_FLAG_ERR (SPI_STS_MODERR | SPI_STS_OVER)
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/** SPI Macro Definition End **/
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/** SPI Driving Functions Declaration **/
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void SPI_Reset(void);
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void SPI_ON(void);
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void SPI_OFF(void);
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void SPI_Initializes_Structure(SPI_InitType* SPI_InitStruct);
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void SPI_DataDirection_Config(uint16_t DataDirection);
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void SPI_SpiMode_Config(uint16_t SpiMode);
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void SPI_DataLen_Config(uint16_t DataLen);
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void SPI_CLKPOL_Config(uint16_t CLKPOL);
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void SPI_CLKPHA_Config(uint16_t CLKPHA);
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void SPI_NSS_Config(uint16_t NSS);
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void SPI_BaudRatePres_Config(uint16_t BaudRatePres);
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void SPI_FirstBit_Config(uint16_t FirstBit);
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void SPI_Initializes(SPI_InitType* SPI_InitStruct);
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void SPI_Set_Nss_Level(uint16_t SPI_NSS_Internal_Soft);
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void SPI_NSS_Output_Enable(void);
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void SPI_NSS_Output_Disable(void);
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void SPI_Data_Transmit(uint16_t Data);
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uint16_t SPI_Data_Get(void);
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void SPI_Interrupts_Enable(uint8_t spi_interrupt);
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void SPI_Interrupts_Disable(uint8_t spi_interrupt);
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FlagStatus SPI_Flag_Status_Get(uint8_t spi_flag);
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FlagStatus SPI_Interrupt_Flag_Status_Get(uint16_t spi_flag);
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void SPI_OVER_Flag_Clear(void);
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#ifdef __cplusplus
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}
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#endif
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#endif /*__N32G003_SPI_H__ */
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